1 /*- 2 * Copyright (c) 2022 Andrew Turner 3 * Copyright (c) 2023 Arm Ltd 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/bus.h> 30 #include <sys/kernel.h> 31 #include <sys/module.h> 32 #include <sys/rman.h> 33 34 #include <contrib/dev/acpica/include/acpi.h> 35 #include <contrib/dev/acpica/include/accommon.h> 36 37 #include <dev/acpica/acpivar.h> 38 #include <dev/acpica/acpi_pcibvar.h> 39 40 #include <dev/pci/pcivar.h> 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcib_private.h> 43 #include <dev/pci/pci_host_generic.h> 44 #include <dev/pci/pci_host_generic_acpi.h> 45 46 #include <dev/psci/psci.h> 47 48 #include "pcib_if.h" 49 50 static device_probe_t pci_host_acpi_smccc_probe; 51 static device_attach_t pci_host_acpi_smccc_attach; 52 static pcib_read_config_t pci_host_acpi_smccc_read_config; 53 static pcib_write_config_t pci_host_acpi_smccc_write_config; 54 55 static bool pci_host_acpi_smccc_pci_version(uint32_t *); 56 57 static int 58 pci_host_acpi_smccc_probe(device_t dev) 59 { 60 ACPI_DEVICE_INFO *devinfo; 61 struct resource *res; 62 ACPI_HANDLE h; 63 int rid, root; 64 65 if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL || 66 ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo))) 67 return (ENXIO); 68 root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0; 69 AcpiOsFree(devinfo); 70 if (!root) 71 return (ENXIO); 72 73 /* 74 * Check if we have memory resources. We may have a non-memory 75 * mapped device, e.g. using the Arm PCI Configuration Space 76 * Access Firmware Interface (DEN0115). 77 */ 78 rid = 0; 79 res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 0); 80 if (res != NULL) { 81 bus_release_resource(dev, SYS_RES_MEMORY, rid, res); 82 return (ENXIO); 83 } 84 85 /* Check for the PCI_VERSION call */ 86 if (!pci_host_acpi_smccc_pci_version(NULL)) { 87 return (ENXIO); 88 } 89 90 device_set_desc(dev, "ARM PCI Firmware config space host controller"); 91 return (BUS_PROBE_SPECIFIC); 92 } 93 94 #define SMCCC_PCI_VERSION \ 95 SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, \ 96 SMCCC_STD_SECURE_SERVICE_CALLS, 0x130) 97 #define SMCCC_PCI_FEATURES \ 98 SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, \ 99 SMCCC_STD_SECURE_SERVICE_CALLS, 0x131) 100 #define SMCCC_PCI_READ \ 101 SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, \ 102 SMCCC_STD_SECURE_SERVICE_CALLS, 0x132) 103 #define SMCCC_PCI_WRITE \ 104 SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, \ 105 SMCCC_STD_SECURE_SERVICE_CALLS, 0x133) 106 #define SMCCC_PCI_GET_SEG_INFO \ 107 SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, \ 108 SMCCC_STD_SECURE_SERVICE_CALLS, 0x134) 109 110 CTASSERT(SMCCC_PCI_VERSION == 0x84000130); 111 CTASSERT(SMCCC_PCI_FEATURES == 0x84000131); 112 CTASSERT(SMCCC_PCI_READ == 0x84000132); 113 CTASSERT(SMCCC_PCI_WRITE == 0x84000133); 114 CTASSERT(SMCCC_PCI_GET_SEG_INFO == 0x84000134); 115 116 #define SMCCC_PCI_MAJOR(x) (((x) >> 16) & 0x7fff) 117 #define SMCCC_PCI_MINOR(x) ((x) & 0xffff) 118 119 #define SMCCC_PCI_SEG_END(x) (((x) >> 8) & 0xff) 120 #define SMCCC_PCI_SEG_START(x) ((x) & 0xff) 121 122 static bool 123 pci_host_acpi_smccc_has_feature(uint32_t pci_func_id) 124 { 125 struct arm_smccc_res result; 126 127 if (psci_callfn(SMCCC_PCI_FEATURES, pci_func_id, 0, 0, 0, 0, 0, 0, 128 &result) < 0) { 129 return (false); 130 } 131 132 return (true); 133 } 134 135 static bool 136 pci_host_acpi_smccc_pci_version(uint32_t *versionp) 137 { 138 struct arm_smccc_res result; 139 140 if (psci_callfn(SMCCC_PCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &result) < 0) { 141 return (false); 142 } 143 144 if (versionp != NULL) { 145 *versionp = result.a0; 146 } 147 148 return (true); 149 } 150 151 static int 152 pci_host_acpi_smccc_attach(device_t dev) 153 { 154 struct generic_pcie_acpi_softc *sc; 155 struct arm_smccc_res result; 156 uint32_t version; 157 int end, start; 158 int error; 159 160 sc = device_get_softc(dev); 161 sc->base.quirks |= PCIE_CUSTOM_CONFIG_SPACE_QUIRK; 162 163 MPASS(psci_callfn != NULL); 164 165 /* Read the version */ 166 if (!pci_host_acpi_smccc_pci_version(&version)) { 167 device_printf(dev, 168 "Failed to read the SMCCC PCI version\n"); 169 return (ENXIO); 170 } 171 172 if (bootverbose) { 173 device_printf(dev, "Firmware v%d.%d\n", 174 SMCCC_PCI_MAJOR(version), SMCCC_PCI_MINOR(version)); 175 } 176 177 if (!pci_host_acpi_smccc_has_feature(SMCCC_PCI_READ) || 178 !pci_host_acpi_smccc_has_feature(SMCCC_PCI_WRITE)) { 179 device_printf(dev, "Missing read/write functions\n"); 180 return (ENXIO); 181 } 182 183 error = pci_host_generic_acpi_init(dev); 184 if (error != 0) 185 return (error); 186 187 if (pci_host_acpi_smccc_has_feature(SMCCC_PCI_GET_SEG_INFO) && 188 psci_callfn(SMCCC_PCI_GET_SEG_INFO, sc->base.ecam, 0, 0, 0, 0, 0, 189 0, &result) == SMCCC_RET_SUCCESS) { 190 start = SMCCC_PCI_SEG_START(result.a1); 191 end = SMCCC_PCI_SEG_END(result.a1); 192 193 sc->base.bus_start = MAX(sc->base.bus_start, start); 194 sc->base.bus_end = MIN(sc->base.bus_end, end); 195 } 196 197 device_add_child(dev, "pci", -1); 198 return (bus_generic_attach(dev)); 199 } 200 201 static uint32_t 202 pci_host_acpi_smccc_read_config(device_t dev, u_int bus, u_int slot, 203 u_int func, u_int reg, int bytes) 204 { 205 struct generic_pcie_acpi_softc *sc; 206 struct arm_smccc_res result; 207 uint32_t addr; 208 209 sc = device_get_softc(dev); 210 211 if ((bus < sc->base.bus_start) || (bus > sc->base.bus_end)) 212 return (~0U); 213 if ((slot > PCI_SLOTMAX) || (func > PCI_FUNCMAX) || 214 (reg > PCIE_REGMAX)) 215 return (~0U); 216 217 addr = (sc->base.ecam << 16) | (bus << 8) | (slot << 3) | (func << 0); 218 if (psci_callfn(SMCCC_PCI_READ, addr, reg, bytes, 0, 0, 0, 0, 219 &result) < 0) { 220 return (~0U); 221 } 222 223 return (result.a1); 224 } 225 226 static void 227 pci_host_acpi_smccc_write_config(device_t dev, u_int bus, u_int slot, 228 u_int func, u_int reg, uint32_t val, int bytes) 229 { 230 struct generic_pcie_acpi_softc *sc; 231 struct arm_smccc_res result; 232 uint32_t addr; 233 234 sc = device_get_softc(dev); 235 236 if ((bus < sc->base.bus_start) || (bus > sc->base.bus_end)) 237 return; 238 if ((slot > PCI_SLOTMAX) || (func > PCI_FUNCMAX) || 239 (reg > PCIE_REGMAX)) 240 return; 241 242 addr = (sc->base.ecam << 16) | (bus << 8) | (slot << 3) | (func << 0); 243 psci_callfn(SMCCC_PCI_WRITE, addr, reg, bytes, val, 0, 0, 0, &result); 244 } 245 246 static device_method_t generic_pcie_acpi_smccc_methods[] = { 247 DEVMETHOD(device_probe, pci_host_acpi_smccc_probe), 248 DEVMETHOD(device_attach, pci_host_acpi_smccc_attach), 249 250 /* pcib interface */ 251 DEVMETHOD(pcib_read_config, pci_host_acpi_smccc_read_config), 252 DEVMETHOD(pcib_write_config, pci_host_acpi_smccc_write_config), 253 254 DEVMETHOD_END 255 }; 256 257 DEFINE_CLASS_1(pcib, generic_pcie_acpi_smccc_driver, 258 generic_pcie_acpi_smccc_methods, 259 sizeof(struct generic_pcie_acpi_softc), generic_pcie_acpi_driver); 260 261 DRIVER_MODULE(pcib_smccc, acpi, generic_pcie_acpi_smccc_driver, 0, 0); 262