xref: /freebsd/sys/dev/pci/pci_host_generic_acpi.c (revision a25896ca1270e25b657ceaa8d47d5699515f5c25)
1 /*-
2  * Copyright (C) 2018 Cavium Inc.
3  * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
4  * Copyright (c) 2014 The FreeBSD Foundation
5  * All rights reserved.
6  *
7  * This software was developed by Semihalf under
8  * the sponsorship of the FreeBSD Foundation.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  * notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  * notice, this list of conditions and the following disclaimer in the
17  * documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 
32 /* Generic ECAM PCIe driver */
33 
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
36 
37 #include "opt_platform.h"
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/malloc.h>
42 #include <sys/kernel.h>
43 #include <sys/rman.h>
44 #include <sys/module.h>
45 #include <sys/bus.h>
46 #include <sys/endian.h>
47 #include <sys/cpuset.h>
48 #include <sys/rwlock.h>
49 
50 #include <contrib/dev/acpica/include/acpi.h>
51 #include <contrib/dev/acpica/include/accommon.h>
52 
53 #include <dev/acpica/acpivar.h>
54 #include <dev/acpica/acpi_pcibvar.h>
55 
56 #include <dev/pci/pcivar.h>
57 #include <dev/pci/pcireg.h>
58 #include <dev/pci/pcib_private.h>
59 #include <dev/pci/pci_host_generic.h>
60 
61 #include <machine/cpu.h>
62 #include <machine/bus.h>
63 #include <machine/intr.h>
64 
65 #include "pcib_if.h"
66 
67 int pci_host_generic_acpi_attach(device_t);
68 
69 /* Assembling ECAM Configuration Address */
70 #define	PCIE_BUS_SHIFT		20
71 #define	PCIE_SLOT_SHIFT		15
72 #define	PCIE_FUNC_SHIFT		12
73 #define	PCIE_BUS_MASK		0xFF
74 #define	PCIE_SLOT_MASK		0x1F
75 #define	PCIE_FUNC_MASK		0x07
76 #define	PCIE_REG_MASK		0xFFF
77 
78 #define	PCIE_ADDR_OFFSET(bus, slot, func, reg)			\
79 	((((bus) & PCIE_BUS_MASK) << PCIE_BUS_SHIFT)	|	\
80 	(((slot) & PCIE_SLOT_MASK) << PCIE_SLOT_SHIFT)	|	\
81 	(((func) & PCIE_FUNC_MASK) << PCIE_FUNC_SHIFT)	|	\
82 	((reg) & PCIE_REG_MASK))
83 
84 #define	PCI_IO_WINDOW_OFFSET	0x1000
85 
86 #define	SPACE_CODE_SHIFT	24
87 #define	SPACE_CODE_MASK		0x3
88 #define	SPACE_CODE_IO_SPACE	0x1
89 #define	PROPS_CELL_SIZE		1
90 #define	PCI_ADDR_CELL_SIZE	2
91 
92 struct generic_pcie_acpi_softc {
93 	struct generic_pcie_core_softc base;
94 	ACPI_BUFFER		ap_prt;		/* interrupt routing table */
95 };
96 
97 /* Forward prototypes */
98 
99 static int generic_pcie_acpi_probe(device_t dev);
100 static ACPI_STATUS pci_host_generic_acpi_parse_resource(ACPI_RESOURCE *, void *);
101 static int generic_pcie_acpi_read_ivar(device_t, device_t, int, uintptr_t *);
102 
103 static int
104 generic_pcie_acpi_probe(device_t dev)
105 {
106 	ACPI_DEVICE_INFO *devinfo;
107 	ACPI_HANDLE h;
108 	int root;
109 
110 	if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
111 	    ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
112 		return (ENXIO);
113 	root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
114 	AcpiOsFree(devinfo);
115 	if (!root)
116 		return (ENXIO);
117 
118 	device_set_desc(dev, "Generic PCI host controller");
119 	return (BUS_PROBE_GENERIC);
120 }
121 
122 int
123 pci_host_generic_acpi_attach(device_t dev)
124 {
125 	struct generic_pcie_acpi_softc *sc;
126 	ACPI_HANDLE handle;
127 	ACPI_STATUS status;
128 	int error;
129 
130 	sc = device_get_softc(dev);
131 
132 	handle = acpi_get_handle(dev);
133 	if (ACPI_FAILURE(acpi_GetInteger(handle, "_CCA", &sc->base.coherent)))
134 		sc->base.coherent = 0;
135 	if (bootverbose)
136 		device_printf(dev, "Bus is%s cache-coherent\n",
137 		    sc->base.coherent ? "" : " not");
138 
139 	if (!ACPI_FAILURE(acpi_GetInteger(handle, "_BBN", &sc->base.ecam)))
140 		sc->base.ecam >>= 7;
141 	else
142 		sc->base.ecam = 0;
143 
144 	acpi_pcib_fetch_prt(dev, &sc->ap_prt);
145 
146 	error = pci_host_generic_core_attach(dev);
147 	if (error != 0)
148 		return (error);
149 
150 	status = AcpiWalkResources(handle, "_CRS",
151 	    pci_host_generic_acpi_parse_resource, (void *)dev);
152 
153 	if (ACPI_FAILURE(status))
154 		return (ENXIO);
155 
156 	device_add_child(dev, "pci", -1);
157 	return (bus_generic_attach(dev));
158 }
159 
160 static ACPI_STATUS
161 pci_host_generic_acpi_parse_resource(ACPI_RESOURCE *res, void *arg)
162 {
163 	device_t dev = (device_t)arg;
164 	struct generic_pcie_acpi_softc *sc;
165 	rman_res_t min, max;
166 	int error;
167 
168 	switch (res->Type) {
169 		case ACPI_RESOURCE_TYPE_ADDRESS32:
170 			    min = (rman_res_t)res->Data.Address32.Address.Minimum;
171 			    max = (rman_res_t)res->Data.Address32.Address.Maximum;
172 			break;
173 		case ACPI_RESOURCE_TYPE_ADDRESS64:
174 			    min = (rman_res_t)res->Data.Address64.Address.Minimum;
175 			    max = (rman_res_t)res->Data.Address64.Address.Maximum;
176 			break;
177 		default:
178 			return (AE_OK);
179 	}
180 
181 	sc = device_get_softc(dev);
182 
183 	error = rman_manage_region(&sc->base.mem_rman, min, max);
184 	if (error) {
185 		device_printf(dev, "unable to allocate %lx-%lx range\n", min, max);
186 		return (AE_NOT_FOUND);
187 	}
188 	device_printf(dev, "allocating %lx-%lx range\n", min, max);
189 
190 	return (AE_OK);
191 }
192 
193 static int
194 generic_pcie_acpi_read_ivar(device_t dev, device_t child, int index,
195     uintptr_t *result)
196 {
197 	ACPI_HANDLE handle;
198 	struct generic_pcie_acpi_softc *sc;
199 	int secondary_bus;
200 
201 	sc = device_get_softc(dev);
202 
203 	if (index == PCIB_IVAR_BUS) {
204 		handle = acpi_get_handle(dev);
205 		if (ACPI_FAILURE(acpi_GetInteger(handle, "_BBN", &secondary_bus)))
206 			secondary_bus = sc->base.ecam * 0x80;
207 		*result = secondary_bus;
208 		return (0);
209 	}
210 
211 	if (index == PCIB_IVAR_DOMAIN) {
212 		*result = sc->base.ecam;
213 		return (0);
214 	}
215 
216 	if (bootverbose)
217 		device_printf(dev, "ERROR: Unknown index %d.\n", index);
218 	return (ENOENT);
219 }
220 
221 static int
222 generic_pcie_acpi_route_interrupt(device_t bus, device_t dev, int pin)
223 {
224 	struct generic_pcie_acpi_softc *sc;
225 
226 	sc = device_get_softc(bus);
227 
228 	return (acpi_pcib_route_interrupt(bus, dev, pin, &sc->ap_prt));
229 }
230 
231 static struct resource *
232 pci_host_generic_acpi_alloc_resource(device_t dev, device_t child, int type,
233     int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
234 {
235 	struct resource *res = NULL;
236 
237 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
238 	struct generic_pcie_acpi_softc *sc;
239 
240 	if (type == PCI_RES_BUS) {
241 		sc = device_get_softc(dev);
242 		return (pci_domain_alloc_bus(sc->base.ecam, child, rid, start,
243 		    end, count, flags));
244 	}
245 #endif
246 
247 	if (type == SYS_RES_MEMORY)
248 		res = pci_host_generic_core_alloc_resource(dev, child, type,
249 		    rid, start, end, count, flags);
250 
251 	if (res == NULL)
252 		res = bus_generic_alloc_resource(dev, child, type, rid, start, end,
253 		    count, flags);
254 
255 	return (res);
256 }
257 
258 static int
259 generic_pcie_acpi_activate_resource(device_t dev, device_t child, int type,
260     int rid, struct resource *r)
261 {
262 	struct generic_pcie_acpi_softc *sc;
263 	int res;
264 
265 	sc = device_get_softc(dev);
266 
267 	if ((res = rman_activate_resource(r)) != 0)
268 		return (res);
269 
270 	res = BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid,r);
271 	return (res);
272 }
273 
274 static int
275 generic_pcie_acpi_deactivate_resource(device_t dev, device_t child, int type,
276     int rid, struct resource *r)
277 {
278 	int res;
279 
280 	if ((res = rman_deactivate_resource(r)) != 0)
281 		return (res);
282 
283 	res = BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), child, type,
284 	    rid, r);
285 	return (res);
286 }
287 
288 static int
289 generic_pcie_acpi_alloc_msi(device_t pci, device_t child, int count,
290     int maxcount, int *irqs)
291 {
292 
293 #if defined(INTRNG)
294 	return (intr_alloc_msi(pci, child, ACPI_MSI_XREF, count, maxcount,
295 	    irqs));
296 #else
297 	return (ENXIO);
298 #endif
299 }
300 
301 static int
302 generic_pcie_acpi_release_msi(device_t pci, device_t child, int count,
303     int *irqs)
304 {
305 
306 #if defined(INTRNG)
307 	return (intr_release_msi(pci, child, ACPI_MSI_XREF, count, irqs));
308 #else
309 	return (ENXIO);
310 #endif
311 }
312 
313 static int
314 generic_pcie_acpi_map_msi(device_t pci, device_t child, int irq, uint64_t *addr,
315     uint32_t *data)
316 {
317 
318 #if defined(INTRNG)
319 	return (intr_map_msi(pci, child, ACPI_MSI_XREF, irq, addr, data));
320 #else
321 	return (ENXIO);
322 #endif
323 }
324 
325 static int
326 generic_pcie_acpi_alloc_msix(device_t pci, device_t child, int *irq)
327 {
328 
329 #if defined(INTRNG)
330 	return (intr_alloc_msix(pci, child, ACPI_MSI_XREF, irq));
331 #else
332 	return (ENXIO);
333 #endif
334 }
335 
336 static int
337 generic_pcie_acpi_release_msix(device_t pci, device_t child, int irq)
338 {
339 
340 #if defined(INTRNG)
341 	return (intr_release_msix(pci, child, ACPI_MSI_XREF, irq));
342 #else
343 	return (ENXIO);
344 #endif
345 }
346 
347 static int
348 generic_pcie_acpi_get_id(device_t pci, device_t child, enum pci_id_type type,
349     uintptr_t *id)
350 {
351 	struct generic_pcie_acpi_softc *sc;
352 	int err;
353 
354 	/* Use the PCI RID to find the MSI ID */
355 	if (type == PCI_ID_MSI) {
356 		sc = device_get_softc(pci);
357 		type = PCI_ID_RID;
358 		err = pcib_get_id(pci, child, type, id);
359 		if (err != 0)
360 			return (err);
361 		*id |= sc->base.ecam << 16;
362 		return (0);
363 	}
364 
365 	return (pcib_get_id(pci, child, type, id));
366 }
367 
368 static device_method_t generic_pcie_acpi_methods[] = {
369 	DEVMETHOD(device_probe,		generic_pcie_acpi_probe),
370 	DEVMETHOD(device_attach,	pci_host_generic_acpi_attach),
371 	DEVMETHOD(bus_alloc_resource,	pci_host_generic_acpi_alloc_resource),
372 	DEVMETHOD(bus_activate_resource, generic_pcie_acpi_activate_resource),
373 	DEVMETHOD(bus_deactivate_resource, generic_pcie_acpi_deactivate_resource),
374 	DEVMETHOD(bus_read_ivar,	generic_pcie_acpi_read_ivar),
375 
376 	/* pcib interface */
377 	DEVMETHOD(pcib_route_interrupt,	generic_pcie_acpi_route_interrupt),
378 	DEVMETHOD(pcib_alloc_msi,	generic_pcie_acpi_alloc_msi),
379 	DEVMETHOD(pcib_release_msi,	generic_pcie_acpi_release_msi),
380 	DEVMETHOD(pcib_alloc_msix,	generic_pcie_acpi_alloc_msix),
381 	DEVMETHOD(pcib_release_msix,	generic_pcie_acpi_release_msix),
382 	DEVMETHOD(pcib_map_msi,		generic_pcie_acpi_map_msi),
383 	DEVMETHOD(pcib_get_id,		generic_pcie_acpi_get_id),
384 
385 	DEVMETHOD_END
386 };
387 
388 DEFINE_CLASS_1(pcib, generic_pcie_acpi_driver, generic_pcie_acpi_methods,
389     sizeof(struct generic_pcie_acpi_softc), generic_pcie_core_driver);
390 
391 static devclass_t generic_pcie_acpi_devclass;
392 
393 DRIVER_MODULE(pcib, acpi, generic_pcie_acpi_driver, generic_pcie_acpi_devclass,
394     0, 0);
395