xref: /freebsd/sys/dev/pci/pci_host_generic_acpi.c (revision 52f72944b8f5abb2386eae924357dee8aea17d5b)
1 /*-
2  * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
3  * Copyright (c) 2014 The FreeBSD Foundation
4  * All rights reserved.
5  *
6  * This software was developed by Semihalf under
7  * the sponsorship of the FreeBSD Foundation.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  * notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  * notice, this list of conditions and the following disclaimer in the
16  * documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 /* Generic ECAM PCIe driver */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 #include "opt_platform.h"
37 
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
41 #include <sys/kernel.h>
42 #include <sys/rman.h>
43 #include <sys/module.h>
44 #include <sys/bus.h>
45 #include <sys/endian.h>
46 #include <sys/cpuset.h>
47 #include <sys/rwlock.h>
48 
49 #include <contrib/dev/acpica/include/acpi.h>
50 #include <contrib/dev/acpica/include/accommon.h>
51 
52 #include <dev/acpica/acpivar.h>
53 #include <dev/acpica/acpi_pcibvar.h>
54 
55 #include <dev/pci/pcivar.h>
56 #include <dev/pci/pcireg.h>
57 #include <dev/pci/pcib_private.h>
58 #include <dev/pci/pci_host_generic.h>
59 
60 #include <machine/cpu.h>
61 #include <machine/bus.h>
62 #include <machine/intr.h>
63 
64 #include "pcib_if.h"
65 
66 int pci_host_generic_acpi_attach(device_t);
67 
68 /* Assembling ECAM Configuration Address */
69 #define	PCIE_BUS_SHIFT		20
70 #define	PCIE_SLOT_SHIFT		15
71 #define	PCIE_FUNC_SHIFT		12
72 #define	PCIE_BUS_MASK		0xFF
73 #define	PCIE_SLOT_MASK		0x1F
74 #define	PCIE_FUNC_MASK		0x07
75 #define	PCIE_REG_MASK		0xFFF
76 
77 #define	PCIE_ADDR_OFFSET(bus, slot, func, reg)			\
78 	((((bus) & PCIE_BUS_MASK) << PCIE_BUS_SHIFT)	|	\
79 	(((slot) & PCIE_SLOT_MASK) << PCIE_SLOT_SHIFT)	|	\
80 	(((func) & PCIE_FUNC_MASK) << PCIE_FUNC_SHIFT)	|	\
81 	((reg) & PCIE_REG_MASK))
82 
83 #define	PCI_IO_WINDOW_OFFSET	0x1000
84 
85 #define	SPACE_CODE_SHIFT	24
86 #define	SPACE_CODE_MASK		0x3
87 #define	SPACE_CODE_IO_SPACE	0x1
88 #define	PROPS_CELL_SIZE		1
89 #define	PCI_ADDR_CELL_SIZE	2
90 
91 struct generic_pcie_acpi_softc {
92 	struct generic_pcie_core_softc base;
93 	ACPI_BUFFER		ap_prt;		/* interrupt routing table */
94 };
95 
96 /* Forward prototypes */
97 
98 static int generic_pcie_acpi_probe(device_t dev);
99 static uint32_t generic_pcie_read_config(device_t dev, u_int bus, u_int slot,
100     u_int func, u_int reg, int bytes);
101 static void generic_pcie_write_config(device_t dev, u_int bus, u_int slot,
102     u_int func, u_int reg, uint32_t val, int bytes);
103 static int generic_pcie_release_resource(device_t dev, device_t child,
104     int type, int rid, struct resource *res);
105 
106 static int
107 generic_pcie_acpi_probe(device_t dev)
108 {
109 	ACPI_DEVICE_INFO *devinfo;
110 	ACPI_HANDLE h;
111 	int root;
112 
113 	if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
114 	    ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
115 		return (ENXIO);
116 	root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
117 	AcpiOsFree(devinfo);
118 	if (!root)
119 		return (ENXIO);
120 
121 	device_set_desc(dev, "Generic PCI host controller");
122 	return (BUS_PROBE_GENERIC);
123 }
124 
125 int
126 pci_host_generic_acpi_attach(device_t dev)
127 {
128 	struct generic_pcie_acpi_softc *sc;
129 	ACPI_HANDLE handle;
130 	int error;
131 
132 	sc = device_get_softc(dev);
133 
134 	handle = acpi_get_handle(dev);
135 	if (ACPI_FAILURE(acpi_GetInteger(handle, "_CCA", &sc->base.coherent)))
136 		sc->base.coherent = 0;
137 	if (bootverbose)
138 		device_printf(dev, "Bus is%s cache-coherent\n",
139 		    sc->base.coherent ? "" : " not");
140 
141 	acpi_pcib_fetch_prt(dev, &sc->ap_prt);
142 
143 	error = pci_host_generic_core_attach(dev);
144 	if (error != 0)
145 		return (error);
146 
147 	device_add_child(dev, "pci", -1);
148 	return (bus_generic_attach(dev));
149 }
150 
151 static int
152 generic_pcie_acpi_route_interrupt(device_t bus, device_t dev, int pin)
153 {
154 	struct generic_pcie_acpi_softc *sc;
155 
156 	sc = device_get_softc(bus);
157 
158 	return (acpi_pcib_route_interrupt(bus, dev, pin, &sc->ap_prt));
159 }
160 
161 static struct rman *
162 generic_pcie_acpi_rman(struct generic_pcie_acpi_softc *sc, int type)
163 {
164 
165 	switch (type) {
166 	case SYS_RES_IOPORT:
167 		return (&sc->base.io_rman);
168 	case SYS_RES_MEMORY:
169 		return (&sc->base.mem_rman);
170 	default:
171 		break;
172 	}
173 
174 	return (NULL);
175 }
176 
177 static struct resource *
178 pci_host_generic_acpi_alloc_resource(device_t dev, device_t child, int type,
179     int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
180 {
181 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
182 	struct generic_pcie_acpi_softc *sc;
183 
184 	if (type == PCI_RES_BUS) {
185 		sc = device_get_softc(dev);
186 		return (pci_domain_alloc_bus(sc->base.ecam, child, rid, start,
187 		    end, count, flags));
188 	}
189 #endif
190 
191 	return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
192 	    count, flags));
193 }
194 
195 static int
196 generic_pcie_acpi_activate_resource(device_t dev, device_t child, int type,
197     int rid, struct resource *r)
198 {
199 	struct generic_pcie_acpi_softc *sc;
200 	int res;
201 
202 	sc = device_get_softc(dev);
203 
204 	if ((res = rman_activate_resource(r)) != 0)
205 		return (res);
206 
207 	res = BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid,r);
208 	return (res);
209 }
210 
211 static int
212 generic_pcie_acpi_deactivate_resource(device_t dev, device_t child, int type,
213     int rid, struct resource *r)
214 {
215 	int res;
216 
217 	if ((res = rman_deactivate_resource(r)) != 0)
218 		return (res);
219 
220 	res = BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), child, type,
221 	    rid, r);
222 	return (res);
223 }
224 
225 static int
226 generic_pcie_acpi_alloc_msi(device_t pci, device_t child, int count,
227     int maxcount, int *irqs)
228 {
229 
230 #if defined(INTRNG)
231 	return (intr_alloc_msi(pci, child, ACPI_MSI_XREF, count, maxcount,
232 	    irqs));
233 #else
234 	return (ENXIO);
235 #endif
236 }
237 
238 static int
239 generic_pcie_acpi_release_msi(device_t pci, device_t child, int count,
240     int *irqs)
241 {
242 
243 #if defined(INTRNG)
244 	return (intr_release_msi(pci, child, ACPI_MSI_XREF, count, irqs));
245 #else
246 	return (ENXIO);
247 #endif
248 }
249 
250 static int
251 generic_pcie_acpi_map_msi(device_t pci, device_t child, int irq, uint64_t *addr,
252     uint32_t *data)
253 {
254 
255 #if defined(INTRNG)
256 	return (intr_map_msi(pci, child, ACPI_MSI_XREF, irq, addr, data));
257 #else
258 	return (ENXIO);
259 #endif
260 }
261 
262 static int
263 generic_pcie_acpi_alloc_msix(device_t pci, device_t child, int *irq)
264 {
265 
266 #if defined(INTRNG)
267 	return (intr_alloc_msix(pci, child, ACPI_MSI_XREF, irq));
268 #else
269 	return (ENXIO);
270 #endif
271 }
272 
273 static int
274 generic_pcie_acpi_release_msix(device_t pci, device_t child, int irq)
275 {
276 
277 #if defined(INTRNG)
278 	return (intr_release_msix(pci, child, ACPI_MSI_XREF, irq));
279 #else
280 	return (ENXIO);
281 #endif
282 }
283 
284 static int
285 generic_pcie_acpi_get_id(device_t pci, device_t child, enum pci_id_type type,
286     uintptr_t *id)
287 {
288 	struct generic_pcie_acpi_softc *sc;
289 	int err;
290 
291 	/* Use the PCI RID to find the MSI ID */
292 	if (type == PCI_ID_MSI) {
293 		sc = device_get_softc(pci);
294 		type = PCI_ID_RID;
295 		err = pcib_get_id(pci, child, type, id);
296 		if (err != 0)
297 			return (err);
298 		*id |= sc->base.ecam << 16;
299 		return (0);
300 	}
301 
302 	return (pcib_get_id(pci, child, type, id));
303 }
304 
305 static device_method_t generic_pcie_acpi_methods[] = {
306 	DEVMETHOD(device_probe,		generic_pcie_acpi_probe),
307 	DEVMETHOD(device_attach,	pci_host_generic_acpi_attach),
308 	DEVMETHOD(bus_alloc_resource,	pci_host_generic_acpi_alloc_resource),
309 	DEVMETHOD(bus_activate_resource, generic_pcie_acpi_activate_resource),
310 	DEVMETHOD(bus_deactivate_resource, generic_pcie_acpi_deactivate_resource),
311 
312 	/* pcib interface */
313 	DEVMETHOD(pcib_route_interrupt,	generic_pcie_acpi_route_interrupt),
314 	DEVMETHOD(pcib_alloc_msi,	generic_pcie_acpi_alloc_msi),
315 	DEVMETHOD(pcib_release_msi,	generic_pcie_acpi_release_msi),
316 	DEVMETHOD(pcib_alloc_msix,	generic_pcie_acpi_alloc_msix),
317 	DEVMETHOD(pcib_release_msix,	generic_pcie_acpi_release_msix),
318 	DEVMETHOD(pcib_map_msi,		generic_pcie_acpi_map_msi),
319 	DEVMETHOD(pcib_get_id,		generic_pcie_acpi_get_id),
320 
321 	DEVMETHOD_END
322 };
323 
324 DEFINE_CLASS_1(pcib, generic_pcie_acpi_driver, generic_pcie_acpi_methods,
325     sizeof(struct generic_pcie_acpi_softc), generic_pcie_core_driver);
326 
327 static devclass_t generic_pcie_acpi_devclass;
328 
329 DRIVER_MODULE(pcib, acpi, generic_pcie_acpi_driver, generic_pcie_acpi_devclass,
330     0, 0);
331