1 /************************************************************************** 2 ** 3 ** $Id: pci.c,v 1.54 1996/09/06 23:08:58 phk Exp $ 4 ** 5 ** General subroutines for the PCI bus. 6 ** pci_configure () 7 ** 8 ** FreeBSD 9 ** 10 **------------------------------------------------------------------------- 11 ** 12 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 13 ** 14 ** Redistribution and use in source and binary forms, with or without 15 ** modification, are permitted provided that the following conditions 16 ** are met: 17 ** 1. Redistributions of source code must retain the above copyright 18 ** notice, this list of conditions and the following disclaimer. 19 ** 2. Redistributions in binary form must reproduce the above copyright 20 ** notice, this list of conditions and the following disclaimer in the 21 ** documentation and/or other materials provided with the distribution. 22 ** 3. The name of the author may not be used to endorse or promote products 23 ** derived from this software without specific prior written permission. 24 ** 25 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 ** 36 *************************************************************************** 37 */ 38 39 #include "pci.h" 40 #if NPCI > 0 41 42 /*======================================================== 43 ** 44 ** #includes and declarations 45 ** 46 **======================================================== 47 */ 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/malloc.h> 52 #include <sys/errno.h> 53 #include <sys/kernel.h> 54 #include <sys/proc.h> /* declaration of wakeup(), used by vm.h */ 55 56 #include <vm/vm.h> 57 #include <vm/vm_param.h> 58 #include <vm/pmap.h> 59 60 61 #include <i386/isa/isa_device.h> /* XXX inthand2_t */ 62 63 #include <pci/pcivar.h> 64 #include <pci/pcireg.h> 65 #include <pci/pcibus.h> 66 67 #define PCI_MAX_IRQ (16) 68 69 70 /*======================================================== 71 ** 72 ** Structs and Functions 73 ** 74 **======================================================== 75 */ 76 77 struct pcicb { 78 struct pcicb *pcicb_next; 79 struct pcicb *pcicb_up; 80 struct pcicb *pcicb_down; 81 pcici_t pcicb_bridge; 82 83 u_long pcicb_seen; 84 u_char pcicb_bus; 85 u_char pcicb_subordinate; 86 u_char pcicb_flags; 87 #define PCICB_ISAMEM 0x01 88 u_int pcicb_mfrom; 89 u_int pcicb_mupto; 90 u_int pcicb_mamount; 91 u_short pcicb_pfrom; 92 u_short pcicb_pupto; 93 u_short pcicb_pamount; 94 u_char pcicb_bfrom; 95 u_char pcicb_bupto; 96 97 u_long pcicb_iobase; 98 u_long pcicb_iolimit; 99 u_long pcicb_membase; 100 u_long pcicb_memlimit; 101 u_long pcicb_p_membase; 102 u_long pcicb_p_memlimit; 103 }; 104 105 static void 106 not_supported (pcici_t tag, u_long type); 107 108 static void 109 pci_bus_config (void); 110 111 static int 112 pci_bridge_config (void); 113 114 static int 115 pci_mfdev (int bus, int device); 116 117 /*======================================================== 118 ** 119 ** Variables 120 ** 121 **======================================================== 122 */ 123 124 /* 125 ** log2 of safe burst len (in words) 126 */ 127 128 unsigned pci_max_burst_len = 3; /* 2=16Byte, 3=32Byte, 4=64Byte, ... */ 129 unsigned pci_mechanism = 0; 130 unsigned pci_maxdevice = 0; 131 unsigned pciroots = 0; /* XXX pcisupport.c increments this 132 * for the Orion host to PCI bridge 133 * UGLY hack ... :( Will be changed :) 134 */ 135 static struct pcibus* pcibus; 136 137 /*-------------------------------------------------------- 138 ** 139 ** Local variables. 140 ** 141 **-------------------------------------------------------- 142 */ 143 144 static int pci_conf_count; 145 static int pci_info_done; 146 static int pcibusmax; 147 static struct pcicb *pcicb; 148 149 /*----------------------------------------------------------------- 150 ** 151 ** The following functions are provided for the device driver 152 ** to read/write the configuration space. 153 ** 154 ** pci_conf_read(): 155 ** Read a long word from the pci configuration space. 156 ** Requires a tag (from pcitag) and the register 157 ** number (should be a long word alligned one). 158 ** 159 ** pci_conf_write(): 160 ** Writes a long word to the pci configuration space. 161 ** Requires a tag (from pcitag), the register number 162 ** (should be a long word alligned one), and a value. 163 ** 164 **----------------------------------------------------------------- 165 */ 166 167 u_long 168 pci_conf_read (pcici_t tag, u_long reg) 169 { 170 return (pcibus->pb_read (tag, reg)); 171 } 172 173 void 174 pci_conf_write (pcici_t tag, u_long reg, u_long data) 175 { 176 pcibus->pb_write (tag, reg, data); 177 } 178 179 /*======================================================== 180 ** 181 ** Subroutines for configuration. 182 ** 183 **======================================================== 184 */ 185 186 static void 187 pci_register_io (struct pcicb * cb, u_int base, u_int limit) 188 { 189 #ifdef PCI_BRIDGE_DEBUG 190 if (bootverbose) 191 printf ("register_io: bus=%d base=%x limit=%x\n", 192 cb->pcicb_bus, base, limit); 193 #endif 194 195 if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom) 196 cb->pcicb_pfrom = base; 197 if (limit > cb->pcicb_pupto) 198 cb->pcicb_pupto = limit; 199 200 /* 201 ** XXX should set bridge io mapping here 202 ** but it can be mapped in 4k blocks only, 203 ** leading to conflicts with isa/eisa .. 204 */ 205 } 206 207 static void 208 pci_register_memory (struct pcicb * cb, u_int base, u_int limit) 209 { 210 #ifdef PCI_BRIDGE_DEBUG 211 if (bootverbose) 212 printf ("register_mem: bus=%d base=%x limit=%x\n", 213 cb->pcicb_bus, base, limit); 214 #endif 215 216 if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom) 217 cb->pcicb_mfrom = base; 218 if (limit > cb->pcicb_mupto) 219 cb->pcicb_mupto = limit; 220 /* 221 ** set the bridges mapping 222 ** 223 ** XXX should handle the 1Mb granularity. 224 */ 225 if (cb->pcicb_bridge.tag) { 226 pci_conf_write(cb->pcicb_bridge, 227 PCI_PCI_BRIDGE_MEM_REG, 228 (cb->pcicb_memlimit & 0xffff0000) | 229 (cb->pcicb_membase >> 16)); 230 if (bootverbose) 231 printf ("\t[pci%d uses memory from %x to %x]\n", 232 cb->pcicb_bus, 233 (unsigned) cb->pcicb_membase, 234 (unsigned) cb->pcicb_memlimit); 235 } 236 } 237 238 /* 239 ** XXX This function is neither complete nor tested. 240 ** It's only used if the bios hasn't done it's job 241 ** of mapping the pci devices in the physical memory. 242 */ 243 244 static u_int 245 pci_memalloc (struct pcicb * cb, u_int addr, u_int size) 246 { 247 u_int result = 0, limit=0, newbase=0; 248 #ifdef PCI_BRIDGE_DEBUG 249 if (bootverbose) 250 printf ("memalloc: bus=%d addr=%x size=%x ..\n", 251 cb->pcicb_bus, addr, size); 252 #endif 253 254 if (!cb) goto done; 255 256 if (!cb->pcicb_membase) { 257 printf ("memalloc: bus%d: membase not set.\n", 258 cb->pcicb_bus); 259 goto done; 260 } 261 262 /* 263 ** get upper allocation limit 264 */ 265 limit = cb->pcicb_memlimit; 266 if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit) 267 limit = cb->pcicb_mfrom-1; 268 269 /* 270 ** address fixed, and impossible to allocate ? 271 */ 272 if (addr && addr+size-1 > limit) 273 goto done; 274 275 /* 276 ** get possible address 277 */ 278 279 result = addr; 280 if (!result) result = ((limit + 1) / size - 1) * size; 281 282 /* 283 ** if not local available, request from parent. 284 */ 285 286 if (result < cb->pcicb_membase) { 287 newbase = pci_memalloc (cb->pcicb_up, result, size); 288 if (newbase) cb->pcicb_membase = result; 289 else result=0; 290 } 291 done: 292 if (result) 293 pci_register_memory (cb, result, result+size-1); 294 295 #ifdef PCI_BRIDGE_DEBUG 296 printf ("memalloc: bus=%d addr=%x size=%x --> %x (limit=%x).\n", 297 cb->pcicb_bus, addr, size, result, limit); 298 #endif 299 300 return (result); 301 } 302 303 /*======================================================== 304 ** 305 ** pci_bridge_config() 306 ** 307 ** Configuration of a pci bridge. 308 ** 309 **======================================================== 310 */ 311 312 static int 313 pci_bridge_config (void) 314 { 315 pcici_t tag; 316 struct pcicb* parent; 317 318 tag = pcicb->pcicb_bridge; 319 if (tag.tag) { 320 321 if (!pcicb->pcicb_bus) { 322 u_int data; 323 /* 324 ** Get the lowest available bus number. 325 */ 326 pcicb->pcicb_bus = ++pcibusmax; 327 328 /* 329 ** and configure the bridge 330 */ 331 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 332 data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus); 333 data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus); 334 data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus); 335 pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data); 336 337 /* 338 ** Propagate the new upper bus number limit. 339 */ 340 for (parent = pcicb->pcicb_up; parent != NULL; 341 parent = parent->pcicb_up) 342 { 343 if (parent->pcicb_subordinate >= pcicb->pcicb_bus) 344 continue; 345 parent->pcicb_subordinate = pcicb->pcicb_bus; 346 if (!parent->pcicb_bridge.tag) 347 continue; 348 data = pci_conf_read 349 (parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG); 350 data = PCI_SUBORDINATE_BUS_INSERT 351 (data, pcicb->pcicb_bus); 352 pci_conf_write (parent->pcicb_bridge, 353 PCI_PCI_BRIDGE_BUS_REG, data); 354 } 355 } 356 357 if (!pcicb->pcicb_membase) { 358 u_int size = 0x100000; 359 pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size); 360 if (pcicb->pcicb_membase) 361 pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1; 362 } 363 } 364 return pcicb->pcicb_bus; 365 } 366 367 /*======================================================== 368 ** 369 ** pci_bus_config() 370 ** 371 ** Autoconfiguration of one pci bus. 372 ** 373 **======================================================== 374 */ 375 376 static int 377 pci_mfdev (int bus, int device) 378 { 379 pcici_t tag0,tag1; 380 int pci_id0, pci_id1; 381 382 /* 383 ** Detect a multi-function device that complies to the PCI 2.0 spec 384 */ 385 tag0 = pcibus->pb_tag (bus, device, 0); 386 if (pci_conf_read (tag0, PCI_HEADER_MISC) & PCI_HEADER_MULTIFUNCTION) 387 return 1; 388 389 /* 390 ** Well, as always: Theory and implementation of PCI ... 391 ** 392 ** If there is a valid device ID returned for function 1 AND 393 ** the device ID of function 0 and 1 is different OR 394 ** the first mapping register of 0 and 1 differs, 395 ** then assume a multi-function device anyway ... 396 ** 397 ** Example of such a broken device: ISA and IDE chip i83371FB (Triton) 398 */ 399 tag1 = pcibus->pb_tag (bus, device, 1); 400 pci_id1 = pci_conf_read (tag1, PCI_ID_REG); 401 402 if (pci_id1 != 0xffffffff) { 403 404 pci_id0 = pci_conf_read (tag0, PCI_ID_REG); 405 406 if (pci_id0 != pci_id1) 407 return 1; 408 409 if (pci_conf_read (tag0, PCI_MAP_REG_START) 410 != pci_conf_read (tag1, PCI_MAP_REG_START)) 411 return 1; 412 } 413 return 0; 414 } 415 416 static void 417 pci_bus_config (void) 418 { 419 int bus_no; 420 u_char device; 421 u_char reg; 422 pcici_t tag, mtag; 423 pcidi_t type; 424 u_long data; 425 int unit; 426 u_char pciint; 427 u_char irq; 428 429 struct pci_device *dvp; 430 431 /* 432 ** first initialize the bridge (bus controller chip) 433 */ 434 bus_no = pci_bridge_config (); 435 436 printf ("Probing for devices on PCI bus %d:\n", bus_no); 437 #ifndef PCI_QUIET 438 if (bootverbose && !pci_info_done) { 439 pci_info_done=1; 440 printf ("\tconfiguration mode %d allows %d devices.\n", 441 pci_mechanism, pci_maxdevice); 442 }; 443 #endif 444 for (device=0; device<pci_maxdevice; device ++) { 445 char *name = NULL; 446 struct pci_device **dvpp; 447 int func, maxfunc = 0; 448 449 if ((pcicb->pcicb_seen >> device) & 1) 450 continue; 451 452 for (func=0; func <= maxfunc; func++) { 453 tag = pcibus->pb_tag (bus_no, device, func); 454 type = pci_conf_read (tag, PCI_ID_REG); 455 456 if ((!type) || (type==0xfffffffful)) continue; 457 458 /* 459 ** lookup device in ioconfiguration: 460 */ 461 462 dvpp = (struct pci_device **)pcidevice_set.ls_items; 463 464 while (dvp = *dvpp++) { 465 if (dvp->pd_probe) { 466 if (name=(*dvp->pd_probe)(tag, type)) 467 break; 468 } 469 }; 470 /* 471 ** check for mirrored devices. 472 */ 473 if (func != 0) { 474 goto real_device; 475 } 476 if (device & 0x10) { 477 mtag=pcibus->pb_tag (bus_no, 478 (u_char)(device & ~0x10), 0); 479 } else if (device & 0x08) { 480 mtag=pcibus->pb_tag (bus_no, 481 (u_char)(device & ~0x08), 0); 482 } else goto real_device; 483 484 if (type!=pci_conf_read (mtag, PCI_ID_REG)) 485 goto real_device; 486 487 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) 488 if (pci_conf_read(tag,reg)!=pci_conf_read(mtag,reg)) 489 goto real_device; 490 491 #ifndef PCI_QUIET 492 if (dvp==NULL) continue; 493 if (bootverbose) 494 printf ("%s? <%s> mirrored on pci%d:%d\n", 495 dvp->pd_name, name, bus_no, device); 496 #endif 497 continue; 498 499 real_device: 500 501 #ifndef PCI_QUIET 502 #ifdef PCI_BRIDGE_DEBUG 503 if (bootverbose) { 504 printf ("\tconfig header: 0x%08x 0x%08x 0x%08x 0x%08x\n", 505 pci_conf_read (tag, 0), 506 pci_conf_read (tag, 4), 507 pci_conf_read (tag, 8), 508 pci_conf_read (tag, 12)); 509 } 510 #endif 511 #endif 512 513 if (func == 0 && pci_mfdev (bus_no, device)) { 514 maxfunc = 7; 515 } 516 517 if (dvp==NULL) { 518 #ifndef PCI_QUIET 519 if (pci_conf_count) 520 continue; 521 522 if (maxfunc == 0) 523 printf("%s%d:%d: ", 524 pcibus->pb_name, bus_no, device); 525 else 526 printf("%s%d:%d:%d: ", 527 pcibus->pb_name, bus_no, device, func); 528 not_supported (tag, type); 529 #endif 530 continue; 531 }; 532 533 pcicb->pcicb_seen |= (1ul << device); 534 535 /* 536 ** Get and increment the unit. 537 */ 538 539 unit = (*dvp->pd_count)++; 540 541 /* 542 ** ignore device ? 543 */ 544 545 if (!*name) continue; 546 547 /* 548 ** Announce this device 549 */ 550 551 printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name, 552 (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff); 553 554 /* 555 ** Get the int pin number (pci interrupt number a-d) 556 ** from the pci configuration space. 557 */ 558 559 data = pci_conf_read (tag, PCI_INTERRUPT_REG); 560 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 561 562 if (pciint) { 563 564 printf (" int %c irq ", 0x60+pciint); 565 566 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 567 568 /* 569 ** If it's zero, the isa irq number is unknown, 570 ** and we cannot bind the pci interrupt. 571 */ 572 573 if (irq && (irq != 0xff)) 574 printf ("%d", irq); 575 else 576 printf ("??"); 577 }; 578 579 if (maxfunc == 0) 580 printf (" on pci%d:%d\n", bus_no, device); 581 else 582 printf (" on pci%d:%d:%d\n", bus_no, device, func); 583 584 /* 585 ** Read the current mapping, 586 ** and update the pcicb fields. 587 */ 588 589 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) { 590 u_int map, addr, size; 591 592 data = pci_conf_read(tag, PCI_CLASS_REG); 593 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 594 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 595 continue; 596 }; 597 598 map = pci_conf_read (tag, reg); 599 if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK)) 600 continue; 601 602 pci_conf_write (tag, reg, 0xffffffff); 603 data = pci_conf_read (tag, reg); 604 pci_conf_write (tag, reg, map); 605 606 switch (data & 7) { 607 608 default: 609 continue; 610 case 1: 611 case 5: 612 addr = map & PCI_MAP_IO_ADDRESS_MASK; 613 size = -(data & PCI_MAP_IO_ADDRESS_MASK); 614 size &= ~(addr ^ -addr); 615 616 pci_register_io (pcicb, addr, addr+size-1); 617 pcicb->pcicb_pamount += size; 618 break; 619 620 case 0: 621 case 2: 622 case 4: 623 size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 624 addr = map & PCI_MAP_MEMORY_ADDRESS_MASK; 625 if (addr >= 0x100000) { 626 pci_register_memory 627 (pcicb, addr, addr+size-1); 628 pcicb->pcicb_mamount += size; 629 } else { 630 pcicb->pcicb_flags |= PCICB_ISAMEM; 631 }; 632 break; 633 }; 634 if (bootverbose) 635 printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n", 636 reg, map&7, addr, size); 637 }; 638 639 /* 640 ** attach device 641 ** may produce additional log messages, 642 ** i.e. when installing subdevices. 643 */ 644 645 (*dvp->pd_attach) (tag, unit); 646 647 /* 648 ** Special processing of certain classes 649 */ 650 651 data = pci_conf_read(tag, PCI_CLASS_REG); 652 653 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 654 struct pcicb *this, **link; 655 unsigned char primary, secondary, subordinate; 656 u_int command; 657 658 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 659 660 /* 661 ** get current configuration of the bridge. 662 */ 663 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 664 primary = PCI_PRIMARY_BUS_EXTRACT (data); 665 secondary = PCI_SECONDARY_BUS_EXTRACT(data); 666 subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data); 667 #ifndef PCI_QUIET 668 if (bootverbose) { 669 printf ("\tbridge from pci%d to pci%d through %d.\n", 670 primary, secondary, subordinate); 671 printf ("\tmapping regs: io:%08lx mem:%08lx pmem:%08lx\n", 672 pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG), 673 pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG), 674 pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG)); 675 } 676 #endif 677 /* 678 ** check for uninitialized bridge. 679 */ 680 if (!(primary < secondary 681 && secondary <= subordinate 682 && bus_no == primary)) 683 { 684 printf ("\tINCORRECTLY or NEVER CONFIGURED.\n"); 685 /* 686 ** disable this bridge 687 */ 688 pci_conf_write (tag, PCI_COMMAND_STATUS_REG, 689 0xffff0000); 690 secondary = 0; 691 subordinate = 0; 692 }; 693 694 /* 695 ** allocate bus descriptor for bus behind the bridge 696 */ 697 link = &pcicb->pcicb_down; 698 while (*link && (*link)->pcicb_bus < secondary) 699 link = &(*link)->pcicb_next; 700 701 this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK); 702 703 /* 704 ** Initialize this descriptor so far. 705 ** (the initialization is completed just before 706 ** scanning the bus behind the bridge. 707 */ 708 bzero (this, sizeof(*this)); 709 this->pcicb_next = *link; 710 this->pcicb_up = pcicb; 711 this->pcicb_bridge = tag; 712 this->pcicb_bus = secondary; 713 this->pcicb_subordinate = subordinate; 714 715 command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG); 716 717 if (command & PCI_COMMAND_IO_ENABLE){ 718 /* 719 ** Bridge was configured by the bios. 720 ** Read out the mapped io region. 721 */ 722 u_int reg, data, mask; 723 724 reg = pci_conf_read (tag, 725 PCI_PCI_BRIDGE_IO_REG); 726 pci_conf_write(tag, 727 PCI_PCI_BRIDGE_IO_REG, 0xFFFF); 728 data = pci_conf_read (tag, 729 PCI_PCI_BRIDGE_IO_REG); 730 pci_conf_write(tag, 731 PCI_PCI_BRIDGE_IO_REG, reg & 0xffff); 732 733 mask = (0xFF00 ^ (data & 0xFF00)) | 0xFF; 734 735 this->pcicb_iobase = 736 PCI_PPB_IOBASE_EXTRACT (reg); 737 this->pcicb_iolimit = 738 PCI_PPB_IOLIMIT_EXTRACT(reg) | mask; 739 740 /* 741 ** Note the used io space. 742 */ 743 pci_register_io (pcicb, this->pcicb_iobase, 744 this->pcicb_iolimit); 745 746 }; 747 748 if (command & PCI_COMMAND_MEM_ENABLE) { 749 /* 750 ** Bridge was configured by the bios. 751 ** Read out the mapped memory regions. 752 */ 753 u_int reg, data, mask; 754 755 /* 756 ** non prefetchable memory 757 */ 758 reg = pci_conf_read (tag, 759 PCI_PCI_BRIDGE_MEM_REG); 760 pci_conf_write(tag, 761 PCI_PCI_BRIDGE_MEM_REG, 0xFFFFFFFF); 762 data = pci_conf_read (tag, 763 PCI_PCI_BRIDGE_MEM_REG); 764 pci_conf_write(tag, 765 PCI_PCI_BRIDGE_MEM_REG, reg); 766 767 mask = 0xFFFFFFFF ^ (data & 0xFFFF0000); 768 this->pcicb_membase = 769 PCI_PPB_MEMBASE_EXTRACT (reg); 770 this->pcicb_memlimit = 771 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 772 773 /* 774 ** Register used memory space. 775 */ 776 pci_register_memory (pcicb, 777 this->pcicb_membase, 778 this->pcicb_memlimit); 779 780 /* 781 ** prefetchable memory 782 */ 783 reg = pci_conf_read (tag, 784 PCI_PCI_BRIDGE_PMEM_REG); 785 pci_conf_write(tag, 786 PCI_PCI_BRIDGE_PMEM_REG, 0xFFFFFFFF); 787 data = pci_conf_read (tag, 788 PCI_PCI_BRIDGE_PMEM_REG); 789 pci_conf_write(tag, 790 PCI_PCI_BRIDGE_PMEM_REG, reg); 791 792 mask = 0xFFFFFFFF ^ (data & 0xFFFF0000); 793 this->pcicb_p_membase= 794 PCI_PPB_MEMBASE_EXTRACT (reg); 795 this->pcicb_p_memlimit= 796 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 797 798 /* 799 ** Register used memory space. 800 */ 801 pci_register_memory (pcicb, 802 this->pcicb_p_membase, 803 this->pcicb_p_memlimit); 804 } 805 806 /* 807 ** Link it in chain. 808 */ 809 *link=this; 810 811 /* 812 ** Update mapping info of parent bus. 813 */ 814 if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom) 815 pcicb->pcicb_bfrom = secondary; 816 if (subordinate > pcicb->pcicb_bupto) 817 pcicb->pcicb_bupto = subordinate; 818 819 break; 820 } 821 } 822 } 823 824 #ifndef PCI_QUIET 825 if (bootverbose) { 826 if (pcicb->pcicb_mamount) 827 printf ("%s%d: uses %d bytes of memory from %x upto %x.\n", 828 pcibus->pb_name, bus_no, 829 pcicb->pcicb_mamount, 830 pcicb->pcicb_mfrom, pcicb->pcicb_mupto); 831 if (pcicb->pcicb_pamount) 832 printf ("%s%d: uses %d bytes of I/O space from %x upto %x.\n", 833 pcibus->pb_name, bus_no, 834 pcicb->pcicb_pamount, 835 pcicb->pcicb_pfrom, pcicb->pcicb_pupto); 836 if (pcicb->pcicb_bfrom) 837 printf ("%s%d: subordinate busses from %x upto %x.\n", 838 pcibus->pb_name, bus_no, 839 pcicb->pcicb_bfrom, pcicb->pcicb_bupto); 840 } 841 #endif 842 } 843 844 /*======================================================== 845 ** 846 ** pci_configure () 847 ** 848 ** Autoconfiguration of pci devices. 849 ** 850 ** May be called more than once. 851 ** Any device is attached only once. 852 ** 853 ** Has to take care of mirrored devices, which are 854 ** entailed by incomplete decoding of pci address lines. 855 ** 856 **======================================================== 857 */ 858 859 void pci_configure() 860 { 861 struct pcibus **pbp = (struct pcibus**) pcibus_set.ls_items; 862 863 /* 864 ** check pci bus present 865 */ 866 867 while (!pci_maxdevice && (pcibus = *pbp++)) { 868 (*pcibus->pb_setup)(); 869 } 870 871 if (!pci_maxdevice) return; 872 873 /* 874 ** hello world .. 875 */ 876 877 pciroots = 1; 878 while (pciroots--) { 879 880 pcicb = malloc (sizeof (struct pcicb), M_DEVBUF, M_WAITOK); 881 if (pcicb == NULL) { 882 return; 883 } 884 bzero (pcicb, sizeof (struct pcicb)); 885 pcicb->pcicb_bus = pcibusmax; 886 pcicb->pcicb_iolimit = 0xffff; 887 pcicb->pcicb_membase = 0x02000000; 888 pcicb->pcicb_p_membase = 0x02000000; 889 pcicb->pcicb_memlimit = 0xffffffff; 890 pcicb->pcicb_p_memlimit = 0xffffffff; 891 892 while (pcicb != NULL) { 893 pci_bus_config (); 894 895 if (pcibusmax < pcicb->pcicb_bus) 896 (pcibusmax = pcicb->pcicb_bus); 897 898 if (pcicb->pcicb_down) { 899 pcicb = pcicb->pcicb_down; 900 continue; 901 }; 902 903 while (pcicb && !pcicb->pcicb_next) 904 pcicb = pcicb->pcicb_up; 905 906 if (pcicb) 907 pcicb = pcicb->pcicb_next; 908 } 909 pcibusmax++; 910 } 911 pci_conf_count++; 912 } 913 914 /*----------------------------------------------------------------------- 915 ** 916 ** Map device into port space. 917 ** 918 ** Actually the device should have been mapped by the bios. 919 ** This function only reads and verifies the value. 920 ** 921 ** PCI-Specification: 6.2.5.1: address maps 922 ** 923 **----------------------------------------------------------------------- 924 */ 925 926 int pci_map_port (pcici_t tag, u_long reg, u_short* pa) 927 { 928 unsigned data, ioaddr, iosize; 929 struct pcicb *link = pcicb; 930 931 /* 932 ** sanity check 933 */ 934 935 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 936 printf ("pci_map_port failed: bad register=0x%x\n", 937 (unsigned)reg); 938 return (0); 939 }; 940 941 /*if (pcicb->pcicb_flags & PCICB_NOIOSET) { 942 printf ("pci_map_port failed: pci%d has not been configured for I/O access\n", 943 pcicb->pcicb_bus); 944 return (0); 945 }*/ 946 947 /* 948 ** get size and type of port 949 ** 950 ** type is in the lowest two bits. 951 ** If device requires 2^n bytes, the next 952 ** n-2 bits are hardwired as 0. 953 */ 954 955 ioaddr = pci_conf_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK; 956 if (!ioaddr) { 957 printf ("pci_map_port failed: not configured by bios.\n"); 958 return (0); 959 }; 960 961 pci_conf_write (tag, reg, 0xfffffffful); 962 data = pci_conf_read (tag, reg); 963 pci_conf_write (tag, reg, ioaddr); 964 965 if ((data & 0x03) != PCI_MAP_IO) { 966 printf ("pci_map_port failed: bad port type=0x%x\n", 967 (unsigned) data); 968 return (0); 969 }; 970 iosize = -(data & PCI_MAP_IO_ADDRESS_MASK); 971 iosize &= ~(ioaddr ^ -ioaddr); 972 if (ioaddr < pcicb->pcicb_iobase 973 || ioaddr + iosize -1 > pcicb->pcicb_iolimit) { 974 printf ("pci_map_port failed: device's iorange 0x%x-0x%x " 975 "is incompatible with its bridge's range 0x%x-0x%x\n", 976 (unsigned) ioaddr, (unsigned) ioaddr + iosize - 1, 977 (unsigned) pcicb->pcicb_iobase, 978 (unsigned) pcicb->pcicb_iolimit); 979 return (0); 980 } 981 982 #ifndef PCI_QUIET 983 if (bootverbose) 984 printf ("\treg%d: ioaddr=0x%x size=0x%x\n", 985 (unsigned) reg, (unsigned) ioaddr, (unsigned) iosize); 986 #endif 987 /* 988 ** set the configuration register of and 989 ** return the address to the driver. 990 ** Make sure to enable each upstream bridge 991 ** so I/O and DMA can go all the way. 992 */ 993 994 for (;;) { 995 data = pci_conf_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 996 data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE; 997 (void) pci_conf_write(tag, PCI_COMMAND_STATUS_REG, data); 998 if ((link = link->pcicb_up) == NULL) 999 break; 1000 tag = link->pcicb_bridge; 1001 } 1002 1003 *pa = ioaddr; 1004 1005 return (1); 1006 } 1007 1008 /*----------------------------------------------------------------------- 1009 ** 1010 ** Map device into virtual and physical space 1011 ** 1012 ** Actually the device should have been mapped by the bios. 1013 ** This function only reads and verifies the value. 1014 ** 1015 ** PCI-Specification: 6.2.5.1: address maps 1016 ** 1017 **----------------------------------------------------------------------- 1018 */ 1019 1020 int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa) 1021 { 1022 struct pcicb *link = pcicb; 1023 unsigned data ,paddr; 1024 vm_size_t psize, poffs; 1025 vm_offset_t vaddr; 1026 1027 /* 1028 ** sanity check 1029 */ 1030 1031 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 1032 printf ("pci_map_mem failed: bad register=0x%x\n", 1033 (unsigned)reg); 1034 return (0); 1035 }; 1036 1037 /* 1038 ** save old mapping, get size and type of memory 1039 ** 1040 ** type is in the lowest four bits. 1041 ** If device requires 2^n bytes, the next 1042 ** n-4 bits are read as 0. 1043 */ 1044 1045 paddr = pci_conf_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK; 1046 pci_conf_write (tag, reg, 0xfffffffful); 1047 data = pci_conf_read (tag, reg); 1048 pci_conf_write (tag, reg, paddr); 1049 1050 /* 1051 ** check the type 1052 */ 1053 1054 if ((data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT) { 1055 printf ("pci_map_mem failed: bad memory type=0x%x\n", 1056 (unsigned) data); 1057 return (0); 1058 }; 1059 1060 /* 1061 ** get the size. 1062 */ 1063 1064 psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 1065 1066 if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) { 1067 paddr = pci_memalloc (pcicb, 0, psize); 1068 if (!paddr) { 1069 printf ("pci_map_mem: not configured by bios.\n"); 1070 return (0); 1071 }; 1072 pci_register_memory (pcicb, paddr, paddr+psize-1); 1073 }; 1074 1075 if (paddr < pcicb->pcicb_membase || 1076 paddr + psize - 1 > pcicb->pcicb_memlimit) { 1077 printf ("pci_map_mem failed: device's memrange 0x%x-0x%x is " 1078 "incompatible with its bridge's memrange 0x%x-0x%x\n", 1079 (unsigned) paddr, 1080 (unsigned) (paddr + psize - 1), 1081 (unsigned) pcicb->pcicb_membase, 1082 (unsigned) pcicb->pcicb_memlimit); 1083 /* return (0);*/ 1084 /* ACHTUNG: Ist der Code richtig, wenn eine PCI-PCI-Bridge fuer 1085 * die PCI-Slots verwendet wird, aber die Onboard-Devices direkt 1086 * an der CPU-PCI-Bridge haengen (Siehe Compaq Prolinea Problem) ??? 1087 */ 1088 } 1089 pci_conf_write (tag, reg, paddr); 1090 1091 /* 1092 ** Truncate paddr to page boundary. 1093 ** (Or does pmap_mapdev the job?) 1094 */ 1095 1096 poffs = paddr - trunc_page (paddr); 1097 vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs); 1098 1099 if (!vaddr) return (0); 1100 1101 vaddr += poffs; 1102 1103 #ifndef PCI_QUIET 1104 /* 1105 ** display values. 1106 */ 1107 1108 if (bootverbose) 1109 printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n", 1110 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize); 1111 #endif 1112 /* 1113 ** set the configuration register and 1114 ** return the address to the driver 1115 ** Make sure to enable each upstream bridge 1116 ** so memory and DMA can go all the way. 1117 */ 1118 1119 for (;;) { 1120 data = pci_conf_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 1121 data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 1122 (void) pci_conf_write(tag, PCI_COMMAND_STATUS_REG, data); 1123 if ((link = link->pcicb_up) == NULL) 1124 break; 1125 tag = link->pcicb_bridge; 1126 } 1127 1128 *va = vaddr; 1129 *pa = paddr; 1130 1131 return (1); 1132 } 1133 1134 /*----------------------------------------------------------------------- 1135 ** 1136 ** Pci meta interrupt handler 1137 ** 1138 ** This handler assumes level triggered interrupts. 1139 ** It's possible to build a kernel which handles shared 1140 ** edge triggered interrupts by the options "PCI_EDGE_INT". 1141 ** But there is a performance penalty. 1142 ** 1143 ** (Of course you can delete the #ifdef PCI_EDGE_INT bracketed 1144 ** code at all :-) :-) :-) 1145 ** 1146 **----------------------------------------------------------------------- 1147 */ 1148 1149 static struct pci_int_desc* 1150 pci_int_desc [PCI_MAX_IRQ]; 1151 1152 #ifndef NO_SHARED_IRQ 1153 1154 static inline unsigned 1155 splq (unsigned mask) 1156 { 1157 unsigned temp=cpl; 1158 cpl |= mask; 1159 return temp; 1160 } 1161 1162 static void 1163 pci_int (int irq) 1164 { 1165 struct pci_int_desc * p; 1166 int s; 1167 1168 if (irq<0 || irq >= PCI_MAX_IRQ) { 1169 printf ("pci_int: irq %d out of range, ignored\n", irq); 1170 return; 1171 }; 1172 for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) { 1173 s = splq (*p->pcid_maskptr); 1174 (*p->pcid_handler) (p->pcid_argument); 1175 p-> pcid_tally++; 1176 splx (s); 1177 #if 0 1178 if (p->pcid_tally<20) 1179 printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n", 1180 irq, p->pcid_handler, s, cpl, c); 1181 #endif 1182 }; 1183 } 1184 #endif 1185 1186 /*----------------------------------------------------------------------- 1187 ** 1188 ** Auxiliary function for interrupt (un)mapping. 1189 ** 1190 **----------------------------------------------------------------------- 1191 */ 1192 1193 static u_int 1194 getirq (pcici_t tag) 1195 { 1196 u_int irq; 1197 1198 irq = PCI_INTERRUPT_LINE_EXTRACT( 1199 pci_conf_read (tag, PCI_INTERRUPT_REG)); 1200 1201 if (irq <= 0) { 1202 printf ("\tint line register not set by bios\n"); 1203 return (0); 1204 } 1205 1206 if (irq >= pcibus->pb_maxirq || irq >= PCI_MAX_IRQ) { 1207 printf ("\tirq %d invalid.\n", irq); 1208 return (0); 1209 } 1210 1211 return (irq); 1212 } 1213 1214 static struct pci_int_desc ** 1215 getintdescbytag (u_int irq, pcici_t tag) 1216 { 1217 struct pci_int_desc *p, **pp; 1218 1219 pp=&pci_int_desc[irq]; 1220 while (((p=*pp)) && !sametag(p->pcid_tag,tag)) 1221 pp=&p->pcid_next; 1222 1223 if (!p) return (NULL); 1224 1225 return (pp); 1226 } 1227 1228 static struct pci_int_desc * 1229 getintdescbymptr (u_int irq, unsigned * mptr) 1230 { 1231 struct pci_int_desc *p; 1232 1233 for (p=pci_int_desc[irq];p;p=p->pcid_next) 1234 if (p->pcid_maskptr == mptr) break; 1235 return (p); 1236 } 1237 1238 /*----------------------------------------------------------------------- 1239 ** 1240 ** Map pci interrupt. 1241 ** 1242 **----------------------------------------------------------------------- 1243 */ 1244 1245 static unsigned pci_mask0 = 0; 1246 1247 int pci_map_int (pcici_t tag, pci_inthand_t *func, void *arg, unsigned *maskptr) 1248 { 1249 u_int irq; 1250 int result, oldspl; 1251 unsigned mask; 1252 struct pci_int_desc *tail, *mdp=NULL, *new=NULL; 1253 1254 /* 1255 ** Get irq line from configuration space, 1256 ** and check for consistency. 1257 */ 1258 1259 irq = getirq (tag); 1260 if (irq >= PCI_MAX_IRQ) { 1261 printf ("\tillegal irq %d.\n", irq); 1262 return (0); 1263 }; 1264 mask= 1ul << irq; 1265 1266 /* 1267 ** disable this interrupt. 1268 */ 1269 1270 oldspl = splq (mask); 1271 1272 /* 1273 ** If handler for this tag already installed, 1274 ** remove it first. 1275 */ 1276 1277 if (getintdescbytag (irq, tag) != NULL) 1278 pci_unmap_int (tag); 1279 1280 /* 1281 ** If this irq not yet included in the mask, include it. 1282 */ 1283 1284 mdp = getintdescbymptr (irq, maskptr); 1285 if (!mdp) { 1286 result = pcibus->pb_imaskinc (irq, maskptr); 1287 if (result) 1288 goto conflict; 1289 }; 1290 1291 /* 1292 ** Allocate descriptor and initialize it. 1293 */ 1294 1295 tail = pci_int_desc[irq]; 1296 1297 new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK); 1298 bzero (new, sizeof (*new)); 1299 1300 new->pcid_next = tail; 1301 new->pcid_tag = tag; 1302 new->pcid_handler = func; 1303 new->pcid_argument = arg; 1304 new->pcid_maskptr = maskptr; 1305 new->pcid_tally = 0; 1306 new->pcid_mask = mask; 1307 1308 /* 1309 ** If first handler: install it. 1310 ** If second handler: install shared-int-handler. 1311 */ 1312 1313 if (!tail) { 1314 /* 1315 ** first handler for this irq. 1316 */ 1317 1318 result = pcibus->pb_iattach 1319 /* 1320 * XXX if we get here, then `func' must be pci_int 1321 * so the bogus casts are almost OK since they just 1322 * undo the bogus casts that were needed to pass 1323 * pci_int and its arg to pci_map_int(). 1324 */ 1325 (irq, (inthand2_t *) func, (int) arg, maskptr); 1326 if (result) goto conflict; 1327 1328 #ifdef NO_SHARED_IRQ 1329 } else goto conflict; 1330 #else 1331 } else if (!tail->pcid_next) { 1332 /* 1333 ** Second handler for this irq. 1334 */ 1335 1336 if (bootverbose) 1337 printf ("\tusing shared irq %d.\n", irq); 1338 1339 /* 1340 ** replace old handler by shared-int-handler. 1341 */ 1342 1343 result = pcibus->pb_idetach (irq, 1344 (inthand2_t *) tail->pcid_handler); 1345 if (result) 1346 printf ("\tCANNOT DETACH INT HANDLER.\n"); 1347 1348 result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0); 1349 if (result) { 1350 printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n"); 1351 goto fail; 1352 }; 1353 } 1354 #endif 1355 /* 1356 ** Link new descriptor, reenable ints and done. 1357 */ 1358 1359 pci_int_desc[irq] = new; 1360 splx (oldspl); 1361 return (1); 1362 1363 /* 1364 ** Handle some problems. 1365 */ 1366 1367 conflict: 1368 printf ("\tirq %d already in use.\n", irq); 1369 fail: 1370 /* 1371 ** If descriptor allocated, free it. 1372 ** If included in mask, remove it. 1373 */ 1374 1375 if (new) free(new, M_DEVBUF); 1376 if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr); 1377 splx (oldspl); 1378 return (0); 1379 } 1380 1381 /*----------------------------------------------------------------------- 1382 ** 1383 ** Unmap pci interrupt. 1384 ** 1385 **----------------------------------------------------------------------- 1386 */ 1387 1388 int pci_unmap_int (pcici_t tag) 1389 { 1390 int result, oldspl; 1391 struct pci_int_desc *this, **hook, *tail; 1392 unsigned irq; 1393 1394 /* 1395 ** Get irq line from configuration space, 1396 ** and check for consistency. 1397 */ 1398 1399 irq = getirq (tag); 1400 if (irq >= PCI_MAX_IRQ) { 1401 printf ("\tillegal irq %d.\n", irq); 1402 return (0); 1403 }; 1404 1405 /* 1406 ** Search and unlink interrupt descriptor. 1407 */ 1408 1409 hook = getintdescbytag (irq, tag); 1410 if (hook == NULL) { 1411 printf ("\tno irq %d handler for pci %x\n", 1412 irq, tag.tag); 1413 return (0); 1414 }; 1415 1416 this = *hook; 1417 *hook= this->pcid_next; 1418 1419 /* 1420 ** Message 1421 */ 1422 1423 printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n", 1424 irq, this->pcid_handler, this->pcid_argument, 1425 this->pcid_tag.tag, this->pcid_tally); 1426 1427 /* 1428 ** If this irq no longer included in the mask, remove it. 1429 */ 1430 1431 if (!getintdescbymptr (irq, this->pcid_maskptr)) 1432 (void) pcibus->pb_imaskexc (irq, this->pcid_maskptr); 1433 1434 tail = pci_int_desc[irq]; 1435 1436 if (tail == NULL) { 1437 1438 /* 1439 ** Remove the old handler. 1440 */ 1441 1442 result = pcibus->pb_idetach (irq, 1443 (inthand2_t *) this->pcid_handler); 1444 if (result) 1445 printf ("\tirq %d: cannot remove handler.\n", irq); 1446 1447 } else if (tail->pcid_next == NULL) { 1448 1449 /* 1450 ** Remove the shared int handler. 1451 ** Install the last remaining handler. 1452 */ 1453 1454 oldspl = splq (1ul << irq); 1455 1456 result = pcibus->pb_idetach (irq, pci_int); 1457 if (result) 1458 printf ("\tirq %d: cannot remove handler.\n", irq); 1459 1460 result = pcibus->pb_iattach (irq, 1461 (inthand2_t *) tail->pcid_handler, 1462 (int) tail->pcid_argument, 1463 tail->pcid_maskptr); 1464 1465 if (result) 1466 printf ("\tirq %d: cannot install handler.\n", irq); 1467 1468 splx (oldspl); 1469 }; 1470 1471 free (this, M_DEVBUF); 1472 return (1); 1473 } 1474 1475 /*----------------------------------------------------------- 1476 ** 1477 ** Display of unknown devices. 1478 ** 1479 **----------------------------------------------------------- 1480 */ 1481 struct vt { 1482 u_short ident; 1483 char* name; 1484 }; 1485 1486 static struct vt VendorTable[] = { 1487 {0x0e11, "Compaq"}, 1488 {0x1000, "NCR/Symbios"}, 1489 {0x1002, "ATI Technologies Inc."}, 1490 {0x1004, "VLSI"}, 1491 {0x100B, "National Semiconductor"}, 1492 {0x100E, "Weitek"}, 1493 {0x1011, "Digital Equipment Corporation"}, 1494 {0x1013, "Cirrus Logic"}, 1495 {0x101A, "NCR"}, 1496 {0x1022, "AMD"}, 1497 {0x102B, "Matrox"}, 1498 {0x102C, "Chips & Technologies"}, 1499 {0x1039, "Silicon Integrated Systems"}, 1500 {0x1042, "SMC"}, 1501 {0x1044, "DPT"}, 1502 {0x1045, "OPTI"}, 1503 {0x104B, "Bus Logic"}, 1504 {0x1060, "UMC"}, 1505 {0x1080, "Contaq"}, 1506 {0x1095, "CMD"}, 1507 {0x10b9, "ACER Labs"}, 1508 {0x1106, "VIA Technologies"}, 1509 {0x5333, "S3 Inc."}, 1510 {0x8086, "Intel Corporation"}, 1511 {0x9004, "Adaptec"}, 1512 {0,0} 1513 }; 1514 1515 typedef struct { 1516 const int subclass; 1517 const char *name; 1518 } subclass_name; 1519 1520 /* 0x00 prehistoric subclasses */ 1521 static const subclass_name old_subclasses[] = 1522 { 1523 { 0x00, "misc" }, 1524 { 0x01, "vga" }, 1525 { 0x00, NULL } 1526 }; 1527 1528 /* 0x01 mass storage subclasses */ 1529 static const subclass_name storage_subclasses[] = 1530 { 1531 { 0x00, "scsi" }, 1532 { 0x01, "ide" }, 1533 { 0x02, "floppy"}, 1534 { 0x03, "ipi" }, 1535 { 0x80, "misc" }, 1536 { 0x00, NULL } 1537 }; 1538 1539 /* 0x02 network subclasses */ 1540 static const subclass_name network_subclasses[] = 1541 { 1542 { 0x00, "ethernet" }, 1543 { 0x01, "tokenring" }, 1544 { 0x02, "fddi" }, 1545 { 0x80, "misc" }, 1546 { 0x00, NULL } 1547 }; 1548 1549 /* 0x03 display subclasses */ 1550 static const subclass_name display_subclasses[] = 1551 { 1552 { 0x00, "vga" }, 1553 { 0x01, "xga" }, 1554 { 0x80, "misc" }, 1555 { 0x00, NULL } 1556 }; 1557 1558 /* 0x04 multimedia subclasses */ 1559 static const subclass_name multimedia_subclasses[] = 1560 { 1561 { 0x00, "video" }, 1562 { 0x01, "audio" }, 1563 { 0x80, "misc" }, 1564 { 0x00, NULL } 1565 }; 1566 1567 /* 0x05 memory subclasses */ 1568 static const subclass_name memory_subclasses[] = 1569 { 1570 { 0x00, "ram" }, 1571 { 0x01, "flash" }, 1572 { 0x80, "misc" }, 1573 { 0x00, NULL } 1574 }; 1575 1576 /* 0x06 bridge subclasses */ 1577 static const subclass_name bridge_subclasses[] = 1578 { 1579 { 0x00, "host" }, 1580 { 0x01, "isa" }, 1581 { 0x02, "eisa" }, 1582 { 0x03, "mc" }, 1583 { 0x04, "pci" }, 1584 { 0x05, "pcmcia"}, 1585 { 0x80, "misc" }, 1586 { 0x00, NULL } 1587 }; 1588 1589 static const subclass_name *const subclasses[] = { 1590 old_subclasses, 1591 storage_subclasses, 1592 network_subclasses, 1593 display_subclasses, 1594 multimedia_subclasses, 1595 memory_subclasses, 1596 bridge_subclasses, 1597 }; 1598 1599 static const char *const majclasses[] = { 1600 "old", 1601 "storage", 1602 "network", 1603 "display", 1604 "multimedia", 1605 "memory", 1606 "bridge" 1607 }; 1608 1609 1610 void not_supported (pcici_t tag, u_long type) 1611 { 1612 u_long reg; 1613 u_long data; 1614 u_char class; 1615 u_char subclass; 1616 struct vt * vp; 1617 int pciint; 1618 int irq; 1619 1620 /* 1621 ** lookup the names. 1622 */ 1623 1624 for (vp=VendorTable; vp->ident; vp++) 1625 if (vp->ident == (type & 0xffff)) 1626 break; 1627 1628 /* 1629 ** and display them. 1630 */ 1631 1632 if (vp->ident) printf (vp->name); 1633 else printf ("vendor=0x%04lx", type & 0xffff); 1634 1635 printf (", device=0x%04lx", type >> 16); 1636 1637 data = pci_conf_read(tag, PCI_CLASS_REG); 1638 class = (data >> 24) & 0xff; 1639 subclass = (data >> 16) & 0xff; 1640 1641 if (class < sizeof(majclasses) / sizeof(majclasses[0])) { 1642 printf(", class=%s", majclasses[class]); 1643 } else { 1644 printf(", class=0x%02x", class); 1645 } 1646 1647 if (class < sizeof(subclasses) / sizeof(subclasses[0])) { 1648 const subclass_name *p = subclasses[class]; 1649 while (p->name && (p->subclass != subclass)) 1650 p++; 1651 if (p->name) { 1652 printf(" (%s)", p->name); 1653 } else { 1654 printf(" (unknown subclass 0x%02lx)", subclass); 1655 } 1656 } else { 1657 printf(", subclass=0x%02x", subclass); 1658 } 1659 1660 data = pci_conf_read (tag, PCI_INTERRUPT_REG); 1661 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 1662 1663 if (pciint) { 1664 1665 printf (" int %c irq ", 0x60+pciint); 1666 1667 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 1668 1669 /* 1670 ** If it's zero, the isa irq number is unknown, 1671 ** and we cannot bind the pci interrupt. 1672 */ 1673 1674 if (irq && (irq != 0xff)) 1675 printf ("%d", irq); 1676 else 1677 printf ("??"); 1678 }; 1679 1680 if (class != (PCI_CLASS_BRIDGE >> 24)) 1681 printf (" [no driver assigned]"); 1682 printf ("\n"); 1683 1684 if (bootverbose) { 1685 if (class == (PCI_CLASS_BRIDGE >> 24)) { 1686 printf ("configuration space registers:"); 1687 for (reg = 0; reg < 0x100; reg+=4) { 1688 if ((reg & 0x0f) == 0) printf ("\n%02x:\t", reg); 1689 printf ("%08x ", pci_conf_read (tag, reg)); 1690 } 1691 printf ("\n"); 1692 } else { 1693 for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) { 1694 data = pci_conf_read (tag, reg); 1695 if ((data&~7)==0) continue; 1696 switch (data&7) { 1697 1698 case 1: 1699 case 5: 1700 printf ("\tmap(%x): io(%04lx)\n", 1701 reg, data & ~3); 1702 break; 1703 case 0: 1704 printf ("\tmap(%x): mem32(%08lx)\n", 1705 reg, data & ~7); 1706 break; 1707 case 2: 1708 printf ("\tmap(%x): mem20(%05lx)\n", 1709 reg, data & ~7); 1710 break; 1711 case 4: 1712 printf ("\tmap(%x): mem64(%08x%08lx)\n", 1713 reg, pci_conf_read (tag, reg +4), data & ~7); 1714 reg += 4; 1715 break; 1716 } 1717 } 1718 } 1719 } 1720 } 1721 #endif /* NPCI */ 1722