xref: /freebsd/sys/dev/pci/hostb_pci.c (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright 1997, Stefan Esser <se@freebsd.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice unmodified, this list of conditions, and the following
11  *    disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/param.h>
29 #include <sys/bus.h>
30 #include <sys/kernel.h>
31 #include <sys/module.h>
32 
33 #include <dev/pci/pcivar.h>
34 #include <dev/pci/pcireg.h>
35 
36 /*
37  * Provide a device to "eat" the host->pci bridge devices that show up
38  * on PCI buses and stop them showing up twice on the probes.  This also
39  * stops them showing up as 'none' in pciconf -l.  If the host bridge
40  * provides an AGP capability then we create a child agp device for the
41  * agp GART driver to attach to.
42  */
43 static int
44 pci_hostb_probe(device_t dev)
45 {
46 	u_int32_t id;
47 
48 	id = pci_get_devid(dev);
49 
50 	switch (id) {
51 	/* VIA VT82C596 Power Management Function */
52 	case 0x30501106:
53 		return (ENXIO);
54 
55 	default:
56 		break;
57 	}
58 
59 	if (pci_get_class(dev) == PCIC_BRIDGE &&
60 	    pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
61 		device_set_desc(dev, "Host to PCI bridge");
62 		device_quiet(dev);
63 		return (-10000);
64 	}
65 	return (ENXIO);
66 }
67 
68 static int
69 pci_hostb_attach(device_t dev)
70 {
71 
72 	bus_generic_probe(dev);
73 
74 	/*
75 	 * If AGP capabilities are present on this device, then create
76 	 * an AGP child.
77 	 */
78 	if (pci_find_cap(dev, PCIY_AGP, NULL) == 0)
79 		device_add_child(dev, "agp", -1);
80 	bus_generic_attach(dev);
81 	return (0);
82 }
83 
84 /* Bus interface. */
85 
86 static int
87 pci_hostb_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
88 {
89 
90 	return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
91 }
92 
93 static int
94 pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
95 {
96 
97 	return (EINVAL);
98 }
99 
100 static struct resource *
101 pci_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid,
102     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
103 {
104 
105 	return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
106 }
107 
108 static int
109 pci_hostb_release_resource(device_t dev, device_t child, int type, int rid,
110     struct resource *r)
111 {
112 
113 	return (bus_release_resource(dev, type, rid, r));
114 }
115 
116 /* PCI interface. */
117 
118 static uint32_t
119 pci_hostb_read_config(device_t dev, device_t child, int reg, int width)
120 {
121 
122 	return (pci_read_config(dev, reg, width));
123 }
124 
125 static void
126 pci_hostb_write_config(device_t dev, device_t child, int reg,
127     uint32_t val, int width)
128 {
129 
130 	pci_write_config(dev, reg, val, width);
131 }
132 
133 static int
134 pci_hostb_enable_busmaster(device_t dev, device_t child)
135 {
136 
137 	device_printf(dev, "child %s requested pci_enable_busmaster\n",
138 	    device_get_nameunit(child));
139 	return (pci_enable_busmaster(dev));
140 }
141 
142 static int
143 pci_hostb_disable_busmaster(device_t dev, device_t child)
144 {
145 
146 	device_printf(dev, "child %s requested pci_disable_busmaster\n",
147 	    device_get_nameunit(child));
148 	return (pci_disable_busmaster(dev));
149 }
150 
151 static int
152 pci_hostb_enable_io(device_t dev, device_t child, int space)
153 {
154 
155 	device_printf(dev, "child %s requested pci_enable_io\n",
156 	    device_get_nameunit(child));
157 	return (pci_enable_io(dev, space));
158 }
159 
160 static int
161 pci_hostb_disable_io(device_t dev, device_t child, int space)
162 {
163 
164 	device_printf(dev, "child %s requested pci_disable_io\n",
165 	    device_get_nameunit(child));
166 	return (pci_disable_io(dev, space));
167 }
168 
169 static int
170 pci_hostb_set_powerstate(device_t dev, device_t child, int state)
171 {
172 
173 	device_printf(dev, "child %s requested pci_set_powerstate\n",
174 	    device_get_nameunit(child));
175 	return (pci_set_powerstate(dev, state));
176 }
177 
178 static int
179 pci_hostb_get_powerstate(device_t dev, device_t child)
180 {
181 
182 	device_printf(dev, "child %s requested pci_get_powerstate\n",
183 	    device_get_nameunit(child));
184 	return (pci_get_powerstate(dev));
185 }
186 
187 static int
188 pci_hostb_assign_interrupt(device_t dev, device_t child)
189 {
190 
191 	device_printf(dev, "child %s requested pci_assign_interrupt\n",
192 	    device_get_nameunit(child));
193 	return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
194 }
195 
196 static int
197 pci_hostb_find_cap(device_t dev, device_t child, int capability,
198     int *capreg)
199 {
200 
201 	return (pci_find_cap(dev, capability, capreg));
202 }
203 
204 static int
205 pci_hostb_find_next_cap(device_t dev, device_t child, int capability,
206     int start, int *capreg)
207 {
208 
209 	return (pci_find_next_cap(dev, capability, start, capreg));
210 }
211 
212 static int
213 pci_hostb_find_extcap(device_t dev, device_t child, int capability,
214     int *capreg)
215 {
216 
217 	return (pci_find_extcap(dev, capability, capreg));
218 }
219 
220 static int
221 pci_hostb_find_next_extcap(device_t dev, device_t child, int capability,
222     int start, int *capreg)
223 {
224 
225 	return (pci_find_next_extcap(dev, capability, start, capreg));
226 }
227 
228 static int
229 pci_hostb_find_htcap(device_t dev, device_t child, int capability,
230     int *capreg)
231 {
232 
233 	return (pci_find_htcap(dev, capability, capreg));
234 }
235 
236 static int
237 pci_hostb_find_next_htcap(device_t dev, device_t child, int capability,
238     int start, int *capreg)
239 {
240 
241 	return (pci_find_next_htcap(dev, capability, start, capreg));
242 }
243 
244 static device_method_t pci_hostb_methods[] = {
245 	/* Device interface */
246 	DEVMETHOD(device_probe,		pci_hostb_probe),
247 	DEVMETHOD(device_attach,	pci_hostb_attach),
248 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
249 	DEVMETHOD(device_suspend,	bus_generic_suspend),
250 	DEVMETHOD(device_resume,	bus_generic_resume),
251 
252 	/* Bus interface */
253 	DEVMETHOD(bus_read_ivar,	pci_hostb_read_ivar),
254 	DEVMETHOD(bus_write_ivar,	pci_hostb_write_ivar),
255 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
256 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
257 
258 	DEVMETHOD(bus_alloc_resource,	pci_hostb_alloc_resource),
259 	DEVMETHOD(bus_release_resource,	pci_hostb_release_resource),
260 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
261 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
262 
263 	/* PCI interface */
264 	DEVMETHOD(pci_read_config,	pci_hostb_read_config),
265 	DEVMETHOD(pci_write_config,	pci_hostb_write_config),
266 	DEVMETHOD(pci_enable_busmaster,	pci_hostb_enable_busmaster),
267 	DEVMETHOD(pci_disable_busmaster, pci_hostb_disable_busmaster),
268 	DEVMETHOD(pci_enable_io,	pci_hostb_enable_io),
269 	DEVMETHOD(pci_disable_io,	pci_hostb_disable_io),
270 	DEVMETHOD(pci_get_powerstate,	pci_hostb_get_powerstate),
271 	DEVMETHOD(pci_set_powerstate,	pci_hostb_set_powerstate),
272 	DEVMETHOD(pci_assign_interrupt,	pci_hostb_assign_interrupt),
273 	DEVMETHOD(pci_find_cap,		pci_hostb_find_cap),
274 	DEVMETHOD(pci_find_next_cap,	pci_hostb_find_next_cap),
275 	DEVMETHOD(pci_find_extcap,	pci_hostb_find_extcap),
276 	DEVMETHOD(pci_find_next_extcap,	pci_hostb_find_next_extcap),
277 	DEVMETHOD(pci_find_htcap,	pci_hostb_find_htcap),
278 	DEVMETHOD(pci_find_next_htcap,	pci_hostb_find_next_htcap),
279 	{ 0, 0 }
280 };
281 
282 static driver_t pci_hostb_driver = {
283 	"hostb",
284 	pci_hostb_methods,
285 	1,
286 };
287 
288 DRIVER_MODULE(hostb, pci, pci_hostb_driver, 0, 0);
289