xref: /freebsd/sys/dev/pci/hostb_pci.c (revision f7c32ed617858bcd22f8d1b03199099d50125721)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright 1997, Stefan Esser <se@freebsd.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice unmodified, this list of conditions, and the following
11  *    disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 
36 #include <dev/pci/pcivar.h>
37 #include <dev/pci/pcireg.h>
38 
39 /*
40  * Provide a device to "eat" the host->pci bridge devices that show up
41  * on PCI buses and stop them showing up twice on the probes.  This also
42  * stops them showing up as 'none' in pciconf -l.  If the host bridge
43  * provides an AGP capability then we create a child agp device for the
44  * agp GART driver to attach to.
45  */
46 static int
47 pci_hostb_probe(device_t dev)
48 {
49 	u_int32_t id;
50 
51 	id = pci_get_devid(dev);
52 
53 	switch (id) {
54 	/* VIA VT82C596 Power Management Function */
55 	case 0x30501106:
56 		return (ENXIO);
57 
58 	default:
59 		break;
60 	}
61 
62 	if (pci_get_class(dev) == PCIC_BRIDGE &&
63 	    pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
64 		device_set_desc(dev, "Host to PCI bridge");
65 		device_quiet(dev);
66 		return (-10000);
67 	}
68 	return (ENXIO);
69 }
70 
71 static int
72 pci_hostb_attach(device_t dev)
73 {
74 
75 	bus_generic_probe(dev);
76 
77 	/*
78 	 * If AGP capabilities are present on this device, then create
79 	 * an AGP child.
80 	 */
81 	if (pci_find_cap(dev, PCIY_AGP, NULL) == 0)
82 		device_add_child(dev, "agp", -1);
83 	bus_generic_attach(dev);
84 	return (0);
85 }
86 
87 /* Bus interface. */
88 
89 static int
90 pci_hostb_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
91 {
92 
93 	return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
94 }
95 
96 static int
97 pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
98 {
99 
100 	return (EINVAL);
101 }
102 
103 static struct resource *
104 pci_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid,
105     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
106 {
107 
108 	return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
109 }
110 
111 static int
112 pci_hostb_release_resource(device_t dev, device_t child, int type, int rid,
113     struct resource *r)
114 {
115 
116 	return (bus_release_resource(dev, type, rid, r));
117 }
118 
119 /* PCI interface. */
120 
121 static uint32_t
122 pci_hostb_read_config(device_t dev, device_t child, int reg, int width)
123 {
124 
125 	return (pci_read_config(dev, reg, width));
126 }
127 
128 static void
129 pci_hostb_write_config(device_t dev, device_t child, int reg,
130     uint32_t val, int width)
131 {
132 
133 	pci_write_config(dev, reg, val, width);
134 }
135 
136 static int
137 pci_hostb_enable_busmaster(device_t dev, device_t child)
138 {
139 
140 	device_printf(dev, "child %s requested pci_enable_busmaster\n",
141 	    device_get_nameunit(child));
142 	return (pci_enable_busmaster(dev));
143 }
144 
145 static int
146 pci_hostb_disable_busmaster(device_t dev, device_t child)
147 {
148 
149 	device_printf(dev, "child %s requested pci_disable_busmaster\n",
150 	    device_get_nameunit(child));
151 	return (pci_disable_busmaster(dev));
152 }
153 
154 static int
155 pci_hostb_enable_io(device_t dev, device_t child, int space)
156 {
157 
158 	device_printf(dev, "child %s requested pci_enable_io\n",
159 	    device_get_nameunit(child));
160 	return (pci_enable_io(dev, space));
161 }
162 
163 static int
164 pci_hostb_disable_io(device_t dev, device_t child, int space)
165 {
166 
167 	device_printf(dev, "child %s requested pci_disable_io\n",
168 	    device_get_nameunit(child));
169 	return (pci_disable_io(dev, space));
170 }
171 
172 static int
173 pci_hostb_set_powerstate(device_t dev, device_t child, int state)
174 {
175 
176 	device_printf(dev, "child %s requested pci_set_powerstate\n",
177 	    device_get_nameunit(child));
178 	return (pci_set_powerstate(dev, state));
179 }
180 
181 static int
182 pci_hostb_get_powerstate(device_t dev, device_t child)
183 {
184 
185 	device_printf(dev, "child %s requested pci_get_powerstate\n",
186 	    device_get_nameunit(child));
187 	return (pci_get_powerstate(dev));
188 }
189 
190 static int
191 pci_hostb_assign_interrupt(device_t dev, device_t child)
192 {
193 
194 	device_printf(dev, "child %s requested pci_assign_interrupt\n",
195 	    device_get_nameunit(child));
196 	return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
197 }
198 
199 static int
200 pci_hostb_find_cap(device_t dev, device_t child, int capability,
201     int *capreg)
202 {
203 
204 	return (pci_find_cap(dev, capability, capreg));
205 }
206 
207 static int
208 pci_hostb_find_next_cap(device_t dev, device_t child, int capability,
209     int start, int *capreg)
210 {
211 
212 	return (pci_find_next_cap(dev, capability, start, capreg));
213 }
214 
215 static int
216 pci_hostb_find_extcap(device_t dev, device_t child, int capability,
217     int *capreg)
218 {
219 
220 	return (pci_find_extcap(dev, capability, capreg));
221 }
222 
223 static int
224 pci_hostb_find_next_extcap(device_t dev, device_t child, int capability,
225     int start, int *capreg)
226 {
227 
228 	return (pci_find_next_extcap(dev, capability, start, capreg));
229 }
230 
231 static int
232 pci_hostb_find_htcap(device_t dev, device_t child, int capability,
233     int *capreg)
234 {
235 
236 	return (pci_find_htcap(dev, capability, capreg));
237 }
238 
239 static int
240 pci_hostb_find_next_htcap(device_t dev, device_t child, int capability,
241     int start, int *capreg)
242 {
243 
244 	return (pci_find_next_htcap(dev, capability, start, capreg));
245 }
246 
247 static device_method_t pci_hostb_methods[] = {
248 	/* Device interface */
249 	DEVMETHOD(device_probe,		pci_hostb_probe),
250 	DEVMETHOD(device_attach,	pci_hostb_attach),
251 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
252 	DEVMETHOD(device_suspend,	bus_generic_suspend),
253 	DEVMETHOD(device_resume,	bus_generic_resume),
254 
255 	/* Bus interface */
256 	DEVMETHOD(bus_read_ivar,	pci_hostb_read_ivar),
257 	DEVMETHOD(bus_write_ivar,	pci_hostb_write_ivar),
258 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
259 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
260 
261 	DEVMETHOD(bus_alloc_resource,	pci_hostb_alloc_resource),
262 	DEVMETHOD(bus_release_resource,	pci_hostb_release_resource),
263 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
264 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
265 
266 	/* PCI interface */
267 	DEVMETHOD(pci_read_config,	pci_hostb_read_config),
268 	DEVMETHOD(pci_write_config,	pci_hostb_write_config),
269 	DEVMETHOD(pci_enable_busmaster,	pci_hostb_enable_busmaster),
270 	DEVMETHOD(pci_disable_busmaster, pci_hostb_disable_busmaster),
271 	DEVMETHOD(pci_enable_io,	pci_hostb_enable_io),
272 	DEVMETHOD(pci_disable_io,	pci_hostb_disable_io),
273 	DEVMETHOD(pci_get_powerstate,	pci_hostb_get_powerstate),
274 	DEVMETHOD(pci_set_powerstate,	pci_hostb_set_powerstate),
275 	DEVMETHOD(pci_assign_interrupt,	pci_hostb_assign_interrupt),
276 	DEVMETHOD(pci_find_cap,		pci_hostb_find_cap),
277 	DEVMETHOD(pci_find_next_cap,	pci_hostb_find_next_cap),
278 	DEVMETHOD(pci_find_extcap,	pci_hostb_find_extcap),
279 	DEVMETHOD(pci_find_next_extcap,	pci_hostb_find_next_extcap),
280 	DEVMETHOD(pci_find_htcap,	pci_hostb_find_htcap),
281 	DEVMETHOD(pci_find_next_htcap,	pci_hostb_find_next_htcap),
282 	{ 0, 0 }
283 };
284 
285 static driver_t pci_hostb_driver = {
286 	"hostb",
287 	pci_hostb_methods,
288 	1,
289 };
290 
291 static devclass_t pci_hostb_devclass;
292 
293 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, 0, 0);
294