xref: /freebsd/sys/dev/pci/hostb_pci.c (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright 1997, Stefan Esser <se@freebsd.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice unmodified, this list of conditions, and the following
11  *    disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 #include <sys/param.h>
30 #include <sys/bus.h>
31 #include <sys/kernel.h>
32 #include <sys/module.h>
33 
34 #include <dev/pci/pcivar.h>
35 #include <dev/pci/pcireg.h>
36 
37 /*
38  * Provide a device to "eat" the host->pci bridge devices that show up
39  * on PCI buses and stop them showing up twice on the probes.  This also
40  * stops them showing up as 'none' in pciconf -l.  If the host bridge
41  * provides an AGP capability then we create a child agp device for the
42  * agp GART driver to attach to.
43  */
44 static int
45 pci_hostb_probe(device_t dev)
46 {
47 	u_int32_t id;
48 
49 	id = pci_get_devid(dev);
50 
51 	switch (id) {
52 	/* VIA VT82C596 Power Management Function */
53 	case 0x30501106:
54 		return (ENXIO);
55 
56 	default:
57 		break;
58 	}
59 
60 	if (pci_get_class(dev) == PCIC_BRIDGE &&
61 	    pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
62 		device_set_desc(dev, "Host to PCI bridge");
63 		device_quiet(dev);
64 		return (-10000);
65 	}
66 	return (ENXIO);
67 }
68 
69 static int
70 pci_hostb_attach(device_t dev)
71 {
72 
73 	bus_generic_probe(dev);
74 
75 	/*
76 	 * If AGP capabilities are present on this device, then create
77 	 * an AGP child.
78 	 */
79 	if (pci_find_cap(dev, PCIY_AGP, NULL) == 0)
80 		device_add_child(dev, "agp", -1);
81 	bus_generic_attach(dev);
82 	return (0);
83 }
84 
85 /* Bus interface. */
86 
87 static int
88 pci_hostb_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
89 {
90 
91 	return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
92 }
93 
94 static int
95 pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
96 {
97 
98 	return (EINVAL);
99 }
100 
101 static struct resource *
102 pci_hostb_alloc_resource(device_t dev, device_t child, int type, int *rid,
103     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
104 {
105 
106 	return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
107 }
108 
109 static int
110 pci_hostb_release_resource(device_t dev, device_t child, int type, int rid,
111     struct resource *r)
112 {
113 
114 	return (bus_release_resource(dev, type, rid, r));
115 }
116 
117 /* PCI interface. */
118 
119 static uint32_t
120 pci_hostb_read_config(device_t dev, device_t child, int reg, int width)
121 {
122 
123 	return (pci_read_config(dev, reg, width));
124 }
125 
126 static void
127 pci_hostb_write_config(device_t dev, device_t child, int reg,
128     uint32_t val, int width)
129 {
130 
131 	pci_write_config(dev, reg, val, width);
132 }
133 
134 static int
135 pci_hostb_enable_busmaster(device_t dev, device_t child)
136 {
137 
138 	device_printf(dev, "child %s requested pci_enable_busmaster\n",
139 	    device_get_nameunit(child));
140 	return (pci_enable_busmaster(dev));
141 }
142 
143 static int
144 pci_hostb_disable_busmaster(device_t dev, device_t child)
145 {
146 
147 	device_printf(dev, "child %s requested pci_disable_busmaster\n",
148 	    device_get_nameunit(child));
149 	return (pci_disable_busmaster(dev));
150 }
151 
152 static int
153 pci_hostb_enable_io(device_t dev, device_t child, int space)
154 {
155 
156 	device_printf(dev, "child %s requested pci_enable_io\n",
157 	    device_get_nameunit(child));
158 	return (pci_enable_io(dev, space));
159 }
160 
161 static int
162 pci_hostb_disable_io(device_t dev, device_t child, int space)
163 {
164 
165 	device_printf(dev, "child %s requested pci_disable_io\n",
166 	    device_get_nameunit(child));
167 	return (pci_disable_io(dev, space));
168 }
169 
170 static int
171 pci_hostb_set_powerstate(device_t dev, device_t child, int state)
172 {
173 
174 	device_printf(dev, "child %s requested pci_set_powerstate\n",
175 	    device_get_nameunit(child));
176 	return (pci_set_powerstate(dev, state));
177 }
178 
179 static int
180 pci_hostb_get_powerstate(device_t dev, device_t child)
181 {
182 
183 	device_printf(dev, "child %s requested pci_get_powerstate\n",
184 	    device_get_nameunit(child));
185 	return (pci_get_powerstate(dev));
186 }
187 
188 static int
189 pci_hostb_assign_interrupt(device_t dev, device_t child)
190 {
191 
192 	device_printf(dev, "child %s requested pci_assign_interrupt\n",
193 	    device_get_nameunit(child));
194 	return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
195 }
196 
197 static int
198 pci_hostb_find_cap(device_t dev, device_t child, int capability,
199     int *capreg)
200 {
201 
202 	return (pci_find_cap(dev, capability, capreg));
203 }
204 
205 static int
206 pci_hostb_find_next_cap(device_t dev, device_t child, int capability,
207     int start, int *capreg)
208 {
209 
210 	return (pci_find_next_cap(dev, capability, start, capreg));
211 }
212 
213 static int
214 pci_hostb_find_extcap(device_t dev, device_t child, int capability,
215     int *capreg)
216 {
217 
218 	return (pci_find_extcap(dev, capability, capreg));
219 }
220 
221 static int
222 pci_hostb_find_next_extcap(device_t dev, device_t child, int capability,
223     int start, int *capreg)
224 {
225 
226 	return (pci_find_next_extcap(dev, capability, start, capreg));
227 }
228 
229 static int
230 pci_hostb_find_htcap(device_t dev, device_t child, int capability,
231     int *capreg)
232 {
233 
234 	return (pci_find_htcap(dev, capability, capreg));
235 }
236 
237 static int
238 pci_hostb_find_next_htcap(device_t dev, device_t child, int capability,
239     int start, int *capreg)
240 {
241 
242 	return (pci_find_next_htcap(dev, capability, start, capreg));
243 }
244 
245 static device_method_t pci_hostb_methods[] = {
246 	/* Device interface */
247 	DEVMETHOD(device_probe,		pci_hostb_probe),
248 	DEVMETHOD(device_attach,	pci_hostb_attach),
249 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
250 	DEVMETHOD(device_suspend,	bus_generic_suspend),
251 	DEVMETHOD(device_resume,	bus_generic_resume),
252 
253 	/* Bus interface */
254 	DEVMETHOD(bus_read_ivar,	pci_hostb_read_ivar),
255 	DEVMETHOD(bus_write_ivar,	pci_hostb_write_ivar),
256 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
257 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
258 
259 	DEVMETHOD(bus_alloc_resource,	pci_hostb_alloc_resource),
260 	DEVMETHOD(bus_release_resource,	pci_hostb_release_resource),
261 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
262 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
263 
264 	/* PCI interface */
265 	DEVMETHOD(pci_read_config,	pci_hostb_read_config),
266 	DEVMETHOD(pci_write_config,	pci_hostb_write_config),
267 	DEVMETHOD(pci_enable_busmaster,	pci_hostb_enable_busmaster),
268 	DEVMETHOD(pci_disable_busmaster, pci_hostb_disable_busmaster),
269 	DEVMETHOD(pci_enable_io,	pci_hostb_enable_io),
270 	DEVMETHOD(pci_disable_io,	pci_hostb_disable_io),
271 	DEVMETHOD(pci_get_powerstate,	pci_hostb_get_powerstate),
272 	DEVMETHOD(pci_set_powerstate,	pci_hostb_set_powerstate),
273 	DEVMETHOD(pci_assign_interrupt,	pci_hostb_assign_interrupt),
274 	DEVMETHOD(pci_find_cap,		pci_hostb_find_cap),
275 	DEVMETHOD(pci_find_next_cap,	pci_hostb_find_next_cap),
276 	DEVMETHOD(pci_find_extcap,	pci_hostb_find_extcap),
277 	DEVMETHOD(pci_find_next_extcap,	pci_hostb_find_next_extcap),
278 	DEVMETHOD(pci_find_htcap,	pci_hostb_find_htcap),
279 	DEVMETHOD(pci_find_next_htcap,	pci_hostb_find_next_htcap),
280 	{ 0, 0 }
281 };
282 
283 static driver_t pci_hostb_driver = {
284 	"hostb",
285 	pci_hostb_methods,
286 	1,
287 };
288 
289 DRIVER_MODULE(hostb, pci, pci_hostb_driver, 0, 0);
290