1 /*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/systm.h> 39 #include <sys/bus.h> 40 41 #include <dev/pci/pcivar.h> 42 #include <dev/pci/pcireg.h> 43 44 /* 45 * Chipset fixups. 46 * 47 * These routines are invoked during the probe phase for devices which 48 * typically don't have specific device drivers, but which require 49 * some cleaning up. 50 */ 51 52 static int fixup_pci_probe(device_t dev); 53 static void fixwsc_natoma(device_t dev); 54 static void fixc1_nforce2(device_t dev); 55 56 static device_method_t fixup_pci_methods[] = { 57 /* Device interface */ 58 DEVMETHOD(device_probe, fixup_pci_probe), 59 DEVMETHOD(device_attach, bus_generic_attach), 60 { 0, 0 } 61 }; 62 63 static driver_t fixup_pci_driver = { 64 "fixup_pci", 65 fixup_pci_methods, 66 0, 67 }; 68 69 static devclass_t fixup_pci_devclass; 70 71 DRIVER_MODULE(fixup_pci, pci, fixup_pci_driver, fixup_pci_devclass, 0, 0); 72 73 static int 74 fixup_pci_probe(device_t dev) 75 { 76 switch (pci_get_devid(dev)) { 77 case 0x12378086: /* Intel 82440FX (Natoma) */ 78 fixwsc_natoma(dev); 79 break; 80 case 0x01e010de: /* nVidia nForce2 */ 81 fixc1_nforce2(dev); 82 break; 83 } 84 return(ENXIO); 85 } 86 87 static void 88 fixwsc_natoma(device_t dev) 89 { 90 int pmccfg; 91 92 pmccfg = pci_read_config(dev, 0x50, 2); 93 #if defined(SMP) 94 if (pmccfg & 0x8000) { 95 device_printf(dev, "correcting Natoma config for SMP\n"); 96 pmccfg &= ~0x8000; 97 pci_write_config(dev, 0x50, pmccfg, 2); 98 } 99 #else 100 if ((pmccfg & 0x8000) == 0) { 101 device_printf(dev, "correcting Natoma config for non-SMP\n"); 102 pmccfg |= 0x8000; 103 pci_write_config(dev, 0x50, pmccfg, 2); 104 } 105 #endif 106 } 107 108 /* 109 * Set the SYSTEM_IDLE_TIMEOUT to 80 ns on nForce2 systems to work 110 * around a hang that is triggered when the CPU generates a very fast 111 * CONNECT/HALT cycle sequence. Specifically, the hang can result in 112 * the lapic timer being stopped. 113 * 114 * This requires changing the value for config register at offset 0x6c 115 * for the Host-PCI bridge at bus/dev/function 0/0/0: 116 * 117 * Chip Current Value New Value 118 * ---- ---------- ---------- 119 * C17 0x1F0FFF01 0x1F01FF01 120 * C18D 0x9F0FFF01 0x9F01FF01 121 * 122 * We do this by always clearing the bits in 0x000e0000. 123 * 124 * See also: http://lkml.org/lkml/2004/5/3/157 125 */ 126 static void 127 fixc1_nforce2(device_t dev) 128 { 129 uint32_t val; 130 131 if (pci_get_bus(dev) == 0 && pci_get_slot(dev) == 0 && 132 pci_get_function(dev) == 0) { 133 val = pci_read_config(dev, 0x6c, 4); 134 if (val & 0x000e0000) { 135 device_printf(dev, 136 "correcting nForce2 C1 CPU disconnect hangs\n"); 137 val &= ~0x000e0000; 138 pci_write_config(dev, 0x6c, val, 4); 139 } 140 } 141 } 142