1bb0d0a8eSMike Smith /*- 2*718cf2ccSPedro F. Giffuni * SPDX-License-Identifier: BSD-3-Clause 3*718cf2ccSPedro F. Giffuni * 4bb0d0a8eSMike Smith * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 5bb0d0a8eSMike Smith * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 6bb0d0a8eSMike Smith * Copyright (c) 2000 BSDi 7bb0d0a8eSMike Smith * All rights reserved. 8bb0d0a8eSMike Smith * 9bb0d0a8eSMike Smith * Redistribution and use in source and binary forms, with or without 10bb0d0a8eSMike Smith * modification, are permitted provided that the following conditions 11bb0d0a8eSMike Smith * are met: 12bb0d0a8eSMike Smith * 1. Redistributions of source code must retain the above copyright 13bb0d0a8eSMike Smith * notice, this list of conditions and the following disclaimer. 14bb0d0a8eSMike Smith * 2. Redistributions in binary form must reproduce the above copyright 15bb0d0a8eSMike Smith * notice, this list of conditions and the following disclaimer in the 16bb0d0a8eSMike Smith * documentation and/or other materials provided with the distribution. 17bb0d0a8eSMike Smith * 3. The name of the author may not be used to endorse or promote products 18bb0d0a8eSMike Smith * derived from this software without specific prior written permission. 19bb0d0a8eSMike Smith * 20bb0d0a8eSMike Smith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21bb0d0a8eSMike Smith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22bb0d0a8eSMike Smith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23bb0d0a8eSMike Smith * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24bb0d0a8eSMike Smith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25bb0d0a8eSMike Smith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26bb0d0a8eSMike Smith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27bb0d0a8eSMike Smith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28bb0d0a8eSMike Smith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29bb0d0a8eSMike Smith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30bb0d0a8eSMike Smith * SUCH DAMAGE. 31bb0d0a8eSMike Smith */ 32bb0d0a8eSMike Smith 33aad970f1SDavid E. O'Brien #include <sys/cdefs.h> 34aad970f1SDavid E. O'Brien __FBSDID("$FreeBSD$"); 35aad970f1SDavid E. O'Brien 36bb0d0a8eSMike Smith #include <sys/param.h> 37bb0d0a8eSMike Smith #include <sys/kernel.h> 3841ee9f1cSPoul-Henning Kamp #include <sys/malloc.h> 3941ee9f1cSPoul-Henning Kamp #include <sys/module.h> 4041ee9f1cSPoul-Henning Kamp #include <sys/systm.h> 41bb0d0a8eSMike Smith #include <sys/bus.h> 42bb0d0a8eSMike Smith 4338d8c994SWarner Losh #include <dev/pci/pcivar.h> 4438d8c994SWarner Losh #include <dev/pci/pcireg.h> 45bb0d0a8eSMike Smith 46bb0d0a8eSMike Smith /* 47bb0d0a8eSMike Smith * Chipset fixups. 48bb0d0a8eSMike Smith * 49bb0d0a8eSMike Smith * These routines are invoked during the probe phase for devices which 50bb0d0a8eSMike Smith * typically don't have specific device drivers, but which require 51bb0d0a8eSMike Smith * some cleaning up. 52bb0d0a8eSMike Smith */ 53bb0d0a8eSMike Smith 54bb0d0a8eSMike Smith static int fixup_pci_probe(device_t dev); 55bb0d0a8eSMike Smith static void fixwsc_natoma(device_t dev); 5653b8229eSJohn Baldwin static void fixc1_nforce2(device_t dev); 57bb0d0a8eSMike Smith 58bb0d0a8eSMike Smith static device_method_t fixup_pci_methods[] = { 59bb0d0a8eSMike Smith /* Device interface */ 60bb0d0a8eSMike Smith DEVMETHOD(device_probe, fixup_pci_probe), 61bb0d0a8eSMike Smith DEVMETHOD(device_attach, bus_generic_attach), 62bb0d0a8eSMike Smith { 0, 0 } 63bb0d0a8eSMike Smith }; 64bb0d0a8eSMike Smith 65bb0d0a8eSMike Smith static driver_t fixup_pci_driver = { 66bb0d0a8eSMike Smith "fixup_pci", 67bb0d0a8eSMike Smith fixup_pci_methods, 68bb0d0a8eSMike Smith 0, 69bb0d0a8eSMike Smith }; 70bb0d0a8eSMike Smith 71bb0d0a8eSMike Smith static devclass_t fixup_pci_devclass; 72bb0d0a8eSMike Smith 73bb0d0a8eSMike Smith DRIVER_MODULE(fixup_pci, pci, fixup_pci_driver, fixup_pci_devclass, 0, 0); 74bb0d0a8eSMike Smith 75bb0d0a8eSMike Smith static int 76bb0d0a8eSMike Smith fixup_pci_probe(device_t dev) 77bb0d0a8eSMike Smith { 78bb0d0a8eSMike Smith switch (pci_get_devid(dev)) { 79bb0d0a8eSMike Smith case 0x12378086: /* Intel 82440FX (Natoma) */ 80bb0d0a8eSMike Smith fixwsc_natoma(dev); 81bb0d0a8eSMike Smith break; 8253b8229eSJohn Baldwin case 0x01e010de: /* nVidia nForce2 */ 8353b8229eSJohn Baldwin fixc1_nforce2(dev); 8453b8229eSJohn Baldwin break; 85bb0d0a8eSMike Smith } 86bb0d0a8eSMike Smith return(ENXIO); 87bb0d0a8eSMike Smith } 88bb0d0a8eSMike Smith 89bb0d0a8eSMike Smith static void 90bb0d0a8eSMike Smith fixwsc_natoma(device_t dev) 91bb0d0a8eSMike Smith { 92bb0d0a8eSMike Smith int pmccfg; 93bb0d0a8eSMike Smith 94bb0d0a8eSMike Smith pmccfg = pci_read_config(dev, 0x50, 2); 95bb0d0a8eSMike Smith #if defined(SMP) 96bb0d0a8eSMike Smith if (pmccfg & 0x8000) { 97957c6e86SRui Paulo device_printf(dev, "correcting Natoma config for SMP\n"); 98bb0d0a8eSMike Smith pmccfg &= ~0x8000; 99eee598d8SPeter Wemm pci_write_config(dev, 0x50, pmccfg, 2); 100bb0d0a8eSMike Smith } 101bb0d0a8eSMike Smith #else 102bb0d0a8eSMike Smith if ((pmccfg & 0x8000) == 0) { 103957c6e86SRui Paulo device_printf(dev, "correcting Natoma config for non-SMP\n"); 104bb0d0a8eSMike Smith pmccfg |= 0x8000; 105eee598d8SPeter Wemm pci_write_config(dev, 0x50, pmccfg, 2); 106bb0d0a8eSMike Smith } 107bb0d0a8eSMike Smith #endif 108bb0d0a8eSMike Smith } 10953b8229eSJohn Baldwin 11053b8229eSJohn Baldwin /* 11153b8229eSJohn Baldwin * Set the SYSTEM_IDLE_TIMEOUT to 80 ns on nForce2 systems to work 11253b8229eSJohn Baldwin * around a hang that is triggered when the CPU generates a very fast 11353b8229eSJohn Baldwin * CONNECT/HALT cycle sequence. Specifically, the hang can result in 11453b8229eSJohn Baldwin * the lapic timer being stopped. 11553b8229eSJohn Baldwin * 11653b8229eSJohn Baldwin * This requires changing the value for config register at offset 0x6c 11753b8229eSJohn Baldwin * for the Host-PCI bridge at bus/dev/function 0/0/0: 11853b8229eSJohn Baldwin * 11953b8229eSJohn Baldwin * Chip Current Value New Value 12053b8229eSJohn Baldwin * ---- ---------- ---------- 12153b8229eSJohn Baldwin * C17 0x1F0FFF01 0x1F01FF01 12253b8229eSJohn Baldwin * C18D 0x9F0FFF01 0x9F01FF01 12353b8229eSJohn Baldwin * 12453b8229eSJohn Baldwin * We do this by always clearing the bits in 0x000e0000. 12553b8229eSJohn Baldwin * 12653b8229eSJohn Baldwin * See also: http://lkml.org/lkml/2004/5/3/157 12753b8229eSJohn Baldwin */ 12853b8229eSJohn Baldwin static void 12953b8229eSJohn Baldwin fixc1_nforce2(device_t dev) 13053b8229eSJohn Baldwin { 13153b8229eSJohn Baldwin uint32_t val; 13253b8229eSJohn Baldwin 13353b8229eSJohn Baldwin if (pci_get_bus(dev) == 0 && pci_get_slot(dev) == 0 && 13453b8229eSJohn Baldwin pci_get_function(dev) == 0) { 13553b8229eSJohn Baldwin val = pci_read_config(dev, 0x6c, 4); 13653b8229eSJohn Baldwin if (val & 0x000e0000) { 137957c6e86SRui Paulo device_printf(dev, 138957c6e86SRui Paulo "correcting nForce2 C1 CPU disconnect hangs\n"); 13953b8229eSJohn Baldwin val &= ~0x000e0000; 14053b8229eSJohn Baldwin pci_write_config(dev, 0x6c, val, 4); 14153b8229eSJohn Baldwin } 14253b8229eSJohn Baldwin } 14353b8229eSJohn Baldwin } 144