1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2019 Andrew Turner 5 * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com> 6 * 7 * This software was developed by SRI International and the University of 8 * Cambridge Computer Laboratory (Department of Computer Science and 9 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the 10 * DARPA SSITH research programme. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/malloc.h> 40 #include <sys/bus.h> 41 #include <sys/endian.h> 42 #include <sys/kernel.h> 43 #include <sys/module.h> 44 #include <sys/rman.h> 45 46 #include <vm/vm.h> 47 #include <vm/vm_extern.h> 48 #include <vm/vm_page.h> 49 50 #include <contrib/dev/acpica/include/acpi.h> 51 #include <contrib/dev/acpica/include/accommon.h> 52 53 #include <dev/acpica/acpivar.h> 54 #include <dev/acpica/acpi_pcibvar.h> 55 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcib_private.h> 59 #include <dev/pci/pci_host_generic.h> 60 #include <dev/pci/pci_host_generic_acpi.h> 61 62 #include "pcib_if.h" 63 64 #define AP_NS_SHARED_MEM_BASE 0x06000000 65 #define N1SDP_MAX_SEGMENTS 2 /* Two PCIe root complex devices. */ 66 #define BDF_TABLE_SIZE (16 * 1024) 67 #define PCI_CFG_SPACE_SIZE 0x1000 68 69 struct pcie_discovery_data { 70 uint32_t rc_base_addr; 71 uint32_t nr_bdfs; 72 uint32_t valid_bdfs[0]; 73 }; 74 75 struct generic_pcie_n1sdp_softc { 76 struct generic_pcie_acpi_softc acpi; 77 struct pcie_discovery_data *n1_discovery_data; 78 bus_space_handle_t n1_bsh; 79 }; 80 81 static int 82 n1sdp_init(struct generic_pcie_n1sdp_softc *sc) 83 { 84 struct pcie_discovery_data *shared_data; 85 vm_offset_t vaddr; 86 vm_paddr_t paddr_rc; 87 vm_paddr_t paddr; 88 int table_count; 89 int bdfs_size; 90 int error, i; 91 92 paddr = AP_NS_SHARED_MEM_BASE + sc->acpi.segment * BDF_TABLE_SIZE; 93 vaddr = kva_alloc((vm_size_t)BDF_TABLE_SIZE); 94 if (vaddr == 0) { 95 printf("%s: Can't allocate KVA memory.", __func__); 96 return (ENXIO); 97 } 98 pmap_kenter(vaddr, (vm_size_t)BDF_TABLE_SIZE, paddr, 99 VM_MEMATTR_UNCACHEABLE); 100 101 shared_data = (struct pcie_discovery_data *)vaddr; 102 bdfs_size = sizeof(struct pcie_discovery_data) + 103 sizeof(uint32_t) * shared_data->nr_bdfs; 104 sc->n1_discovery_data = malloc(bdfs_size, M_DEVBUF, M_WAITOK | M_ZERO); 105 memcpy(sc->n1_discovery_data, shared_data, bdfs_size); 106 107 paddr_rc = (vm_offset_t)shared_data->rc_base_addr; 108 error = bus_space_map(sc->acpi.base.bst, paddr_rc, PCI_CFG_SPACE_SIZE, 109 0, &sc->n1_bsh); 110 if (error != 0) 111 return (error); 112 113 if (bootverbose) { 114 table_count = sc->n1_discovery_data->nr_bdfs; 115 for (i = 0; i < table_count; i++) 116 printf("valid bdf %x\n", 117 sc->n1_discovery_data->valid_bdfs[i]); 118 } 119 120 pmap_kremove(vaddr); 121 kva_free(vaddr, (vm_size_t)BDF_TABLE_SIZE); 122 123 return (0); 124 } 125 126 static int 127 n1sdp_check_bdf(struct generic_pcie_n1sdp_softc *sc, 128 u_int bus, u_int slot, u_int func) 129 { 130 int table_count; 131 int bdf; 132 int i; 133 134 bdf = PCIE_ADDR_OFFSET(bus, slot, func, 0); 135 if (bdf == 0) 136 return (1); 137 138 table_count = sc->n1_discovery_data->nr_bdfs; 139 140 for (i = 0; i < table_count; i++) 141 if (bdf == sc->n1_discovery_data->valid_bdfs[i]) 142 return (1); 143 144 return (0); 145 } 146 147 static int 148 n1sdp_pcie_acpi_probe(device_t dev) 149 { 150 ACPI_DEVICE_INFO *devinfo; 151 ACPI_TABLE_HEADER *hdr; 152 ACPI_STATUS status; 153 ACPI_HANDLE h; 154 int root; 155 156 if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL || 157 ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo))) 158 return (ENXIO); 159 160 root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0; 161 AcpiOsFree(devinfo); 162 if (!root) 163 return (ENXIO); 164 165 /* TODO: Move this to an ACPI quirk? */ 166 status = AcpiGetTable(ACPI_SIG_MCFG, 1, &hdr); 167 if (ACPI_FAILURE(status)) 168 return (ENXIO); 169 170 if (memcmp(hdr->OemId, "ARMLTD", ACPI_OEM_ID_SIZE) != 0 || 171 memcmp(hdr->OemTableId, "ARMN1SDP", ACPI_OEM_TABLE_ID_SIZE) != 0 || 172 hdr->OemRevision != 0x20181101) 173 return (ENXIO); 174 175 device_set_desc(dev, "ARM N1SDP PCI host controller"); 176 return (BUS_PROBE_DEFAULT); 177 } 178 179 static int 180 n1sdp_pcie_acpi_attach(device_t dev) 181 { 182 struct generic_pcie_n1sdp_softc *sc; 183 ACPI_HANDLE handle; 184 ACPI_STATUS status; 185 int err; 186 187 err = pci_host_generic_acpi_init(dev); 188 if (err != 0) 189 return (err); 190 191 sc = device_get_softc(dev); 192 handle = acpi_get_handle(dev); 193 194 /* Get PCI Segment (domain) needed for IOMMU space remap. */ 195 status = acpi_GetInteger(handle, "_SEG", &sc->acpi.segment); 196 if (ACPI_FAILURE(status)) { 197 device_printf(dev, "No _SEG for PCI Bus\n"); 198 return (ENXIO); 199 } 200 201 if (sc->acpi.segment >= N1SDP_MAX_SEGMENTS) { 202 device_printf(dev, "Unknown PCI Bus segment (domain) %d\n", 203 sc->acpi.segment); 204 return (ENXIO); 205 } 206 207 err = n1sdp_init(sc); 208 if (err) 209 return (err); 210 211 device_add_child(dev, "pci", -1); 212 return (bus_generic_attach(dev)); 213 } 214 215 static int 216 n1sdp_get_bus_space(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 217 bus_space_tag_t *bst, bus_space_handle_t *bsh, bus_size_t *offset) 218 { 219 struct generic_pcie_n1sdp_softc *sc; 220 221 sc = device_get_softc(dev); 222 223 if (n1sdp_check_bdf(sc, bus, slot, func) == 0) 224 return (EINVAL); 225 226 if (bus == sc->acpi.base.bus_start) { 227 if (slot != 0 || func != 0) 228 return (EINVAL); 229 *bsh = sc->n1_bsh; 230 } else { 231 *bsh = sc->acpi.base.bsh; 232 } 233 234 *bst = sc->acpi.base.bst; 235 *offset = PCIE_ADDR_OFFSET(bus - sc->acpi.base.bus_start, slot, func, 236 reg); 237 238 return (0); 239 } 240 241 static uint32_t 242 n1sdp_pcie_read_config(device_t dev, u_int bus, u_int slot, 243 u_int func, u_int reg, int bytes) 244 { 245 struct generic_pcie_n1sdp_softc *sc_n1sdp; 246 struct generic_pcie_acpi_softc *sc_acpi; 247 struct generic_pcie_core_softc *sc; 248 bus_space_handle_t h; 249 bus_space_tag_t t; 250 bus_size_t offset; 251 uint32_t data; 252 253 sc_n1sdp = device_get_softc(dev); 254 sc_acpi = &sc_n1sdp->acpi; 255 sc = &sc_acpi->base; 256 257 if ((bus < sc->bus_start) || (bus > sc->bus_end)) 258 return (~0U); 259 if ((slot > PCI_SLOTMAX) || (func > PCI_FUNCMAX) || 260 (reg > PCIE_REGMAX)) 261 return (~0U); 262 263 if (n1sdp_get_bus_space(dev, bus, slot, func, reg, &t, &h, &offset) !=0) 264 return (~0U); 265 266 data = bus_space_read_4(t, h, offset & ~3); 267 268 switch (bytes) { 269 case 1: 270 data >>= (offset & 3) * 8; 271 data &= 0xff; 272 break; 273 case 2: 274 data >>= (offset & 3) * 8; 275 data = le16toh(data); 276 break; 277 case 4: 278 data = le32toh(data); 279 break; 280 default: 281 return (~0U); 282 } 283 284 return (data); 285 } 286 287 static void 288 n1sdp_pcie_write_config(device_t dev, u_int bus, u_int slot, 289 u_int func, u_int reg, uint32_t val, int bytes) 290 { 291 struct generic_pcie_n1sdp_softc *sc_n1sdp; 292 struct generic_pcie_acpi_softc *sc_acpi; 293 struct generic_pcie_core_softc *sc; 294 bus_space_handle_t h; 295 bus_space_tag_t t; 296 bus_size_t offset; 297 uint32_t data; 298 299 sc_n1sdp = device_get_softc(dev); 300 sc_acpi = &sc_n1sdp->acpi; 301 sc = &sc_acpi->base; 302 303 if ((bus < sc->bus_start) || (bus > sc->bus_end)) 304 return; 305 if ((slot > PCI_SLOTMAX) || (func > PCI_FUNCMAX) || 306 (reg > PCIE_REGMAX)) 307 return; 308 309 if (n1sdp_get_bus_space(dev, bus, slot, func, reg, &t, &h, &offset) !=0) 310 return; 311 312 data = bus_space_read_4(t, h, offset & ~3); 313 314 switch (bytes) { 315 case 1: 316 data &= ~(0xff << ((offset & 3) * 8)); 317 data |= (val & 0xff) << ((offset & 3) * 8); 318 break; 319 case 2: 320 data &= ~(0xffff << ((offset & 3) * 8)); 321 data |= (val & 0xffff) << ((offset & 3) * 8); 322 break; 323 case 4: 324 data = val; 325 break; 326 default: 327 return; 328 } 329 330 bus_space_write_4(t, h, offset & ~3, data); 331 } 332 333 static device_method_t n1sdp_pcie_acpi_methods[] = { 334 DEVMETHOD(device_probe, n1sdp_pcie_acpi_probe), 335 DEVMETHOD(device_attach, n1sdp_pcie_acpi_attach), 336 337 /* pcib interface */ 338 DEVMETHOD(pcib_read_config, n1sdp_pcie_read_config), 339 DEVMETHOD(pcib_write_config, n1sdp_pcie_write_config), 340 341 DEVMETHOD_END 342 }; 343 344 DEFINE_CLASS_1(pcib, n1sdp_pcie_acpi_driver, n1sdp_pcie_acpi_methods, 345 sizeof(struct generic_pcie_n1sdp_softc), generic_pcie_acpi_driver); 346 347 static devclass_t n1sdp_pcie_acpi_devclass; 348 349 DRIVER_MODULE(n1sdp_pcib, acpi, n1sdp_pcie_acpi_driver, 350 n1sdp_pcie_acpi_devclass, 0, 0); 351