1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/lock.h> 88 #include <sys/malloc.h> 89 #include <sys/mutex.h> 90 #include <sys/proc.h> 91 #include <sys/rman.h> 92 #include <sys/sysctl.h> 93 #include <sys/systm.h> 94 #include <machine/bus.h> 95 #include <machine/resource.h> 96 97 #include <dev/pci/pcireg.h> 98 #include <dev/pci/pcivar.h> 99 #include <machine/clock.h> 100 101 #include <dev/pccard/pccardreg.h> 102 #include <dev/pccard/pccardvar.h> 103 104 #include <dev/exca/excareg.h> 105 #include <dev/exca/excavar.h> 106 107 #include <dev/pccbb/pccbbreg.h> 108 #include <dev/pccbb/pccbbvar.h> 109 110 #include "power_if.h" 111 #include "card_if.h" 112 #include "pcib_if.h" 113 114 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 115 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 116 117 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 118 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 119 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 120 pci_write_config(DEV, REG, ( \ 121 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 122 123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 124 125 #define CBB_START_MEM 0x88000000 126 #define CBB_START_32_IO 0x1000 127 #define CBB_START_16_IO 0x100 128 129 devclass_t cbb_devclass; 130 131 /* sysctl vars */ 132 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 133 134 /* There's no way to say TUNEABLE_LONG to get the right types */ 135 u_long cbb_start_mem = CBB_START_MEM; 136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 138 &cbb_start_mem, CBB_START_MEM, 139 "Starting address for memory allocations"); 140 141 u_long cbb_start_16_io = CBB_START_16_IO; 142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 144 &cbb_start_16_io, CBB_START_16_IO, 145 "Starting ioport for 16-bit cards"); 146 147 u_long cbb_start_32_io = CBB_START_32_IO; 148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 150 &cbb_start_32_io, CBB_START_32_IO, 151 "Starting ioport for 32-bit cards"); 152 153 int cbb_debug = 0; 154 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 155 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 156 "Verbose cardbus bridge debugging"); 157 158 static void cbb_insert(struct cbb_softc *sc); 159 static void cbb_removal(struct cbb_softc *sc); 160 static uint32_t cbb_detect_voltage(device_t brdev); 161 static void cbb_cardbus_reset(device_t brdev); 162 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 163 uint32_t end); 164 static int cbb_cardbus_mem_open(device_t brdev, int win, 165 uint32_t start, uint32_t end); 166 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 167 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 168 int type, int rid, struct resource *res); 169 static int cbb_cardbus_deactivate_resource(device_t brdev, 170 device_t child, int type, int rid, struct resource *res); 171 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 172 device_t child, int type, int *rid, u_long start, 173 u_long end, u_long count, u_int flags); 174 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 175 int type, int rid, struct resource *res); 176 static int cbb_cardbus_power_enable_socket(device_t brdev, 177 device_t child); 178 static void cbb_cardbus_power_disable_socket(device_t brdev, 179 device_t child); 180 static void cbb_func_intr(void *arg); 181 182 static void 183 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 184 { 185 struct cbb_reslist *rle; 186 187 SLIST_FOREACH(rle, &sc->rl, link) { 188 if (rle->res == res) { 189 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 190 free(rle, M_DEVBUF); 191 return; 192 } 193 } 194 } 195 196 static struct resource * 197 cbb_find_res(struct cbb_softc *sc, int type, int rid) 198 { 199 struct cbb_reslist *rle; 200 201 SLIST_FOREACH(rle, &sc->rl, link) 202 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 203 return (rle->res); 204 return (NULL); 205 } 206 207 static void 208 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 209 int rid) 210 { 211 struct cbb_reslist *rle; 212 213 /* 214 * Need to record allocated resource so we can iterate through 215 * it later. 216 */ 217 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 218 if (rle == NULL) 219 panic("cbb_cardbus_alloc_resource: can't record entry!"); 220 rle->res = res; 221 rle->type = type; 222 rle->rid = rid; 223 SLIST_INSERT_HEAD(&sc->rl, rle, link); 224 } 225 226 static void 227 cbb_destroy_res(struct cbb_softc *sc) 228 { 229 struct cbb_reslist *rle; 230 231 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 232 device_printf(sc->dev, "Danger Will Robinson: Resource " 233 "left allocated! This is a bug... " 234 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 235 rman_get_start(rle->res)); 236 SLIST_REMOVE_HEAD(&sc->rl, link); 237 free(rle, M_DEVBUF); 238 } 239 } 240 241 /* 242 * Disable function interrupts by telling the bridge to generate IRQ1 243 * interrupts. These interrupts aren't really generated by the chip, since 244 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 245 * initialization, so this helps to work around the problem. 246 * 247 * XXX We can't do this workaround for all chipsets, because this 248 * XXX causes interference with the keyboard because somechipsets will 249 * XXX actually signal IRQ1 over their serial interrupt connections to 250 * XXX the south bridge. Disable it it for now. 251 */ 252 void 253 cbb_disable_func_intr(struct cbb_softc *sc) 254 { 255 #if 0 256 uint8_t reg; 257 258 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 259 EXCA_INTR_IRQ_RESERVED1; 260 exca_putb(&sc->exca[0], EXCA_INTR, reg); 261 #endif 262 } 263 264 /* 265 * Enable function interrupts. We turn on function interrupts when the card 266 * requests an interrupt. The PCMCIA standard says that we should set 267 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 268 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 269 * cards. 270 */ 271 static void 272 cbb_enable_func_intr(struct cbb_softc *sc) 273 { 274 uint8_t reg; 275 276 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 277 EXCA_INTR_IRQ_NONE; 278 exca_putb(&sc->exca[0], EXCA_INTR, reg); 279 } 280 281 int 282 cbb_detach(device_t brdev) 283 { 284 struct cbb_softc *sc = device_get_softc(brdev); 285 int numdevs; 286 device_t *devlist; 287 int tmp; 288 int error; 289 290 /* 291 * Before we delete the children (which we have to do because 292 * attach doesn't check for children busses correctly), we have 293 * to detach the children. Even if we didn't need to delete the 294 * children, we have to detach them. 295 */ 296 error = bus_generic_detach(brdev); 297 if (error != 0) 298 return (error); 299 300 /* 301 * Since the attach routine doesn't search for children before it 302 * attaches them to this device, we must delete them here in order 303 * for the kldload/unload case to work. If we failed to do that, then 304 * we'd get duplicate devices when cbb.ko was reloaded. 305 */ 306 device_get_children(brdev, &devlist, &numdevs); 307 for (tmp = 0; tmp < numdevs; tmp++) 308 device_delete_child(brdev, devlist[tmp]); 309 free(devlist, M_TEMP); 310 311 /* Turn off the interrupts */ 312 cbb_set(sc, CBB_SOCKET_MASK, 0); 313 314 /* reset 16-bit pcmcia bus */ 315 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 316 317 /* turn off power */ 318 cbb_power(brdev, CARD_OFF); 319 320 /* Ack the interrupt */ 321 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 322 323 /* 324 * Wait for the thread to die. kthread_exit will do a wakeup 325 * on the event thread's struct thread * so that we know it is 326 * save to proceed. IF the thread is running, set the please 327 * die flag and wait for it to comply. Since the wakeup on 328 * the event thread happens only in kthread_exit, we don't 329 * need to loop here. 330 */ 331 mtx_lock(&sc->mtx); 332 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 333 sc->flags |= CBB_KTHREAD_DONE; 334 if (sc->flags & CBB_KTHREAD_RUNNING) { 335 cv_broadcast(&sc->cv); 336 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 337 } 338 mtx_unlock(&sc->mtx); 339 340 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 341 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 342 sc->base_res); 343 mtx_destroy(&sc->mtx); 344 cv_destroy(&sc->cv); 345 cv_destroy(&sc->powercv); 346 return (0); 347 } 348 349 int 350 cbb_shutdown(device_t brdev) 351 { 352 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev); 353 354 /* 355 * Place the cards in reset, turn off the interrupts and power 356 * down the socket. 357 */ 358 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 359 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 360 cbb_set(sc, CBB_SOCKET_MASK, 0); 361 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 362 cbb_power(brdev, CARD_OFF); 363 364 /* 365 * For paranoia, turn off all address decoding. Really not needed, 366 * it seems, but it can't hurt 367 */ 368 exca_putb(&sc->exca[0], EXCA_ADDRWIN_ENABLE, 0); 369 pci_write_config(brdev, CBBR_MEMBASE0, 0, 4); 370 pci_write_config(brdev, CBBR_MEMLIMIT0, 0, 4); 371 pci_write_config(brdev, CBBR_MEMBASE1, 0, 4); 372 pci_write_config(brdev, CBBR_MEMLIMIT1, 0, 4); 373 pci_write_config(brdev, CBBR_IOBASE0, 0, 4); 374 pci_write_config(brdev, CBBR_IOLIMIT0, 0, 4); 375 pci_write_config(brdev, CBBR_IOBASE1, 0, 4); 376 pci_write_config(brdev, CBBR_IOLIMIT1, 0, 4); 377 return (0); 378 } 379 380 int 381 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 382 int flags, driver_intr_t *intr, void *arg, void **cookiep) 383 { 384 struct cbb_intrhand *ih; 385 struct cbb_softc *sc = device_get_softc(dev); 386 int err; 387 388 /* 389 * Well, this is no longer strictly true. You can have multiple 390 * FAST ISRs, but can't mix fast and slow, so we have to assume 391 * least common denominator until the base system supports mixing 392 * and matching better. 393 */ 394 if ((flags & INTR_FAST) != 0) 395 return (EINVAL); 396 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 397 if (ih == NULL) 398 return (ENOMEM); 399 *cookiep = ih; 400 ih->intr = intr; 401 ih->arg = arg; 402 ih->sc = sc; 403 /* 404 * XXX need to turn on ISA interrupts, if we ever support them, but 405 * XXX for now that's all we need to do. 406 */ 407 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 408 cbb_func_intr, ih, &ih->cookie); 409 if (err != 0) { 410 free(ih, M_DEVBUF); 411 return (err); 412 } 413 cbb_enable_func_intr(sc); 414 sc->flags |= CBB_CARD_OK; 415 return 0; 416 } 417 418 int 419 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 420 void *cookie) 421 { 422 struct cbb_intrhand *ih; 423 int err; 424 425 /* XXX Need to do different things for ISA interrupts. */ 426 ih = (struct cbb_intrhand *) cookie; 427 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 428 ih->cookie); 429 if (err != 0) 430 return (err); 431 free(ih, M_DEVBUF); 432 return (0); 433 } 434 435 436 void 437 cbb_driver_added(device_t brdev, driver_t *driver) 438 { 439 struct cbb_softc *sc = device_get_softc(brdev); 440 device_t *devlist; 441 device_t dev; 442 int tmp; 443 int numdevs; 444 int wake = 0; 445 446 DEVICE_IDENTIFY(driver, brdev); 447 device_get_children(brdev, &devlist, &numdevs); 448 for (tmp = 0; tmp < numdevs; tmp++) { 449 dev = devlist[tmp]; 450 if (device_get_state(dev) == DS_NOTPRESENT && 451 device_probe_and_attach(dev) == 0) 452 wake++; 453 } 454 free(devlist, M_TEMP); 455 456 if (wake > 0) { 457 mtx_lock(&sc->mtx); 458 cv_signal(&sc->cv); 459 mtx_unlock(&sc->mtx); 460 } 461 } 462 463 void 464 cbb_child_detached(device_t brdev, device_t child) 465 { 466 struct cbb_softc *sc = device_get_softc(brdev); 467 468 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 469 device_printf(brdev, "Unknown child detached: %s\n", 470 device_get_nameunit(child)); 471 } 472 473 /************************************************************************/ 474 /* Kthreads */ 475 /************************************************************************/ 476 477 void 478 cbb_event_thread(void *arg) 479 { 480 struct cbb_softc *sc = arg; 481 uint32_t status; 482 int err; 483 int not_a_card = 0; 484 485 sc->flags |= CBB_KTHREAD_RUNNING; 486 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 487 /* 488 * We take out Giant here because we need it deep, 489 * down in the bowels of the vm system for mapping the 490 * memory we need to read the CIS. In addition, since 491 * we are adding/deleting devices from the dev tree, 492 * and that code isn't MP safe, we have to hold Giant. 493 */ 494 mtx_lock(&Giant); 495 status = cbb_get(sc, CBB_SOCKET_STATE); 496 DPRINTF(("Status is 0x%x\n", status)); 497 if (!CBB_CARD_PRESENT(status)) { 498 not_a_card = 0; /* We know card type */ 499 cbb_removal(sc); 500 } else if (status & CBB_STATE_NOT_A_CARD) { 501 /* 502 * Up to 20 times, try to rescan the card when we 503 * see NOT_A_CARD. 504 */ 505 if (not_a_card++ < 20) { 506 DEVPRINTF((sc->dev, 507 "Not a card bit set, rescanning\n")); 508 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 509 } else { 510 device_printf(sc->dev, 511 "Can't determine card type\n"); 512 } 513 } else { 514 not_a_card = 0; /* We know card type */ 515 cbb_insert(sc); 516 } 517 mtx_unlock(&Giant); 518 519 /* 520 * Wait until it has been 1s since the last time we 521 * get an interrupt. We handle the rest of the interrupt 522 * at the top of the loop. Although we clear the bit in the 523 * ISR, we signal sc->cv from the detach path after we've 524 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 525 * 1s sleep here. 526 * 527 * In our ISR, we turn off the card changed interrupt. Turn 528 * them back on here before we wait for them to happen. We 529 * turn them on/off so that we can tolerate a large latency 530 * between the time we signal cbb_event_thread and it gets 531 * a chance to run. 532 */ 533 mtx_lock(&sc->mtx); 534 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 535 cv_wait(&sc->cv, &sc->mtx); 536 err = 0; 537 while (err != EWOULDBLOCK && 538 (sc->flags & CBB_KTHREAD_DONE) == 0) 539 err = cv_timedwait(&sc->cv, &sc->mtx, 1 * hz); 540 mtx_unlock(&sc->mtx); 541 } 542 sc->flags &= ~CBB_KTHREAD_RUNNING; 543 kthread_exit(0); 544 } 545 546 /************************************************************************/ 547 /* Insert/removal */ 548 /************************************************************************/ 549 550 static void 551 cbb_insert(struct cbb_softc *sc) 552 { 553 uint32_t sockevent, sockstate; 554 555 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 556 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 557 558 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 559 sockevent, sockstate)); 560 561 if (sockstate & CBB_STATE_R2_CARD) { 562 if (sc->exca[0].pccarddev) { 563 sc->flags |= CBB_16BIT_CARD; 564 exca_insert(&sc->exca[0]); 565 } else { 566 device_printf(sc->dev, 567 "16-bit card inserted, but no pccard bus.\n"); 568 } 569 } else if (sockstate & CBB_STATE_CB_CARD) { 570 if (sc->cbdev != NULL) { 571 sc->flags &= ~CBB_16BIT_CARD; 572 CARD_ATTACH_CARD(sc->cbdev); 573 } else { 574 device_printf(sc->dev, 575 "CardBus card inserted, but no cardbus bus.\n"); 576 } 577 } else { 578 /* 579 * We should power the card down, and try again a couple of 580 * times if this happens. XXX 581 */ 582 device_printf(sc->dev, "Unsupported card type detected\n"); 583 } 584 } 585 586 static void 587 cbb_removal(struct cbb_softc *sc) 588 { 589 sc->flags &= ~CBB_CARD_OK; 590 if (sc->flags & CBB_16BIT_CARD) { 591 exca_removal(&sc->exca[0]); 592 } else { 593 if (sc->cbdev != NULL) 594 CARD_DETACH_CARD(sc->cbdev); 595 } 596 cbb_destroy_res(sc); 597 } 598 599 /************************************************************************/ 600 /* Interrupt Handler */ 601 /************************************************************************/ 602 603 /* 604 * Since we touch hardware in the worst case, we don't need to use atomic 605 * ops on the CARD_OK tests. They would save us a trip to the hardware 606 * if CARD_OK was recently cleared and the caches haven't updated yet. 607 * However, an atomic op costs between 100-200 CPU cycles. On a 3GHz 608 * machine, this is about 33-66ns, whereas a trip the the hardware 609 * is about that. On slower machines, the cost is even higher, so the 610 * trip to the hardware is cheaper and achieves the same ends that 611 * a fully locked operation would give us. 612 * 613 * This is a separate routine because we'd have to use locking and/or 614 * other synchronization in cbb_intr to do this there. That would be 615 * even more expensive. 616 * 617 * I need to investigate what this means for a SMP machine with multiple 618 * CPUs servicing the ISR when an eject happens. In the case of a dirty 619 * eject, CD glitches and we might read 'card present' from the hardware 620 * due to this jitter. If we assumed that cbb_intr() ran before 621 * cbb_func_intr(), we could just check the SOCKET_MASK register and if 622 * CD changes were clear there, then we'd know the card was gone. 623 */ 624 static void 625 cbb_func_intr(void *arg) 626 { 627 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 628 struct cbb_softc *sc = ih->sc; 629 630 /* 631 * Make sure that the card is really there. 632 */ 633 if ((sc->flags & CBB_CARD_OK) == 0) 634 return; 635 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 636 sc->flags &= ~CBB_CARD_OK; 637 return; 638 } 639 640 /* 641 * nb: don't have to check for giant or not, since that's done 642 * in the ISR dispatch 643 */ 644 (*ih->intr)(ih->arg); 645 } 646 647 void 648 cbb_intr(void *arg) 649 { 650 struct cbb_softc *sc = arg; 651 uint32_t sockevent; 652 653 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 654 if (sockevent != 0) { 655 /* ack the interrupt */ 656 cbb_set(sc, CBB_SOCKET_EVENT, sockevent); 657 658 /* 659 * If anything has happened to the socket, we assume that 660 * the card is no longer OK, and we shouldn't call its 661 * ISR. We set CARD_OK as soon as we've attached the 662 * card. This helps in a noisy eject, which happens 663 * all too often when users are ejecting their PC Cards. 664 * 665 * We use this method in preference to checking to see if 666 * the card is still there because the check suffers from 667 * a race condition in the bouncing case. Prior versions 668 * of the pccard software used a similar trick and achieved 669 * excellent results. 670 */ 671 if (sockevent & CBB_SOCKET_EVENT_CD) { 672 mtx_lock(&sc->mtx); 673 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 674 sc->flags &= ~CBB_CARD_OK; 675 cbb_disable_func_intr(sc); 676 cv_signal(&sc->cv); 677 mtx_unlock(&sc->mtx); 678 } 679 /* 680 * If we get a power interrupt, wakeup anybody that might 681 * be waiting for one. 682 */ 683 if (sockevent & CBB_SOCKET_EVENT_POWER) { 684 mtx_lock(&sc->mtx); 685 sc->powerintr++; 686 cv_signal(&sc->powercv); 687 mtx_unlock(&sc->mtx); 688 } 689 } 690 /* 691 * Some chips also require us to read the old ExCA registe for 692 * card status change when we route CSC vis PCI. This isn't supposed 693 * to be required, but it clears the interrupt state on some chipsets. 694 * Maybe there's a setting that would obviate its need. Maybe we 695 * should test the status bits and deal with them, but so far we've 696 * not found any machines that don't also give us the socket status 697 * indication above. 698 * 699 * We have to call this unconditionally because some bridges deliver 700 * the even independent of the CBB_SOCKET_EVENT_CD above. 701 */ 702 exca_getb(&sc->exca[0], EXCA_CSC); 703 } 704 705 /************************************************************************/ 706 /* Generic Power functions */ 707 /************************************************************************/ 708 709 static uint32_t 710 cbb_detect_voltage(device_t brdev) 711 { 712 struct cbb_softc *sc = device_get_softc(brdev); 713 uint32_t psr; 714 uint32_t vol = CARD_UKN_CARD; 715 716 psr = cbb_get(sc, CBB_SOCKET_STATE); 717 718 if (psr & CBB_STATE_5VCARD) 719 vol |= CARD_5V_CARD; 720 if (psr & CBB_STATE_3VCARD) 721 vol |= CARD_3V_CARD; 722 if (psr & CBB_STATE_XVCARD) 723 vol |= CARD_XV_CARD; 724 if (psr & CBB_STATE_YVCARD) 725 vol |= CARD_YV_CARD; 726 727 return (vol); 728 } 729 730 static uint8_t 731 cbb_o2micro_power_hack(struct cbb_softc *sc) 732 { 733 uint8_t reg; 734 735 /* 736 * Issue #2: INT# not qualified with IRQ Routing Bit. An 737 * unexpected PCI INT# may be generated during PC Card 738 * initialization even with the IRQ Routing Bit Set with some 739 * PC Cards. 740 * 741 * This is a two part issue. The first part is that some of 742 * our older controllers have an issue in which the slot's PCI 743 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 744 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 745 * is selected (ExCA register 03h bits 3:0, of the slot, are 746 * cleared) we will generate INT# if IREQ# is asserted. The 747 * second part is because some PC Cards prematurally assert 748 * IREQ# before the ExCA registers are fully programmed. This 749 * in turn asserts INT# because ExCA register 03h bits 3:0 750 * (ISA IRQ Select) are not yet programmed. 751 * 752 * The fix for this issue, which will work for any controller 753 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 754 * (select IRQ1), of the slot, before turning on slot power. 755 * Selecting IRQ1 will result in INT# NOT being asserted 756 * (because IRQ1 is selected), and IRQ1 won't be asserted 757 * because our controllers don't generate IRQ1. 758 * 759 * Other, non O2Micro controllers will generate irq 1 in some 760 * situations, so we can't do this hack for everybody. Reports of 761 * keyboard controller's interrupts being suppressed occurred when 762 * we did this. 763 */ 764 reg = exca_getb(&sc->exca[0], EXCA_INTR); 765 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 766 return (reg); 767 } 768 769 /* 770 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 771 * we don't have an interrupt storm on power on. This has the efect of 772 * disabling card status change interrupts for the duration of poweron. 773 */ 774 static void 775 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 776 { 777 exca_putb(&sc->exca[0], EXCA_INTR, reg); 778 } 779 780 int 781 cbb_power(device_t brdev, int volts) 782 { 783 uint32_t status, sock_ctrl, mask; 784 struct cbb_softc *sc = device_get_softc(brdev); 785 int cnt, sane; 786 int retval = 0; 787 int on = 0; 788 uint8_t reg = 0; 789 790 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 791 792 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 793 switch (volts & CARD_VCCMASK) { 794 case 5: 795 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 796 on++; 797 break; 798 case 3: 799 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 800 on++; 801 break; 802 case XV: 803 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 804 on++; 805 break; 806 case YV: 807 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 808 on++; 809 break; 810 case 0: 811 break; 812 default: 813 return (0); /* power NEVER changed */ 814 } 815 816 /* VPP == VCC */ 817 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 818 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 819 820 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 821 return (1); /* no change necessary */ 822 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 823 if (volts != 0 && sc->chipset == CB_O2MICRO) 824 reg = cbb_o2micro_power_hack(sc); 825 826 /* 827 * We have to mask the card change detect interrupt while we're 828 * messing with the power. It is allowed to bounce while we're 829 * messing with power as things settle down. In addition, we mask off 830 * the card's function interrupt by routing it via the ISA bus. This 831 * bit generally only affects 16bit cards. Some bridges allow one to 832 * set another bit to have it also affect 32bit cards. Since 32bit 833 * cards are required to be better behaved, we don't bother to get 834 * into those bridge specific features. 835 */ 836 mask = cbb_get(sc, CBB_SOCKET_MASK); 837 mask |= CBB_SOCKET_MASK_POWER; 838 mask &= ~CBB_SOCKET_MASK_CD; 839 cbb_set(sc, CBB_SOCKET_MASK, mask); 840 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 841 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 842 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 843 if (on) { 844 mtx_lock(&sc->mtx); 845 cnt = sc->powerintr; 846 sane = 200; 847 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 848 cnt == sc->powerintr && sane-- > 0) 849 cv_timedwait(&sc->powercv, &sc->mtx, hz / 10); 850 mtx_unlock(&sc->mtx); 851 if (sane <= 0) 852 device_printf(sc->dev, "power timeout, doom?\n"); 853 } 854 855 /* 856 * After the power is good, we can turn off the power interrupt. 857 * However, the PC Card standard says that we must delay turning the 858 * CD bit back on for a bit to allow for bouncyness on power down 859 * (recall that we don't wait above for a power down, since we don't 860 * get an interrupt for that). We're called either from the suspend 861 * code in which case we don't want to turn card change on again, or 862 * we're called from the card insertion code, in which case the cbb 863 * thread will turn it on for us before it waits to be woken by a 864 * change event. 865 */ 866 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 867 status = cbb_get(sc, CBB_SOCKET_STATE); 868 if (on) { 869 if ((status & CBB_STATE_POWER_CYCLE) == 0) 870 device_printf(sc->dev, "Power not on?\n"); 871 } 872 if (status & CBB_STATE_BAD_VCC_REQ) { 873 device_printf(sc->dev, "Bad Vcc requested\n"); 874 /* XXX Do we want to do something to mitigate things here? */ 875 goto done; 876 } 877 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 878 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 879 retval = 1; 880 done:; 881 if (volts != 0 && sc->chipset == CB_O2MICRO) 882 cbb_o2micro_power_hack2(sc, reg); 883 return (retval); 884 } 885 886 static int 887 cbb_current_voltage(device_t brdev) 888 { 889 struct cbb_softc *sc = device_get_softc(brdev); 890 uint32_t ctrl; 891 892 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 893 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 894 case CBB_SOCKET_CTRL_VCC_5V: 895 return CARD_5V_CARD; 896 case CBB_SOCKET_CTRL_VCC_3V: 897 return CARD_3V_CARD; 898 case CBB_SOCKET_CTRL_VCC_XV: 899 return CARD_XV_CARD; 900 case CBB_SOCKET_CTRL_VCC_YV: 901 return CARD_YV_CARD; 902 } 903 return 0; 904 } 905 906 /* 907 * detect the voltage for the card, and set it. Since the power 908 * used is the square of the voltage, lower voltages is a big win 909 * and what Windows does (and what Microsoft prefers). The MS paper 910 * also talks about preferring the CIS entry as well, but that has 911 * to be done elsewhere. We also optimize power sequencing here 912 * and don't change things if we're already powered up at a supported 913 * voltage. 914 * 915 * In addition, we power up with OE disabled. We'll set it later 916 * in the power up sequence. 917 */ 918 static int 919 cbb_do_power(device_t brdev) 920 { 921 struct cbb_softc *sc = device_get_softc(brdev); 922 uint32_t voltage, curpwr; 923 uint32_t status; 924 925 /* Don't enable OE (output enable) until power stable */ 926 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 927 928 voltage = cbb_detect_voltage(brdev); 929 curpwr = cbb_current_voltage(brdev); 930 status = cbb_get(sc, CBB_SOCKET_STATE); 931 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 932 return 0; 933 /* Prefer lowest voltage supported */ 934 cbb_power(brdev, CARD_OFF); 935 if (voltage & CARD_YV_CARD) 936 cbb_power(brdev, CARD_VCC(YV)); 937 else if (voltage & CARD_XV_CARD) 938 cbb_power(brdev, CARD_VCC(XV)); 939 else if (voltage & CARD_3V_CARD) 940 cbb_power(brdev, CARD_VCC(3)); 941 else if (voltage & CARD_5V_CARD) 942 cbb_power(brdev, CARD_VCC(5)); 943 else { 944 device_printf(brdev, "Unknown card voltage\n"); 945 return (ENXIO); 946 } 947 return (0); 948 } 949 950 /************************************************************************/ 951 /* CardBus power functions */ 952 /************************************************************************/ 953 954 static void 955 cbb_cardbus_reset(device_t brdev) 956 { 957 struct cbb_softc *sc = device_get_softc(brdev); 958 int delay; 959 960 /* 961 * 20ms is necessary for most bridges. For some reason, the Ricoh 962 * RF5C47x bridges need 400ms. 963 */ 964 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 965 966 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 967 968 tsleep(sc, PZERO, "cbbP3", hz * delay / 1000); 969 970 /* If a card exists, unreset it! */ 971 if (CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 972 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 973 &~CBBM_BRIDGECTRL_RESET, 2); 974 tsleep(sc, PZERO, "cbbP3", hz * delay / 1000); 975 } 976 } 977 978 static int 979 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 980 { 981 struct cbb_softc *sc = device_get_softc(brdev); 982 int err; 983 984 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 985 return (ENODEV); 986 987 err = cbb_do_power(brdev); 988 if (err) 989 return (err); 990 cbb_cardbus_reset(brdev); 991 return (0); 992 } 993 994 static void 995 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 996 { 997 cbb_power(brdev, CARD_OFF); 998 cbb_cardbus_reset(brdev); 999 } 1000 1001 /************************************************************************/ 1002 /* CardBus Resource */ 1003 /************************************************************************/ 1004 1005 static int 1006 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1007 { 1008 int basereg; 1009 int limitreg; 1010 1011 if ((win < 0) || (win > 1)) { 1012 DEVPRINTF((brdev, 1013 "cbb_cardbus_io_open: window out of range %d\n", win)); 1014 return (EINVAL); 1015 } 1016 1017 basereg = win * 8 + CBBR_IOBASE0; 1018 limitreg = win * 8 + CBBR_IOLIMIT0; 1019 1020 pci_write_config(brdev, basereg, start, 4); 1021 pci_write_config(brdev, limitreg, end, 4); 1022 return (0); 1023 } 1024 1025 static int 1026 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1027 { 1028 int basereg; 1029 int limitreg; 1030 1031 if ((win < 0) || (win > 1)) { 1032 DEVPRINTF((brdev, 1033 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1034 return (EINVAL); 1035 } 1036 1037 basereg = win*8 + CBBR_MEMBASE0; 1038 limitreg = win*8 + CBBR_MEMLIMIT0; 1039 1040 pci_write_config(brdev, basereg, start, 4); 1041 pci_write_config(brdev, limitreg, end, 4); 1042 return (0); 1043 } 1044 1045 #define START_NONE 0xffffffff 1046 #define END_NONE 0 1047 1048 static void 1049 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1050 { 1051 uint32_t starts[2]; 1052 uint32_t ends[2]; 1053 struct cbb_reslist *rle; 1054 int align, i; 1055 uint32_t reg; 1056 1057 starts[0] = starts[1] = START_NONE; 1058 ends[0] = ends[1] = END_NONE; 1059 1060 if (type == SYS_RES_MEMORY) 1061 align = CBB_MEMALIGN; 1062 else if (type == SYS_RES_IOPORT) 1063 align = CBB_IOALIGN; 1064 else 1065 align = 1; 1066 1067 SLIST_FOREACH(rle, &sc->rl, link) { 1068 if (rle->type != type) 1069 continue; 1070 if (rle->res == NULL) 1071 continue; 1072 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1073 continue; 1074 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1075 i = 1; 1076 else 1077 i = 0; 1078 if (rman_get_start(rle->res) < starts[i]) 1079 starts[i] = rman_get_start(rle->res); 1080 if (rman_get_end(rle->res) > ends[i]) 1081 ends[i] = rman_get_end(rle->res); 1082 } 1083 for (i = 0; i < 2; i++) { 1084 if (starts[i] == START_NONE) 1085 continue; 1086 starts[i] &= ~(align - 1); 1087 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1088 } 1089 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1090 if (starts[0] < starts[1]) { 1091 if (ends[0] > starts[1]) { 1092 device_printf(sc->dev, "Overlapping ranges" 1093 " for prefetch and non-prefetch memory\n"); 1094 return; 1095 } 1096 } else { 1097 if (ends[1] > starts[0]) { 1098 device_printf(sc->dev, "Overlapping ranges" 1099 " for prefetch and non-prefetch memory\n"); 1100 return; 1101 } 1102 } 1103 } 1104 1105 if (type == SYS_RES_MEMORY) { 1106 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1107 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1108 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1109 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1110 CBBM_BRIDGECTRL_PREFETCH_1); 1111 if (starts[1] != START_NONE) 1112 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1113 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1114 if (bootverbose) { 1115 device_printf(sc->dev, "Opening memory:\n"); 1116 if (starts[0] != START_NONE) 1117 device_printf(sc->dev, "Normal: %#x-%#x\n", 1118 starts[0], ends[0]); 1119 if (starts[1] != START_NONE) 1120 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1121 starts[1], ends[1]); 1122 } 1123 } else if (type == SYS_RES_IOPORT) { 1124 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1125 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1126 if (bootverbose && starts[0] != START_NONE) 1127 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1128 starts[0], ends[0]); 1129 } 1130 } 1131 1132 static int 1133 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1134 int rid, struct resource *res) 1135 { 1136 int ret; 1137 1138 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1139 type, rid, res); 1140 if (ret != 0) 1141 return (ret); 1142 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1143 return (0); 1144 } 1145 1146 static int 1147 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1148 int rid, struct resource *res) 1149 { 1150 int ret; 1151 1152 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1153 type, rid, res); 1154 if (ret != 0) 1155 return (ret); 1156 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1157 return (0); 1158 } 1159 1160 static struct resource * 1161 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1162 int *rid, u_long start, u_long end, u_long count, u_int flags) 1163 { 1164 struct cbb_softc *sc = device_get_softc(brdev); 1165 int tmp; 1166 struct resource *res; 1167 u_long align; 1168 1169 switch (type) { 1170 case SYS_RES_IRQ: 1171 tmp = rman_get_start(sc->irq_res); 1172 if (start > tmp || end < tmp || count != 1) { 1173 device_printf(child, "requested interrupt %ld-%ld," 1174 "count = %ld not supported by cbb\n", 1175 start, end, count); 1176 return (NULL); 1177 } 1178 start = end = tmp; 1179 flags |= RF_SHAREABLE; 1180 break; 1181 case SYS_RES_IOPORT: 1182 if (start <= cbb_start_32_io) 1183 start = cbb_start_32_io; 1184 if (end < start) 1185 end = start; 1186 if (count > (1 << RF_ALIGNMENT(flags))) 1187 flags = (flags & ~RF_ALIGNMENT_MASK) | 1188 rman_make_alignment_flags(count); 1189 break; 1190 case SYS_RES_MEMORY: 1191 if (start <= cbb_start_mem) 1192 start = cbb_start_mem; 1193 if (end < start) 1194 end = start; 1195 if (count < CBB_MEMALIGN) 1196 align = CBB_MEMALIGN; 1197 else 1198 align = count; 1199 if (align > (1 << RF_ALIGNMENT(flags))) 1200 flags = (flags & ~RF_ALIGNMENT_MASK) | 1201 rman_make_alignment_flags(align); 1202 break; 1203 } 1204 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1205 start, end, count, flags & ~RF_ACTIVE); 1206 if (res == NULL) { 1207 printf("cbb alloc res fail\n"); 1208 return (NULL); 1209 } 1210 cbb_insert_res(sc, res, type, *rid); 1211 if (flags & RF_ACTIVE) 1212 if (bus_activate_resource(child, type, *rid, res) != 0) { 1213 bus_release_resource(child, type, *rid, res); 1214 return (NULL); 1215 } 1216 1217 return (res); 1218 } 1219 1220 static int 1221 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1222 int rid, struct resource *res) 1223 { 1224 struct cbb_softc *sc = device_get_softc(brdev); 1225 int error; 1226 1227 if (rman_get_flags(res) & RF_ACTIVE) { 1228 error = bus_deactivate_resource(child, type, rid, res); 1229 if (error != 0) 1230 return (error); 1231 } 1232 cbb_remove_res(sc, res); 1233 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1234 type, rid, res)); 1235 } 1236 1237 /************************************************************************/ 1238 /* PC Card Power Functions */ 1239 /************************************************************************/ 1240 1241 static int 1242 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1243 { 1244 struct cbb_softc *sc = device_get_softc(brdev); 1245 int err; 1246 1247 DPRINTF(("cbb_pcic_socket_enable:\n")); 1248 1249 /* power down/up the socket to reset */ 1250 err = cbb_do_power(brdev); 1251 if (err) 1252 return (err); 1253 exca_reset(&sc->exca[0], child); 1254 1255 return (0); 1256 } 1257 1258 static void 1259 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1260 { 1261 struct cbb_softc *sc = device_get_softc(brdev); 1262 1263 DPRINTF(("cbb_pcic_socket_disable\n")); 1264 1265 /* Turn off the card's interrupt and leave it in reset */ 1266 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1267 tsleep(sc, PZERO, "cbbP1", hz / 100); 1268 1269 /* power down the socket */ 1270 cbb_power(brdev, CARD_OFF); 1271 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1272 1273 /* wait 300ms until power fails (Tpf). */ 1274 tsleep(sc, PZERO, "cbbP1", hz * 300 / 1000); 1275 } 1276 1277 /************************************************************************/ 1278 /* POWER methods */ 1279 /************************************************************************/ 1280 1281 int 1282 cbb_power_enable_socket(device_t brdev, device_t child) 1283 { 1284 struct cbb_softc *sc = device_get_softc(brdev); 1285 1286 if (sc->flags & CBB_16BIT_CARD) 1287 return (cbb_pcic_power_enable_socket(brdev, child)); 1288 else 1289 return (cbb_cardbus_power_enable_socket(brdev, child)); 1290 } 1291 1292 void 1293 cbb_power_disable_socket(device_t brdev, device_t child) 1294 { 1295 struct cbb_softc *sc = device_get_softc(brdev); 1296 if (sc->flags & CBB_16BIT_CARD) 1297 cbb_pcic_power_disable_socket(brdev, child); 1298 else 1299 cbb_cardbus_power_disable_socket(brdev, child); 1300 } 1301 1302 static int 1303 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1304 struct resource *res) 1305 { 1306 struct cbb_softc *sc = device_get_softc(brdev); 1307 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1308 } 1309 1310 static int 1311 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1312 int rid, struct resource *res) 1313 { 1314 struct cbb_softc *sc = device_get_softc(brdev); 1315 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1316 } 1317 1318 static struct resource * 1319 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1320 u_long start, u_long end, u_long count, u_int flags) 1321 { 1322 struct resource *res = NULL; 1323 struct cbb_softc *sc = device_get_softc(brdev); 1324 int align; 1325 int tmp; 1326 1327 switch (type) { 1328 case SYS_RES_MEMORY: 1329 if (start < cbb_start_mem) 1330 start = cbb_start_mem; 1331 if (end < start) 1332 end = start; 1333 if (count < CBB_MEMALIGN) 1334 align = CBB_MEMALIGN; 1335 else 1336 align = count; 1337 if (align > (1 << RF_ALIGNMENT(flags))) 1338 flags = (flags & ~RF_ALIGNMENT_MASK) | 1339 rman_make_alignment_flags(align); 1340 break; 1341 case SYS_RES_IOPORT: 1342 if (start < cbb_start_16_io) 1343 start = cbb_start_16_io; 1344 if (end < start) 1345 end = start; 1346 break; 1347 case SYS_RES_IRQ: 1348 tmp = rman_get_start(sc->irq_res); 1349 if (start > tmp || end < tmp || count != 1) { 1350 device_printf(child, "requested interrupt %ld-%ld," 1351 "count = %ld not supported by cbb\n", 1352 start, end, count); 1353 return (NULL); 1354 } 1355 flags |= RF_SHAREABLE; 1356 start = end = rman_get_start(sc->irq_res); 1357 break; 1358 } 1359 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1360 start, end, count, flags & ~RF_ACTIVE); 1361 if (res == NULL) 1362 return (NULL); 1363 cbb_insert_res(sc, res, type, *rid); 1364 if (flags & RF_ACTIVE) { 1365 if (bus_activate_resource(child, type, *rid, res) != 0) { 1366 bus_release_resource(child, type, *rid, res); 1367 return (NULL); 1368 } 1369 } 1370 1371 return (res); 1372 } 1373 1374 static int 1375 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1376 int rid, struct resource *res) 1377 { 1378 struct cbb_softc *sc = device_get_softc(brdev); 1379 int error; 1380 1381 if (rman_get_flags(res) & RF_ACTIVE) { 1382 error = bus_deactivate_resource(child, type, rid, res); 1383 if (error != 0) 1384 return (error); 1385 } 1386 cbb_remove_res(sc, res); 1387 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1388 type, rid, res)); 1389 } 1390 1391 /************************************************************************/ 1392 /* PC Card methods */ 1393 /************************************************************************/ 1394 1395 int 1396 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1397 uint32_t flags) 1398 { 1399 struct cbb_softc *sc = device_get_softc(brdev); 1400 struct resource *res; 1401 1402 if (type != SYS_RES_MEMORY) 1403 return (EINVAL); 1404 res = cbb_find_res(sc, type, rid); 1405 if (res == NULL) { 1406 device_printf(brdev, 1407 "set_res_flags: specified rid not found\n"); 1408 return (ENOENT); 1409 } 1410 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1411 } 1412 1413 int 1414 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1415 uint32_t cardaddr, uint32_t *deltap) 1416 { 1417 struct cbb_softc *sc = device_get_softc(brdev); 1418 struct resource *res; 1419 1420 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1421 if (res == NULL) { 1422 device_printf(brdev, 1423 "set_memory_offset: specified rid not found\n"); 1424 return (ENOENT); 1425 } 1426 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1427 } 1428 1429 /************************************************************************/ 1430 /* BUS Methods */ 1431 /************************************************************************/ 1432 1433 1434 int 1435 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1436 struct resource *r) 1437 { 1438 struct cbb_softc *sc = device_get_softc(brdev); 1439 1440 if (sc->flags & CBB_16BIT_CARD) 1441 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1442 else 1443 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1444 r)); 1445 } 1446 1447 int 1448 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1449 int rid, struct resource *r) 1450 { 1451 struct cbb_softc *sc = device_get_softc(brdev); 1452 1453 if (sc->flags & CBB_16BIT_CARD) 1454 return (cbb_pcic_deactivate_resource(brdev, child, type, 1455 rid, r)); 1456 else 1457 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1458 rid, r)); 1459 } 1460 1461 struct resource * 1462 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1463 u_long start, u_long end, u_long count, u_int flags) 1464 { 1465 struct cbb_softc *sc = device_get_softc(brdev); 1466 1467 if (sc->flags & CBB_16BIT_CARD) 1468 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1469 start, end, count, flags)); 1470 else 1471 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1472 start, end, count, flags)); 1473 } 1474 1475 int 1476 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1477 struct resource *r) 1478 { 1479 struct cbb_softc *sc = device_get_softc(brdev); 1480 1481 if (sc->flags & CBB_16BIT_CARD) 1482 return (cbb_pcic_release_resource(brdev, child, type, 1483 rid, r)); 1484 else 1485 return (cbb_cardbus_release_resource(brdev, child, type, 1486 rid, r)); 1487 } 1488 1489 int 1490 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1491 { 1492 struct cbb_softc *sc = device_get_softc(brdev); 1493 1494 switch (which) { 1495 case PCIB_IVAR_BUS: 1496 *result = sc->secbus; 1497 return (0); 1498 } 1499 return (ENOENT); 1500 } 1501 1502 int 1503 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1504 { 1505 struct cbb_softc *sc = device_get_softc(brdev); 1506 1507 switch (which) { 1508 case PCIB_IVAR_BUS: 1509 sc->secbus = value; 1510 break; 1511 } 1512 return (ENOENT); 1513 } 1514 1515 /************************************************************************/ 1516 /* PCI compat methods */ 1517 /************************************************************************/ 1518 1519 int 1520 cbb_maxslots(device_t brdev) 1521 { 1522 return (0); 1523 } 1524 1525 uint32_t 1526 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width) 1527 { 1528 uint32_t rv; 1529 1530 /* 1531 * Pass through to the next ppb up the chain (i.e. our grandparent). 1532 */ 1533 rv = PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)), 1534 b, s, f, reg, width); 1535 return (rv); 1536 } 1537 1538 void 1539 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val, 1540 int width) 1541 { 1542 /* 1543 * Pass through to the next ppb up the chain (i.e. our grandparent). 1544 */ 1545 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)), 1546 b, s, f, reg, val, width); 1547 } 1548 1549 int 1550 cbb_suspend(device_t self) 1551 { 1552 int error = 0; 1553 struct cbb_softc *sc = device_get_softc(self); 1554 1555 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1556 bus_teardown_intr(self, sc->irq_res, sc->intrhand); 1557 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */ 1558 error = bus_generic_suspend(self); 1559 return (error); 1560 } 1561 1562 int 1563 cbb_resume(device_t self) 1564 { 1565 int error = 0; 1566 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1567 uint32_t tmp; 1568 1569 /* 1570 * Some BIOSes will not save the BARs for the pci chips, so we 1571 * must do it ourselves. If the BAR is reset to 0 for an I/O 1572 * device, it will read back as 0x1, so no explicit test for 1573 * memory devices are needed. 1574 * 1575 * Note: The PCI bus code should do this automatically for us on 1576 * suspend/resume, but until it does, we have to cope. 1577 */ 1578 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1579 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1580 rman_get_start(sc->base_res))); 1581 1582 sc->chipinit(sc); 1583 1584 /* reset interrupt -- Do we really need to do this? */ 1585 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1586 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1587 1588 /* re-establish the interrupt. */ 1589 if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_AV | INTR_MPSAFE, 1590 cbb_intr, sc, &sc->intrhand)) { 1591 device_printf(self, "couldn't re-establish interrupt"); 1592 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res); 1593 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE, 1594 sc->base_res); 1595 sc->irq_res = NULL; 1596 sc->base_res = NULL; 1597 return (ENOMEM); 1598 } 1599 1600 /* CSC Interrupt: Card detect interrupt on */ 1601 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1602 1603 /* Signal the thread to wakeup. */ 1604 mtx_lock(&sc->mtx); 1605 cv_signal(&sc->cv); 1606 mtx_unlock(&sc->mtx); 1607 1608 error = bus_generic_resume(self); 1609 1610 return (error); 1611 } 1612 1613 int 1614 cbb_child_present(device_t self) 1615 { 1616 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1617 uint32_t sockstate; 1618 1619 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1620 return (CBB_CARD_PRESENT(sockstate) && 1621 (sc->flags & CBB_CARD_OK) == CBB_CARD_OK); 1622 } 1623