1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2000-2001 Jonathan Chen All rights reserved. 5 * Copyright (c) 2002-2004 M. Warner Losh <imp@FreeBSD.org> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /*- 31 * Copyright (c) 1998, 1999 and 2000 32 * HAYAKAWA Koichi. All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. All advertising materials mentioning features or use of this software 43 * must display the following acknowledgement: 44 * This product includes software developed by HAYAKAWA Koichi. 45 * 4. The name of the author may not be used to endorse or promote products 46 * derived from this software without specific prior written permission. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 51 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 52 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 53 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 54 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 55 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 56 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 57 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 /* 61 * Driver for PCI to CardBus Bridge chips 62 * 63 * References: 64 * TI Datasheets: 65 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 66 * 67 * Written by Jonathan Chen <jon@freebsd.org> 68 * The author would like to acknowledge: 69 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 70 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 71 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 72 * * David Cross: Author of the initial ugly hack for a specific cardbus card 73 */ 74 75 #include <sys/param.h> 76 #include <sys/bus.h> 77 #include <sys/condvar.h> 78 #include <sys/errno.h> 79 #include <sys/kernel.h> 80 #include <sys/module.h> 81 #include <sys/kthread.h> 82 #include <sys/lock.h> 83 #include <sys/malloc.h> 84 #include <sys/mutex.h> 85 #include <sys/proc.h> 86 #include <sys/rman.h> 87 #include <sys/sysctl.h> 88 #include <sys/systm.h> 89 #include <machine/bus.h> 90 #include <machine/resource.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcib_private.h> 95 96 #include <dev/pccard/pccardreg.h> 97 #include <dev/pccard/pccardvar.h> 98 99 #include <dev/exca/excareg.h> 100 #include <dev/exca/excavar.h> 101 102 #include <dev/pccbb/pccbbreg.h> 103 #include <dev/pccbb/pccbbvar.h> 104 105 #include "power_if.h" 106 #include "card_if.h" 107 #include "pcib_if.h" 108 109 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 110 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 111 112 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 113 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 114 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 115 pci_write_config(DEV, REG, ( \ 116 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 117 118 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 119 120 #define CBB_START_MEM 0x88000000 121 #define CBB_START_32_IO 0x1000 122 #define CBB_START_16_IO 0x100 123 124 /* sysctl vars */ 125 static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 126 "CBB parameters"); 127 128 /* There's no way to say TUNEABLE_LONG to get the right types */ 129 u_long cbb_start_mem = CBB_START_MEM; 130 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RWTUN, 131 &cbb_start_mem, CBB_START_MEM, 132 "Starting address for memory allocations"); 133 134 u_long cbb_start_16_io = CBB_START_16_IO; 135 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RWTUN, 136 &cbb_start_16_io, CBB_START_16_IO, 137 "Starting ioport for 16-bit cards"); 138 139 u_long cbb_start_32_io = CBB_START_32_IO; 140 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RWTUN, 141 &cbb_start_32_io, CBB_START_32_IO, 142 "Starting ioport for 32-bit cards"); 143 144 int cbb_debug = 0; 145 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RWTUN, &cbb_debug, 0, 146 "Verbose cardbus bridge debugging"); 147 148 static void cbb_insert(struct cbb_softc *sc); 149 static void cbb_removal(struct cbb_softc *sc); 150 static uint32_t cbb_detect_voltage(device_t brdev); 151 static int cbb_cardbus_reset_power(device_t brdev, device_t child, int on); 152 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 153 uint32_t end); 154 static int cbb_cardbus_mem_open(device_t brdev, int win, 155 uint32_t start, uint32_t end); 156 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 157 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 158 struct resource *res); 159 static int cbb_cardbus_deactivate_resource(device_t brdev, 160 device_t child, struct resource *res); 161 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 162 device_t child, int type, int *rid, rman_res_t start, 163 rman_res_t end, rman_res_t count, u_int flags); 164 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 165 struct resource *res); 166 static int cbb_cardbus_power_enable_socket(device_t brdev, 167 device_t child); 168 static int cbb_cardbus_power_disable_socket(device_t brdev, 169 device_t child); 170 static int cbb_func_filt(void *arg); 171 static void cbb_func_intr(void *arg); 172 173 static void 174 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 175 { 176 struct cbb_reslist *rle; 177 178 SLIST_FOREACH(rle, &sc->rl, link) { 179 if (rle->res == res) { 180 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 181 free(rle, M_DEVBUF); 182 return; 183 } 184 } 185 } 186 187 static struct resource * 188 cbb_find_res(struct cbb_softc *sc, int type, int rid) 189 { 190 struct cbb_reslist *rle; 191 192 SLIST_FOREACH(rle, &sc->rl, link) 193 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 194 return (rle->res); 195 return (NULL); 196 } 197 198 static void 199 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 200 int rid) 201 { 202 struct cbb_reslist *rle; 203 204 /* 205 * Need to record allocated resource so we can iterate through 206 * it later. 207 */ 208 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 209 if (rle == NULL) 210 panic("cbb_cardbus_alloc_resource: can't record entry!"); 211 rle->res = res; 212 rle->type = type; 213 rle->rid = rid; 214 SLIST_INSERT_HEAD(&sc->rl, rle, link); 215 } 216 217 static void 218 cbb_destroy_res(struct cbb_softc *sc) 219 { 220 struct cbb_reslist *rle; 221 222 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 223 device_printf(sc->dev, "Danger Will Robinson: Resource " 224 "left allocated! This is a bug... " 225 "(rid=%x, type=%d, addr=%jx)\n", rle->rid, rle->type, 226 rman_get_start(rle->res)); 227 SLIST_REMOVE_HEAD(&sc->rl, link); 228 free(rle, M_DEVBUF); 229 } 230 } 231 232 /* 233 * Disable function interrupts by telling the bridge to generate IRQ1 234 * interrupts. These interrupts aren't really generated by the chip, since 235 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 236 * initialization, so this helps to work around the problem. 237 * 238 * XXX We can't do this workaround for all chipsets, because this 239 * XXX causes interference with the keyboard because somechipsets will 240 * XXX actually signal IRQ1 over their serial interrupt connections to 241 * XXX the south bridge. Disable it it for now. 242 */ 243 void 244 cbb_disable_func_intr(struct cbb_softc *sc) 245 { 246 #if 0 247 uint8_t reg; 248 249 reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 250 EXCA_INTR_IRQ_RESERVED1; 251 exca_putb(&sc->exca, EXCA_INTR, reg); 252 #endif 253 } 254 255 /* 256 * Enable function interrupts. We turn on function interrupts when the card 257 * requests an interrupt. The PCMCIA standard says that we should set 258 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 259 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 260 * cards. 261 */ 262 static void 263 cbb_enable_func_intr(struct cbb_softc *sc) 264 { 265 uint8_t reg; 266 267 reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 268 EXCA_INTR_IRQ_NONE; 269 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 270 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 271 exca_putb(&sc->exca, EXCA_INTR, reg); 272 } 273 274 int 275 cbb_detach(device_t brdev) 276 { 277 struct cbb_softc *sc = device_get_softc(brdev); 278 int error; 279 280 error = bus_generic_detach(brdev); 281 if (error != 0) 282 return (error); 283 284 /* Turn off the interrupts */ 285 cbb_set(sc, CBB_SOCKET_MASK, 0); 286 287 /* reset 16-bit pcmcia bus */ 288 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 289 290 /* turn off power */ 291 cbb_power(brdev, CARD_OFF); 292 293 /* Ack the interrupt */ 294 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 295 296 /* 297 * Wait for the thread to die. kproc_exit will do a wakeup 298 * on the event thread's struct proc * so that we know it is 299 * safe to proceed. IF the thread is running, set the please 300 * die flag and wait for it to comply. Since the wakeup on 301 * the event thread happens only in kproc_exit, we don't 302 * need to loop here. 303 */ 304 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 305 mtx_lock(&sc->mtx); 306 sc->flags |= CBB_KTHREAD_DONE; 307 while (sc->flags & CBB_KTHREAD_RUNNING) { 308 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 309 wakeup(&sc->intrhand); 310 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 311 } 312 mtx_unlock(&sc->mtx); 313 314 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 315 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 316 sc->base_res); 317 mtx_destroy(&sc->mtx); 318 return (0); 319 } 320 321 int 322 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 323 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 324 void **cookiep) 325 { 326 struct cbb_intrhand *ih; 327 struct cbb_softc *sc = device_get_softc(dev); 328 int err; 329 330 if (filt == NULL && intr == NULL) 331 return (EINVAL); 332 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 333 if (ih == NULL) 334 return (ENOMEM); 335 *cookiep = ih; 336 ih->filt = filt; 337 ih->intr = intr; 338 ih->arg = arg; 339 ih->sc = sc; 340 /* 341 * XXX need to turn on ISA interrupts, if we ever support them, but 342 * XXX for now that's all we need to do. 343 */ 344 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 345 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 346 &ih->cookie); 347 if (err != 0) { 348 free(ih, M_DEVBUF); 349 return (err); 350 } 351 cbb_enable_func_intr(sc); 352 sc->cardok = 1; 353 return 0; 354 } 355 356 int 357 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 358 void *cookie) 359 { 360 struct cbb_intrhand *ih; 361 int err; 362 363 /* XXX Need to do different things for ISA interrupts. */ 364 ih = (struct cbb_intrhand *) cookie; 365 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 366 ih->cookie); 367 if (err != 0) 368 return (err); 369 free(ih, M_DEVBUF); 370 return (0); 371 } 372 373 void 374 cbb_driver_added(device_t brdev, driver_t *driver) 375 { 376 struct cbb_softc *sc = device_get_softc(brdev); 377 device_t *devlist; 378 device_t dev; 379 int tmp; 380 int numdevs; 381 int wake = 0; 382 383 DEVICE_IDENTIFY(driver, brdev); 384 tmp = device_get_children(brdev, &devlist, &numdevs); 385 if (tmp != 0) { 386 device_printf(brdev, "Cannot get children list, no reprobe\n"); 387 return; 388 } 389 for (tmp = 0; tmp < numdevs; tmp++) { 390 dev = devlist[tmp]; 391 if (device_get_state(dev) == DS_NOTPRESENT && 392 device_probe_and_attach(dev) == 0) 393 wake++; 394 } 395 free(devlist, M_TEMP); 396 397 if (wake > 0) 398 wakeup(&sc->intrhand); 399 } 400 401 void 402 cbb_child_detached(device_t brdev, device_t child) 403 { 404 struct cbb_softc *sc = device_get_softc(brdev); 405 406 /* I'm not sure we even need this */ 407 if (child != sc->cbdev && child != sc->exca.pccarddev) 408 device_printf(brdev, "Unknown child detached: %s\n", 409 device_get_nameunit(child)); 410 } 411 412 /************************************************************************/ 413 /* Kthreads */ 414 /************************************************************************/ 415 416 void 417 cbb_event_thread(void *arg) 418 { 419 struct cbb_softc *sc = arg; 420 uint32_t status; 421 int err; 422 int not_a_card = 0; 423 424 /* 425 * We need to act as a power sequencer on startup. Delay 2s/channel 426 * to ensure the other channels have had a chance to come up. We likely 427 * should add a lock that's shared on a per-slot basis so that only 428 * one power event can happen per slot at a time. 429 */ 430 pause("cbbstart", hz * device_get_unit(sc->dev) * 2); 431 mtx_lock(&sc->mtx); 432 sc->flags |= CBB_KTHREAD_RUNNING; 433 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 434 mtx_unlock(&sc->mtx); 435 status = cbb_get(sc, CBB_SOCKET_STATE); 436 DPRINTF(("Status is 0x%x\n", status)); 437 if (!CBB_CARD_PRESENT(status)) { 438 not_a_card = 0; /* We know card type */ 439 cbb_removal(sc); 440 } else if (status & CBB_STATE_NOT_A_CARD) { 441 /* 442 * Up to 10 times, try to rescan the card when we see 443 * NOT_A_CARD. 10 is somehwat arbitrary. When this 444 * pathology hits, there's a ~40% chance each try will 445 * fail. 10 tries takes about 5s and results in a 446 * 99.99% certainty of the results. 447 */ 448 if (not_a_card++ < 10) { 449 DEVPRINTF((sc->dev, 450 "Not a card bit set, rescanning\n")); 451 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 452 } else { 453 device_printf(sc->dev, 454 "Can't determine card type\n"); 455 } 456 } else { 457 not_a_card = 0; /* We know card type */ 458 cbb_insert(sc); 459 } 460 461 /* 462 * First time through we need to tell mountroot that we're 463 * done. 464 */ 465 if (sc->sc_root_token) { 466 root_mount_rel(sc->sc_root_token); 467 sc->sc_root_token = NULL; 468 } 469 470 /* 471 * Wait until it has been 250ms since the last time we 472 * get an interrupt. We handle the rest of the interrupt 473 * at the top of the loop. Although we clear the bit in the 474 * ISR, we signal sc->cv from the detach path after we've 475 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 476 * 250ms sleep here. 477 * 478 * In our ISR, we turn off the card changed interrupt. Turn 479 * them back on here before we wait for them to happen. We 480 * turn them on/off so that we can tolerate a large latency 481 * between the time we signal cbb_event_thread and it gets 482 * a chance to run. 483 */ 484 mtx_lock(&sc->mtx); 485 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 486 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 487 err = 0; 488 while (err != EWOULDBLOCK && 489 (sc->flags & CBB_KTHREAD_DONE) == 0) 490 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 491 } 492 DEVPRINTF((sc->dev, "Thread terminating\n")); 493 sc->flags &= ~CBB_KTHREAD_RUNNING; 494 mtx_unlock(&sc->mtx); 495 kproc_exit(0); 496 } 497 498 /************************************************************************/ 499 /* Insert/removal */ 500 /************************************************************************/ 501 502 static void 503 cbb_insert(struct cbb_softc *sc) 504 { 505 uint32_t sockevent, sockstate; 506 507 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 508 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 509 510 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 511 sockevent, sockstate)); 512 513 if (sockstate & CBB_STATE_R2_CARD) { 514 if (device_is_attached(sc->exca.pccarddev)) { 515 sc->flags |= CBB_16BIT_CARD; 516 exca_insert(&sc->exca); 517 } else { 518 device_printf(sc->dev, 519 "16-bit card inserted, but no pccard bus.\n"); 520 } 521 } else if (sockstate & CBB_STATE_CB_CARD) { 522 if (device_is_attached(sc->cbdev)) { 523 sc->flags &= ~CBB_16BIT_CARD; 524 CARD_ATTACH_CARD(sc->cbdev); 525 } else { 526 device_printf(sc->dev, 527 "CardBus card inserted, but no cardbus bus.\n"); 528 } 529 } else { 530 /* 531 * We should power the card down, and try again a couple of 532 * times if this happens. XXX 533 */ 534 device_printf(sc->dev, "Unsupported card type detected\n"); 535 } 536 } 537 538 static void 539 cbb_removal(struct cbb_softc *sc) 540 { 541 sc->cardok = 0; 542 if (sc->flags & CBB_16BIT_CARD) { 543 exca_removal(&sc->exca); 544 } else { 545 if (device_is_attached(sc->cbdev)) 546 CARD_DETACH_CARD(sc->cbdev); 547 } 548 cbb_destroy_res(sc); 549 } 550 551 /************************************************************************/ 552 /* Interrupt Handler */ 553 /************************************************************************/ 554 555 static int 556 cbb_func_filt(void *arg) 557 { 558 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 559 struct cbb_softc *sc = ih->sc; 560 561 /* 562 * Make sure that the card is really there. 563 */ 564 if (!sc->cardok) 565 return (FILTER_STRAY); 566 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 567 sc->cardok = 0; 568 return (FILTER_HANDLED); 569 } 570 571 return ((*ih->filt)(ih->arg)); 572 } 573 574 static void 575 cbb_func_intr(void *arg) 576 { 577 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 578 struct cbb_softc *sc = ih->sc; 579 580 /* 581 * While this check may seem redundant, it helps close a race 582 * condition. If the card is ejected after the filter runs, but 583 * before this ISR can be scheduled, then we need to do the same 584 * filtering to prevent the card's ISR from being called. One could 585 * argue that the card's ISR should be able to cope, but experience 586 * has shown they can't always. This mitigates the problem by making 587 * the race quite a bit smaller. Properly written client ISRs should 588 * cope with the card going away in the middle of the ISR. We assume 589 * that drivers that are sophisticated enough to use filters don't 590 * need our protection. This also allows us to ensure they *ARE* 591 * called if their filter said they needed to be called. 592 */ 593 if (ih->filt == NULL) { 594 if (!sc->cardok) 595 return; 596 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 597 sc->cardok = 0; 598 return; 599 } 600 } 601 602 ih->intr(ih->arg); 603 } 604 605 /************************************************************************/ 606 /* Generic Power functions */ 607 /************************************************************************/ 608 609 static uint32_t 610 cbb_detect_voltage(device_t brdev) 611 { 612 struct cbb_softc *sc = device_get_softc(brdev); 613 uint32_t psr; 614 uint32_t vol = CARD_UKN_CARD; 615 616 psr = cbb_get(sc, CBB_SOCKET_STATE); 617 618 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 619 vol |= CARD_5V_CARD; 620 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 621 vol |= CARD_3V_CARD; 622 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 623 vol |= CARD_XV_CARD; 624 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 625 vol |= CARD_YV_CARD; 626 627 return (vol); 628 } 629 630 static uint8_t 631 cbb_o2micro_power_hack(struct cbb_softc *sc) 632 { 633 uint8_t reg; 634 635 /* 636 * Issue #2: INT# not qualified with IRQ Routing Bit. An 637 * unexpected PCI INT# may be generated during PC Card 638 * initialization even with the IRQ Routing Bit Set with some 639 * PC Cards. 640 * 641 * This is a two part issue. The first part is that some of 642 * our older controllers have an issue in which the slot's PCI 643 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 644 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 645 * is selected (ExCA register 03h bits 3:0, of the slot, are 646 * cleared) we will generate INT# if IREQ# is asserted. The 647 * second part is because some PC Cards prematurally assert 648 * IREQ# before the ExCA registers are fully programmed. This 649 * in turn asserts INT# because ExCA register 03h bits 3:0 650 * (ISA IRQ Select) are not yet programmed. 651 * 652 * The fix for this issue, which will work for any controller 653 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 654 * (select IRQ1), of the slot, before turning on slot power. 655 * Selecting IRQ1 will result in INT# NOT being asserted 656 * (because IRQ1 is selected), and IRQ1 won't be asserted 657 * because our controllers don't generate IRQ1. 658 * 659 * Other, non O2Micro controllers will generate irq 1 in some 660 * situations, so we can't do this hack for everybody. Reports of 661 * keyboard controller's interrupts being suppressed occurred when 662 * we did this. 663 */ 664 reg = exca_getb(&sc->exca, EXCA_INTR); 665 exca_putb(&sc->exca, EXCA_INTR, (reg & 0xf0) | 1); 666 return (reg); 667 } 668 669 /* 670 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 671 * we don't have an interrupt storm on power on. This has the effect of 672 * disabling card status change interrupts for the duration of poweron. 673 */ 674 static void 675 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 676 { 677 exca_putb(&sc->exca, EXCA_INTR, reg); 678 } 679 680 int 681 cbb_power(device_t brdev, int volts) 682 { 683 uint32_t status, sock_ctrl, reg_ctrl, mask; 684 struct cbb_softc *sc = device_get_softc(brdev); 685 int cnt, sane; 686 int retval = 0; 687 int on = 0; 688 uint8_t reg = 0; 689 690 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 691 692 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 693 switch (volts & CARD_VCCMASK) { 694 case 5: 695 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 696 on++; 697 break; 698 case 3: 699 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 700 on++; 701 break; 702 case XV: 703 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 704 on++; 705 break; 706 case YV: 707 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 708 on++; 709 break; 710 case 0: 711 break; 712 default: 713 return (0); /* power NEVER changed */ 714 } 715 716 /* VPP == VCC */ 717 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 718 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 719 720 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 721 return (1); /* no change necessary */ 722 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 723 if (volts != 0 && sc->chipset == CB_O2MICRO) 724 reg = cbb_o2micro_power_hack(sc); 725 726 /* 727 * We have to mask the card change detect interrupt while we're 728 * messing with the power. It is allowed to bounce while we're 729 * messing with power as things settle down. In addition, we mask off 730 * the card's function interrupt by routing it via the ISA bus. This 731 * bit generally only affects 16-bit cards. Some bridges allow one to 732 * set another bit to have it also affect 32-bit cards. Since 32-bit 733 * cards are required to be better behaved, we don't bother to get 734 * into those bridge specific features. 735 * 736 * XXX I wonder if we need to enable the READY bit interrupt in the 737 * EXCA CSC register for 16-bit cards, and disable the CD bit? 738 */ 739 mask = cbb_get(sc, CBB_SOCKET_MASK); 740 mask |= CBB_SOCKET_MASK_POWER; 741 mask &= ~CBB_SOCKET_MASK_CD; 742 cbb_set(sc, CBB_SOCKET_MASK, mask); 743 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 744 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 745 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 746 if (on) { 747 mtx_lock(&sc->mtx); 748 cnt = sc->powerintr; 749 /* 750 * We have a shortish timeout of 500ms here. Some bridges do 751 * not generate a POWER_CYCLE event for 16-bit cards. In 752 * those cases, we have to cope the best we can, and having 753 * only a short delay is better than the alternatives. Others 754 * raise the power cycle a smidge before it is really ready. 755 * We deal with those below. 756 */ 757 sane = 10; 758 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 759 cnt == sc->powerintr && sane-- > 0) 760 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 761 mtx_unlock(&sc->mtx); 762 763 /* 764 * Relax for 100ms. Some bridges appear to assert this signal 765 * right away, but before the card has stabilized. Other 766 * cards need need more time to cope up reliabily. 767 * Experiments with troublesome setups show this to be a 768 * "cheap" way to enhance reliabilty. We need not do this for 769 * "off" since we don't touch the card after we turn it off. 770 */ 771 pause("cbbPwr", min(hz / 10, 1)); 772 773 /* 774 * The TOPIC95B requires a little bit extra time to get its 775 * act together, so delay for an additional 100ms. Also as 776 * documented below, it doesn't seem to set the POWER_CYCLE 777 * bit, so don't whine if it never came on. 778 */ 779 if (sc->chipset == CB_TOPIC95) 780 pause("cbb95B", hz / 10); 781 else if (sane <= 0) 782 device_printf(sc->dev, "power timeout, doom?\n"); 783 } 784 785 /* 786 * After the power is good, we can turn off the power interrupt. 787 * However, the PC Card standard says that we must delay turning the 788 * CD bit back on for a bit to allow for bouncyness on power down 789 * (recall that we don't wait above for a power down, since we don't 790 * get an interrupt for that). We're called either from the suspend 791 * code in which case we don't want to turn card change on again, or 792 * we're called from the card insertion code, in which case the cbb 793 * thread will turn it on for us before it waits to be woken by a 794 * change event. 795 * 796 * NB: Topic95B doesn't set the power cycle bit. we assume that 797 * both it and the TOPIC95 behave the same. 798 */ 799 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 800 status = cbb_get(sc, CBB_SOCKET_STATE); 801 if (on && sc->chipset != CB_TOPIC95) { 802 if ((status & CBB_STATE_POWER_CYCLE) == 0) 803 device_printf(sc->dev, "Power not on?\n"); 804 } 805 if (status & CBB_STATE_BAD_VCC_REQ) { 806 device_printf(sc->dev, "Bad Vcc requested\n"); 807 /* 808 * Turn off the power, and try again. Retrigger other 809 * active interrupts via force register. From NetBSD 810 * PR 36652, coded by me to description there. 811 */ 812 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 813 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 814 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 815 status &= ~CBB_STATE_BAD_VCC_REQ; 816 status &= ~CBB_STATE_DATA_LOST; 817 status |= CBB_FORCE_CV_TEST; 818 cbb_set(sc, CBB_SOCKET_FORCE, status); 819 goto done; 820 } 821 if (sc->chipset == CB_TOPIC97) { 822 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 823 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 824 if (on) 825 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 826 else 827 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 828 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 829 } 830 retval = 1; 831 done:; 832 if (volts != 0 && sc->chipset == CB_O2MICRO) 833 cbb_o2micro_power_hack2(sc, reg); 834 return (retval); 835 } 836 837 static int 838 cbb_current_voltage(device_t brdev) 839 { 840 struct cbb_softc *sc = device_get_softc(brdev); 841 uint32_t ctrl; 842 843 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 844 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 845 case CBB_SOCKET_CTRL_VCC_5V: 846 return CARD_5V_CARD; 847 case CBB_SOCKET_CTRL_VCC_3V: 848 return CARD_3V_CARD; 849 case CBB_SOCKET_CTRL_VCC_XV: 850 return CARD_XV_CARD; 851 case CBB_SOCKET_CTRL_VCC_YV: 852 return CARD_YV_CARD; 853 } 854 return 0; 855 } 856 857 /* 858 * detect the voltage for the card, and set it. Since the power 859 * used is the square of the voltage, lower voltages is a big win 860 * and what Windows does (and what Microsoft prefers). The MS paper 861 * also talks about preferring the CIS entry as well, but that has 862 * to be done elsewhere. We also optimize power sequencing here 863 * and don't change things if we're already powered up at a supported 864 * voltage. 865 * 866 * In addition, we power up with OE disabled. We'll set it later 867 * in the power up sequence. 868 */ 869 static int 870 cbb_do_power(device_t brdev) 871 { 872 struct cbb_softc *sc = device_get_softc(brdev); 873 uint32_t voltage, curpwr; 874 uint32_t status; 875 876 /* Don't enable OE (output enable) until power stable */ 877 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE); 878 879 voltage = cbb_detect_voltage(brdev); 880 curpwr = cbb_current_voltage(brdev); 881 status = cbb_get(sc, CBB_SOCKET_STATE); 882 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 883 return 0; 884 /* Prefer lowest voltage supported */ 885 cbb_power(brdev, CARD_OFF); 886 if (voltage & CARD_YV_CARD) 887 cbb_power(brdev, CARD_VCC(YV)); 888 else if (voltage & CARD_XV_CARD) 889 cbb_power(brdev, CARD_VCC(XV)); 890 else if (voltage & CARD_3V_CARD) 891 cbb_power(brdev, CARD_VCC(3)); 892 else if (voltage & CARD_5V_CARD) 893 cbb_power(brdev, CARD_VCC(5)); 894 else { 895 device_printf(brdev, "Unknown card voltage\n"); 896 return (ENXIO); 897 } 898 return (0); 899 } 900 901 /************************************************************************/ 902 /* CardBus power functions */ 903 /************************************************************************/ 904 905 static int 906 cbb_cardbus_reset_power(device_t brdev, device_t child, int on) 907 { 908 struct cbb_softc *sc = device_get_softc(brdev); 909 uint32_t b, h; 910 int delay, count, zero_seen, func; 911 912 /* 913 * Asserting reset for 20ms is necessary for most bridges. For some 914 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 915 * root cause of this is unknown, and NetBSD does the same thing. 916 */ 917 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 918 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 919 pause("cbbP3", hz * delay / 1000); 920 921 /* 922 * If a card exists and we're turning it on, take it out of reset. 923 * After clearing reset, wait up to 1.1s for the first configuration 924 * register (vendor/product) configuration register of device 0.0 to 925 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 926 * says that when powering up the card, the PCI Spec v2.1 must be 927 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 928 * Config Access) is at most 2^25 clocks, or just over 1s. Section 929 * 2.2.1 states any card not ready to participate in bus transactions 930 * must tristate its outputs. Therefore, any access to its 931 * configuration registers must be ignored. In that state, the config 932 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 933 * 0xffff is invalid, so this can never match a real card. Print a 934 * warning if it never returns a real id. The PCMCIA PC Card 935 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 936 * a cardbus bus, so that's the only register we check here. 937 */ 938 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 939 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 940 &~CBBM_BRIDGECTRL_RESET, 2); 941 b = pcib_get_bus(child); 942 count = 1100 / 20; 943 do { 944 pause("cbbP4", hz * 2 / 100); 945 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 946 0xfffffffful && --count >= 0); 947 if (count < 0) 948 device_printf(brdev, "Warning: Bus reset timeout\n"); 949 950 /* 951 * Some cards (so far just an atheros card I have) seem to 952 * come out of reset in a funky state. They report they are 953 * multi-function cards, but have nonsense for some of the 954 * higher functions. So if the card claims to be MFDEV, and 955 * any of the higher functions' ID is 0, then we've hit the 956 * bug and we'll try again. 957 */ 958 h = PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_HDRTYPE, 1); 959 if ((h & PCIM_MFDEV) == 0) 960 return 0; 961 zero_seen = 0; 962 for (func = 1; func < 8; func++) { 963 h = PCIB_READ_CONFIG(brdev, b, 0, func, 964 PCIR_DEVVENDOR, 4); 965 if (h == 0) 966 zero_seen++; 967 } 968 if (!zero_seen) 969 return 0; 970 return (EINVAL); 971 } 972 return 0; 973 } 974 975 static int 976 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 977 { 978 cbb_power(brdev, CARD_OFF); 979 cbb_cardbus_reset_power(brdev, child, 0); 980 return (0); 981 } 982 983 static int 984 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 985 { 986 struct cbb_softc *sc = device_get_softc(brdev); 987 int err, count; 988 989 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 990 return (ENODEV); 991 992 count = 10; 993 do { 994 err = cbb_do_power(brdev); 995 if (err) 996 return (err); 997 err = cbb_cardbus_reset_power(brdev, child, 1); 998 if (err) { 999 device_printf(brdev, "Reset failed, trying again.\n"); 1000 cbb_cardbus_power_disable_socket(brdev, child); 1001 pause("cbbErr1", hz / 10); /* wait 100ms */ 1002 } 1003 } while (err != 0 && count-- > 0); 1004 return (0); 1005 } 1006 1007 /************************************************************************/ 1008 /* CardBus Resource */ 1009 /************************************************************************/ 1010 1011 static void 1012 cbb_activate_window(device_t brdev, int type) 1013 { 1014 1015 PCI_ENABLE_IO(device_get_parent(brdev), brdev, type); 1016 } 1017 1018 static int 1019 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1020 { 1021 int basereg; 1022 int limitreg; 1023 1024 if ((win < 0) || (win > 1)) { 1025 DEVPRINTF((brdev, 1026 "cbb_cardbus_io_open: window out of range %d\n", win)); 1027 return (EINVAL); 1028 } 1029 1030 basereg = win * 8 + CBBR_IOBASE0; 1031 limitreg = win * 8 + CBBR_IOLIMIT0; 1032 1033 pci_write_config(brdev, basereg, start, 4); 1034 pci_write_config(brdev, limitreg, end, 4); 1035 cbb_activate_window(brdev, SYS_RES_IOPORT); 1036 return (0); 1037 } 1038 1039 static int 1040 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1041 { 1042 int basereg; 1043 int limitreg; 1044 1045 if ((win < 0) || (win > 1)) { 1046 DEVPRINTF((brdev, 1047 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1048 return (EINVAL); 1049 } 1050 1051 basereg = win * 8 + CBBR_MEMBASE0; 1052 limitreg = win * 8 + CBBR_MEMLIMIT0; 1053 1054 pci_write_config(brdev, basereg, start, 4); 1055 pci_write_config(brdev, limitreg, end, 4); 1056 cbb_activate_window(brdev, SYS_RES_MEMORY); 1057 return (0); 1058 } 1059 1060 #define START_NONE 0xffffffff 1061 #define END_NONE 0 1062 1063 static void 1064 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1065 { 1066 uint32_t starts[2]; 1067 uint32_t ends[2]; 1068 struct cbb_reslist *rle; 1069 int align, i; 1070 uint32_t reg; 1071 1072 starts[0] = starts[1] = START_NONE; 1073 ends[0] = ends[1] = END_NONE; 1074 1075 if (type == SYS_RES_MEMORY) 1076 align = CBB_MEMALIGN; 1077 else if (type == SYS_RES_IOPORT) 1078 align = CBB_IOALIGN; 1079 else 1080 align = 1; 1081 1082 SLIST_FOREACH(rle, &sc->rl, link) { 1083 if (rle->type != type) 1084 continue; 1085 if (rle->res == NULL) 1086 continue; 1087 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1088 continue; 1089 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1090 i = 1; 1091 else 1092 i = 0; 1093 if (rman_get_start(rle->res) < starts[i]) 1094 starts[i] = rman_get_start(rle->res); 1095 if (rman_get_end(rle->res) > ends[i]) 1096 ends[i] = rman_get_end(rle->res); 1097 } 1098 for (i = 0; i < 2; i++) { 1099 if (starts[i] == START_NONE) 1100 continue; 1101 starts[i] &= ~(align - 1); 1102 ends[i] = roundup2(ends[i], align) - 1; 1103 } 1104 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1105 if (starts[0] < starts[1]) { 1106 if (ends[0] > starts[1]) { 1107 device_printf(sc->dev, "Overlapping ranges" 1108 " for prefetch and non-prefetch memory\n"); 1109 return; 1110 } 1111 } else { 1112 if (ends[1] > starts[0]) { 1113 device_printf(sc->dev, "Overlapping ranges" 1114 " for prefetch and non-prefetch memory\n"); 1115 return; 1116 } 1117 } 1118 } 1119 1120 if (type == SYS_RES_MEMORY) { 1121 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1122 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1123 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1124 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1125 CBBM_BRIDGECTRL_PREFETCH_1); 1126 if (starts[1] != START_NONE) 1127 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1128 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1129 if (bootverbose) { 1130 device_printf(sc->dev, "Opening memory:\n"); 1131 if (starts[0] != START_NONE) 1132 device_printf(sc->dev, "Normal: %#x-%#x\n", 1133 starts[0], ends[0]); 1134 if (starts[1] != START_NONE) 1135 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1136 starts[1], ends[1]); 1137 } 1138 } else if (type == SYS_RES_IOPORT) { 1139 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1140 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1141 if (bootverbose && starts[0] != START_NONE) 1142 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1143 starts[0], ends[0]); 1144 } 1145 } 1146 1147 static int 1148 cbb_cardbus_activate_resource(device_t brdev, device_t child, 1149 struct resource *res) 1150 { 1151 int ret; 1152 1153 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1154 res); 1155 if (ret != 0) 1156 return (ret); 1157 cbb_cardbus_auto_open(device_get_softc(brdev), rman_get_type(res)); 1158 return (0); 1159 } 1160 1161 static int 1162 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, 1163 struct resource *res) 1164 { 1165 int ret; 1166 1167 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1168 res); 1169 if (ret != 0) 1170 return (ret); 1171 cbb_cardbus_auto_open(device_get_softc(brdev), rman_get_type(res)); 1172 return (0); 1173 } 1174 1175 static struct resource * 1176 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1177 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1178 { 1179 struct cbb_softc *sc = device_get_softc(brdev); 1180 int tmp; 1181 struct resource *res; 1182 rman_res_t align; 1183 1184 switch (type) { 1185 case SYS_RES_IRQ: 1186 tmp = rman_get_start(sc->irq_res); 1187 if (start > tmp || end < tmp || count != 1) { 1188 device_printf(child, "requested interrupt %jd-%jd," 1189 "count = %jd not supported by cbb\n", 1190 start, end, count); 1191 return (NULL); 1192 } 1193 start = end = tmp; 1194 flags |= RF_SHAREABLE; 1195 break; 1196 case SYS_RES_IOPORT: 1197 if (start <= cbb_start_32_io) 1198 start = cbb_start_32_io; 1199 if (end < start) 1200 end = start; 1201 if (count > (1 << RF_ALIGNMENT(flags))) 1202 flags = (flags & ~RF_ALIGNMENT_MASK) | 1203 rman_make_alignment_flags(count); 1204 break; 1205 case SYS_RES_MEMORY: 1206 if (start <= cbb_start_mem) 1207 start = cbb_start_mem; 1208 if (end < start) 1209 end = start; 1210 if (count < CBB_MEMALIGN) 1211 align = CBB_MEMALIGN; 1212 else 1213 align = count; 1214 if (align > (1 << RF_ALIGNMENT(flags))) 1215 flags = (flags & ~RF_ALIGNMENT_MASK) | 1216 rman_make_alignment_flags(align); 1217 break; 1218 } 1219 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1220 start, end, count, flags & ~RF_ACTIVE); 1221 if (res == NULL) { 1222 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1223 return (NULL); 1224 } 1225 cbb_insert_res(sc, res, type, *rid); 1226 if (flags & RF_ACTIVE) 1227 if (bus_activate_resource(child, type, *rid, res) != 0) { 1228 bus_release_resource(child, type, *rid, res); 1229 return (NULL); 1230 } 1231 1232 return (res); 1233 } 1234 1235 static int 1236 cbb_cardbus_release_resource(device_t brdev, device_t child, 1237 struct resource *res) 1238 { 1239 struct cbb_softc *sc = device_get_softc(brdev); 1240 int error; 1241 1242 if (rman_get_flags(res) & RF_ACTIVE) { 1243 error = bus_deactivate_resource(child, res); 1244 if (error != 0) 1245 return (error); 1246 } 1247 cbb_remove_res(sc, res); 1248 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1249 res)); 1250 } 1251 1252 /************************************************************************/ 1253 /* PC Card Power Functions */ 1254 /************************************************************************/ 1255 1256 static int 1257 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1258 { 1259 struct cbb_softc *sc = device_get_softc(brdev); 1260 int err; 1261 1262 DPRINTF(("cbb_pcic_socket_enable:\n")); 1263 1264 /* power down/up the socket to reset */ 1265 err = cbb_do_power(brdev); 1266 if (err) 1267 return (err); 1268 exca_reset(&sc->exca, child); 1269 1270 return (0); 1271 } 1272 1273 static int 1274 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1275 { 1276 struct cbb_softc *sc = device_get_softc(brdev); 1277 1278 DPRINTF(("cbb_pcic_socket_disable\n")); 1279 1280 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1281 exca_putb(&sc->exca, EXCA_INTR, 0); 1282 pause("cbbP1", hz / 100); 1283 1284 /* power down the socket */ 1285 cbb_power(brdev, CARD_OFF); 1286 exca_putb(&sc->exca, EXCA_PWRCTL, 0); 1287 1288 /* wait 300ms until power fails (Tpf). */ 1289 pause("cbbP2", hz * 300 / 1000); 1290 1291 /* enable CSC interrupts */ 1292 exca_putb(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE); 1293 return (0); 1294 } 1295 1296 /************************************************************************/ 1297 /* POWER methods */ 1298 /************************************************************************/ 1299 1300 int 1301 cbb_power_enable_socket(device_t brdev, device_t child) 1302 { 1303 struct cbb_softc *sc = device_get_softc(brdev); 1304 1305 if (sc->flags & CBB_16BIT_CARD) 1306 return (cbb_pcic_power_enable_socket(brdev, child)); 1307 return (cbb_cardbus_power_enable_socket(brdev, child)); 1308 } 1309 1310 int 1311 cbb_power_disable_socket(device_t brdev, device_t child) 1312 { 1313 struct cbb_softc *sc = device_get_softc(brdev); 1314 if (sc->flags & CBB_16BIT_CARD) 1315 return (cbb_pcic_power_disable_socket(brdev, child)); 1316 return (cbb_cardbus_power_disable_socket(brdev, child)); 1317 } 1318 1319 static int 1320 cbb_pcic_activate_resource(device_t brdev, device_t child, 1321 struct resource *res) 1322 { 1323 struct cbb_softc *sc = device_get_softc(brdev); 1324 int error; 1325 1326 error = exca_activate_resource(&sc->exca, child, res); 1327 if (error == 0) 1328 cbb_activate_window(brdev, rman_get_type(res)); 1329 return (error); 1330 } 1331 1332 static int 1333 cbb_pcic_deactivate_resource(device_t brdev, device_t child, 1334 struct resource *res) 1335 { 1336 struct cbb_softc *sc = device_get_softc(brdev); 1337 return (exca_deactivate_resource(&sc->exca, child, res)); 1338 } 1339 1340 static struct resource * 1341 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1342 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1343 { 1344 struct resource *res = NULL; 1345 struct cbb_softc *sc = device_get_softc(brdev); 1346 int align; 1347 int tmp; 1348 1349 switch (type) { 1350 case SYS_RES_MEMORY: 1351 if (start < cbb_start_mem) 1352 start = cbb_start_mem; 1353 if (end < start) 1354 end = start; 1355 if (count < CBB_MEMALIGN) 1356 align = CBB_MEMALIGN; 1357 else 1358 align = count; 1359 if (align > (1 << RF_ALIGNMENT(flags))) 1360 flags = (flags & ~RF_ALIGNMENT_MASK) | 1361 rman_make_alignment_flags(align); 1362 break; 1363 case SYS_RES_IOPORT: 1364 if (start < cbb_start_16_io) 1365 start = cbb_start_16_io; 1366 if (end < start) 1367 end = start; 1368 break; 1369 case SYS_RES_IRQ: 1370 tmp = rman_get_start(sc->irq_res); 1371 if (start > tmp || end < tmp || count != 1) { 1372 device_printf(child, "requested interrupt %jd-%jd," 1373 "count = %jd not supported by cbb\n", 1374 start, end, count); 1375 return (NULL); 1376 } 1377 flags |= RF_SHAREABLE; 1378 start = end = rman_get_start(sc->irq_res); 1379 break; 1380 } 1381 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1382 start, end, count, flags & ~RF_ACTIVE); 1383 if (res == NULL) 1384 return (NULL); 1385 cbb_insert_res(sc, res, type, *rid); 1386 if (flags & RF_ACTIVE) { 1387 if (bus_activate_resource(child, type, *rid, res) != 0) { 1388 bus_release_resource(child, type, *rid, res); 1389 return (NULL); 1390 } 1391 } 1392 1393 return (res); 1394 } 1395 1396 static int 1397 cbb_pcic_release_resource(device_t brdev, device_t child, 1398 struct resource *res) 1399 { 1400 struct cbb_softc *sc = device_get_softc(brdev); 1401 int error; 1402 1403 if (rman_get_flags(res) & RF_ACTIVE) { 1404 error = bus_deactivate_resource(child, res); 1405 if (error != 0) 1406 return (error); 1407 } 1408 cbb_remove_res(sc, res); 1409 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1410 res)); 1411 } 1412 1413 /************************************************************************/ 1414 /* PC Card methods */ 1415 /************************************************************************/ 1416 1417 int 1418 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1419 u_long flags) 1420 { 1421 struct cbb_softc *sc = device_get_softc(brdev); 1422 struct resource *res; 1423 1424 if (type != SYS_RES_MEMORY) 1425 return (EINVAL); 1426 res = cbb_find_res(sc, type, rid); 1427 if (res == NULL) { 1428 device_printf(brdev, 1429 "set_res_flags: specified rid not found\n"); 1430 return (ENOENT); 1431 } 1432 return (exca_mem_set_flags(&sc->exca, res, flags)); 1433 } 1434 1435 int 1436 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1437 uint32_t cardaddr, uint32_t *deltap) 1438 { 1439 struct cbb_softc *sc = device_get_softc(brdev); 1440 struct resource *res; 1441 1442 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1443 if (res == NULL) { 1444 device_printf(brdev, 1445 "set_memory_offset: specified rid not found\n"); 1446 return (ENOENT); 1447 } 1448 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap)); 1449 } 1450 1451 /************************************************************************/ 1452 /* BUS Methods */ 1453 /************************************************************************/ 1454 1455 int 1456 cbb_activate_resource(device_t brdev, device_t child, struct resource *r) 1457 { 1458 struct cbb_softc *sc = device_get_softc(brdev); 1459 1460 if (sc->flags & CBB_16BIT_CARD) 1461 return (cbb_pcic_activate_resource(brdev, child, r)); 1462 else 1463 return (cbb_cardbus_activate_resource(brdev, child, r)); 1464 } 1465 1466 int 1467 cbb_deactivate_resource(device_t brdev, device_t child, struct resource *r) 1468 { 1469 struct cbb_softc *sc = device_get_softc(brdev); 1470 1471 if (sc->flags & CBB_16BIT_CARD) 1472 return (cbb_pcic_deactivate_resource(brdev, child, r)); 1473 else 1474 return (cbb_cardbus_deactivate_resource(brdev, child, r)); 1475 } 1476 1477 struct resource * 1478 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1479 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1480 { 1481 struct cbb_softc *sc = device_get_softc(brdev); 1482 1483 if (sc->flags & CBB_16BIT_CARD) 1484 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1485 start, end, count, flags)); 1486 else 1487 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1488 start, end, count, flags)); 1489 } 1490 1491 int 1492 cbb_release_resource(device_t brdev, device_t child, struct resource *r) 1493 { 1494 struct cbb_softc *sc = device_get_softc(brdev); 1495 1496 if (sc->flags & CBB_16BIT_CARD) 1497 return (cbb_pcic_release_resource(brdev, child, r)); 1498 else 1499 return (cbb_cardbus_release_resource(brdev, child, r)); 1500 } 1501 1502 int 1503 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1504 { 1505 struct cbb_softc *sc = device_get_softc(brdev); 1506 1507 switch (which) { 1508 case PCIB_IVAR_DOMAIN: 1509 *result = sc->domain; 1510 return (0); 1511 case PCIB_IVAR_BUS: 1512 *result = sc->bus.sec; 1513 return (0); 1514 case EXCA_IVAR_SLOT: 1515 *result = 0; 1516 return (0); 1517 } 1518 return (ENOENT); 1519 } 1520 1521 int 1522 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1523 { 1524 1525 switch (which) { 1526 case PCIB_IVAR_DOMAIN: 1527 return (EINVAL); 1528 case PCIB_IVAR_BUS: 1529 return (EINVAL); 1530 case EXCA_IVAR_SLOT: 1531 return (EINVAL); 1532 } 1533 return (ENOENT); 1534 } 1535 1536 int 1537 cbb_child_present(device_t parent, device_t child) 1538 { 1539 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent); 1540 uint32_t sockstate; 1541 1542 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1543 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1544 } 1545