1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2000-2001 Jonathan Chen All rights reserved. 5 * Copyright (c) 2002-2004 M. Warner Losh <imp@FreeBSD.org> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /*- 31 * Copyright (c) 1998, 1999 and 2000 32 * HAYAKAWA Koichi. All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. All advertising materials mentioning features or use of this software 43 * must display the following acknowledgement: 44 * This product includes software developed by HAYAKAWA Koichi. 45 * 4. The name of the author may not be used to endorse or promote products 46 * derived from this software without specific prior written permission. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 51 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 52 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 53 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 54 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 55 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 56 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 57 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 /* 61 * Driver for PCI to CardBus Bridge chips 62 * 63 * References: 64 * TI Datasheets: 65 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 66 * 67 * Written by Jonathan Chen <jon@freebsd.org> 68 * The author would like to acknowledge: 69 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 70 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 71 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 72 * * David Cross: Author of the initial ugly hack for a specific cardbus card 73 */ 74 75 #include <sys/cdefs.h> 76 #include <sys/param.h> 77 #include <sys/bus.h> 78 #include <sys/condvar.h> 79 #include <sys/errno.h> 80 #include <sys/kernel.h> 81 #include <sys/module.h> 82 #include <sys/kthread.h> 83 #include <sys/lock.h> 84 #include <sys/malloc.h> 85 #include <sys/mutex.h> 86 #include <sys/proc.h> 87 #include <sys/rman.h> 88 #include <sys/sysctl.h> 89 #include <sys/systm.h> 90 #include <machine/bus.h> 91 #include <machine/resource.h> 92 93 #include <dev/pci/pcireg.h> 94 #include <dev/pci/pcivar.h> 95 #include <dev/pci/pcib_private.h> 96 97 #include <dev/pccard/pccardreg.h> 98 #include <dev/pccard/pccardvar.h> 99 100 #include <dev/exca/excareg.h> 101 #include <dev/exca/excavar.h> 102 103 #include <dev/pccbb/pccbbreg.h> 104 #include <dev/pccbb/pccbbvar.h> 105 106 #include "power_if.h" 107 #include "card_if.h" 108 #include "pcib_if.h" 109 110 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 111 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 112 113 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 114 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 115 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 116 pci_write_config(DEV, REG, ( \ 117 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 118 119 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 120 121 #define CBB_START_MEM 0x88000000 122 #define CBB_START_32_IO 0x1000 123 #define CBB_START_16_IO 0x100 124 125 /* sysctl vars */ 126 static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 127 "CBB parameters"); 128 129 /* There's no way to say TUNEABLE_LONG to get the right types */ 130 u_long cbb_start_mem = CBB_START_MEM; 131 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RWTUN, 132 &cbb_start_mem, CBB_START_MEM, 133 "Starting address for memory allocations"); 134 135 u_long cbb_start_16_io = CBB_START_16_IO; 136 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RWTUN, 137 &cbb_start_16_io, CBB_START_16_IO, 138 "Starting ioport for 16-bit cards"); 139 140 u_long cbb_start_32_io = CBB_START_32_IO; 141 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RWTUN, 142 &cbb_start_32_io, CBB_START_32_IO, 143 "Starting ioport for 32-bit cards"); 144 145 int cbb_debug = 0; 146 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RWTUN, &cbb_debug, 0, 147 "Verbose cardbus bridge debugging"); 148 149 static void cbb_insert(struct cbb_softc *sc); 150 static void cbb_removal(struct cbb_softc *sc); 151 static uint32_t cbb_detect_voltage(device_t brdev); 152 static int cbb_cardbus_reset_power(device_t brdev, device_t child, int on); 153 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 154 uint32_t end); 155 static int cbb_cardbus_mem_open(device_t brdev, int win, 156 uint32_t start, uint32_t end); 157 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 158 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 159 int type, int rid, struct resource *res); 160 static int cbb_cardbus_deactivate_resource(device_t brdev, 161 device_t child, int type, int rid, struct resource *res); 162 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 163 device_t child, int type, int *rid, rman_res_t start, 164 rman_res_t end, rman_res_t count, u_int flags); 165 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 166 int type, int rid, struct resource *res); 167 static int cbb_cardbus_power_enable_socket(device_t brdev, 168 device_t child); 169 static int cbb_cardbus_power_disable_socket(device_t brdev, 170 device_t child); 171 static int cbb_func_filt(void *arg); 172 static void cbb_func_intr(void *arg); 173 174 static void 175 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 176 { 177 struct cbb_reslist *rle; 178 179 SLIST_FOREACH(rle, &sc->rl, link) { 180 if (rle->res == res) { 181 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 182 free(rle, M_DEVBUF); 183 return; 184 } 185 } 186 } 187 188 static struct resource * 189 cbb_find_res(struct cbb_softc *sc, int type, int rid) 190 { 191 struct cbb_reslist *rle; 192 193 SLIST_FOREACH(rle, &sc->rl, link) 194 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 195 return (rle->res); 196 return (NULL); 197 } 198 199 static void 200 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 201 int rid) 202 { 203 struct cbb_reslist *rle; 204 205 /* 206 * Need to record allocated resource so we can iterate through 207 * it later. 208 */ 209 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 210 if (rle == NULL) 211 panic("cbb_cardbus_alloc_resource: can't record entry!"); 212 rle->res = res; 213 rle->type = type; 214 rle->rid = rid; 215 SLIST_INSERT_HEAD(&sc->rl, rle, link); 216 } 217 218 static void 219 cbb_destroy_res(struct cbb_softc *sc) 220 { 221 struct cbb_reslist *rle; 222 223 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 224 device_printf(sc->dev, "Danger Will Robinson: Resource " 225 "left allocated! This is a bug... " 226 "(rid=%x, type=%d, addr=%jx)\n", rle->rid, rle->type, 227 rman_get_start(rle->res)); 228 SLIST_REMOVE_HEAD(&sc->rl, link); 229 free(rle, M_DEVBUF); 230 } 231 } 232 233 /* 234 * Disable function interrupts by telling the bridge to generate IRQ1 235 * interrupts. These interrupts aren't really generated by the chip, since 236 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 237 * initialization, so this helps to work around the problem. 238 * 239 * XXX We can't do this workaround for all chipsets, because this 240 * XXX causes interference with the keyboard because somechipsets will 241 * XXX actually signal IRQ1 over their serial interrupt connections to 242 * XXX the south bridge. Disable it it for now. 243 */ 244 void 245 cbb_disable_func_intr(struct cbb_softc *sc) 246 { 247 #if 0 248 uint8_t reg; 249 250 reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 251 EXCA_INTR_IRQ_RESERVED1; 252 exca_putb(&sc->exca, EXCA_INTR, reg); 253 #endif 254 } 255 256 /* 257 * Enable function interrupts. We turn on function interrupts when the card 258 * requests an interrupt. The PCMCIA standard says that we should set 259 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 260 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 261 * cards. 262 */ 263 static void 264 cbb_enable_func_intr(struct cbb_softc *sc) 265 { 266 uint8_t reg; 267 268 reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 269 EXCA_INTR_IRQ_NONE; 270 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 271 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 272 exca_putb(&sc->exca, EXCA_INTR, reg); 273 } 274 275 int 276 cbb_detach(device_t brdev) 277 { 278 struct cbb_softc *sc = device_get_softc(brdev); 279 device_t *devlist; 280 int tmp, tries, error, numdevs; 281 282 /* 283 * Before we delete the children (which we have to do because 284 * attach doesn't check for children busses correctly), we have 285 * to detach the children. Even if we didn't need to delete the 286 * children, we have to detach them. 287 */ 288 error = bus_generic_detach(brdev); 289 if (error != 0) 290 return (error); 291 292 /* 293 * Since the attach routine doesn't search for children before it 294 * attaches them to this device, we must delete them here in order 295 * for the kldload/unload case to work. If we failed to do that, then 296 * we'd get duplicate devices when cbb.ko was reloaded. 297 */ 298 tries = 10; 299 do { 300 error = device_get_children(brdev, &devlist, &numdevs); 301 if (error == 0) 302 break; 303 /* 304 * Try hard to cope with low memory. 305 */ 306 if (error == ENOMEM) { 307 pause("cbbnomem", 1); 308 continue; 309 } 310 } while (tries-- > 0); 311 for (tmp = 0; tmp < numdevs; tmp++) 312 device_delete_child(brdev, devlist[tmp]); 313 free(devlist, M_TEMP); 314 315 /* Turn off the interrupts */ 316 cbb_set(sc, CBB_SOCKET_MASK, 0); 317 318 /* reset 16-bit pcmcia bus */ 319 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 320 321 /* turn off power */ 322 cbb_power(brdev, CARD_OFF); 323 324 /* Ack the interrupt */ 325 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 326 327 /* 328 * Wait for the thread to die. kproc_exit will do a wakeup 329 * on the event thread's struct proc * so that we know it is 330 * safe to proceed. IF the thread is running, set the please 331 * die flag and wait for it to comply. Since the wakeup on 332 * the event thread happens only in kproc_exit, we don't 333 * need to loop here. 334 */ 335 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 336 mtx_lock(&sc->mtx); 337 sc->flags |= CBB_KTHREAD_DONE; 338 while (sc->flags & CBB_KTHREAD_RUNNING) { 339 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 340 wakeup(&sc->intrhand); 341 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 342 } 343 mtx_unlock(&sc->mtx); 344 345 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 346 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 347 sc->base_res); 348 mtx_destroy(&sc->mtx); 349 return (0); 350 } 351 352 int 353 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 354 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 355 void **cookiep) 356 { 357 struct cbb_intrhand *ih; 358 struct cbb_softc *sc = device_get_softc(dev); 359 int err; 360 361 if (filt == NULL && intr == NULL) 362 return (EINVAL); 363 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 364 if (ih == NULL) 365 return (ENOMEM); 366 *cookiep = ih; 367 ih->filt = filt; 368 ih->intr = intr; 369 ih->arg = arg; 370 ih->sc = sc; 371 /* 372 * XXX need to turn on ISA interrupts, if we ever support them, but 373 * XXX for now that's all we need to do. 374 */ 375 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 376 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 377 &ih->cookie); 378 if (err != 0) { 379 free(ih, M_DEVBUF); 380 return (err); 381 } 382 cbb_enable_func_intr(sc); 383 sc->cardok = 1; 384 return 0; 385 } 386 387 int 388 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 389 void *cookie) 390 { 391 struct cbb_intrhand *ih; 392 int err; 393 394 /* XXX Need to do different things for ISA interrupts. */ 395 ih = (struct cbb_intrhand *) cookie; 396 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 397 ih->cookie); 398 if (err != 0) 399 return (err); 400 free(ih, M_DEVBUF); 401 return (0); 402 } 403 404 void 405 cbb_driver_added(device_t brdev, driver_t *driver) 406 { 407 struct cbb_softc *sc = device_get_softc(brdev); 408 device_t *devlist; 409 device_t dev; 410 int tmp; 411 int numdevs; 412 int wake = 0; 413 414 DEVICE_IDENTIFY(driver, brdev); 415 tmp = device_get_children(brdev, &devlist, &numdevs); 416 if (tmp != 0) { 417 device_printf(brdev, "Cannot get children list, no reprobe\n"); 418 return; 419 } 420 for (tmp = 0; tmp < numdevs; tmp++) { 421 dev = devlist[tmp]; 422 if (device_get_state(dev) == DS_NOTPRESENT && 423 device_probe_and_attach(dev) == 0) 424 wake++; 425 } 426 free(devlist, M_TEMP); 427 428 if (wake > 0) 429 wakeup(&sc->intrhand); 430 } 431 432 void 433 cbb_child_detached(device_t brdev, device_t child) 434 { 435 struct cbb_softc *sc = device_get_softc(brdev); 436 437 /* I'm not sure we even need this */ 438 if (child != sc->cbdev && child != sc->exca.pccarddev) 439 device_printf(brdev, "Unknown child detached: %s\n", 440 device_get_nameunit(child)); 441 } 442 443 /************************************************************************/ 444 /* Kthreads */ 445 /************************************************************************/ 446 447 void 448 cbb_event_thread(void *arg) 449 { 450 struct cbb_softc *sc = arg; 451 uint32_t status; 452 int err; 453 int not_a_card = 0; 454 455 /* 456 * We need to act as a power sequencer on startup. Delay 2s/channel 457 * to ensure the other channels have had a chance to come up. We likely 458 * should add a lock that's shared on a per-slot basis so that only 459 * one power event can happen per slot at a time. 460 */ 461 pause("cbbstart", hz * device_get_unit(sc->dev) * 2); 462 mtx_lock(&sc->mtx); 463 sc->flags |= CBB_KTHREAD_RUNNING; 464 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 465 mtx_unlock(&sc->mtx); 466 status = cbb_get(sc, CBB_SOCKET_STATE); 467 DPRINTF(("Status is 0x%x\n", status)); 468 if (!CBB_CARD_PRESENT(status)) { 469 not_a_card = 0; /* We know card type */ 470 cbb_removal(sc); 471 } else if (status & CBB_STATE_NOT_A_CARD) { 472 /* 473 * Up to 10 times, try to rescan the card when we see 474 * NOT_A_CARD. 10 is somehwat arbitrary. When this 475 * pathology hits, there's a ~40% chance each try will 476 * fail. 10 tries takes about 5s and results in a 477 * 99.99% certainty of the results. 478 */ 479 if (not_a_card++ < 10) { 480 DEVPRINTF((sc->dev, 481 "Not a card bit set, rescanning\n")); 482 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 483 } else { 484 device_printf(sc->dev, 485 "Can't determine card type\n"); 486 } 487 } else { 488 not_a_card = 0; /* We know card type */ 489 cbb_insert(sc); 490 } 491 492 /* 493 * First time through we need to tell mountroot that we're 494 * done. 495 */ 496 if (sc->sc_root_token) { 497 root_mount_rel(sc->sc_root_token); 498 sc->sc_root_token = NULL; 499 } 500 501 /* 502 * Wait until it has been 250ms since the last time we 503 * get an interrupt. We handle the rest of the interrupt 504 * at the top of the loop. Although we clear the bit in the 505 * ISR, we signal sc->cv from the detach path after we've 506 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 507 * 250ms sleep here. 508 * 509 * In our ISR, we turn off the card changed interrupt. Turn 510 * them back on here before we wait for them to happen. We 511 * turn them on/off so that we can tolerate a large latency 512 * between the time we signal cbb_event_thread and it gets 513 * a chance to run. 514 */ 515 mtx_lock(&sc->mtx); 516 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 517 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 518 err = 0; 519 while (err != EWOULDBLOCK && 520 (sc->flags & CBB_KTHREAD_DONE) == 0) 521 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 522 } 523 DEVPRINTF((sc->dev, "Thread terminating\n")); 524 sc->flags &= ~CBB_KTHREAD_RUNNING; 525 mtx_unlock(&sc->mtx); 526 kproc_exit(0); 527 } 528 529 /************************************************************************/ 530 /* Insert/removal */ 531 /************************************************************************/ 532 533 static void 534 cbb_insert(struct cbb_softc *sc) 535 { 536 uint32_t sockevent, sockstate; 537 538 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 539 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 540 541 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 542 sockevent, sockstate)); 543 544 if (sockstate & CBB_STATE_R2_CARD) { 545 if (device_is_attached(sc->exca.pccarddev)) { 546 sc->flags |= CBB_16BIT_CARD; 547 exca_insert(&sc->exca); 548 } else { 549 device_printf(sc->dev, 550 "16-bit card inserted, but no pccard bus.\n"); 551 } 552 } else if (sockstate & CBB_STATE_CB_CARD) { 553 if (device_is_attached(sc->cbdev)) { 554 sc->flags &= ~CBB_16BIT_CARD; 555 CARD_ATTACH_CARD(sc->cbdev); 556 } else { 557 device_printf(sc->dev, 558 "CardBus card inserted, but no cardbus bus.\n"); 559 } 560 } else { 561 /* 562 * We should power the card down, and try again a couple of 563 * times if this happens. XXX 564 */ 565 device_printf(sc->dev, "Unsupported card type detected\n"); 566 } 567 } 568 569 static void 570 cbb_removal(struct cbb_softc *sc) 571 { 572 sc->cardok = 0; 573 if (sc->flags & CBB_16BIT_CARD) { 574 exca_removal(&sc->exca); 575 } else { 576 if (device_is_attached(sc->cbdev)) 577 CARD_DETACH_CARD(sc->cbdev); 578 } 579 cbb_destroy_res(sc); 580 } 581 582 /************************************************************************/ 583 /* Interrupt Handler */ 584 /************************************************************************/ 585 586 static int 587 cbb_func_filt(void *arg) 588 { 589 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 590 struct cbb_softc *sc = ih->sc; 591 592 /* 593 * Make sure that the card is really there. 594 */ 595 if (!sc->cardok) 596 return (FILTER_STRAY); 597 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 598 sc->cardok = 0; 599 return (FILTER_HANDLED); 600 } 601 602 return ((*ih->filt)(ih->arg)); 603 } 604 605 static void 606 cbb_func_intr(void *arg) 607 { 608 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 609 struct cbb_softc *sc = ih->sc; 610 611 /* 612 * While this check may seem redundant, it helps close a race 613 * condition. If the card is ejected after the filter runs, but 614 * before this ISR can be scheduled, then we need to do the same 615 * filtering to prevent the card's ISR from being called. One could 616 * argue that the card's ISR should be able to cope, but experience 617 * has shown they can't always. This mitigates the problem by making 618 * the race quite a bit smaller. Properly written client ISRs should 619 * cope with the card going away in the middle of the ISR. We assume 620 * that drivers that are sophisticated enough to use filters don't 621 * need our protection. This also allows us to ensure they *ARE* 622 * called if their filter said they needed to be called. 623 */ 624 if (ih->filt == NULL) { 625 if (!sc->cardok) 626 return; 627 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 628 sc->cardok = 0; 629 return; 630 } 631 } 632 633 ih->intr(ih->arg); 634 } 635 636 /************************************************************************/ 637 /* Generic Power functions */ 638 /************************************************************************/ 639 640 static uint32_t 641 cbb_detect_voltage(device_t brdev) 642 { 643 struct cbb_softc *sc = device_get_softc(brdev); 644 uint32_t psr; 645 uint32_t vol = CARD_UKN_CARD; 646 647 psr = cbb_get(sc, CBB_SOCKET_STATE); 648 649 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 650 vol |= CARD_5V_CARD; 651 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 652 vol |= CARD_3V_CARD; 653 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 654 vol |= CARD_XV_CARD; 655 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 656 vol |= CARD_YV_CARD; 657 658 return (vol); 659 } 660 661 static uint8_t 662 cbb_o2micro_power_hack(struct cbb_softc *sc) 663 { 664 uint8_t reg; 665 666 /* 667 * Issue #2: INT# not qualified with IRQ Routing Bit. An 668 * unexpected PCI INT# may be generated during PC Card 669 * initialization even with the IRQ Routing Bit Set with some 670 * PC Cards. 671 * 672 * This is a two part issue. The first part is that some of 673 * our older controllers have an issue in which the slot's PCI 674 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 675 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 676 * is selected (ExCA register 03h bits 3:0, of the slot, are 677 * cleared) we will generate INT# if IREQ# is asserted. The 678 * second part is because some PC Cards prematurally assert 679 * IREQ# before the ExCA registers are fully programmed. This 680 * in turn asserts INT# because ExCA register 03h bits 3:0 681 * (ISA IRQ Select) are not yet programmed. 682 * 683 * The fix for this issue, which will work for any controller 684 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 685 * (select IRQ1), of the slot, before turning on slot power. 686 * Selecting IRQ1 will result in INT# NOT being asserted 687 * (because IRQ1 is selected), and IRQ1 won't be asserted 688 * because our controllers don't generate IRQ1. 689 * 690 * Other, non O2Micro controllers will generate irq 1 in some 691 * situations, so we can't do this hack for everybody. Reports of 692 * keyboard controller's interrupts being suppressed occurred when 693 * we did this. 694 */ 695 reg = exca_getb(&sc->exca, EXCA_INTR); 696 exca_putb(&sc->exca, EXCA_INTR, (reg & 0xf0) | 1); 697 return (reg); 698 } 699 700 /* 701 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 702 * we don't have an interrupt storm on power on. This has the effect of 703 * disabling card status change interrupts for the duration of poweron. 704 */ 705 static void 706 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 707 { 708 exca_putb(&sc->exca, EXCA_INTR, reg); 709 } 710 711 int 712 cbb_power(device_t brdev, int volts) 713 { 714 uint32_t status, sock_ctrl, reg_ctrl, mask; 715 struct cbb_softc *sc = device_get_softc(brdev); 716 int cnt, sane; 717 int retval = 0; 718 int on = 0; 719 uint8_t reg = 0; 720 721 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 722 723 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 724 switch (volts & CARD_VCCMASK) { 725 case 5: 726 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 727 on++; 728 break; 729 case 3: 730 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 731 on++; 732 break; 733 case XV: 734 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 735 on++; 736 break; 737 case YV: 738 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 739 on++; 740 break; 741 case 0: 742 break; 743 default: 744 return (0); /* power NEVER changed */ 745 } 746 747 /* VPP == VCC */ 748 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 749 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 750 751 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 752 return (1); /* no change necessary */ 753 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 754 if (volts != 0 && sc->chipset == CB_O2MICRO) 755 reg = cbb_o2micro_power_hack(sc); 756 757 /* 758 * We have to mask the card change detect interrupt while we're 759 * messing with the power. It is allowed to bounce while we're 760 * messing with power as things settle down. In addition, we mask off 761 * the card's function interrupt by routing it via the ISA bus. This 762 * bit generally only affects 16-bit cards. Some bridges allow one to 763 * set another bit to have it also affect 32-bit cards. Since 32-bit 764 * cards are required to be better behaved, we don't bother to get 765 * into those bridge specific features. 766 * 767 * XXX I wonder if we need to enable the READY bit interrupt in the 768 * EXCA CSC register for 16-bit cards, and disable the CD bit? 769 */ 770 mask = cbb_get(sc, CBB_SOCKET_MASK); 771 mask |= CBB_SOCKET_MASK_POWER; 772 mask &= ~CBB_SOCKET_MASK_CD; 773 cbb_set(sc, CBB_SOCKET_MASK, mask); 774 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 775 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 776 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 777 if (on) { 778 mtx_lock(&sc->mtx); 779 cnt = sc->powerintr; 780 /* 781 * We have a shortish timeout of 500ms here. Some bridges do 782 * not generate a POWER_CYCLE event for 16-bit cards. In 783 * those cases, we have to cope the best we can, and having 784 * only a short delay is better than the alternatives. Others 785 * raise the power cycle a smidge before it is really ready. 786 * We deal with those below. 787 */ 788 sane = 10; 789 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 790 cnt == sc->powerintr && sane-- > 0) 791 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 792 mtx_unlock(&sc->mtx); 793 794 /* 795 * Relax for 100ms. Some bridges appear to assert this signal 796 * right away, but before the card has stabilized. Other 797 * cards need need more time to cope up reliabily. 798 * Experiments with troublesome setups show this to be a 799 * "cheap" way to enhance reliabilty. We need not do this for 800 * "off" since we don't touch the card after we turn it off. 801 */ 802 pause("cbbPwr", min(hz / 10, 1)); 803 804 /* 805 * The TOPIC95B requires a little bit extra time to get its 806 * act together, so delay for an additional 100ms. Also as 807 * documented below, it doesn't seem to set the POWER_CYCLE 808 * bit, so don't whine if it never came on. 809 */ 810 if (sc->chipset == CB_TOPIC95) 811 pause("cbb95B", hz / 10); 812 else if (sane <= 0) 813 device_printf(sc->dev, "power timeout, doom?\n"); 814 } 815 816 /* 817 * After the power is good, we can turn off the power interrupt. 818 * However, the PC Card standard says that we must delay turning the 819 * CD bit back on for a bit to allow for bouncyness on power down 820 * (recall that we don't wait above for a power down, since we don't 821 * get an interrupt for that). We're called either from the suspend 822 * code in which case we don't want to turn card change on again, or 823 * we're called from the card insertion code, in which case the cbb 824 * thread will turn it on for us before it waits to be woken by a 825 * change event. 826 * 827 * NB: Topic95B doesn't set the power cycle bit. we assume that 828 * both it and the TOPIC95 behave the same. 829 */ 830 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 831 status = cbb_get(sc, CBB_SOCKET_STATE); 832 if (on && sc->chipset != CB_TOPIC95) { 833 if ((status & CBB_STATE_POWER_CYCLE) == 0) 834 device_printf(sc->dev, "Power not on?\n"); 835 } 836 if (status & CBB_STATE_BAD_VCC_REQ) { 837 device_printf(sc->dev, "Bad Vcc requested\n"); 838 /* 839 * Turn off the power, and try again. Retrigger other 840 * active interrupts via force register. From NetBSD 841 * PR 36652, coded by me to description there. 842 */ 843 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 844 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 845 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 846 status &= ~CBB_STATE_BAD_VCC_REQ; 847 status &= ~CBB_STATE_DATA_LOST; 848 status |= CBB_FORCE_CV_TEST; 849 cbb_set(sc, CBB_SOCKET_FORCE, status); 850 goto done; 851 } 852 if (sc->chipset == CB_TOPIC97) { 853 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 854 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 855 if (on) 856 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 857 else 858 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 859 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 860 } 861 retval = 1; 862 done:; 863 if (volts != 0 && sc->chipset == CB_O2MICRO) 864 cbb_o2micro_power_hack2(sc, reg); 865 return (retval); 866 } 867 868 static int 869 cbb_current_voltage(device_t brdev) 870 { 871 struct cbb_softc *sc = device_get_softc(brdev); 872 uint32_t ctrl; 873 874 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 875 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 876 case CBB_SOCKET_CTRL_VCC_5V: 877 return CARD_5V_CARD; 878 case CBB_SOCKET_CTRL_VCC_3V: 879 return CARD_3V_CARD; 880 case CBB_SOCKET_CTRL_VCC_XV: 881 return CARD_XV_CARD; 882 case CBB_SOCKET_CTRL_VCC_YV: 883 return CARD_YV_CARD; 884 } 885 return 0; 886 } 887 888 /* 889 * detect the voltage for the card, and set it. Since the power 890 * used is the square of the voltage, lower voltages is a big win 891 * and what Windows does (and what Microsoft prefers). The MS paper 892 * also talks about preferring the CIS entry as well, but that has 893 * to be done elsewhere. We also optimize power sequencing here 894 * and don't change things if we're already powered up at a supported 895 * voltage. 896 * 897 * In addition, we power up with OE disabled. We'll set it later 898 * in the power up sequence. 899 */ 900 static int 901 cbb_do_power(device_t brdev) 902 { 903 struct cbb_softc *sc = device_get_softc(brdev); 904 uint32_t voltage, curpwr; 905 uint32_t status; 906 907 /* Don't enable OE (output enable) until power stable */ 908 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE); 909 910 voltage = cbb_detect_voltage(brdev); 911 curpwr = cbb_current_voltage(brdev); 912 status = cbb_get(sc, CBB_SOCKET_STATE); 913 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 914 return 0; 915 /* Prefer lowest voltage supported */ 916 cbb_power(brdev, CARD_OFF); 917 if (voltage & CARD_YV_CARD) 918 cbb_power(brdev, CARD_VCC(YV)); 919 else if (voltage & CARD_XV_CARD) 920 cbb_power(brdev, CARD_VCC(XV)); 921 else if (voltage & CARD_3V_CARD) 922 cbb_power(brdev, CARD_VCC(3)); 923 else if (voltage & CARD_5V_CARD) 924 cbb_power(brdev, CARD_VCC(5)); 925 else { 926 device_printf(brdev, "Unknown card voltage\n"); 927 return (ENXIO); 928 } 929 return (0); 930 } 931 932 /************************************************************************/ 933 /* CardBus power functions */ 934 /************************************************************************/ 935 936 static int 937 cbb_cardbus_reset_power(device_t brdev, device_t child, int on) 938 { 939 struct cbb_softc *sc = device_get_softc(brdev); 940 uint32_t b, h; 941 int delay, count, zero_seen, func; 942 943 /* 944 * Asserting reset for 20ms is necessary for most bridges. For some 945 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 946 * root cause of this is unknown, and NetBSD does the same thing. 947 */ 948 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 949 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 950 pause("cbbP3", hz * delay / 1000); 951 952 /* 953 * If a card exists and we're turning it on, take it out of reset. 954 * After clearing reset, wait up to 1.1s for the first configuration 955 * register (vendor/product) configuration register of device 0.0 to 956 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 957 * says that when powering up the card, the PCI Spec v2.1 must be 958 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 959 * Config Access) is at most 2^25 clocks, or just over 1s. Section 960 * 2.2.1 states any card not ready to participate in bus transactions 961 * must tristate its outputs. Therefore, any access to its 962 * configuration registers must be ignored. In that state, the config 963 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 964 * 0xffff is invalid, so this can never match a real card. Print a 965 * warning if it never returns a real id. The PCMCIA PC Card 966 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 967 * a cardbus bus, so that's the only register we check here. 968 */ 969 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 970 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 971 &~CBBM_BRIDGECTRL_RESET, 2); 972 b = pcib_get_bus(child); 973 count = 1100 / 20; 974 do { 975 pause("cbbP4", hz * 2 / 100); 976 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 977 0xfffffffful && --count >= 0); 978 if (count < 0) 979 device_printf(brdev, "Warning: Bus reset timeout\n"); 980 981 /* 982 * Some cards (so far just an atheros card I have) seem to 983 * come out of reset in a funky state. They report they are 984 * multi-function cards, but have nonsense for some of the 985 * higher functions. So if the card claims to be MFDEV, and 986 * any of the higher functions' ID is 0, then we've hit the 987 * bug and we'll try again. 988 */ 989 h = PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_HDRTYPE, 1); 990 if ((h & PCIM_MFDEV) == 0) 991 return 0; 992 zero_seen = 0; 993 for (func = 1; func < 8; func++) { 994 h = PCIB_READ_CONFIG(brdev, b, 0, func, 995 PCIR_DEVVENDOR, 4); 996 if (h == 0) 997 zero_seen++; 998 } 999 if (!zero_seen) 1000 return 0; 1001 return (EINVAL); 1002 } 1003 return 0; 1004 } 1005 1006 static int 1007 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1008 { 1009 cbb_power(brdev, CARD_OFF); 1010 cbb_cardbus_reset_power(brdev, child, 0); 1011 return (0); 1012 } 1013 1014 static int 1015 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1016 { 1017 struct cbb_softc *sc = device_get_softc(brdev); 1018 int err, count; 1019 1020 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 1021 return (ENODEV); 1022 1023 count = 10; 1024 do { 1025 err = cbb_do_power(brdev); 1026 if (err) 1027 return (err); 1028 err = cbb_cardbus_reset_power(brdev, child, 1); 1029 if (err) { 1030 device_printf(brdev, "Reset failed, trying again.\n"); 1031 cbb_cardbus_power_disable_socket(brdev, child); 1032 pause("cbbErr1", hz / 10); /* wait 100ms */ 1033 } 1034 } while (err != 0 && count-- > 0); 1035 return (0); 1036 } 1037 1038 /************************************************************************/ 1039 /* CardBus Resource */ 1040 /************************************************************************/ 1041 1042 static void 1043 cbb_activate_window(device_t brdev, int type) 1044 { 1045 1046 PCI_ENABLE_IO(device_get_parent(brdev), brdev, type); 1047 } 1048 1049 static int 1050 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1051 { 1052 int basereg; 1053 int limitreg; 1054 1055 if ((win < 0) || (win > 1)) { 1056 DEVPRINTF((brdev, 1057 "cbb_cardbus_io_open: window out of range %d\n", win)); 1058 return (EINVAL); 1059 } 1060 1061 basereg = win * 8 + CBBR_IOBASE0; 1062 limitreg = win * 8 + CBBR_IOLIMIT0; 1063 1064 pci_write_config(brdev, basereg, start, 4); 1065 pci_write_config(brdev, limitreg, end, 4); 1066 cbb_activate_window(brdev, SYS_RES_IOPORT); 1067 return (0); 1068 } 1069 1070 static int 1071 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1072 { 1073 int basereg; 1074 int limitreg; 1075 1076 if ((win < 0) || (win > 1)) { 1077 DEVPRINTF((brdev, 1078 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1079 return (EINVAL); 1080 } 1081 1082 basereg = win * 8 + CBBR_MEMBASE0; 1083 limitreg = win * 8 + CBBR_MEMLIMIT0; 1084 1085 pci_write_config(brdev, basereg, start, 4); 1086 pci_write_config(brdev, limitreg, end, 4); 1087 cbb_activate_window(brdev, SYS_RES_MEMORY); 1088 return (0); 1089 } 1090 1091 #define START_NONE 0xffffffff 1092 #define END_NONE 0 1093 1094 static void 1095 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1096 { 1097 uint32_t starts[2]; 1098 uint32_t ends[2]; 1099 struct cbb_reslist *rle; 1100 int align, i; 1101 uint32_t reg; 1102 1103 starts[0] = starts[1] = START_NONE; 1104 ends[0] = ends[1] = END_NONE; 1105 1106 if (type == SYS_RES_MEMORY) 1107 align = CBB_MEMALIGN; 1108 else if (type == SYS_RES_IOPORT) 1109 align = CBB_IOALIGN; 1110 else 1111 align = 1; 1112 1113 SLIST_FOREACH(rle, &sc->rl, link) { 1114 if (rle->type != type) 1115 continue; 1116 if (rle->res == NULL) 1117 continue; 1118 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1119 continue; 1120 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1121 i = 1; 1122 else 1123 i = 0; 1124 if (rman_get_start(rle->res) < starts[i]) 1125 starts[i] = rman_get_start(rle->res); 1126 if (rman_get_end(rle->res) > ends[i]) 1127 ends[i] = rman_get_end(rle->res); 1128 } 1129 for (i = 0; i < 2; i++) { 1130 if (starts[i] == START_NONE) 1131 continue; 1132 starts[i] &= ~(align - 1); 1133 ends[i] = roundup2(ends[i], align) - 1; 1134 } 1135 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1136 if (starts[0] < starts[1]) { 1137 if (ends[0] > starts[1]) { 1138 device_printf(sc->dev, "Overlapping ranges" 1139 " for prefetch and non-prefetch memory\n"); 1140 return; 1141 } 1142 } else { 1143 if (ends[1] > starts[0]) { 1144 device_printf(sc->dev, "Overlapping ranges" 1145 " for prefetch and non-prefetch memory\n"); 1146 return; 1147 } 1148 } 1149 } 1150 1151 if (type == SYS_RES_MEMORY) { 1152 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1153 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1154 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1155 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1156 CBBM_BRIDGECTRL_PREFETCH_1); 1157 if (starts[1] != START_NONE) 1158 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1159 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1160 if (bootverbose) { 1161 device_printf(sc->dev, "Opening memory:\n"); 1162 if (starts[0] != START_NONE) 1163 device_printf(sc->dev, "Normal: %#x-%#x\n", 1164 starts[0], ends[0]); 1165 if (starts[1] != START_NONE) 1166 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1167 starts[1], ends[1]); 1168 } 1169 } else if (type == SYS_RES_IOPORT) { 1170 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1171 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1172 if (bootverbose && starts[0] != START_NONE) 1173 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1174 starts[0], ends[0]); 1175 } 1176 } 1177 1178 static int 1179 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1180 int rid, struct resource *res) 1181 { 1182 int ret; 1183 1184 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1185 type, rid, res); 1186 if (ret != 0) 1187 return (ret); 1188 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1189 return (0); 1190 } 1191 1192 static int 1193 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1194 int rid, struct resource *res) 1195 { 1196 int ret; 1197 1198 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1199 type, rid, res); 1200 if (ret != 0) 1201 return (ret); 1202 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1203 return (0); 1204 } 1205 1206 static struct resource * 1207 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1208 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1209 { 1210 struct cbb_softc *sc = device_get_softc(brdev); 1211 int tmp; 1212 struct resource *res; 1213 rman_res_t align; 1214 1215 switch (type) { 1216 case SYS_RES_IRQ: 1217 tmp = rman_get_start(sc->irq_res); 1218 if (start > tmp || end < tmp || count != 1) { 1219 device_printf(child, "requested interrupt %jd-%jd," 1220 "count = %jd not supported by cbb\n", 1221 start, end, count); 1222 return (NULL); 1223 } 1224 start = end = tmp; 1225 flags |= RF_SHAREABLE; 1226 break; 1227 case SYS_RES_IOPORT: 1228 if (start <= cbb_start_32_io) 1229 start = cbb_start_32_io; 1230 if (end < start) 1231 end = start; 1232 if (count > (1 << RF_ALIGNMENT(flags))) 1233 flags = (flags & ~RF_ALIGNMENT_MASK) | 1234 rman_make_alignment_flags(count); 1235 break; 1236 case SYS_RES_MEMORY: 1237 if (start <= cbb_start_mem) 1238 start = cbb_start_mem; 1239 if (end < start) 1240 end = start; 1241 if (count < CBB_MEMALIGN) 1242 align = CBB_MEMALIGN; 1243 else 1244 align = count; 1245 if (align > (1 << RF_ALIGNMENT(flags))) 1246 flags = (flags & ~RF_ALIGNMENT_MASK) | 1247 rman_make_alignment_flags(align); 1248 break; 1249 } 1250 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1251 start, end, count, flags & ~RF_ACTIVE); 1252 if (res == NULL) { 1253 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1254 return (NULL); 1255 } 1256 cbb_insert_res(sc, res, type, *rid); 1257 if (flags & RF_ACTIVE) 1258 if (bus_activate_resource(child, type, *rid, res) != 0) { 1259 bus_release_resource(child, type, *rid, res); 1260 return (NULL); 1261 } 1262 1263 return (res); 1264 } 1265 1266 static int 1267 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1268 int rid, struct resource *res) 1269 { 1270 struct cbb_softc *sc = device_get_softc(brdev); 1271 int error; 1272 1273 if (rman_get_flags(res) & RF_ACTIVE) { 1274 error = bus_deactivate_resource(child, type, rid, res); 1275 if (error != 0) 1276 return (error); 1277 } 1278 cbb_remove_res(sc, res); 1279 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1280 type, rid, res)); 1281 } 1282 1283 /************************************************************************/ 1284 /* PC Card Power Functions */ 1285 /************************************************************************/ 1286 1287 static int 1288 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1289 { 1290 struct cbb_softc *sc = device_get_softc(brdev); 1291 int err; 1292 1293 DPRINTF(("cbb_pcic_socket_enable:\n")); 1294 1295 /* power down/up the socket to reset */ 1296 err = cbb_do_power(brdev); 1297 if (err) 1298 return (err); 1299 exca_reset(&sc->exca, child); 1300 1301 return (0); 1302 } 1303 1304 static int 1305 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1306 { 1307 struct cbb_softc *sc = device_get_softc(brdev); 1308 1309 DPRINTF(("cbb_pcic_socket_disable\n")); 1310 1311 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1312 exca_putb(&sc->exca, EXCA_INTR, 0); 1313 pause("cbbP1", hz / 100); 1314 1315 /* power down the socket */ 1316 cbb_power(brdev, CARD_OFF); 1317 exca_putb(&sc->exca, EXCA_PWRCTL, 0); 1318 1319 /* wait 300ms until power fails (Tpf). */ 1320 pause("cbbP2", hz * 300 / 1000); 1321 1322 /* enable CSC interrupts */ 1323 exca_putb(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE); 1324 return (0); 1325 } 1326 1327 /************************************************************************/ 1328 /* POWER methods */ 1329 /************************************************************************/ 1330 1331 int 1332 cbb_power_enable_socket(device_t brdev, device_t child) 1333 { 1334 struct cbb_softc *sc = device_get_softc(brdev); 1335 1336 if (sc->flags & CBB_16BIT_CARD) 1337 return (cbb_pcic_power_enable_socket(brdev, child)); 1338 return (cbb_cardbus_power_enable_socket(brdev, child)); 1339 } 1340 1341 int 1342 cbb_power_disable_socket(device_t brdev, device_t child) 1343 { 1344 struct cbb_softc *sc = device_get_softc(brdev); 1345 if (sc->flags & CBB_16BIT_CARD) 1346 return (cbb_pcic_power_disable_socket(brdev, child)); 1347 return (cbb_cardbus_power_disable_socket(brdev, child)); 1348 } 1349 1350 static int 1351 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1352 struct resource *res) 1353 { 1354 struct cbb_softc *sc = device_get_softc(brdev); 1355 int error; 1356 1357 error = exca_activate_resource(&sc->exca, child, type, rid, res); 1358 if (error == 0) 1359 cbb_activate_window(brdev, type); 1360 return (error); 1361 } 1362 1363 static int 1364 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1365 int rid, struct resource *res) 1366 { 1367 struct cbb_softc *sc = device_get_softc(brdev); 1368 return (exca_deactivate_resource(&sc->exca, child, type, rid, res)); 1369 } 1370 1371 static struct resource * 1372 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1373 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1374 { 1375 struct resource *res = NULL; 1376 struct cbb_softc *sc = device_get_softc(brdev); 1377 int align; 1378 int tmp; 1379 1380 switch (type) { 1381 case SYS_RES_MEMORY: 1382 if (start < cbb_start_mem) 1383 start = cbb_start_mem; 1384 if (end < start) 1385 end = start; 1386 if (count < CBB_MEMALIGN) 1387 align = CBB_MEMALIGN; 1388 else 1389 align = count; 1390 if (align > (1 << RF_ALIGNMENT(flags))) 1391 flags = (flags & ~RF_ALIGNMENT_MASK) | 1392 rman_make_alignment_flags(align); 1393 break; 1394 case SYS_RES_IOPORT: 1395 if (start < cbb_start_16_io) 1396 start = cbb_start_16_io; 1397 if (end < start) 1398 end = start; 1399 break; 1400 case SYS_RES_IRQ: 1401 tmp = rman_get_start(sc->irq_res); 1402 if (start > tmp || end < tmp || count != 1) { 1403 device_printf(child, "requested interrupt %jd-%jd," 1404 "count = %jd not supported by cbb\n", 1405 start, end, count); 1406 return (NULL); 1407 } 1408 flags |= RF_SHAREABLE; 1409 start = end = rman_get_start(sc->irq_res); 1410 break; 1411 } 1412 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1413 start, end, count, flags & ~RF_ACTIVE); 1414 if (res == NULL) 1415 return (NULL); 1416 cbb_insert_res(sc, res, type, *rid); 1417 if (flags & RF_ACTIVE) { 1418 if (bus_activate_resource(child, type, *rid, res) != 0) { 1419 bus_release_resource(child, type, *rid, res); 1420 return (NULL); 1421 } 1422 } 1423 1424 return (res); 1425 } 1426 1427 static int 1428 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1429 int rid, struct resource *res) 1430 { 1431 struct cbb_softc *sc = device_get_softc(brdev); 1432 int error; 1433 1434 if (rman_get_flags(res) & RF_ACTIVE) { 1435 error = bus_deactivate_resource(child, type, rid, res); 1436 if (error != 0) 1437 return (error); 1438 } 1439 cbb_remove_res(sc, res); 1440 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1441 type, rid, res)); 1442 } 1443 1444 /************************************************************************/ 1445 /* PC Card methods */ 1446 /************************************************************************/ 1447 1448 int 1449 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1450 u_long flags) 1451 { 1452 struct cbb_softc *sc = device_get_softc(brdev); 1453 struct resource *res; 1454 1455 if (type != SYS_RES_MEMORY) 1456 return (EINVAL); 1457 res = cbb_find_res(sc, type, rid); 1458 if (res == NULL) { 1459 device_printf(brdev, 1460 "set_res_flags: specified rid not found\n"); 1461 return (ENOENT); 1462 } 1463 return (exca_mem_set_flags(&sc->exca, res, flags)); 1464 } 1465 1466 int 1467 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1468 uint32_t cardaddr, uint32_t *deltap) 1469 { 1470 struct cbb_softc *sc = device_get_softc(brdev); 1471 struct resource *res; 1472 1473 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1474 if (res == NULL) { 1475 device_printf(brdev, 1476 "set_memory_offset: specified rid not found\n"); 1477 return (ENOENT); 1478 } 1479 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap)); 1480 } 1481 1482 /************************************************************************/ 1483 /* BUS Methods */ 1484 /************************************************************************/ 1485 1486 int 1487 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1488 struct resource *r) 1489 { 1490 struct cbb_softc *sc = device_get_softc(brdev); 1491 1492 if (sc->flags & CBB_16BIT_CARD) 1493 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1494 else 1495 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1496 r)); 1497 } 1498 1499 int 1500 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1501 int rid, struct resource *r) 1502 { 1503 struct cbb_softc *sc = device_get_softc(brdev); 1504 1505 if (sc->flags & CBB_16BIT_CARD) 1506 return (cbb_pcic_deactivate_resource(brdev, child, type, 1507 rid, r)); 1508 else 1509 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1510 rid, r)); 1511 } 1512 1513 struct resource * 1514 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1515 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1516 { 1517 struct cbb_softc *sc = device_get_softc(brdev); 1518 1519 if (sc->flags & CBB_16BIT_CARD) 1520 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1521 start, end, count, flags)); 1522 else 1523 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1524 start, end, count, flags)); 1525 } 1526 1527 int 1528 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1529 struct resource *r) 1530 { 1531 struct cbb_softc *sc = device_get_softc(brdev); 1532 1533 if (sc->flags & CBB_16BIT_CARD) 1534 return (cbb_pcic_release_resource(brdev, child, type, 1535 rid, r)); 1536 else 1537 return (cbb_cardbus_release_resource(brdev, child, type, 1538 rid, r)); 1539 } 1540 1541 int 1542 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1543 { 1544 struct cbb_softc *sc = device_get_softc(brdev); 1545 1546 switch (which) { 1547 case PCIB_IVAR_DOMAIN: 1548 *result = sc->domain; 1549 return (0); 1550 case PCIB_IVAR_BUS: 1551 *result = sc->bus.sec; 1552 return (0); 1553 case EXCA_IVAR_SLOT: 1554 *result = 0; 1555 return (0); 1556 } 1557 return (ENOENT); 1558 } 1559 1560 int 1561 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1562 { 1563 1564 switch (which) { 1565 case PCIB_IVAR_DOMAIN: 1566 return (EINVAL); 1567 case PCIB_IVAR_BUS: 1568 return (EINVAL); 1569 case EXCA_IVAR_SLOT: 1570 return (EINVAL); 1571 } 1572 return (ENOENT); 1573 } 1574 1575 int 1576 cbb_child_present(device_t parent, device_t child) 1577 { 1578 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent); 1579 uint32_t sockstate; 1580 1581 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1582 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1583 } 1584