1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/lock.h> 88 #include <sys/malloc.h> 89 #include <sys/mutex.h> 90 #include <sys/proc.h> 91 #include <sys/rman.h> 92 #include <sys/sysctl.h> 93 #include <sys/systm.h> 94 #include <machine/bus.h> 95 #include <machine/resource.h> 96 97 #include <dev/pci/pcireg.h> 98 #include <dev/pci/pcivar.h> 99 100 #include <dev/pccard/pccardreg.h> 101 #include <dev/pccard/pccardvar.h> 102 103 #include <dev/exca/excareg.h> 104 #include <dev/exca/excavar.h> 105 106 #include <dev/pccbb/pccbbreg.h> 107 #include <dev/pccbb/pccbbvar.h> 108 109 #include "power_if.h" 110 #include "card_if.h" 111 #include "pcib_if.h" 112 113 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 114 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 115 116 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 117 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 118 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 119 pci_write_config(DEV, REG, ( \ 120 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 121 122 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 123 124 #define CBB_START_MEM 0x88000000 125 #define CBB_START_32_IO 0x1000 126 #define CBB_START_16_IO 0x100 127 128 devclass_t cbb_devclass; 129 130 /* sysctl vars */ 131 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 132 133 /* There's no way to say TUNEABLE_LONG to get the right types */ 134 u_long cbb_start_mem = CBB_START_MEM; 135 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 136 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 137 &cbb_start_mem, CBB_START_MEM, 138 "Starting address for memory allocations"); 139 140 u_long cbb_start_16_io = CBB_START_16_IO; 141 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 142 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 143 &cbb_start_16_io, CBB_START_16_IO, 144 "Starting ioport for 16-bit cards"); 145 146 u_long cbb_start_32_io = CBB_START_32_IO; 147 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 148 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 149 &cbb_start_32_io, CBB_START_32_IO, 150 "Starting ioport for 32-bit cards"); 151 152 int cbb_debug = 0; 153 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 154 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 155 "Verbose cardbus bridge debugging"); 156 157 static void cbb_insert(struct cbb_softc *sc); 158 static void cbb_removal(struct cbb_softc *sc); 159 static uint32_t cbb_detect_voltage(device_t brdev); 160 static void cbb_cardbus_reset(device_t brdev); 161 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 162 uint32_t end); 163 static int cbb_cardbus_mem_open(device_t brdev, int win, 164 uint32_t start, uint32_t end); 165 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 166 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 167 int type, int rid, struct resource *res); 168 static int cbb_cardbus_deactivate_resource(device_t brdev, 169 device_t child, int type, int rid, struct resource *res); 170 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 171 device_t child, int type, int *rid, u_long start, 172 u_long end, u_long count, u_int flags); 173 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 174 int type, int rid, struct resource *res); 175 static int cbb_cardbus_power_enable_socket(device_t brdev, 176 device_t child); 177 static void cbb_cardbus_power_disable_socket(device_t brdev, 178 device_t child); 179 static void cbb_func_intr(void *arg); 180 181 static void 182 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 183 { 184 struct cbb_reslist *rle; 185 186 SLIST_FOREACH(rle, &sc->rl, link) { 187 if (rle->res == res) { 188 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 189 free(rle, M_DEVBUF); 190 return; 191 } 192 } 193 } 194 195 static struct resource * 196 cbb_find_res(struct cbb_softc *sc, int type, int rid) 197 { 198 struct cbb_reslist *rle; 199 200 SLIST_FOREACH(rle, &sc->rl, link) 201 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 202 return (rle->res); 203 return (NULL); 204 } 205 206 static void 207 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 208 int rid) 209 { 210 struct cbb_reslist *rle; 211 212 /* 213 * Need to record allocated resource so we can iterate through 214 * it later. 215 */ 216 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 217 if (rle == NULL) 218 panic("cbb_cardbus_alloc_resource: can't record entry!"); 219 rle->res = res; 220 rle->type = type; 221 rle->rid = rid; 222 SLIST_INSERT_HEAD(&sc->rl, rle, link); 223 } 224 225 static void 226 cbb_destroy_res(struct cbb_softc *sc) 227 { 228 struct cbb_reslist *rle; 229 230 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 231 device_printf(sc->dev, "Danger Will Robinson: Resource " 232 "left allocated! This is a bug... " 233 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 234 rman_get_start(rle->res)); 235 SLIST_REMOVE_HEAD(&sc->rl, link); 236 free(rle, M_DEVBUF); 237 } 238 } 239 240 /* 241 * Disable function interrupts by telling the bridge to generate IRQ1 242 * interrupts. These interrupts aren't really generated by the chip, since 243 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 244 * initialization, so this helps to work around the problem. 245 * 246 * XXX We can't do this workaround for all chipsets, because this 247 * XXX causes interference with the keyboard because somechipsets will 248 * XXX actually signal IRQ1 over their serial interrupt connections to 249 * XXX the south bridge. Disable it it for now. 250 */ 251 void 252 cbb_disable_func_intr(struct cbb_softc *sc) 253 { 254 #if 0 255 uint8_t reg; 256 257 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 258 EXCA_INTR_IRQ_RESERVED1; 259 exca_putb(&sc->exca[0], EXCA_INTR, reg); 260 #endif 261 } 262 263 /* 264 * Enable function interrupts. We turn on function interrupts when the card 265 * requests an interrupt. The PCMCIA standard says that we should set 266 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 267 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 268 * cards. 269 */ 270 static void 271 cbb_enable_func_intr(struct cbb_softc *sc) 272 { 273 uint8_t reg; 274 275 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 276 EXCA_INTR_IRQ_NONE; 277 exca_putb(&sc->exca[0], EXCA_INTR, reg); 278 } 279 280 int 281 cbb_detach(device_t brdev) 282 { 283 struct cbb_softc *sc = device_get_softc(brdev); 284 int numdevs; 285 device_t *devlist; 286 int tmp; 287 int error; 288 289 /* 290 * Before we delete the children (which we have to do because 291 * attach doesn't check for children busses correctly), we have 292 * to detach the children. Even if we didn't need to delete the 293 * children, we have to detach them. 294 */ 295 error = bus_generic_detach(brdev); 296 if (error != 0) 297 return (error); 298 299 /* 300 * Since the attach routine doesn't search for children before it 301 * attaches them to this device, we must delete them here in order 302 * for the kldload/unload case to work. If we failed to do that, then 303 * we'd get duplicate devices when cbb.ko was reloaded. 304 */ 305 device_get_children(brdev, &devlist, &numdevs); 306 for (tmp = 0; tmp < numdevs; tmp++) 307 device_delete_child(brdev, devlist[tmp]); 308 free(devlist, M_TEMP); 309 310 /* Turn off the interrupts */ 311 cbb_set(sc, CBB_SOCKET_MASK, 0); 312 313 /* reset 16-bit pcmcia bus */ 314 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 315 316 /* turn off power */ 317 cbb_power(brdev, CARD_OFF); 318 319 /* Ack the interrupt */ 320 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 321 322 /* 323 * Wait for the thread to die. kthread_exit will do a wakeup 324 * on the event thread's struct thread * so that we know it is 325 * save to proceed. IF the thread is running, set the please 326 * die flag and wait for it to comply. Since the wakeup on 327 * the event thread happens only in kthread_exit, we don't 328 * need to loop here. 329 */ 330 mtx_lock(&sc->mtx); 331 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 332 sc->flags |= CBB_KTHREAD_DONE; 333 while (sc->flags & CBB_KTHREAD_RUNNING) { 334 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 335 cv_broadcast(&sc->cv); 336 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 337 } 338 mtx_unlock(&sc->mtx); 339 340 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 341 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 342 sc->base_res); 343 mtx_destroy(&sc->mtx); 344 cv_destroy(&sc->cv); 345 cv_destroy(&sc->powercv); 346 return (0); 347 } 348 349 int 350 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 351 int flags, driver_intr_t *intr, void *arg, void **cookiep) 352 { 353 struct cbb_intrhand *ih; 354 struct cbb_softc *sc = device_get_softc(dev); 355 int err; 356 357 /* 358 * Well, this is no longer strictly true. You can have multiple 359 * FAST ISRs, but can't mix fast and slow, so we have to assume 360 * least common denominator until the base system supports mixing 361 * and matching better. 362 */ 363 if ((flags & INTR_FAST) != 0) 364 return (EINVAL); 365 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 366 if (ih == NULL) 367 return (ENOMEM); 368 *cookiep = ih; 369 ih->intr = intr; 370 ih->arg = arg; 371 ih->sc = sc; 372 /* 373 * XXX need to turn on ISA interrupts, if we ever support them, but 374 * XXX for now that's all we need to do. 375 */ 376 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 377 cbb_func_intr, ih, &ih->cookie); 378 if (err != 0) { 379 free(ih, M_DEVBUF); 380 return (err); 381 } 382 cbb_enable_func_intr(sc); 383 sc->flags |= CBB_CARD_OK; 384 return 0; 385 } 386 387 int 388 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 389 void *cookie) 390 { 391 struct cbb_intrhand *ih; 392 int err; 393 394 /* XXX Need to do different things for ISA interrupts. */ 395 ih = (struct cbb_intrhand *) cookie; 396 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 397 ih->cookie); 398 if (err != 0) 399 return (err); 400 free(ih, M_DEVBUF); 401 return (0); 402 } 403 404 405 void 406 cbb_driver_added(device_t brdev, driver_t *driver) 407 { 408 struct cbb_softc *sc = device_get_softc(brdev); 409 device_t *devlist; 410 device_t dev; 411 int tmp; 412 int numdevs; 413 int wake = 0; 414 415 DEVICE_IDENTIFY(driver, brdev); 416 device_get_children(brdev, &devlist, &numdevs); 417 for (tmp = 0; tmp < numdevs; tmp++) { 418 dev = devlist[tmp]; 419 if (device_get_state(dev) == DS_NOTPRESENT && 420 device_probe_and_attach(dev) == 0) 421 wake++; 422 } 423 free(devlist, M_TEMP); 424 425 if (wake > 0) { 426 mtx_lock(&sc->mtx); 427 cv_signal(&sc->cv); 428 mtx_unlock(&sc->mtx); 429 } 430 } 431 432 void 433 cbb_child_detached(device_t brdev, device_t child) 434 { 435 struct cbb_softc *sc = device_get_softc(brdev); 436 437 if (child == sc->cbdev) 438 sc->cbdev = NULL; 439 else if (child == sc->exca[0].pccarddev) 440 sc->exca[0].pccarddev = NULL; 441 else 442 device_printf(brdev, "Unknown child detached: %s\n", 443 device_get_nameunit(child)); 444 } 445 446 /************************************************************************/ 447 /* Kthreads */ 448 /************************************************************************/ 449 450 void 451 cbb_event_thread(void *arg) 452 { 453 struct cbb_softc *sc = arg; 454 uint32_t status; 455 int err; 456 int not_a_card = 0; 457 458 mtx_lock(&sc->mtx); 459 sc->flags |= CBB_KTHREAD_RUNNING; 460 mtx_unlock(&sc->mtx); 461 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 462 /* 463 * We take out Giant here because we need it deep, 464 * down in the bowels of the vm system for mapping the 465 * memory we need to read the CIS. In addition, since 466 * we are adding/deleting devices from the dev tree, 467 * and that code isn't MP safe, we have to hold Giant. 468 */ 469 mtx_lock(&Giant); 470 status = cbb_get(sc, CBB_SOCKET_STATE); 471 DPRINTF(("Status is 0x%x\n", status)); 472 if (!CBB_CARD_PRESENT(status)) { 473 not_a_card = 0; /* We know card type */ 474 cbb_removal(sc); 475 } else if (status & CBB_STATE_NOT_A_CARD) { 476 /* 477 * Up to 20 times, try to rescan the card when we 478 * see NOT_A_CARD. 479 */ 480 if (not_a_card++ < 20) { 481 DEVPRINTF((sc->dev, 482 "Not a card bit set, rescanning\n")); 483 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 484 } else { 485 device_printf(sc->dev, 486 "Can't determine card type\n"); 487 } 488 } else { 489 not_a_card = 0; /* We know card type */ 490 cbb_insert(sc); 491 } 492 mtx_unlock(&Giant); 493 494 /* 495 * Wait until it has been 1s since the last time we 496 * get an interrupt. We handle the rest of the interrupt 497 * at the top of the loop. Although we clear the bit in the 498 * ISR, we signal sc->cv from the detach path after we've 499 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 500 * 1s sleep here. 501 * 502 * In our ISR, we turn off the card changed interrupt. Turn 503 * them back on here before we wait for them to happen. We 504 * turn them on/off so that we can tolerate a large latency 505 * between the time we signal cbb_event_thread and it gets 506 * a chance to run. 507 */ 508 mtx_lock(&sc->mtx); 509 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 510 cv_wait(&sc->cv, &sc->mtx); 511 err = 0; 512 while (err != EWOULDBLOCK && 513 (sc->flags & CBB_KTHREAD_DONE) == 0) 514 err = cv_timedwait(&sc->cv, &sc->mtx, 1 * hz); 515 mtx_unlock(&sc->mtx); 516 } 517 DEVPRINTF((sc->dev, "Thread terminating\n")); 518 mtx_lock(&sc->mtx); 519 sc->flags &= ~CBB_KTHREAD_RUNNING; 520 mtx_unlock(&sc->mtx); 521 kthread_exit(0); 522 } 523 524 /************************************************************************/ 525 /* Insert/removal */ 526 /************************************************************************/ 527 528 static void 529 cbb_insert(struct cbb_softc *sc) 530 { 531 uint32_t sockevent, sockstate; 532 533 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 534 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 535 536 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 537 sockevent, sockstate)); 538 539 if (sockstate & CBB_STATE_R2_CARD) { 540 if (sc->exca[0].pccarddev) { 541 sc->flags |= CBB_16BIT_CARD; 542 exca_insert(&sc->exca[0]); 543 } else { 544 device_printf(sc->dev, 545 "16-bit card inserted, but no pccard bus.\n"); 546 } 547 } else if (sockstate & CBB_STATE_CB_CARD) { 548 if (sc->cbdev != NULL) { 549 sc->flags &= ~CBB_16BIT_CARD; 550 CARD_ATTACH_CARD(sc->cbdev); 551 } else { 552 device_printf(sc->dev, 553 "CardBus card inserted, but no cardbus bus.\n"); 554 } 555 } else { 556 /* 557 * We should power the card down, and try again a couple of 558 * times if this happens. XXX 559 */ 560 device_printf(sc->dev, "Unsupported card type detected\n"); 561 } 562 } 563 564 static void 565 cbb_removal(struct cbb_softc *sc) 566 { 567 sc->flags &= ~CBB_CARD_OK; 568 if (sc->flags & CBB_16BIT_CARD) { 569 exca_removal(&sc->exca[0]); 570 } else { 571 if (sc->cbdev != NULL) 572 CARD_DETACH_CARD(sc->cbdev); 573 } 574 cbb_destroy_res(sc); 575 } 576 577 /************************************************************************/ 578 /* Interrupt Handler */ 579 /************************************************************************/ 580 581 /* 582 * Since we touch hardware in the worst case, we don't need to use atomic 583 * ops on the CARD_OK tests. They would save us a trip to the hardware 584 * if CARD_OK was recently cleared and the caches haven't updated yet. 585 * However, an atomic op costs between 100-200 CPU cycles. On a 3GHz 586 * machine, this is about 33-66ns, whereas a trip the the hardware 587 * is about that. On slower machines, the cost is even higher, so the 588 * trip to the hardware is cheaper and achieves the same ends that 589 * a fully locked operation would give us. 590 * 591 * This is a separate routine because we'd have to use locking and/or 592 * other synchronization in cbb_intr to do this there. That would be 593 * even more expensive. 594 * 595 * I need to investigate what this means for a SMP machine with multiple 596 * CPUs servicing the ISR when an eject happens. In the case of a dirty 597 * eject, CD glitches and we might read 'card present' from the hardware 598 * due to this jitter. If we assumed that cbb_intr() ran before 599 * cbb_func_intr(), we could just check the SOCKET_MASK register and if 600 * CD changes were clear there, then we'd know the card was gone. 601 */ 602 static void 603 cbb_func_intr(void *arg) 604 { 605 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 606 struct cbb_softc *sc = ih->sc; 607 608 /* 609 * Make sure that the card is really there. 610 */ 611 if ((sc->flags & CBB_CARD_OK) == 0) 612 return; 613 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 614 sc->flags &= ~CBB_CARD_OK; 615 return; 616 } 617 618 /* 619 * nb: don't have to check for giant or not, since that's done 620 * in the ISR dispatch 621 */ 622 (*ih->intr)(ih->arg); 623 } 624 625 /************************************************************************/ 626 /* Generic Power functions */ 627 /************************************************************************/ 628 629 static uint32_t 630 cbb_detect_voltage(device_t brdev) 631 { 632 struct cbb_softc *sc = device_get_softc(brdev); 633 uint32_t psr; 634 uint32_t vol = CARD_UKN_CARD; 635 636 psr = cbb_get(sc, CBB_SOCKET_STATE); 637 638 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 639 vol |= CARD_5V_CARD; 640 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 641 vol |= CARD_3V_CARD; 642 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 643 vol |= CARD_XV_CARD; 644 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 645 vol |= CARD_YV_CARD; 646 647 return (vol); 648 } 649 650 static uint8_t 651 cbb_o2micro_power_hack(struct cbb_softc *sc) 652 { 653 uint8_t reg; 654 655 /* 656 * Issue #2: INT# not qualified with IRQ Routing Bit. An 657 * unexpected PCI INT# may be generated during PC Card 658 * initialization even with the IRQ Routing Bit Set with some 659 * PC Cards. 660 * 661 * This is a two part issue. The first part is that some of 662 * our older controllers have an issue in which the slot's PCI 663 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 664 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 665 * is selected (ExCA register 03h bits 3:0, of the slot, are 666 * cleared) we will generate INT# if IREQ# is asserted. The 667 * second part is because some PC Cards prematurally assert 668 * IREQ# before the ExCA registers are fully programmed. This 669 * in turn asserts INT# because ExCA register 03h bits 3:0 670 * (ISA IRQ Select) are not yet programmed. 671 * 672 * The fix for this issue, which will work for any controller 673 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 674 * (select IRQ1), of the slot, before turning on slot power. 675 * Selecting IRQ1 will result in INT# NOT being asserted 676 * (because IRQ1 is selected), and IRQ1 won't be asserted 677 * because our controllers don't generate IRQ1. 678 * 679 * Other, non O2Micro controllers will generate irq 1 in some 680 * situations, so we can't do this hack for everybody. Reports of 681 * keyboard controller's interrupts being suppressed occurred when 682 * we did this. 683 */ 684 reg = exca_getb(&sc->exca[0], EXCA_INTR); 685 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 686 return (reg); 687 } 688 689 /* 690 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 691 * we don't have an interrupt storm on power on. This has the efect of 692 * disabling card status change interrupts for the duration of poweron. 693 */ 694 static void 695 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 696 { 697 exca_putb(&sc->exca[0], EXCA_INTR, reg); 698 } 699 700 int 701 cbb_power(device_t brdev, int volts) 702 { 703 uint32_t status, sock_ctrl, mask; 704 struct cbb_softc *sc = device_get_softc(brdev); 705 int cnt, sane; 706 int retval = 0; 707 int on = 0; 708 uint8_t reg = 0; 709 710 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 711 712 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 713 switch (volts & CARD_VCCMASK) { 714 case 5: 715 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 716 on++; 717 break; 718 case 3: 719 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 720 on++; 721 break; 722 case XV: 723 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 724 on++; 725 break; 726 case YV: 727 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 728 on++; 729 break; 730 case 0: 731 break; 732 default: 733 return (0); /* power NEVER changed */ 734 } 735 736 /* VPP == VCC */ 737 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 738 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 739 740 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 741 return (1); /* no change necessary */ 742 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 743 if (volts != 0 && sc->chipset == CB_O2MICRO) 744 reg = cbb_o2micro_power_hack(sc); 745 746 /* 747 * We have to mask the card change detect interrupt while we're 748 * messing with the power. It is allowed to bounce while we're 749 * messing with power as things settle down. In addition, we mask off 750 * the card's function interrupt by routing it via the ISA bus. This 751 * bit generally only affects 16bit cards. Some bridges allow one to 752 * set another bit to have it also affect 32bit cards. Since 32bit 753 * cards are required to be better behaved, we don't bother to get 754 * into those bridge specific features. 755 */ 756 mask = cbb_get(sc, CBB_SOCKET_MASK); 757 mask |= CBB_SOCKET_MASK_POWER; 758 mask &= ~CBB_SOCKET_MASK_CD; 759 cbb_set(sc, CBB_SOCKET_MASK, mask); 760 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 761 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 762 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 763 if (on) { 764 mtx_lock(&sc->mtx); 765 cnt = sc->powerintr; 766 sane = 200; 767 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 768 cnt == sc->powerintr && sane-- > 0) 769 cv_timedwait(&sc->powercv, &sc->mtx, hz / 10); 770 mtx_unlock(&sc->mtx); 771 if (sane <= 0) 772 device_printf(sc->dev, "power timeout, doom?\n"); 773 } 774 775 /* 776 * After the power is good, we can turn off the power interrupt. 777 * However, the PC Card standard says that we must delay turning the 778 * CD bit back on for a bit to allow for bouncyness on power down 779 * (recall that we don't wait above for a power down, since we don't 780 * get an interrupt for that). We're called either from the suspend 781 * code in which case we don't want to turn card change on again, or 782 * we're called from the card insertion code, in which case the cbb 783 * thread will turn it on for us before it waits to be woken by a 784 * change event. 785 */ 786 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 787 status = cbb_get(sc, CBB_SOCKET_STATE); 788 if (on) { 789 if ((status & CBB_STATE_POWER_CYCLE) == 0) 790 device_printf(sc->dev, "Power not on?\n"); 791 } 792 if (status & CBB_STATE_BAD_VCC_REQ) { 793 device_printf(sc->dev, "Bad Vcc requested\n"); 794 /* XXX Do we want to do something to mitigate things here? */ 795 goto done; 796 } 797 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 798 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 799 retval = 1; 800 done:; 801 if (volts != 0 && sc->chipset == CB_O2MICRO) 802 cbb_o2micro_power_hack2(sc, reg); 803 return (retval); 804 } 805 806 static int 807 cbb_current_voltage(device_t brdev) 808 { 809 struct cbb_softc *sc = device_get_softc(brdev); 810 uint32_t ctrl; 811 812 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 813 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 814 case CBB_SOCKET_CTRL_VCC_5V: 815 return CARD_5V_CARD; 816 case CBB_SOCKET_CTRL_VCC_3V: 817 return CARD_3V_CARD; 818 case CBB_SOCKET_CTRL_VCC_XV: 819 return CARD_XV_CARD; 820 case CBB_SOCKET_CTRL_VCC_YV: 821 return CARD_YV_CARD; 822 } 823 return 0; 824 } 825 826 /* 827 * detect the voltage for the card, and set it. Since the power 828 * used is the square of the voltage, lower voltages is a big win 829 * and what Windows does (and what Microsoft prefers). The MS paper 830 * also talks about preferring the CIS entry as well, but that has 831 * to be done elsewhere. We also optimize power sequencing here 832 * and don't change things if we're already powered up at a supported 833 * voltage. 834 * 835 * In addition, we power up with OE disabled. We'll set it later 836 * in the power up sequence. 837 */ 838 static int 839 cbb_do_power(device_t brdev) 840 { 841 struct cbb_softc *sc = device_get_softc(brdev); 842 uint32_t voltage, curpwr; 843 uint32_t status; 844 845 /* Don't enable OE (output enable) until power stable */ 846 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 847 848 voltage = cbb_detect_voltage(brdev); 849 curpwr = cbb_current_voltage(brdev); 850 status = cbb_get(sc, CBB_SOCKET_STATE); 851 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 852 return 0; 853 /* Prefer lowest voltage supported */ 854 cbb_power(brdev, CARD_OFF); 855 if (voltage & CARD_YV_CARD) 856 cbb_power(brdev, CARD_VCC(YV)); 857 else if (voltage & CARD_XV_CARD) 858 cbb_power(brdev, CARD_VCC(XV)); 859 else if (voltage & CARD_3V_CARD) 860 cbb_power(brdev, CARD_VCC(3)); 861 else if (voltage & CARD_5V_CARD) 862 cbb_power(brdev, CARD_VCC(5)); 863 else { 864 device_printf(brdev, "Unknown card voltage\n"); 865 return (ENXIO); 866 } 867 return (0); 868 } 869 870 /************************************************************************/ 871 /* CardBus power functions */ 872 /************************************************************************/ 873 874 static void 875 cbb_cardbus_reset(device_t brdev) 876 { 877 struct cbb_softc *sc = device_get_softc(brdev); 878 int delay; 879 880 /* 881 * 20ms is necessary for most bridges. For some reason, the Ricoh 882 * RF5C47x bridges need 400ms. 883 */ 884 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 885 886 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 887 888 tsleep(sc, PZERO, "cbbP3", hz * delay / 1000); 889 890 /* If a card exists, unreset it! */ 891 if (CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 892 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 893 &~CBBM_BRIDGECTRL_RESET, 2); 894 tsleep(sc, PZERO, "cbbP4", hz * delay / 1000); 895 } 896 } 897 898 static int 899 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 900 { 901 struct cbb_softc *sc = device_get_softc(brdev); 902 int err; 903 904 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 905 return (ENODEV); 906 907 err = cbb_do_power(brdev); 908 if (err) 909 return (err); 910 cbb_cardbus_reset(brdev); 911 return (0); 912 } 913 914 static void 915 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 916 { 917 cbb_power(brdev, CARD_OFF); 918 cbb_cardbus_reset(brdev); 919 } 920 921 /************************************************************************/ 922 /* CardBus Resource */ 923 /************************************************************************/ 924 925 static int 926 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 927 { 928 int basereg; 929 int limitreg; 930 931 if ((win < 0) || (win > 1)) { 932 DEVPRINTF((brdev, 933 "cbb_cardbus_io_open: window out of range %d\n", win)); 934 return (EINVAL); 935 } 936 937 basereg = win * 8 + CBBR_IOBASE0; 938 limitreg = win * 8 + CBBR_IOLIMIT0; 939 940 pci_write_config(brdev, basereg, start, 4); 941 pci_write_config(brdev, limitreg, end, 4); 942 return (0); 943 } 944 945 static int 946 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 947 { 948 int basereg; 949 int limitreg; 950 951 if ((win < 0) || (win > 1)) { 952 DEVPRINTF((brdev, 953 "cbb_cardbus_mem_open: window out of range %d\n", win)); 954 return (EINVAL); 955 } 956 957 basereg = win*8 + CBBR_MEMBASE0; 958 limitreg = win*8 + CBBR_MEMLIMIT0; 959 960 pci_write_config(brdev, basereg, start, 4); 961 pci_write_config(brdev, limitreg, end, 4); 962 return (0); 963 } 964 965 #define START_NONE 0xffffffff 966 #define END_NONE 0 967 968 static void 969 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 970 { 971 uint32_t starts[2]; 972 uint32_t ends[2]; 973 struct cbb_reslist *rle; 974 int align, i; 975 uint32_t reg; 976 977 starts[0] = starts[1] = START_NONE; 978 ends[0] = ends[1] = END_NONE; 979 980 if (type == SYS_RES_MEMORY) 981 align = CBB_MEMALIGN; 982 else if (type == SYS_RES_IOPORT) 983 align = CBB_IOALIGN; 984 else 985 align = 1; 986 987 SLIST_FOREACH(rle, &sc->rl, link) { 988 if (rle->type != type) 989 continue; 990 if (rle->res == NULL) 991 continue; 992 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 993 continue; 994 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 995 i = 1; 996 else 997 i = 0; 998 if (rman_get_start(rle->res) < starts[i]) 999 starts[i] = rman_get_start(rle->res); 1000 if (rman_get_end(rle->res) > ends[i]) 1001 ends[i] = rman_get_end(rle->res); 1002 } 1003 for (i = 0; i < 2; i++) { 1004 if (starts[i] == START_NONE) 1005 continue; 1006 starts[i] &= ~(align - 1); 1007 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1008 } 1009 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1010 if (starts[0] < starts[1]) { 1011 if (ends[0] > starts[1]) { 1012 device_printf(sc->dev, "Overlapping ranges" 1013 " for prefetch and non-prefetch memory\n"); 1014 return; 1015 } 1016 } else { 1017 if (ends[1] > starts[0]) { 1018 device_printf(sc->dev, "Overlapping ranges" 1019 " for prefetch and non-prefetch memory\n"); 1020 return; 1021 } 1022 } 1023 } 1024 1025 if (type == SYS_RES_MEMORY) { 1026 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1027 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1028 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1029 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1030 CBBM_BRIDGECTRL_PREFETCH_1); 1031 if (starts[1] != START_NONE) 1032 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1033 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1034 if (bootverbose) { 1035 device_printf(sc->dev, "Opening memory:\n"); 1036 if (starts[0] != START_NONE) 1037 device_printf(sc->dev, "Normal: %#x-%#x\n", 1038 starts[0], ends[0]); 1039 if (starts[1] != START_NONE) 1040 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1041 starts[1], ends[1]); 1042 } 1043 } else if (type == SYS_RES_IOPORT) { 1044 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1045 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1046 if (bootverbose && starts[0] != START_NONE) 1047 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1048 starts[0], ends[0]); 1049 } 1050 } 1051 1052 static int 1053 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1054 int rid, struct resource *res) 1055 { 1056 int ret; 1057 1058 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1059 type, rid, res); 1060 if (ret != 0) 1061 return (ret); 1062 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1063 return (0); 1064 } 1065 1066 static int 1067 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1068 int rid, struct resource *res) 1069 { 1070 int ret; 1071 1072 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1073 type, rid, res); 1074 if (ret != 0) 1075 return (ret); 1076 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1077 return (0); 1078 } 1079 1080 static struct resource * 1081 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1082 int *rid, u_long start, u_long end, u_long count, u_int flags) 1083 { 1084 struct cbb_softc *sc = device_get_softc(brdev); 1085 int tmp; 1086 struct resource *res; 1087 u_long align; 1088 1089 switch (type) { 1090 case SYS_RES_IRQ: 1091 tmp = rman_get_start(sc->irq_res); 1092 if (start > tmp || end < tmp || count != 1) { 1093 device_printf(child, "requested interrupt %ld-%ld," 1094 "count = %ld not supported by cbb\n", 1095 start, end, count); 1096 return (NULL); 1097 } 1098 start = end = tmp; 1099 flags |= RF_SHAREABLE; 1100 break; 1101 case SYS_RES_IOPORT: 1102 if (start <= cbb_start_32_io) 1103 start = cbb_start_32_io; 1104 if (end < start) 1105 end = start; 1106 if (count > (1 << RF_ALIGNMENT(flags))) 1107 flags = (flags & ~RF_ALIGNMENT_MASK) | 1108 rman_make_alignment_flags(count); 1109 break; 1110 case SYS_RES_MEMORY: 1111 if (start <= cbb_start_mem) 1112 start = cbb_start_mem; 1113 if (end < start) 1114 end = start; 1115 if (count < CBB_MEMALIGN) 1116 align = CBB_MEMALIGN; 1117 else 1118 align = count; 1119 if (align > (1 << RF_ALIGNMENT(flags))) 1120 flags = (flags & ~RF_ALIGNMENT_MASK) | 1121 rman_make_alignment_flags(align); 1122 break; 1123 } 1124 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1125 start, end, count, flags & ~RF_ACTIVE); 1126 if (res == NULL) { 1127 printf("cbb alloc res fail\n"); 1128 return (NULL); 1129 } 1130 cbb_insert_res(sc, res, type, *rid); 1131 if (flags & RF_ACTIVE) 1132 if (bus_activate_resource(child, type, *rid, res) != 0) { 1133 bus_release_resource(child, type, *rid, res); 1134 return (NULL); 1135 } 1136 1137 return (res); 1138 } 1139 1140 static int 1141 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1142 int rid, struct resource *res) 1143 { 1144 struct cbb_softc *sc = device_get_softc(brdev); 1145 int error; 1146 1147 if (rman_get_flags(res) & RF_ACTIVE) { 1148 error = bus_deactivate_resource(child, type, rid, res); 1149 if (error != 0) 1150 return (error); 1151 } 1152 cbb_remove_res(sc, res); 1153 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1154 type, rid, res)); 1155 } 1156 1157 /************************************************************************/ 1158 /* PC Card Power Functions */ 1159 /************************************************************************/ 1160 1161 static int 1162 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1163 { 1164 struct cbb_softc *sc = device_get_softc(brdev); 1165 int err; 1166 1167 DPRINTF(("cbb_pcic_socket_enable:\n")); 1168 1169 /* power down/up the socket to reset */ 1170 err = cbb_do_power(brdev); 1171 if (err) 1172 return (err); 1173 exca_reset(&sc->exca[0], child); 1174 1175 return (0); 1176 } 1177 1178 static void 1179 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1180 { 1181 struct cbb_softc *sc = device_get_softc(brdev); 1182 1183 DPRINTF(("cbb_pcic_socket_disable\n")); 1184 1185 /* Turn off the card's interrupt and leave it in reset */ 1186 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1187 tsleep(sc, PZERO, "cbbP1", hz / 100); 1188 1189 /* power down the socket */ 1190 cbb_power(brdev, CARD_OFF); 1191 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1192 1193 /* wait 300ms until power fails (Tpf). */ 1194 tsleep(sc, PZERO, "cbbP1", hz * 300 / 1000); 1195 } 1196 1197 /************************************************************************/ 1198 /* POWER methods */ 1199 /************************************************************************/ 1200 1201 int 1202 cbb_power_enable_socket(device_t brdev, device_t child) 1203 { 1204 struct cbb_softc *sc = device_get_softc(brdev); 1205 1206 if (sc->flags & CBB_16BIT_CARD) 1207 return (cbb_pcic_power_enable_socket(brdev, child)); 1208 else 1209 return (cbb_cardbus_power_enable_socket(brdev, child)); 1210 } 1211 1212 void 1213 cbb_power_disable_socket(device_t brdev, device_t child) 1214 { 1215 struct cbb_softc *sc = device_get_softc(brdev); 1216 if (sc->flags & CBB_16BIT_CARD) 1217 cbb_pcic_power_disable_socket(brdev, child); 1218 else 1219 cbb_cardbus_power_disable_socket(brdev, child); 1220 } 1221 1222 static int 1223 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1224 struct resource *res) 1225 { 1226 struct cbb_softc *sc = device_get_softc(brdev); 1227 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1228 } 1229 1230 static int 1231 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1232 int rid, struct resource *res) 1233 { 1234 struct cbb_softc *sc = device_get_softc(brdev); 1235 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1236 } 1237 1238 static struct resource * 1239 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1240 u_long start, u_long end, u_long count, u_int flags) 1241 { 1242 struct resource *res = NULL; 1243 struct cbb_softc *sc = device_get_softc(brdev); 1244 int align; 1245 int tmp; 1246 1247 switch (type) { 1248 case SYS_RES_MEMORY: 1249 if (start < cbb_start_mem) 1250 start = cbb_start_mem; 1251 if (end < start) 1252 end = start; 1253 if (count < CBB_MEMALIGN) 1254 align = CBB_MEMALIGN; 1255 else 1256 align = count; 1257 if (align > (1 << RF_ALIGNMENT(flags))) 1258 flags = (flags & ~RF_ALIGNMENT_MASK) | 1259 rman_make_alignment_flags(align); 1260 break; 1261 case SYS_RES_IOPORT: 1262 if (start < cbb_start_16_io) 1263 start = cbb_start_16_io; 1264 if (end < start) 1265 end = start; 1266 break; 1267 case SYS_RES_IRQ: 1268 tmp = rman_get_start(sc->irq_res); 1269 if (start > tmp || end < tmp || count != 1) { 1270 device_printf(child, "requested interrupt %ld-%ld," 1271 "count = %ld not supported by cbb\n", 1272 start, end, count); 1273 return (NULL); 1274 } 1275 flags |= RF_SHAREABLE; 1276 start = end = rman_get_start(sc->irq_res); 1277 break; 1278 } 1279 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1280 start, end, count, flags & ~RF_ACTIVE); 1281 if (res == NULL) 1282 return (NULL); 1283 cbb_insert_res(sc, res, type, *rid); 1284 if (flags & RF_ACTIVE) { 1285 if (bus_activate_resource(child, type, *rid, res) != 0) { 1286 bus_release_resource(child, type, *rid, res); 1287 return (NULL); 1288 } 1289 } 1290 1291 return (res); 1292 } 1293 1294 static int 1295 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1296 int rid, struct resource *res) 1297 { 1298 struct cbb_softc *sc = device_get_softc(brdev); 1299 int error; 1300 1301 if (rman_get_flags(res) & RF_ACTIVE) { 1302 error = bus_deactivate_resource(child, type, rid, res); 1303 if (error != 0) 1304 return (error); 1305 } 1306 cbb_remove_res(sc, res); 1307 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1308 type, rid, res)); 1309 } 1310 1311 /************************************************************************/ 1312 /* PC Card methods */ 1313 /************************************************************************/ 1314 1315 int 1316 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1317 uint32_t flags) 1318 { 1319 struct cbb_softc *sc = device_get_softc(brdev); 1320 struct resource *res; 1321 1322 if (type != SYS_RES_MEMORY) 1323 return (EINVAL); 1324 res = cbb_find_res(sc, type, rid); 1325 if (res == NULL) { 1326 device_printf(brdev, 1327 "set_res_flags: specified rid not found\n"); 1328 return (ENOENT); 1329 } 1330 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1331 } 1332 1333 int 1334 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1335 uint32_t cardaddr, uint32_t *deltap) 1336 { 1337 struct cbb_softc *sc = device_get_softc(brdev); 1338 struct resource *res; 1339 1340 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1341 if (res == NULL) { 1342 device_printf(brdev, 1343 "set_memory_offset: specified rid not found\n"); 1344 return (ENOENT); 1345 } 1346 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1347 } 1348 1349 /************************************************************************/ 1350 /* BUS Methods */ 1351 /************************************************************************/ 1352 1353 1354 int 1355 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1356 struct resource *r) 1357 { 1358 struct cbb_softc *sc = device_get_softc(brdev); 1359 1360 if (sc->flags & CBB_16BIT_CARD) 1361 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1362 else 1363 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1364 r)); 1365 } 1366 1367 int 1368 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1369 int rid, struct resource *r) 1370 { 1371 struct cbb_softc *sc = device_get_softc(brdev); 1372 1373 if (sc->flags & CBB_16BIT_CARD) 1374 return (cbb_pcic_deactivate_resource(brdev, child, type, 1375 rid, r)); 1376 else 1377 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1378 rid, r)); 1379 } 1380 1381 struct resource * 1382 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1383 u_long start, u_long end, u_long count, u_int flags) 1384 { 1385 struct cbb_softc *sc = device_get_softc(brdev); 1386 1387 if (sc->flags & CBB_16BIT_CARD) 1388 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1389 start, end, count, flags)); 1390 else 1391 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1392 start, end, count, flags)); 1393 } 1394 1395 int 1396 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1397 struct resource *r) 1398 { 1399 struct cbb_softc *sc = device_get_softc(brdev); 1400 1401 if (sc->flags & CBB_16BIT_CARD) 1402 return (cbb_pcic_release_resource(brdev, child, type, 1403 rid, r)); 1404 else 1405 return (cbb_cardbus_release_resource(brdev, child, type, 1406 rid, r)); 1407 } 1408 1409 int 1410 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1411 { 1412 struct cbb_softc *sc = device_get_softc(brdev); 1413 1414 switch (which) { 1415 case PCIB_IVAR_BUS: 1416 *result = sc->secbus; 1417 return (0); 1418 } 1419 return (ENOENT); 1420 } 1421 1422 int 1423 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1424 { 1425 struct cbb_softc *sc = device_get_softc(brdev); 1426 1427 switch (which) { 1428 case PCIB_IVAR_BUS: 1429 sc->secbus = value; 1430 return (0); 1431 } 1432 return (ENOENT); 1433 } 1434 1435 int 1436 cbb_suspend(device_t self) 1437 { 1438 int error = 0; 1439 struct cbb_softc *sc = device_get_softc(self); 1440 1441 error = bus_generic_suspend(self); 1442 if (error != 0) 1443 return (error); 1444 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1445 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */ 1446 return (0); 1447 } 1448 1449 int 1450 cbb_resume(device_t self) 1451 { 1452 int error = 0; 1453 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1454 uint32_t tmp; 1455 1456 /* 1457 * Some BIOSes will not save the BARs for the pci chips, so we 1458 * must do it ourselves. If the BAR is reset to 0 for an I/O 1459 * device, it will read back as 0x1, so no explicit test for 1460 * memory devices are needed. 1461 * 1462 * Note: The PCI bus code should do this automatically for us on 1463 * suspend/resume, but until it does, we have to cope. 1464 */ 1465 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1466 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1467 rman_get_start(sc->base_res))); 1468 1469 sc->chipinit(sc); 1470 1471 /* reset interrupt -- Do we really need to do this? */ 1472 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1473 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1474 1475 /* CSC Interrupt: Card detect interrupt on */ 1476 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1477 1478 /* Signal the thread to wakeup. */ 1479 mtx_lock(&sc->mtx); 1480 cv_signal(&sc->cv); 1481 mtx_unlock(&sc->mtx); 1482 1483 error = bus_generic_resume(self); 1484 1485 return (error); 1486 } 1487 1488 int 1489 cbb_child_present(device_t self) 1490 { 1491 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1492 uint32_t sockstate; 1493 1494 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1495 return (CBB_CARD_PRESENT(sockstate) && 1496 (sc->flags & CBB_CARD_OK) == CBB_CARD_OK); 1497 } 1498