xref: /freebsd/sys/dev/pccbb/pccbb.c (revision c6ec7d31830ab1c80edae95ad5e4b9dba10c47ac)
1 /*-
2  * Copyright (c) 2002-2004 M. Warner Losh.
3  * Copyright (c) 2000-2001 Jonathan Chen.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  */
28 
29 /*-
30  * Copyright (c) 1998, 1999 and 2000
31  *      HAYAKAWA Koichi.  All rights reserved.
32  *
33  * Redistribution and use in source and binary forms, with or without
34  * modification, are permitted provided that the following conditions
35  * are met:
36  * 1. Redistributions of source code must retain the above copyright
37  *    notice, this list of conditions and the following disclaimer.
38  * 2. Redistributions in binary form must reproduce the above copyright
39  *    notice, this list of conditions and the following disclaimer in the
40  *    documentation and/or other materials provided with the distribution.
41  * 3. All advertising materials mentioning features or use of this software
42  *    must display the following acknowledgement:
43  *	This product includes software developed by HAYAKAWA Koichi.
44  * 4. The name of the author may not be used to endorse or promote products
45  *    derived from this software without specific prior written permission.
46  *
47  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57  */
58 
59 /*
60  * Driver for PCI to CardBus Bridge chips
61  * and PCI to PCMCIA Bridge chips
62  * and ISA to PCMCIA host adapters
63  * and C Bus to PCMCIA host adapters
64  *
65  * References:
66  *  TI Datasheets:
67  *   http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
68  *
69  * Written by Jonathan Chen <jon@freebsd.org>
70  * The author would like to acknowledge:
71  *  * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
72  *  * Warner Losh: Newbus/newcard guru and author of the pccard side of things
73  *  * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
74  *  * David Cross: Author of the initial ugly hack for a specific cardbus card
75  */
76 
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
79 
80 #include <sys/param.h>
81 #include <sys/bus.h>
82 #include <sys/condvar.h>
83 #include <sys/errno.h>
84 #include <sys/kernel.h>
85 #include <sys/module.h>
86 #include <sys/kthread.h>
87 #include <sys/interrupt.h>
88 #include <sys/lock.h>
89 #include <sys/malloc.h>
90 #include <sys/mutex.h>
91 #include <sys/proc.h>
92 #include <sys/rman.h>
93 #include <sys/sysctl.h>
94 #include <sys/systm.h>
95 #include <machine/bus.h>
96 #include <machine/resource.h>
97 
98 #include <dev/pci/pcireg.h>
99 #include <dev/pci/pcivar.h>
100 
101 #include <dev/pccard/pccardreg.h>
102 #include <dev/pccard/pccardvar.h>
103 
104 #include <dev/exca/excareg.h>
105 #include <dev/exca/excavar.h>
106 
107 #include <dev/pccbb/pccbbreg.h>
108 #include <dev/pccbb/pccbbvar.h>
109 
110 #include "power_if.h"
111 #include "card_if.h"
112 #include "pcib_if.h"
113 
114 #define	DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
115 #define	DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
116 
117 #define	PCI_MASK_CONFIG(DEV,REG,MASK,SIZE)				\
118 	pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
119 #define	PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE)			\
120 	pci_write_config(DEV, REG, (					\
121 		pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
122 
123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0)
124 
125 #define CBB_START_MEM	0x88000000
126 #define CBB_START_32_IO 0x1000
127 #define CBB_START_16_IO 0x100
128 
129 devclass_t cbb_devclass;
130 
131 /* sysctl vars */
132 static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
133 
134 /* There's no way to say TUNEABLE_LONG to get the right types */
135 u_long cbb_start_mem = CBB_START_MEM;
136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem);
137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
138     &cbb_start_mem, CBB_START_MEM,
139     "Starting address for memory allocations");
140 
141 u_long cbb_start_16_io = CBB_START_16_IO;
142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io);
143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
144     &cbb_start_16_io, CBB_START_16_IO,
145     "Starting ioport for 16-bit cards");
146 
147 u_long cbb_start_32_io = CBB_START_32_IO;
148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io);
149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
150     &cbb_start_32_io, CBB_START_32_IO,
151     "Starting ioport for 32-bit cards");
152 
153 int cbb_debug = 0;
154 TUNABLE_INT("hw.cbb.debug", &cbb_debug);
155 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0,
156     "Verbose cardbus bridge debugging");
157 
158 static void	cbb_insert(struct cbb_softc *sc);
159 static void	cbb_removal(struct cbb_softc *sc);
160 static uint32_t	cbb_detect_voltage(device_t brdev);
161 static void	cbb_cardbus_reset_power(device_t brdev, device_t child, int on);
162 static int	cbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
163 		    uint32_t end);
164 static int	cbb_cardbus_mem_open(device_t brdev, int win,
165 		    uint32_t start, uint32_t end);
166 static void	cbb_cardbus_auto_open(struct cbb_softc *sc, int type);
167 static int	cbb_cardbus_activate_resource(device_t brdev, device_t child,
168 		    int type, int rid, struct resource *res);
169 static int	cbb_cardbus_deactivate_resource(device_t brdev,
170 		    device_t child, int type, int rid, struct resource *res);
171 static struct resource	*cbb_cardbus_alloc_resource(device_t brdev,
172 		    device_t child, int type, int *rid, u_long start,
173 		    u_long end, u_long count, u_int flags);
174 static int	cbb_cardbus_release_resource(device_t brdev, device_t child,
175 		    int type, int rid, struct resource *res);
176 static int	cbb_cardbus_power_enable_socket(device_t brdev,
177 		    device_t child);
178 static int	cbb_cardbus_power_disable_socket(device_t brdev,
179 		    device_t child);
180 static int	cbb_func_filt(void *arg);
181 static void	cbb_func_intr(void *arg);
182 
183 static void
184 cbb_remove_res(struct cbb_softc *sc, struct resource *res)
185 {
186 	struct cbb_reslist *rle;
187 
188 	SLIST_FOREACH(rle, &sc->rl, link) {
189 		if (rle->res == res) {
190 			SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link);
191 			free(rle, M_DEVBUF);
192 			return;
193 		}
194 	}
195 }
196 
197 static struct resource *
198 cbb_find_res(struct cbb_softc *sc, int type, int rid)
199 {
200 	struct cbb_reslist *rle;
201 
202 	SLIST_FOREACH(rle, &sc->rl, link)
203 		if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
204 			return (rle->res);
205 	return (NULL);
206 }
207 
208 static void
209 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type,
210     int rid)
211 {
212 	struct cbb_reslist *rle;
213 
214 	/*
215 	 * Need to record allocated resource so we can iterate through
216 	 * it later.
217 	 */
218 	rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT);
219 	if (rle == NULL)
220 		panic("cbb_cardbus_alloc_resource: can't record entry!");
221 	rle->res = res;
222 	rle->type = type;
223 	rle->rid = rid;
224 	SLIST_INSERT_HEAD(&sc->rl, rle, link);
225 }
226 
227 static void
228 cbb_destroy_res(struct cbb_softc *sc)
229 {
230 	struct cbb_reslist *rle;
231 
232 	while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
233 		device_printf(sc->dev, "Danger Will Robinson: Resource "
234 		    "left allocated!  This is a bug... "
235 		    "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type,
236 		    rman_get_start(rle->res));
237 		SLIST_REMOVE_HEAD(&sc->rl, link);
238 		free(rle, M_DEVBUF);
239 	}
240 }
241 
242 /*
243  * Disable function interrupts by telling the bridge to generate IRQ1
244  * interrupts.  These interrupts aren't really generated by the chip, since
245  * IRQ1 is reserved.  Some chipsets assert INTA# inappropriately during
246  * initialization, so this helps to work around the problem.
247  *
248  * XXX We can't do this workaround for all chipsets, because this
249  * XXX causes interference with the keyboard because somechipsets will
250  * XXX actually signal IRQ1 over their serial interrupt connections to
251  * XXX the south bridge.  Disable it it for now.
252  */
253 void
254 cbb_disable_func_intr(struct cbb_softc *sc)
255 {
256 #if 0
257 	uint8_t reg;
258 
259 	reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) |
260 	    EXCA_INTR_IRQ_RESERVED1;
261 	exca_putb(&sc->exca[0], EXCA_INTR, reg);
262 #endif
263 }
264 
265 /*
266  * Enable function interrupts.  We turn on function interrupts when the card
267  * requests an interrupt.  The PCMCIA standard says that we should set
268  * the lower 4 bits to 0 to route via PCI.  Note: we call this for both
269  * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus
270  * cards.
271  */
272 static void
273 cbb_enable_func_intr(struct cbb_softc *sc)
274 {
275 	uint8_t reg;
276 
277 	reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) |
278 	    EXCA_INTR_IRQ_NONE;
279 	exca_putb(&sc->exca[0], EXCA_INTR, reg);
280 }
281 
282 int
283 cbb_detach(device_t brdev)
284 {
285 	struct cbb_softc *sc = device_get_softc(brdev);
286 	device_t *devlist;
287 	int tmp, tries, error, numdevs;
288 
289 	/*
290 	 * Before we delete the children (which we have to do because
291 	 * attach doesn't check for children busses correctly), we have
292 	 * to detach the children.  Even if we didn't need to delete the
293 	 * children, we have to detach them.
294 	 */
295 	error = bus_generic_detach(brdev);
296 	if (error != 0)
297 		return (error);
298 
299 	/*
300 	 * Since the attach routine doesn't search for children before it
301 	 * attaches them to this device, we must delete them here in order
302 	 * for the kldload/unload case to work.  If we failed to do that, then
303 	 * we'd get duplicate devices when cbb.ko was reloaded.
304 	 */
305 	tries = 10;
306 	do {
307 		error = device_get_children(brdev, &devlist, &numdevs);
308 		if (error == 0)
309 			break;
310 		/*
311 		 * Try hard to cope with low memory.
312 		 */
313 		if (error == ENOMEM) {
314 			pause("cbbnomem", 1);
315 			continue;
316 		}
317 	} while (tries-- > 0);
318 	for (tmp = 0; tmp < numdevs; tmp++)
319 		device_delete_child(brdev, devlist[tmp]);
320 	free(devlist, M_TEMP);
321 
322 	/* Turn off the interrupts */
323 	cbb_set(sc, CBB_SOCKET_MASK, 0);
324 
325 	/* reset 16-bit pcmcia bus */
326 	exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET);
327 
328 	/* turn off power */
329 	cbb_power(brdev, CARD_OFF);
330 
331 	/* Ack the interrupt */
332 	cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff);
333 
334 	/*
335 	 * Wait for the thread to die.  kproc_exit will do a wakeup
336 	 * on the event thread's struct thread * so that we know it is
337 	 * safe to proceed.  IF the thread is running, set the please
338 	 * die flag and wait for it to comply.  Since the wakeup on
339 	 * the event thread happens only in kproc_exit, we don't
340 	 * need to loop here.
341 	 */
342 	bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
343 	mtx_lock(&sc->mtx);
344 	sc->flags |= CBB_KTHREAD_DONE;
345 	while (sc->flags & CBB_KTHREAD_RUNNING) {
346 		DEVPRINTF((sc->dev, "Waiting for thread to die\n"));
347 		wakeup(&sc->intrhand);
348 		msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0);
349 	}
350 	mtx_unlock(&sc->mtx);
351 
352 	bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
353 	bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
354 	    sc->base_res);
355 	mtx_destroy(&sc->mtx);
356 	return (0);
357 }
358 
359 int
360 cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
361   int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg,
362    void **cookiep)
363 {
364 	struct cbb_intrhand *ih;
365 	struct cbb_softc *sc = device_get_softc(dev);
366 	int err;
367 
368 	if (filt == NULL && intr == NULL)
369 		return (EINVAL);
370 	ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT);
371 	if (ih == NULL)
372 		return (ENOMEM);
373 	*cookiep = ih;
374 	ih->filt = filt;
375 	ih->intr = intr;
376 	ih->arg = arg;
377 	ih->sc = sc;
378 	/*
379 	 * XXX need to turn on ISA interrupts, if we ever support them, but
380 	 * XXX for now that's all we need to do.
381 	 */
382 	err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags,
383 	    filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih,
384 	    &ih->cookie);
385 	if (err != 0) {
386 		free(ih, M_DEVBUF);
387 		return (err);
388 	}
389 	cbb_enable_func_intr(sc);
390 	sc->cardok = 1;
391 	return 0;
392 }
393 
394 int
395 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
396     void *cookie)
397 {
398 	struct cbb_intrhand *ih;
399 	int err;
400 
401 	/* XXX Need to do different things for ISA interrupts. */
402 	ih = (struct cbb_intrhand *) cookie;
403 	err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq,
404 	    ih->cookie);
405 	if (err != 0)
406 		return (err);
407 	free(ih, M_DEVBUF);
408 	return (0);
409 }
410 
411 
412 void
413 cbb_driver_added(device_t brdev, driver_t *driver)
414 {
415 	struct cbb_softc *sc = device_get_softc(brdev);
416 	device_t *devlist;
417 	device_t dev;
418 	int tmp;
419 	int numdevs;
420 	int wake = 0;
421 
422 	DEVICE_IDENTIFY(driver, brdev);
423 	tmp = device_get_children(brdev, &devlist, &numdevs);
424 	if (tmp != 0) {
425 		device_printf(brdev, "Cannot get children list, no reprobe\n");
426 		return;
427 	}
428 	for (tmp = 0; tmp < numdevs; tmp++) {
429 		dev = devlist[tmp];
430 		if (device_get_state(dev) == DS_NOTPRESENT &&
431 		    device_probe_and_attach(dev) == 0)
432 			wake++;
433 	}
434 	free(devlist, M_TEMP);
435 
436 	if (wake > 0)
437 		wakeup(&sc->intrhand);
438 }
439 
440 void
441 cbb_child_detached(device_t brdev, device_t child)
442 {
443 	struct cbb_softc *sc = device_get_softc(brdev);
444 
445 	/* I'm not sure we even need this */
446 	if (child != sc->cbdev && child != sc->exca[0].pccarddev)
447 		device_printf(brdev, "Unknown child detached: %s\n",
448 		    device_get_nameunit(child));
449 }
450 
451 /************************************************************************/
452 /* Kthreads								*/
453 /************************************************************************/
454 
455 void
456 cbb_event_thread(void *arg)
457 {
458 	struct cbb_softc *sc = arg;
459 	uint32_t status;
460 	int err;
461 	int not_a_card = 0;
462 
463 	/*
464 	 * We need to act as a power sequencer on startup.  Delay 2s/channel
465 	 * to ensure the other channels have had a chance to come up.  We likely
466 	 * should add a lock that's shared on a per-slot basis so that only
467 	 * one power event can happen per slot at a time.
468 	 */
469 	pause("cbbstart", hz * device_get_unit(sc->dev) * 2);
470 	mtx_lock(&sc->mtx);
471 	sc->flags |= CBB_KTHREAD_RUNNING;
472 	while ((sc->flags & CBB_KTHREAD_DONE) == 0) {
473 		mtx_unlock(&sc->mtx);
474 		/*
475 		 * We take out Giant here because we need it deep,
476 		 * down in the bowels of the vm system for mapping the
477 		 * memory we need to read the CIS.  In addition, since
478 		 * we are adding/deleting devices from the dev tree,
479 		 * and that code isn't MP safe, we have to hold Giant.
480 		 */
481 		mtx_lock(&Giant);
482 		status = cbb_get(sc, CBB_SOCKET_STATE);
483 		DPRINTF(("Status is 0x%x\n", status));
484 		if (!CBB_CARD_PRESENT(status)) {
485 			not_a_card = 0;		/* We know card type */
486 			cbb_removal(sc);
487 		} else if (status & CBB_STATE_NOT_A_CARD) {
488 			/*
489 			 * Up to 10 times, try to rescan the card when we see
490 			 * NOT_A_CARD.  10 is somehwat arbitrary.  When this
491 			 * pathology hits, there's a ~40% chance each try will
492 			 * fail.  10 tries takes about 5s and results in a
493 			 * 99.99% certainty of the results.
494 			 */
495 			if (not_a_card++ < 10) {
496 				DEVPRINTF((sc->dev,
497 				    "Not a card bit set, rescanning\n"));
498 				cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST);
499 			} else {
500 				device_printf(sc->dev,
501 				    "Can't determine card type\n");
502 			}
503 		} else {
504 			not_a_card = 0;		/* We know card type */
505 			cbb_insert(sc);
506 		}
507 		mtx_unlock(&Giant);
508 
509 		/*
510 		 * First time through we need to tell mountroot that we're
511 		 * done.
512 		 */
513 		if (sc->sc_root_token) {
514 			root_mount_rel(sc->sc_root_token);
515 			sc->sc_root_token = NULL;
516 		}
517 
518 		/*
519 		 * Wait until it has been 250ms since the last time we
520 		 * get an interrupt.  We handle the rest of the interrupt
521 		 * at the top of the loop.  Although we clear the bit in the
522 		 * ISR, we signal sc->cv from the detach path after we've
523 		 * set the CBB_KTHREAD_DONE bit, so we can't do a simple
524 		 * 250ms sleep here.
525 		 *
526 		 * In our ISR, we turn off the card changed interrupt.  Turn
527 		 * them back on here before we wait for them to happen.  We
528 		 * turn them on/off so that we can tolerate a large latency
529 		 * between the time we signal cbb_event_thread and it gets
530 		 * a chance to run.
531 		 */
532 		mtx_lock(&sc->mtx);
533 		cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS);
534 		msleep(&sc->intrhand, &sc->mtx, 0, "-", 0);
535 		err = 0;
536 		while (err != EWOULDBLOCK &&
537 		    (sc->flags & CBB_KTHREAD_DONE) == 0)
538 			err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5);
539 	}
540 	DEVPRINTF((sc->dev, "Thread terminating\n"));
541 	sc->flags &= ~CBB_KTHREAD_RUNNING;
542 	mtx_unlock(&sc->mtx);
543 	kproc_exit(0);
544 }
545 
546 /************************************************************************/
547 /* Insert/removal							*/
548 /************************************************************************/
549 
550 static void
551 cbb_insert(struct cbb_softc *sc)
552 {
553 	uint32_t sockevent, sockstate;
554 
555 	sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
556 	sockstate = cbb_get(sc, CBB_SOCKET_STATE);
557 
558 	DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
559 	    sockevent, sockstate));
560 
561 	if (sockstate & CBB_STATE_R2_CARD) {
562 		if (device_is_attached(sc->exca[0].pccarddev)) {
563 			sc->flags |= CBB_16BIT_CARD;
564 			exca_insert(&sc->exca[0]);
565 		} else {
566 			device_printf(sc->dev,
567 			    "16-bit card inserted, but no pccard bus.\n");
568 		}
569 	} else if (sockstate & CBB_STATE_CB_CARD) {
570 		if (device_is_attached(sc->cbdev)) {
571 			sc->flags &= ~CBB_16BIT_CARD;
572 			CARD_ATTACH_CARD(sc->cbdev);
573 		} else {
574 			device_printf(sc->dev,
575 			    "CardBus card inserted, but no cardbus bus.\n");
576 		}
577 	} else {
578 		/*
579 		 * We should power the card down, and try again a couple of
580 		 * times if this happens. XXX
581 		 */
582 		device_printf(sc->dev, "Unsupported card type detected\n");
583 	}
584 }
585 
586 static void
587 cbb_removal(struct cbb_softc *sc)
588 {
589 	sc->cardok = 0;
590 	if (sc->flags & CBB_16BIT_CARD) {
591 		exca_removal(&sc->exca[0]);
592 	} else {
593 		if (device_is_attached(sc->cbdev))
594 			CARD_DETACH_CARD(sc->cbdev);
595 	}
596 	cbb_destroy_res(sc);
597 }
598 
599 /************************************************************************/
600 /* Interrupt Handler							*/
601 /************************************************************************/
602 
603 static int
604 cbb_func_filt(void *arg)
605 {
606 	struct cbb_intrhand *ih = (struct cbb_intrhand *)arg;
607 	struct cbb_softc *sc = ih->sc;
608 
609 	/*
610 	 * Make sure that the card is really there.
611 	 */
612 	if (!sc->cardok)
613 		return (FILTER_STRAY);
614 	if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
615 		sc->cardok = 0;
616 		return (FILTER_HANDLED);
617 	}
618 
619 	/*
620 	 * nb: don't have to check for giant or not, since that's done in the
621 	 * ISR dispatch and one can't hold Giant in a filter anyway...
622 	 */
623 	return ((*ih->filt)(ih->arg));
624 }
625 
626 static void
627 cbb_func_intr(void *arg)
628 {
629 	struct cbb_intrhand *ih = (struct cbb_intrhand *)arg;
630 	struct cbb_softc *sc = ih->sc;
631 
632 	/*
633 	 * While this check may seem redundant, it helps close a race
634 	 * condition.  If the card is ejected after the filter runs, but
635 	 * before this ISR can be scheduled, then we need to do the same
636 	 * filtering to prevent the card's ISR from being called.  One could
637 	 * argue that the card's ISR should be able to cope, but experience
638 	 * has shown they can't always.  This mitigates the problem by making
639 	 * the race quite a bit smaller.  Properly written client ISRs should
640 	 * cope with the card going away in the middle of the ISR.  We assume
641 	 * that drivers that are sophisticated enough to use filters don't
642 	 * need our protection.  This also allows us to ensure they *ARE*
643 	 * called if their filter said they needed to be called.
644 	 */
645 	if (ih->filt == NULL) {
646 		if (!sc->cardok)
647 			return;
648 		if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
649 			sc->cardok = 0;
650 			return;
651 		}
652 	}
653 
654 	/*
655 	 * Call the registered ithread interrupt handler.  This entire routine
656 	 * will be called with Giant if this isn't an MP safe driver, or not
657 	 * if it is.  Either way, we don't have to worry.
658 	 */
659 	ih->intr(ih->arg);
660 }
661 
662 /************************************************************************/
663 /* Generic Power functions						*/
664 /************************************************************************/
665 
666 static uint32_t
667 cbb_detect_voltage(device_t brdev)
668 {
669 	struct cbb_softc *sc = device_get_softc(brdev);
670 	uint32_t psr;
671 	uint32_t vol = CARD_UKN_CARD;
672 
673 	psr = cbb_get(sc, CBB_SOCKET_STATE);
674 
675 	if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK)
676 		vol |= CARD_5V_CARD;
677 	if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK)
678 		vol |= CARD_3V_CARD;
679 	if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK)
680 		vol |= CARD_XV_CARD;
681 	if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK)
682 		vol |= CARD_YV_CARD;
683 
684 	return (vol);
685 }
686 
687 static uint8_t
688 cbb_o2micro_power_hack(struct cbb_softc *sc)
689 {
690 	uint8_t reg;
691 
692 	/*
693 	 * Issue #2: INT# not qualified with IRQ Routing Bit.  An
694 	 * unexpected PCI INT# may be generated during PC Card
695 	 * initialization even with the IRQ Routing Bit Set with some
696 	 * PC Cards.
697 	 *
698 	 * This is a two part issue.  The first part is that some of
699 	 * our older controllers have an issue in which the slot's PCI
700 	 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh
701 	 * bit 7).  Regardless of the IRQ routing bit, if NO ISA IRQ
702 	 * is selected (ExCA register 03h bits 3:0, of the slot, are
703 	 * cleared) we will generate INT# if IREQ# is asserted.  The
704 	 * second part is because some PC Cards prematurally assert
705 	 * IREQ# before the ExCA registers are fully programmed.  This
706 	 * in turn asserts INT# because ExCA register 03h bits 3:0
707 	 * (ISA IRQ Select) are not yet programmed.
708 	 *
709 	 * The fix for this issue, which will work for any controller
710 	 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b
711 	 * (select IRQ1), of the slot, before turning on slot power.
712 	 * Selecting IRQ1 will result in INT# NOT being asserted
713 	 * (because IRQ1 is selected), and IRQ1 won't be asserted
714 	 * because our controllers don't generate IRQ1.
715 	 *
716 	 * Other, non O2Micro controllers will generate irq 1 in some
717 	 * situations, so we can't do this hack for everybody.  Reports of
718 	 * keyboard controller's interrupts being suppressed occurred when
719 	 * we did this.
720 	 */
721 	reg = exca_getb(&sc->exca[0], EXCA_INTR);
722 	exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1);
723 	return (reg);
724 }
725 
726 /*
727  * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so
728  * we don't have an interrupt storm on power on.  This has the efect of
729  * disabling card status change interrupts for the duration of poweron.
730  */
731 static void
732 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg)
733 {
734 	exca_putb(&sc->exca[0], EXCA_INTR, reg);
735 }
736 
737 int
738 cbb_power(device_t brdev, int volts)
739 {
740 	uint32_t status, sock_ctrl, reg_ctrl, mask;
741 	struct cbb_softc *sc = device_get_softc(brdev);
742 	int cnt, sane;
743 	int retval = 0;
744 	int on = 0;
745 	uint8_t reg = 0;
746 
747 	sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
748 
749 	sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
750 	switch (volts & CARD_VCCMASK) {
751 	case 5:
752 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
753 		on++;
754 		break;
755 	case 3:
756 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
757 		on++;
758 		break;
759 	case XV:
760 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV;
761 		on++;
762 		break;
763 	case YV:
764 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV;
765 		on++;
766 		break;
767 	case 0:
768 		break;
769 	default:
770 		return (0);			/* power NEVER changed */
771 	}
772 
773 	/* VPP == VCC */
774 	sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
775 	sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
776 
777 	if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
778 		return (1); /* no change necessary */
779 	DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts));
780 	if (volts != 0 && sc->chipset == CB_O2MICRO)
781 		reg = cbb_o2micro_power_hack(sc);
782 
783 	/*
784 	 * We have to mask the card change detect interrupt while we're
785 	 * messing with the power.  It is allowed to bounce while we're
786 	 * messing with power as things settle down.  In addition, we mask off
787 	 * the card's function interrupt by routing it via the ISA bus.  This
788 	 * bit generally only affects 16-bit cards.  Some bridges allow one to
789 	 * set another bit to have it also affect 32-bit cards.  Since 32-bit
790 	 * cards are required to be better behaved, we don't bother to get
791 	 * into those bridge specific features.
792 	 *
793 	 * XXX I wonder if we need to enable the READY bit interrupt in the
794 	 * EXCA CSC register for 16-bit cards, and disable the CD bit?
795 	 */
796 	mask = cbb_get(sc, CBB_SOCKET_MASK);
797 	mask |= CBB_SOCKET_MASK_POWER;
798 	mask &= ~CBB_SOCKET_MASK_CD;
799 	cbb_set(sc, CBB_SOCKET_MASK, mask);
800 	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
801 	    |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2);
802 	cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
803 	if (on) {
804 		mtx_lock(&sc->mtx);
805 		cnt = sc->powerintr;
806 		/*
807 		 * We have a shortish timeout of 500ms here.  Some bridges do
808 		 * not generate a POWER_CYCLE event for 16-bit cards.  In
809 		 * those cases, we have to cope the best we can, and having
810 		 * only a short delay is better than the alternatives.  Others
811 		 * raise the power cycle a smidge before it is really ready.
812 		 * We deal with those below.
813 		 */
814 		sane = 10;
815 		while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) &&
816 		    cnt == sc->powerintr && sane-- > 0)
817 			msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20);
818 		mtx_unlock(&sc->mtx);
819 
820 		/*
821 		 * Relax for 100ms.  Some bridges appear to assert this signal
822 		 * right away, but before the card has stabilized.  Other
823 		 * cards need need more time to cope up reliabily.
824 		 * Experiments with troublesome setups show this to be a
825 		 * "cheap" way to enhance reliabilty.  We need not do this for
826 		 * "off" since we don't touch the card after we turn it off.
827 		 */
828 		pause("cbbPwr", min(hz / 10, 1));
829 
830 		/*
831 		 * The TOPIC95B requires a little bit extra time to get its
832 		 * act together, so delay for an additional 100ms.  Also as
833 		 * documented below, it doesn't seem to set the POWER_CYCLE
834 		 * bit, so don't whine if it never came on.
835 		 */
836 		if (sc->chipset == CB_TOPIC95)
837 			pause("cbb95B", hz / 10);
838 		else if (sane <= 0)
839 			device_printf(sc->dev, "power timeout, doom?\n");
840 	}
841 
842 	/*
843 	 * After the power is good, we can turn off the power interrupt.
844 	 * However, the PC Card standard says that we must delay turning the
845 	 * CD bit back on for a bit to allow for bouncyness on power down
846 	 * (recall that we don't wait above for a power down, since we don't
847 	 * get an interrupt for that).  We're called either from the suspend
848 	 * code in which case we don't want to turn card change on again, or
849 	 * we're called from the card insertion code, in which case the cbb
850 	 * thread will turn it on for us before it waits to be woken by a
851 	 * change event.
852 	 *
853 	 * NB: Topic95B doesn't set the power cycle bit.  we assume that
854 	 * both it and the TOPIC95 behave the same.
855 	 */
856 	cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER);
857 	status = cbb_get(sc, CBB_SOCKET_STATE);
858 	if (on && sc->chipset != CB_TOPIC95) {
859 		if ((status & CBB_STATE_POWER_CYCLE) == 0)
860 			device_printf(sc->dev, "Power not on?\n");
861 	}
862 	if (status & CBB_STATE_BAD_VCC_REQ) {
863 		device_printf(sc->dev, "Bad Vcc requested\n");
864 		/*
865 		 * Turn off the power, and try again.  Retrigger other
866 		 * active interrupts via force register.  From NetBSD
867 		 * PR 36652, coded by me to description there.
868 		 */
869 		sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
870 		sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
871 		cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
872 		status &= ~CBB_STATE_BAD_VCC_REQ;
873 		status &= ~CBB_STATE_DATA_LOST;
874 		status |= CBB_FORCE_CV_TEST;
875 		cbb_set(sc, CBB_SOCKET_FORCE, status);
876 		goto done;
877 	}
878 	if (sc->chipset == CB_TOPIC97) {
879 		reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4);
880 		reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE;
881 		if (on)
882 			reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA;
883 		else
884 			reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA;
885 		pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4);
886 	}
887 	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
888 	    & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2);
889 	retval = 1;
890 done:;
891 	if (volts != 0 && sc->chipset == CB_O2MICRO)
892 		cbb_o2micro_power_hack2(sc, reg);
893 	return (retval);
894 }
895 
896 static int
897 cbb_current_voltage(device_t brdev)
898 {
899 	struct cbb_softc *sc = device_get_softc(brdev);
900 	uint32_t ctrl;
901 
902 	ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
903 	switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) {
904 	case CBB_SOCKET_CTRL_VCC_5V:
905 		return CARD_5V_CARD;
906 	case CBB_SOCKET_CTRL_VCC_3V:
907 		return CARD_3V_CARD;
908 	case CBB_SOCKET_CTRL_VCC_XV:
909 		return CARD_XV_CARD;
910 	case CBB_SOCKET_CTRL_VCC_YV:
911 		return CARD_YV_CARD;
912 	}
913 	return 0;
914 }
915 
916 /*
917  * detect the voltage for the card, and set it.  Since the power
918  * used is the square of the voltage, lower voltages is a big win
919  * and what Windows does (and what Microsoft prefers).  The MS paper
920  * also talks about preferring the CIS entry as well, but that has
921  * to be done elsewhere.  We also optimize power sequencing here
922  * and don't change things if we're already powered up at a supported
923  * voltage.
924  *
925  * In addition, we power up with OE disabled.  We'll set it later
926  * in the power up sequence.
927  */
928 static int
929 cbb_do_power(device_t brdev)
930 {
931 	struct cbb_softc *sc = device_get_softc(brdev);
932 	uint32_t voltage, curpwr;
933 	uint32_t status;
934 
935 	/* Don't enable OE (output enable) until power stable */
936 	exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE);
937 
938 	voltage = cbb_detect_voltage(brdev);
939 	curpwr = cbb_current_voltage(brdev);
940 	status = cbb_get(sc, CBB_SOCKET_STATE);
941 	if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr))
942 		return 0;
943 	/* Prefer lowest voltage supported */
944 	cbb_power(brdev, CARD_OFF);
945 	if (voltage & CARD_YV_CARD)
946 		cbb_power(brdev, CARD_VCC(YV));
947 	else if (voltage & CARD_XV_CARD)
948 		cbb_power(brdev, CARD_VCC(XV));
949 	else if (voltage & CARD_3V_CARD)
950 		cbb_power(brdev, CARD_VCC(3));
951 	else if (voltage & CARD_5V_CARD)
952 		cbb_power(brdev, CARD_VCC(5));
953 	else {
954 		device_printf(brdev, "Unknown card voltage\n");
955 		return (ENXIO);
956 	}
957 	return (0);
958 }
959 
960 /************************************************************************/
961 /* CardBus power functions						*/
962 /************************************************************************/
963 
964 static void
965 cbb_cardbus_reset_power(device_t brdev, device_t child, int on)
966 {
967 	struct cbb_softc *sc = device_get_softc(brdev);
968 	uint32_t b;
969 	int delay, count;
970 
971 	/*
972 	 * Asserting reset for 20ms is necessary for most bridges.  For some
973 	 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms.  The
974 	 * root cause of this is unknown, and NetBSD does the same thing.
975 	 */
976 	delay = sc->chipset == CB_RF5C47X ? 400 : 20;
977 	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
978 	pause("cbbP3", hz * delay / 1000);
979 
980 	/*
981 	 * If a card exists and we're turning it on, take it out of reset.
982 	 * After clearing reset, wait up to 1.1s for the first configuration
983 	 * register (vendor/product) configuration register of device 0.0 to
984 	 * become != 0xffffffff.  The PCMCIA PC Card Host System Specification
985 	 * says that when powering up the card, the PCI Spec v2.1 must be
986 	 * followed.  In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first
987 	 * Config Access) is at most 2^25 clocks, or just over 1s.  Section
988 	 * 2.2.1 states any card not ready to participate in bus transactions
989 	 * must tristate its outputs.  Therefore, any access to its
990 	 * configuration registers must be ignored.  In that state, the config
991 	 * reg will read 0xffffffff.  Section 6.2.1 states a vendor id of
992 	 * 0xffff is invalid, so this can never match a real card.  Print a
993 	 * warning if it never returns a real id.  The PCMCIA PC Card
994 	 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on
995 	 * a cardbus bus, so that's the only register we check here.
996 	 */
997 	if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
998 		/*
999 		 */
1000 		PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
1001 		    &~CBBM_BRIDGECTRL_RESET, 2);
1002 		b = pcib_get_bus(child);
1003 		count = 1100 / 20;
1004 		do {
1005 			pause("cbbP4", hz * 2 / 100);
1006 		} while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) ==
1007 		    0xfffffffful && --count >= 0);
1008 		if (count < 0)
1009 			device_printf(brdev, "Warning: Bus reset timeout\n");
1010 	}
1011 }
1012 
1013 static int
1014 cbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1015 {
1016 	struct cbb_softc *sc = device_get_softc(brdev);
1017 	int err;
1018 
1019 	if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE)))
1020 		return (ENODEV);
1021 
1022 	err = cbb_do_power(brdev);
1023 	if (err)
1024 		return (err);
1025 	cbb_cardbus_reset_power(brdev, child, 1);
1026 	return (0);
1027 }
1028 
1029 static int
1030 cbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1031 {
1032 	cbb_power(brdev, CARD_OFF);
1033 	cbb_cardbus_reset_power(brdev, child, 0);
1034 	return (0);
1035 }
1036 
1037 /************************************************************************/
1038 /* CardBus Resource							*/
1039 /************************************************************************/
1040 
1041 static int
1042 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1043 {
1044 	int basereg;
1045 	int limitreg;
1046 
1047 	if ((win < 0) || (win > 1)) {
1048 		DEVPRINTF((brdev,
1049 		    "cbb_cardbus_io_open: window out of range %d\n", win));
1050 		return (EINVAL);
1051 	}
1052 
1053 	basereg = win * 8 + CBBR_IOBASE0;
1054 	limitreg = win * 8 + CBBR_IOLIMIT0;
1055 
1056 	pci_write_config(brdev, basereg, start, 4);
1057 	pci_write_config(brdev, limitreg, end, 4);
1058 	return (0);
1059 }
1060 
1061 static int
1062 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1063 {
1064 	int basereg;
1065 	int limitreg;
1066 
1067 	if ((win < 0) || (win > 1)) {
1068 		DEVPRINTF((brdev,
1069 		    "cbb_cardbus_mem_open: window out of range %d\n", win));
1070 		return (EINVAL);
1071 	}
1072 
1073 	basereg = win * 8 + CBBR_MEMBASE0;
1074 	limitreg = win * 8 + CBBR_MEMLIMIT0;
1075 
1076 	pci_write_config(brdev, basereg, start, 4);
1077 	pci_write_config(brdev, limitreg, end, 4);
1078 	return (0);
1079 }
1080 
1081 #define START_NONE 0xffffffff
1082 #define END_NONE 0
1083 
1084 static void
1085 cbb_cardbus_auto_open(struct cbb_softc *sc, int type)
1086 {
1087 	uint32_t starts[2];
1088 	uint32_t ends[2];
1089 	struct cbb_reslist *rle;
1090 	int align, i;
1091 	uint32_t reg;
1092 
1093 	starts[0] = starts[1] = START_NONE;
1094 	ends[0] = ends[1] = END_NONE;
1095 
1096 	if (type == SYS_RES_MEMORY)
1097 		align = CBB_MEMALIGN;
1098 	else if (type == SYS_RES_IOPORT)
1099 		align = CBB_IOALIGN;
1100 	else
1101 		align = 1;
1102 
1103 	SLIST_FOREACH(rle, &sc->rl, link) {
1104 		if (rle->type != type)
1105 			continue;
1106 		if (rle->res == NULL)
1107 			continue;
1108 		if (!(rman_get_flags(rle->res) & RF_ACTIVE))
1109 			continue;
1110 		if (rman_get_flags(rle->res) & RF_PREFETCHABLE)
1111 			i = 1;
1112 		else
1113 			i = 0;
1114 		if (rman_get_start(rle->res) < starts[i])
1115 			starts[i] = rman_get_start(rle->res);
1116 		if (rman_get_end(rle->res) > ends[i])
1117 			ends[i] = rman_get_end(rle->res);
1118 	}
1119 	for (i = 0; i < 2; i++) {
1120 		if (starts[i] == START_NONE)
1121 			continue;
1122 		starts[i] &= ~(align - 1);
1123 		ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1;
1124 	}
1125 	if (starts[0] != START_NONE && starts[1] != START_NONE) {
1126 		if (starts[0] < starts[1]) {
1127 			if (ends[0] > starts[1]) {
1128 				device_printf(sc->dev, "Overlapping ranges"
1129 				    " for prefetch and non-prefetch memory\n");
1130 				return;
1131 			}
1132 		} else {
1133 			if (ends[1] > starts[0]) {
1134 				device_printf(sc->dev, "Overlapping ranges"
1135 				    " for prefetch and non-prefetch memory\n");
1136 				return;
1137 			}
1138 		}
1139 	}
1140 
1141 	if (type == SYS_RES_MEMORY) {
1142 		cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1143 		cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1144 		reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1145 		reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 |
1146 		    CBBM_BRIDGECTRL_PREFETCH_1);
1147 		if (starts[1] != START_NONE)
1148 			reg |= CBBM_BRIDGECTRL_PREFETCH_1;
1149 		pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1150 		if (bootverbose) {
1151 			device_printf(sc->dev, "Opening memory:\n");
1152 			if (starts[0] != START_NONE)
1153 				device_printf(sc->dev, "Normal: %#x-%#x\n",
1154 				    starts[0], ends[0]);
1155 			if (starts[1] != START_NONE)
1156 				device_printf(sc->dev, "Prefetch: %#x-%#x\n",
1157 				    starts[1], ends[1]);
1158 		}
1159 	} else if (type == SYS_RES_IOPORT) {
1160 		cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1161 		cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1162 		if (bootverbose && starts[0] != START_NONE)
1163 			device_printf(sc->dev, "Opening I/O: %#x-%#x\n",
1164 			    starts[0], ends[0]);
1165 	}
1166 }
1167 
1168 static int
1169 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1170     int rid, struct resource *res)
1171 {
1172 	int ret;
1173 
1174 	ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1175 	    type, rid, res);
1176 	if (ret != 0)
1177 		return (ret);
1178 	cbb_cardbus_auto_open(device_get_softc(brdev), type);
1179 	return (0);
1180 }
1181 
1182 static int
1183 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1184     int rid, struct resource *res)
1185 {
1186 	int ret;
1187 
1188 	ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1189 	    type, rid, res);
1190 	if (ret != 0)
1191 		return (ret);
1192 	cbb_cardbus_auto_open(device_get_softc(brdev), type);
1193 	return (0);
1194 }
1195 
1196 static struct resource *
1197 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1198     int *rid, u_long start, u_long end, u_long count, u_int flags)
1199 {
1200 	struct cbb_softc *sc = device_get_softc(brdev);
1201 	int tmp;
1202 	struct resource *res;
1203 	u_long align;
1204 
1205 	switch (type) {
1206 	case SYS_RES_IRQ:
1207 		tmp = rman_get_start(sc->irq_res);
1208 		if (start > tmp || end < tmp || count != 1) {
1209 			device_printf(child, "requested interrupt %ld-%ld,"
1210 			    "count = %ld not supported by cbb\n",
1211 			    start, end, count);
1212 			return (NULL);
1213 		}
1214 		start = end = tmp;
1215 		flags |= RF_SHAREABLE;
1216 		break;
1217 	case SYS_RES_IOPORT:
1218 		if (start <= cbb_start_32_io)
1219 			start = cbb_start_32_io;
1220 		if (end < start)
1221 			end = start;
1222 		if (count > (1 << RF_ALIGNMENT(flags)))
1223 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1224 			    rman_make_alignment_flags(count);
1225 		break;
1226 	case SYS_RES_MEMORY:
1227 		if (start <= cbb_start_mem)
1228 			start = cbb_start_mem;
1229 		if (end < start)
1230 			end = start;
1231 		if (count < CBB_MEMALIGN)
1232 			align = CBB_MEMALIGN;
1233 		else
1234 			align = count;
1235 		if (align > (1 << RF_ALIGNMENT(flags)))
1236 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1237 			    rman_make_alignment_flags(align);
1238 		break;
1239 	}
1240 	res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1241 	    start, end, count, flags & ~RF_ACTIVE);
1242 	if (res == NULL) {
1243 		printf("cbb alloc res fail type %d rid %x\n", type, *rid);
1244 		return (NULL);
1245 	}
1246 	cbb_insert_res(sc, res, type, *rid);
1247 	if (flags & RF_ACTIVE)
1248 		if (bus_activate_resource(child, type, *rid, res) != 0) {
1249 			bus_release_resource(child, type, *rid, res);
1250 			return (NULL);
1251 		}
1252 
1253 	return (res);
1254 }
1255 
1256 static int
1257 cbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1258     int rid, struct resource *res)
1259 {
1260 	struct cbb_softc *sc = device_get_softc(brdev);
1261 	int error;
1262 
1263 	if (rman_get_flags(res) & RF_ACTIVE) {
1264 		error = bus_deactivate_resource(child, type, rid, res);
1265 		if (error != 0)
1266 			return (error);
1267 	}
1268 	cbb_remove_res(sc, res);
1269 	return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1270 	    type, rid, res));
1271 }
1272 
1273 /************************************************************************/
1274 /* PC Card Power Functions						*/
1275 /************************************************************************/
1276 
1277 static int
1278 cbb_pcic_power_enable_socket(device_t brdev, device_t child)
1279 {
1280 	struct cbb_softc *sc = device_get_softc(brdev);
1281 	int err;
1282 
1283 	DPRINTF(("cbb_pcic_socket_enable:\n"));
1284 
1285 	/* power down/up the socket to reset */
1286 	err = cbb_do_power(brdev);
1287 	if (err)
1288 		return (err);
1289 	exca_reset(&sc->exca[0], child);
1290 
1291 	return (0);
1292 }
1293 
1294 static int
1295 cbb_pcic_power_disable_socket(device_t brdev, device_t child)
1296 {
1297 	struct cbb_softc *sc = device_get_softc(brdev);
1298 
1299 	DPRINTF(("cbb_pcic_socket_disable\n"));
1300 
1301 	/* Turn off the card's interrupt and leave it in reset, wait 10ms */
1302 	exca_putb(&sc->exca[0], EXCA_INTR, 0);
1303 	pause("cbbP1", hz / 100);
1304 
1305 	/* power down the socket */
1306 	cbb_power(brdev, CARD_OFF);
1307 	exca_putb(&sc->exca[0], EXCA_PWRCTL, 0);
1308 
1309 	/* wait 300ms until power fails (Tpf). */
1310 	pause("cbbP2", hz * 300 / 1000);
1311 
1312 	/* enable CSC interrupts */
1313 	exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE);
1314 	return (0);
1315 }
1316 
1317 /************************************************************************/
1318 /* POWER methods							*/
1319 /************************************************************************/
1320 
1321 int
1322 cbb_power_enable_socket(device_t brdev, device_t child)
1323 {
1324 	struct cbb_softc *sc = device_get_softc(brdev);
1325 
1326 	if (sc->flags & CBB_16BIT_CARD)
1327 		return (cbb_pcic_power_enable_socket(brdev, child));
1328 	return (cbb_cardbus_power_enable_socket(brdev, child));
1329 }
1330 
1331 int
1332 cbb_power_disable_socket(device_t brdev, device_t child)
1333 {
1334 	struct cbb_softc *sc = device_get_softc(brdev);
1335 	if (sc->flags & CBB_16BIT_CARD)
1336 		return (cbb_pcic_power_disable_socket(brdev, child));
1337 	return (cbb_cardbus_power_disable_socket(brdev, child));
1338 }
1339 
1340 static int
1341 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1342     struct resource *res)
1343 {
1344 	struct cbb_softc *sc = device_get_softc(brdev);
1345 	return (exca_activate_resource(&sc->exca[0], child, type, rid, res));
1346 }
1347 
1348 static int
1349 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1350     int rid, struct resource *res)
1351 {
1352 	struct cbb_softc *sc = device_get_softc(brdev);
1353 	return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res));
1354 }
1355 
1356 static struct resource *
1357 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1358     u_long start, u_long end, u_long count, u_int flags)
1359 {
1360 	struct resource *res = NULL;
1361 	struct cbb_softc *sc = device_get_softc(brdev);
1362 	int align;
1363 	int tmp;
1364 
1365 	switch (type) {
1366 	case SYS_RES_MEMORY:
1367 		if (start < cbb_start_mem)
1368 			start = cbb_start_mem;
1369 		if (end < start)
1370 			end = start;
1371 		if (count < CBB_MEMALIGN)
1372 			align = CBB_MEMALIGN;
1373 		else
1374 			align = count;
1375 		if (align > (1 << RF_ALIGNMENT(flags)))
1376 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1377 			    rman_make_alignment_flags(align);
1378 		break;
1379 	case SYS_RES_IOPORT:
1380 		if (start < cbb_start_16_io)
1381 			start = cbb_start_16_io;
1382 		if (end < start)
1383 			end = start;
1384 		break;
1385 	case SYS_RES_IRQ:
1386 		tmp = rman_get_start(sc->irq_res);
1387 		if (start > tmp || end < tmp || count != 1) {
1388 			device_printf(child, "requested interrupt %ld-%ld,"
1389 			    "count = %ld not supported by cbb\n",
1390 			    start, end, count);
1391 			return (NULL);
1392 		}
1393 		flags |= RF_SHAREABLE;
1394 		start = end = rman_get_start(sc->irq_res);
1395 		break;
1396 	}
1397 	res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1398 	    start, end, count, flags & ~RF_ACTIVE);
1399 	if (res == NULL)
1400 		return (NULL);
1401 	cbb_insert_res(sc, res, type, *rid);
1402 	if (flags & RF_ACTIVE) {
1403 		if (bus_activate_resource(child, type, *rid, res) != 0) {
1404 			bus_release_resource(child, type, *rid, res);
1405 			return (NULL);
1406 		}
1407 	}
1408 
1409 	return (res);
1410 }
1411 
1412 static int
1413 cbb_pcic_release_resource(device_t brdev, device_t child, int type,
1414     int rid, struct resource *res)
1415 {
1416 	struct cbb_softc *sc = device_get_softc(brdev);
1417 	int error;
1418 
1419 	if (rman_get_flags(res) & RF_ACTIVE) {
1420 		error = bus_deactivate_resource(child, type, rid, res);
1421 		if (error != 0)
1422 			return (error);
1423 	}
1424 	cbb_remove_res(sc, res);
1425 	return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1426 	    type, rid, res));
1427 }
1428 
1429 /************************************************************************/
1430 /* PC Card methods							*/
1431 /************************************************************************/
1432 
1433 int
1434 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1435     u_long flags)
1436 {
1437 	struct cbb_softc *sc = device_get_softc(brdev);
1438 	struct resource *res;
1439 
1440 	if (type != SYS_RES_MEMORY)
1441 		return (EINVAL);
1442 	res = cbb_find_res(sc, type, rid);
1443 	if (res == NULL) {
1444 		device_printf(brdev,
1445 		    "set_res_flags: specified rid not found\n");
1446 		return (ENOENT);
1447 	}
1448 	return (exca_mem_set_flags(&sc->exca[0], res, flags));
1449 }
1450 
1451 int
1452 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1453     uint32_t cardaddr, uint32_t *deltap)
1454 {
1455 	struct cbb_softc *sc = device_get_softc(brdev);
1456 	struct resource *res;
1457 
1458 	res = cbb_find_res(sc, SYS_RES_MEMORY, rid);
1459 	if (res == NULL) {
1460 		device_printf(brdev,
1461 		    "set_memory_offset: specified rid not found\n");
1462 		return (ENOENT);
1463 	}
1464 	return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap));
1465 }
1466 
1467 /************************************************************************/
1468 /* BUS Methods								*/
1469 /************************************************************************/
1470 
1471 
1472 int
1473 cbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1474     struct resource *r)
1475 {
1476 	struct cbb_softc *sc = device_get_softc(brdev);
1477 
1478 	if (sc->flags & CBB_16BIT_CARD)
1479 		return (cbb_pcic_activate_resource(brdev, child, type, rid, r));
1480 	else
1481 		return (cbb_cardbus_activate_resource(brdev, child, type, rid,
1482 		    r));
1483 }
1484 
1485 int
1486 cbb_deactivate_resource(device_t brdev, device_t child, int type,
1487     int rid, struct resource *r)
1488 {
1489 	struct cbb_softc *sc = device_get_softc(brdev);
1490 
1491 	if (sc->flags & CBB_16BIT_CARD)
1492 		return (cbb_pcic_deactivate_resource(brdev, child, type,
1493 		    rid, r));
1494 	else
1495 		return (cbb_cardbus_deactivate_resource(brdev, child, type,
1496 		    rid, r));
1497 }
1498 
1499 struct resource *
1500 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1501     u_long start, u_long end, u_long count, u_int flags)
1502 {
1503 	struct cbb_softc *sc = device_get_softc(brdev);
1504 
1505 	if (sc->flags & CBB_16BIT_CARD)
1506 		return (cbb_pcic_alloc_resource(brdev, child, type, rid,
1507 		    start, end, count, flags));
1508 	else
1509 		return (cbb_cardbus_alloc_resource(brdev, child, type, rid,
1510 		    start, end, count, flags));
1511 }
1512 
1513 int
1514 cbb_release_resource(device_t brdev, device_t child, int type, int rid,
1515     struct resource *r)
1516 {
1517 	struct cbb_softc *sc = device_get_softc(brdev);
1518 
1519 	if (sc->flags & CBB_16BIT_CARD)
1520 		return (cbb_pcic_release_resource(brdev, child, type,
1521 		    rid, r));
1522 	else
1523 		return (cbb_cardbus_release_resource(brdev, child, type,
1524 		    rid, r));
1525 }
1526 
1527 int
1528 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1529 {
1530 	struct cbb_softc *sc = device_get_softc(brdev);
1531 
1532 	switch (which) {
1533 	case PCIB_IVAR_DOMAIN:
1534 		*result = sc->domain;
1535 		return (0);
1536 	case PCIB_IVAR_BUS:
1537 		*result = sc->secbus;
1538 		return (0);
1539 	}
1540 	return (ENOENT);
1541 }
1542 
1543 int
1544 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1545 {
1546 	struct cbb_softc *sc = device_get_softc(brdev);
1547 
1548 	switch (which) {
1549 	case PCIB_IVAR_DOMAIN:
1550 		return (EINVAL);
1551 	case PCIB_IVAR_BUS:
1552 		sc->secbus = value;
1553 		return (0);
1554 	}
1555 	return (ENOENT);
1556 }
1557 
1558 int
1559 cbb_suspend(device_t self)
1560 {
1561 	int			error = 0;
1562 	struct cbb_softc	*sc = device_get_softc(self);
1563 
1564 	error = bus_generic_suspend(self);
1565 	if (error != 0)
1566 		return (error);
1567 	cbb_set(sc, CBB_SOCKET_MASK, 0);	/* Quiet hardware */
1568 	sc->cardok = 0;				/* Card is bogus now */
1569 	return (0);
1570 }
1571 
1572 int
1573 cbb_resume(device_t self)
1574 {
1575 	int	error = 0;
1576 	struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1577 	uint32_t tmp;
1578 
1579 	/*
1580 	 * Some BIOSes will not save the BARs for the pci chips, so we
1581 	 * must do it ourselves.  If the BAR is reset to 0 for an I/O
1582 	 * device, it will read back as 0x1, so no explicit test for
1583 	 * memory devices are needed.
1584 	 *
1585 	 * Note: The PCI bus code should do this automatically for us on
1586 	 * suspend/resume, but until it does, we have to cope.
1587 	 */
1588 	pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4);
1589 	DEVPRINTF((self, "PCI Memory allocated: %08lx\n",
1590 	    rman_get_start(sc->base_res)));
1591 
1592 	sc->chipinit(sc);
1593 
1594 	/* reset interrupt -- Do we really need to do this? */
1595 	tmp = cbb_get(sc, CBB_SOCKET_EVENT);
1596 	cbb_set(sc, CBB_SOCKET_EVENT, tmp);
1597 
1598 	/* CSC Interrupt: Card detect interrupt on */
1599 	cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
1600 
1601 	/* Signal the thread to wakeup. */
1602 	wakeup(&sc->intrhand);
1603 
1604 	error = bus_generic_resume(self);
1605 
1606 	return (error);
1607 }
1608 
1609 int
1610 cbb_child_present(device_t parent, device_t child)
1611 {
1612 	struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent);
1613 	uint32_t sockstate;
1614 
1615 	sockstate = cbb_get(sc, CBB_SOCKET_STATE);
1616 	return (CBB_CARD_PRESENT(sockstate) && sc->cardok);
1617 }
1618