1 /* 2 * Copyright (c) 2002 M. Warner Losh. 3 * Copyright (c) 2000,2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer, 11 * without modification, immediately at the beginning of the file. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 /* 33 * Copyright (c) 1998, 1999 and 2000 34 * HAYAKAWA Koichi. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by HAYAKAWA Koichi. 47 * 4. The name of the author may not be used to endorse or promote products 48 * derived from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 51 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 52 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 53 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 54 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 55 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 59 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 */ 61 62 /* 63 * Driver for PCI to CardBus Bridge chips 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/proc.h> 80 #include <sys/condvar.h> 81 #include <sys/errno.h> 82 #include <sys/kernel.h> 83 #include <sys/lock.h> 84 #include <sys/malloc.h> 85 #include <sys/mutex.h> 86 #include <sys/sysctl.h> 87 #include <sys/kthread.h> 88 #include <sys/bus.h> 89 #include <machine/bus.h> 90 #include <sys/rman.h> 91 #include <machine/resource.h> 92 93 #include <pci/pcireg.h> 94 #include <pci/pcivar.h> 95 #include <machine/clock.h> 96 97 #include <dev/pccard/pccardreg.h> 98 #include <dev/pccard/pccardvar.h> 99 100 #include <dev/exca/excareg.h> 101 #include <dev/exca/excavar.h> 102 103 #include <dev/pccbb/pccbbreg.h> 104 #include <dev/pccbb/pccbbvar.h> 105 106 #include "power_if.h" 107 #include "card_if.h" 108 #include "pcib_if.h" 109 110 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 111 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 112 113 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 114 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 115 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 116 pci_write_config(DEV, REG, ( \ 117 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 118 119 #define CBB_START_MEM 0x88000000 120 #define CBB_START_32_IO 0x1000 121 #define CBB_START_16_IO 0x100 122 123 struct yenta_chipinfo { 124 uint32_t yc_id; 125 const char *yc_name; 126 int yc_chiptype; 127 } yc_chipsets[] = { 128 /* Texas Instruments chips */ 129 {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X}, 130 {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X}, 131 {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X}, 132 133 {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX}, 134 {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX}, 135 {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX}, 136 {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX}, 137 {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX}, 138 {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X}, 139 {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X}, 140 {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X}, 141 {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX}, 142 {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX}, 143 {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX}, 144 {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX}, 145 {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX}, 146 {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, /*SIC!*/ 147 {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX}, 148 {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX}, 149 {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX}, 150 {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX}, 151 {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX}, 152 {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX}, 153 {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX}, 154 155 /* Ricoh chips */ 156 {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X}, 157 {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X}, 158 {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X}, 159 {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X}, 160 {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X}, 161 {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X}, 162 163 /* Toshiba products */ 164 {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95}, 165 {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95}, 166 {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97}, 167 {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97}, 168 169 /* Cirrus Logic */ 170 {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS}, 171 {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS}, 172 {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS}, 173 174 /* 02Micro */ 175 {PCIC_ID_OZ6832, "O2Micro OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS}, 176 {PCIC_ID_OZ6860, "O2Micro OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS}, 177 {PCIC_ID_OZ6872, "O2Micro OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS}, 178 {PCIC_ID_OZ6912, "O2Micro OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS}, 179 {PCIC_ID_OZ6922, "O2Micro OZ6822 PCI-CardBus Bridge", CB_CIRRUS}, 180 {PCIC_ID_OZ6933, "O2Micro OZ6833 PCI-CardBus Bridge", CB_CIRRUS}, 181 182 /* sentinel */ 183 {0 /* null id */, "unknown", CB_UNKNOWN}, 184 }; 185 186 /* sysctl vars */ 187 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 188 189 /* There's no way to say TUNEABLE_LONG to get the right types */ 190 u_long cbb_start_mem = CBB_START_MEM; 191 TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem); 192 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 193 &cbb_start_mem, CBB_START_MEM, 194 "Starting address for memory allocations"); 195 196 u_long cbb_start_16_io = CBB_START_16_IO; 197 TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io); 198 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 199 &cbb_start_16_io, CBB_START_16_IO, 200 "Starting ioport for 16-bit cards"); 201 202 u_long cbb_start_32_io = CBB_START_32_IO; 203 TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io); 204 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 205 &cbb_start_32_io, CBB_START_32_IO, 206 "Starting ioport for 32-bit cards"); 207 208 int cbb_debug = 0; 209 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 210 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 211 "Verbose cardbus bridge debugging"); 212 213 static int cbb_chipset(uint32_t pci_id, const char **namep); 214 static int cbb_probe(device_t brdev); 215 static void cbb_chipinit(struct cbb_softc *sc); 216 static int cbb_attach(device_t brdev); 217 static int cbb_detach(device_t brdev); 218 static int cbb_shutdown(device_t brdev); 219 static void cbb_driver_added(device_t brdev, driver_t *driver); 220 static void cbb_child_detached(device_t brdev, device_t child); 221 static void cbb_event_thread(void *arg); 222 static void cbb_insert(struct cbb_softc *sc); 223 static void cbb_removal(struct cbb_softc *sc); 224 static void cbb_intr(void *arg); 225 static int cbb_detect_voltage(device_t brdev); 226 static int cbb_power(device_t brdev, int volts); 227 static void cbb_cardbus_reset(device_t brdev); 228 static int cbb_cardbus_power_enable_socket(device_t brdev, 229 device_t child); 230 static void cbb_cardbus_power_disable_socket(device_t brdev, 231 device_t child); 232 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 233 uint32_t end); 234 static int cbb_cardbus_mem_open(device_t brdev, int win, 235 uint32_t start, uint32_t end); 236 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 237 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 238 int type, int rid, struct resource *res); 239 static int cbb_cardbus_deactivate_resource(device_t brdev, 240 device_t child, int type, int rid, struct resource *res); 241 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 242 device_t child, int type, int *rid, u_long start, 243 u_long end, u_long count, uint flags); 244 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 245 int type, int rid, struct resource *res); 246 static int cbb_power_enable_socket(device_t brdev, device_t child); 247 static void cbb_power_disable_socket(device_t brdev, device_t child); 248 static int cbb_activate_resource(device_t brdev, device_t child, 249 int type, int rid, struct resource *r); 250 static int cbb_deactivate_resource(device_t brdev, device_t child, 251 int type, int rid, struct resource *r); 252 static struct resource *cbb_alloc_resource(device_t brdev, device_t child, 253 int type, int *rid, u_long start, u_long end, u_long count, 254 uint flags); 255 static int cbb_release_resource(device_t brdev, device_t child, 256 int type, int rid, struct resource *r); 257 static int cbb_read_ivar(device_t brdev, device_t child, int which, 258 uintptr_t *result); 259 static int cbb_write_ivar(device_t brdev, device_t child, int which, 260 uintptr_t value); 261 static int cbb_maxslots(device_t brdev); 262 static uint32_t cbb_read_config(device_t brdev, int b, int s, int f, 263 int reg, int width); 264 static void cbb_write_config(device_t brdev, int b, int s, int f, 265 int reg, uint32_t val, int width); 266 267 /* 268 */ 269 static __inline void 270 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val) 271 { 272 bus_space_write_4(sc->bst, sc->bsh, reg, val); 273 } 274 275 static __inline uint32_t 276 cbb_get(struct cbb_softc *sc, uint32_t reg) 277 { 278 return (bus_space_read_4(sc->bst, sc->bsh, reg)); 279 } 280 281 static __inline void 282 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) 283 { 284 cbb_set(sc, reg, cbb_get(sc, reg) | bits); 285 } 286 287 static __inline void 288 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) 289 { 290 cbb_set(sc, reg, cbb_get(sc, reg) & ~bits); 291 } 292 293 static void 294 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 295 { 296 struct cbb_reslist *rle; 297 298 SLIST_FOREACH(rle, &sc->rl, link) { 299 if (rle->res == res) { 300 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 301 free(rle, M_DEVBUF); 302 return; 303 } 304 } 305 } 306 307 static struct resource * 308 cbb_find_res(struct cbb_softc *sc, int type, int rid) 309 { 310 struct cbb_reslist *rle; 311 312 SLIST_FOREACH(rle, &sc->rl, link) 313 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 314 return (rle->res); 315 return (NULL); 316 } 317 318 static void 319 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 320 int rid) 321 { 322 struct cbb_reslist *rle; 323 324 /* 325 * Need to record allocated resource so we can iterate through 326 * it later. 327 */ 328 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 329 if (!res) 330 panic("cbb_cardbus_alloc_resource: can't record entry!"); 331 rle->res = res; 332 rle->type = type; 333 rle->rid = rid; 334 SLIST_INSERT_HEAD(&sc->rl, rle, link); 335 } 336 337 static void 338 cbb_destroy_res(struct cbb_softc *sc) 339 { 340 struct cbb_reslist *rle; 341 342 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 343 device_printf(sc->dev, "Danger Will Robinson: Resource " 344 "left allocated! This is a bug... " 345 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 346 rman_get_start(rle->res)); 347 SLIST_REMOVE_HEAD(&sc->rl, link); 348 free(rle, M_DEVBUF); 349 } 350 } 351 352 /************************************************************************/ 353 /* Probe/Attach */ 354 /************************************************************************/ 355 356 static int 357 cbb_chipset(uint32_t pci_id, const char **namep) 358 { 359 struct yenta_chipinfo *ycp; 360 361 for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp) 362 continue; 363 if (namep != NULL) 364 *namep = ycp->yc_name; 365 return (ycp->yc_chiptype); 366 } 367 368 static int 369 cbb_probe(device_t brdev) 370 { 371 const char *name; 372 uint32_t progif; 373 uint32_t subclass; 374 375 /* 376 * Do we know that we support the chipset? If so, then we 377 * accept the device. 378 */ 379 if (cbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) { 380 device_set_desc(brdev, name); 381 return (0); 382 } 383 384 /* 385 * We do support generic CardBus bridges. All that we've seen 386 * to date have progif 0 (the Yenta spec, and successors mandate 387 * this). We do not support PCI PCMCIA bridges (with one exception) 388 * with this driver since they generally are I/O mapped. Those 389 * are supported by the pcic driver. This should help us be more 390 * future proof. 391 */ 392 subclass = pci_get_subclass(brdev); 393 progif = pci_get_progif(brdev); 394 if (subclass == PCIS_BRIDGE_CARDBUS && progif == 0) { 395 device_set_desc(brdev, "PCI-CardBus Bridge"); 396 return (0); 397 } 398 return (ENXIO); 399 } 400 401 402 static void 403 cbb_chipinit(struct cbb_softc *sc) 404 { 405 uint32_t mux, sysctrl; 406 407 /* Set CardBus latency timer */ 408 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20) 409 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1); 410 411 /* Set PCI latency timer */ 412 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20) 413 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1); 414 415 /* Enable memory access */ 416 PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND, 417 | PCIM_CMD_MEMEN 418 | PCIM_CMD_PORTEN 419 | PCIM_CMD_BUSMASTEREN, 2); 420 421 /* disable Legacy IO */ 422 switch (sc->chipset) { 423 case CB_RF5C46X: 424 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 425 & ~(CBBM_BRIDGECTRL_RL_3E0_EN | 426 CBBM_BRIDGECTRL_RL_3E2_EN), 2); 427 break; 428 default: 429 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4); 430 break; 431 } 432 433 /* Use PCI interrupt for interrupt routing */ 434 PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL, 435 & ~(CBBM_BRIDGECTRL_MASTER_ABORT | 436 CBBM_BRIDGECTRL_INTR_IREQ_EN), 437 | CBBM_BRIDGECTRL_WRITE_POST_EN, 438 2); 439 440 /* 441 * XXX this should be a function table, ala OLDCARD. This means 442 * that we could more easily support ISA interrupts for pccard 443 * cards if we had to. 444 */ 445 switch (sc->chipset) { 446 case CB_TI113X: 447 /* 448 * The TI 1031, TI 1130 and TI 1131 all require another bit 449 * be set to enable PCI routing of interrupts, and then 450 * a bit for each of the CSC and Function interrupts we 451 * want routed. 452 */ 453 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL, 454 | CBBM_CBCTRL_113X_PCI_INTR | 455 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN, 456 1); 457 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL, 458 & ~(CBBM_DEVCTRL_INT_SERIAL | 459 CBBM_DEVCTRL_INT_PCI), 1); 460 break; 461 case CB_TI12XX: 462 /* 463 * Some TI 12xx (and [14][45]xx) based pci cards 464 * sometimes have issues with the MFUNC register not 465 * being initialized due to a bad EEPROM on board. 466 * Laptops that this matters on have this register 467 * properly initialized. 468 * 469 * The TI125X parts have a different register. 470 */ 471 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4); 472 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4); 473 if (mux == 0) { 474 mux = (mux & ~CBBM_MFUNC_PIN0) | 475 CBBM_MFUNC_PIN0_INTA; 476 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0) 477 mux = (mux & ~CBBM_MFUNC_PIN1) | 478 CBBM_MFUNC_PIN1_INTB; 479 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4); 480 } 481 /*FALLTHROUGH*/ 482 case CB_TI125X: 483 /* 484 * Disable zoom video. Some machines initialize this 485 * improperly and exerpience has shown that this helps 486 * on some machines. 487 */ 488 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4); 489 break; 490 case CB_TOPIC97: 491 /* 492 * Disable Zoom Video, ToPIC 97, 100. 493 */ 494 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1); 495 /* 496 * ToPIC 97, 100 497 * At offset 0xa1: INTERRUPT CONTROL register 498 * 0x1: Turn on INT interrupts. 499 */ 500 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL, 501 | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1); 502 goto topic_common; 503 case CB_TOPIC95: 504 /* 505 * SOCKETCTRL appears to be TOPIC 95/B specific 506 */ 507 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL, 508 | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4); 509 510 topic_common:; 511 /* 512 * At offset 0xa0: SLOT CONTROL 513 * 0x80 Enable CardBus Functionality 514 * 0x40 Enable CardBus and PC Card registers 515 * 0x20 Lock ID in exca regs 516 * 0x10 Write protect ID in config regs 517 * Clear the rest of the bits, which defaults the slot 518 * in legacy mode to 0x3e0 and offset 0. (legacy 519 * mode is determined elsewhere) 520 */ 521 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL, 522 CBBM_TOPIC_SLOTCTRL_SLOTON | 523 CBBM_TOPIC_SLOTCTRL_SLOTEN | 524 CBBM_TOPIC_SLOTCTRL_ID_LOCK | 525 CBBM_TOPIC_SLOTCTRL_ID_WP, 1); 526 527 /* 528 * At offset 0xa3 Card Detect Control Register 529 * 0x80 CARDBUS enbale 530 * 0x01 Cleared for hardware change detect 531 */ 532 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC, 533 | CBBM_TOPIC_CDC_CARDBUS, 534 & ~CBBM_TOPIC_CDC_SWDETECT, 4); 535 break; 536 } 537 538 /* 539 * Need to tell ExCA registers to route via PCI interrupts. There 540 * are two ways to do this. Once is to set INTR_ENABLE and the 541 * other is to set CSC to 0. Since both methods are mutually 542 * compatible, we do both. 543 */ 544 exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE); 545 exca_write(&sc->exca, EXCA_CSC_INTR, 0); 546 547 /* close all memory and io windows */ 548 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4); 549 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4); 550 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4); 551 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4); 552 pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4); 553 pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4); 554 pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4); 555 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4); 556 } 557 558 static int 559 cbb_attach(device_t brdev) 560 { 561 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev); 562 int rid; 563 564 mtx_init(&sc->mtx, device_get_nameunit(brdev), "cbb", MTX_DEF); 565 cv_init(&sc->cv, "cbb cv"); 566 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL); 567 sc->dev = brdev; 568 sc->cbdev = NULL; 569 sc->pccarddev = NULL; 570 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1); 571 sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1); 572 SLIST_INIT(&sc->rl); 573 STAILQ_INIT(&sc->intr_handlers); 574 575 #ifndef BURN_THE_BOATS 576 /* 577 * The PCI bus code should assign us memory in the absense 578 * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge 579 * up something here until the PCI/acpi code properly assigns the 580 * resource. 581 */ 582 #endif 583 rid = CBBR_SOCKBASE; 584 sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid, 585 0, ~0, 1, RF_ACTIVE); 586 if (!sc->base_res) { 587 #ifdef BURN_THE_BOATS 588 device_printf(brdev, "Could not map register memory\n"); 589 mtx_destroy(&sc->mtx); 590 cv_destroy(&sc->cv); 591 return (ENOMEM); 592 #else 593 uint32_t sockbase; 594 /* 595 * Generally, the BIOS will assign this memory for us. 596 * However, newer BIOSes do not because the MS design 597 * documents have mandated that this is for the OS 598 * to assign rather than the BIOS. This driver shouldn't 599 * be doing this, but until the pci bus code (or acpi) 600 * does this, we allow CardBus bridges to work on more 601 * machines. 602 */ 603 sockbase = pci_read_config(brdev, rid, 4); 604 if (sockbase < 0x100000 || sockbase >= 0xfffffff0) { 605 pci_write_config(brdev, rid, 0xffffffff, 4); 606 sockbase = pci_read_config(brdev, rid, 4); 607 sockbase = (sockbase & 0xfffffff0) & 608 -(sockbase & 0xfffffff0); 609 sc->base_res = bus_generic_alloc_resource( 610 device_get_parent(brdev), brdev, SYS_RES_MEMORY, 611 &rid, cbb_start_mem, ~0, sockbase, 612 RF_ACTIVE|rman_make_alignment_flags(sockbase)); 613 if (!sc->base_res) { 614 device_printf(brdev, 615 "Could not grab register memory\n"); 616 mtx_destroy(&sc->mtx); 617 cv_destroy(&sc->cv); 618 return (ENOMEM); 619 } 620 sc->flags |= CBB_KLUDGE_ALLOC; 621 pci_write_config(brdev, CBBR_SOCKBASE, 622 rman_get_start(sc->base_res), 4); 623 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n", 624 rman_get_start(sc->base_res))); 625 } else { 626 device_printf(brdev, "Could not map register memory\n"); 627 goto err; 628 } 629 #endif 630 } 631 632 sc->bst = rman_get_bustag(sc->base_res); 633 sc->bsh = rman_get_bushandle(sc->base_res); 634 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET); 635 sc->exca.flags |= EXCA_HAS_MEMREG_WIN; 636 cbb_chipinit(sc); 637 638 /* attach children */ 639 sc->cbdev = device_add_child(brdev, "cardbus", -1); 640 if (sc->cbdev == NULL) 641 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n")); 642 else if (device_probe_and_attach(sc->cbdev) != 0) { 643 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n")); 644 sc->cbdev = NULL; 645 } 646 647 sc->pccarddev = device_add_child(brdev, "pccard", -1); 648 if (sc->pccarddev == NULL) 649 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n")); 650 else if (device_probe_and_attach(sc->pccarddev) != 0) { 651 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n")); 652 sc->pccarddev = NULL; 653 } 654 655 /* Map and establish the interrupt. */ 656 rid = 0; 657 sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1, 658 RF_SHAREABLE | RF_ACTIVE); 659 if (sc->irq_res == NULL) { 660 printf("cbb: Unable to map IRQ...\n"); 661 goto err; 662 return (ENOMEM); 663 } 664 665 if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_AV, cbb_intr, sc, 666 &sc->intrhand)) { 667 device_printf(brdev, "couldn't establish interrupt"); 668 goto err; 669 } 670 671 /* reset 16-bit pcmcia bus */ 672 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 673 674 /* turn off power */ 675 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 676 677 /* CSC Interrupt: Card detect interrupt on */ 678 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 679 680 /* reset interrupt */ 681 cbb_set(sc, CBB_SOCKET_EVENT, cbb_get(sc, CBB_SOCKET_EVENT)); 682 683 /* Start the thread */ 684 if (kthread_create(cbb_event_thread, sc, &sc->event_thread, 0, 0, 685 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) { 686 device_printf (sc->dev, "unable to create event thread.\n"); 687 panic ("cbb_create_event_thread"); 688 } 689 690 return (0); 691 err: 692 if (sc->irq_res) 693 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 694 if (sc->base_res) { 695 if (sc->flags & CBB_KLUDGE_ALLOC) 696 bus_generic_release_resource(device_get_parent(brdev), 697 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 698 sc->base_res); 699 else 700 bus_release_resource(brdev, SYS_RES_MEMORY, 701 CBBR_SOCKBASE, sc->base_res); 702 } 703 mtx_destroy(&sc->mtx); 704 cv_destroy(&sc->cv); 705 return (ENOMEM); 706 } 707 708 static int 709 cbb_detach(device_t brdev) 710 { 711 struct cbb_softc *sc = device_get_softc(brdev); 712 int numdevs; 713 device_t *devlist; 714 int tmp; 715 int error; 716 717 device_get_children(brdev, &devlist, &numdevs); 718 719 error = 0; 720 for (tmp = 0; tmp < numdevs; tmp++) { 721 if (device_detach(devlist[tmp]) == 0) 722 device_delete_child(brdev, devlist[tmp]); 723 else 724 error++; 725 } 726 free(devlist, M_TEMP); 727 if (error > 0) 728 return (ENXIO); 729 730 mtx_lock(&sc->mtx); 731 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 732 sc->flags |= CBB_KTHREAD_DONE; 733 if (sc->flags & CBB_KTHREAD_RUNNING) { 734 cv_broadcast(&sc->cv); 735 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 736 } 737 mtx_unlock(&sc->mtx); 738 739 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 740 if (sc->flags & CBB_KLUDGE_ALLOC) 741 bus_generic_release_resource(device_get_parent(brdev), 742 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 743 sc->base_res); 744 else 745 bus_release_resource(brdev, SYS_RES_MEMORY, 746 CBBR_SOCKBASE, sc->base_res); 747 mtx_destroy(&sc->mtx); 748 cv_destroy(&sc->cv); 749 return (0); 750 } 751 752 static int 753 cbb_shutdown(device_t brdev) 754 { 755 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev); 756 /* properly reset everything at shutdown */ 757 758 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 759 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 760 761 cbb_set(sc, CBB_SOCKET_MASK, 0); 762 763 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 764 765 exca_write(&sc->exca, EXCA_ADDRWIN_ENABLE, 0); 766 pci_write_config(brdev, CBBR_MEMBASE0, 0, 4); 767 pci_write_config(brdev, CBBR_MEMLIMIT0, 0, 4); 768 pci_write_config(brdev, CBBR_MEMBASE1, 0, 4); 769 pci_write_config(brdev, CBBR_MEMLIMIT1, 0, 4); 770 pci_write_config(brdev, CBBR_IOBASE0, 0, 4); 771 pci_write_config(brdev, CBBR_IOLIMIT0, 0, 4); 772 pci_write_config(brdev, CBBR_IOBASE1, 0, 4); 773 pci_write_config(brdev, CBBR_IOLIMIT1, 0, 4); 774 pci_write_config(brdev, PCIR_COMMAND, 0, 2); 775 return (0); 776 } 777 778 static int 779 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 780 int flags, driver_intr_t *intr, void *arg, void **cookiep) 781 { 782 struct cbb_intrhand *ih; 783 struct cbb_softc *sc = device_get_softc(dev); 784 785 /* 786 * You aren't allowed to have fast interrupts for pccard/cardbus 787 * things since those interrupts are PCI and shared. Since we use 788 * the PCI interrupt for the status change interrupts, it can't be 789 * free for use by the driver. Fast interrupts must not be shared. 790 */ 791 if ((flags & INTR_FAST) != 0) 792 return (EINVAL); 793 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 794 if (ih == NULL) 795 return (ENOMEM); 796 *cookiep = ih; 797 ih->intr = intr; 798 ih->arg = arg; 799 STAILQ_INSERT_TAIL(&sc->intr_handlers, ih, entries); 800 /* 801 * XXX we should do what old card does to ensure that we don't 802 * XXX call the function's interrupt routine(s). 803 */ 804 /* 805 * XXX need to turn on ISA interrupts, if we ever support them, but 806 * XXX for now that's all we need to do. 807 */ 808 return (0); 809 } 810 811 static int 812 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 813 void *cookie) 814 { 815 struct cbb_intrhand *ih; 816 struct cbb_softc *sc = device_get_softc(dev); 817 818 /* XXX Need to do different things for ISA interrupts. */ 819 ih = (struct cbb_intrhand *) cookie; 820 STAILQ_REMOVE(&sc->intr_handlers, ih, cbb_intrhand, entries); 821 free(ih, M_DEVBUF); 822 return (0); 823 } 824 825 826 static void 827 cbb_driver_added(device_t brdev, driver_t *driver) 828 { 829 struct cbb_softc *sc = device_get_softc(brdev); 830 device_t *devlist; 831 int tmp; 832 int numdevs; 833 int wake; 834 uint32_t sockstate; 835 836 DEVICE_IDENTIFY(driver, brdev); 837 device_get_children(brdev, &devlist, &numdevs); 838 wake = 0; 839 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 840 for (tmp = 0; tmp < numdevs; tmp++) { 841 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT && 842 device_probe_and_attach(devlist[tmp]) == 0) { 843 if (devlist[tmp] == NULL) 844 /* NOTHING */; 845 else if (strcmp(driver->name, "cardbus") == 0) { 846 sc->cbdev = devlist[tmp]; 847 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) && 848 (sockstate & CBB_SOCKET_STAT_CB)) 849 wake++; 850 } else if (strcmp(driver->name, "pccard") == 0) { 851 sc->pccarddev = devlist[tmp]; 852 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) && 853 (sockstate & CBB_SOCKET_STAT_16BIT)) 854 wake++; 855 } else 856 device_printf(brdev, 857 "Unsupported child bus: %s\n", 858 driver->name); 859 } 860 } 861 free(devlist, M_TEMP); 862 863 if (wake > 0) { 864 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) 865 == 0) { 866 mtx_lock(&sc->mtx); 867 wakeup(sc); 868 mtx_unlock(&sc->mtx); 869 } 870 } 871 } 872 873 static void 874 cbb_child_detached(device_t brdev, device_t child) 875 { 876 struct cbb_softc *sc = device_get_softc(brdev); 877 878 if (child == sc->cbdev) 879 sc->cbdev = NULL; 880 else if (child == sc->pccarddev) 881 sc->pccarddev = NULL; 882 else 883 device_printf(brdev, "Unknown child detached: %s %p/%p\n", 884 device_get_nameunit(child), sc->cbdev, sc->pccarddev); 885 } 886 887 /************************************************************************/ 888 /* Kthreads */ 889 /************************************************************************/ 890 891 static void 892 cbb_event_thread(void *arg) 893 { 894 struct cbb_softc *sc = arg; 895 uint32_t status; 896 int err; 897 898 /* 899 * We take out Giant here because we need it deep, down in 900 * the bowels of the vm system for mapping the memory we need 901 * to read the CIS. We also need it for kthread_exit, which 902 * drops it. 903 */ 904 sc->flags |= CBB_KTHREAD_RUNNING; 905 while (1) { 906 /* 907 * Check to see if we have anything first so that 908 * if there's a card already inserted, we do the 909 * right thing. 910 */ 911 if (sc->flags & CBB_KTHREAD_DONE) 912 break; 913 914 status = cbb_get(sc, CBB_SOCKET_STATE); 915 mtx_lock(&Giant); 916 if ((status & CBB_SOCKET_STAT_CD) == 0) 917 cbb_insert(sc); 918 else 919 cbb_removal(sc); 920 mtx_unlock(&Giant); 921 922 /* 923 * Wait until it has been 1s since the last time we 924 * get an interrupt. We handle the rest of the interrupt 925 * at the top of the loop. 926 */ 927 mtx_lock(&sc->mtx); 928 cv_wait(&sc->cv, &sc->mtx); 929 err = 0; 930 while (err != EWOULDBLOCK && 931 (sc->flags & CBB_KTHREAD_DONE) == 0) 932 err = cv_timedwait(&sc->cv, &sc->mtx, 1 * hz); 933 mtx_unlock(&sc->mtx); 934 } 935 sc->flags &= ~CBB_KTHREAD_RUNNING; 936 mtx_lock(&Giant); 937 kthread_exit(0); 938 } 939 940 /************************************************************************/ 941 /* Insert/removal */ 942 /************************************************************************/ 943 944 static void 945 cbb_insert(struct cbb_softc *sc) 946 { 947 uint32_t sockevent, sockstate; 948 949 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 950 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 951 952 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 953 sockevent, sockstate)); 954 955 if (sockstate & CBB_SOCKET_STAT_16BIT) { 956 if (sc->pccarddev != NULL) { 957 sc->flags |= CBB_16BIT_CARD; 958 sc->flags |= CBB_CARD_OK; 959 if (CARD_ATTACH_CARD(sc->pccarddev) != 0) { 960 device_printf(sc->dev, 961 "PC Card card activation failed\n"); 962 sc->flags &= ~CBB_CARD_OK; 963 } 964 } else { 965 device_printf(sc->dev, 966 "PC Card inserted, but no pccard bus.\n"); 967 } 968 } else if (sockstate & CBB_SOCKET_STAT_CB) { 969 if (sc->cbdev != NULL) { 970 sc->flags &= ~CBB_16BIT_CARD; 971 sc->flags |= CBB_CARD_OK; 972 if (CARD_ATTACH_CARD(sc->cbdev) != 0) { 973 device_printf(sc->dev, 974 "CardBus card activation failed\n"); 975 sc->flags &= ~CBB_CARD_OK; 976 } 977 } else { 978 device_printf(sc->dev, 979 "CardBus card inserted, but no cardbus bus.\n"); 980 } 981 } else { 982 /* 983 * We should power the card down, and try again a couple of 984 * times if this happens. XXX 985 */ 986 device_printf (sc->dev, "Unsupported card type detected\n"); 987 } 988 } 989 990 static void 991 cbb_removal(struct cbb_softc *sc) 992 { 993 if (sc->flags & CBB_16BIT_CARD && sc->pccarddev != NULL) 994 CARD_DETACH_CARD(sc->pccarddev, DETACH_FORCE); 995 else if ((!(sc->flags & CBB_16BIT_CARD)) && sc->cbdev != NULL) 996 CARD_DETACH_CARD(sc->cbdev, DETACH_FORCE); 997 cbb_destroy_res(sc); 998 } 999 1000 /************************************************************************/ 1001 /* Interrupt Handler */ 1002 /************************************************************************/ 1003 1004 static void 1005 cbb_intr(void *arg) 1006 { 1007 struct cbb_softc *sc = arg; 1008 uint32_t sockevent; 1009 struct cbb_intrhand *ih; 1010 1011 /* 1012 * This ISR needs work XXX 1013 */ 1014 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 1015 if (sockevent) { 1016 /* ack the interrupt */ 1017 cbb_setb(sc, CBB_SOCKET_EVENT, sockevent); 1018 1019 /* 1020 * If anything has happened to the socket, we assume that 1021 * the card is no longer OK, and we shouldn't call its 1022 * ISR. We set CARD_OK as soon as we've attached the 1023 * card. This helps in a noisy eject, which happens 1024 * all too often when users are ejecting their PC Cards. 1025 * 1026 * We use this method in preference to checking to see if 1027 * the card is still there because the check suffers from 1028 * a race condition in the bouncing case. Prior versions 1029 * of the pccard software used a similar trick and achieved 1030 * excellent results. 1031 */ 1032 if (sockevent & CBB_SOCKET_EVENT_CD) { 1033 mtx_lock(&sc->mtx); 1034 sc->flags &= ~CBB_CARD_OK; 1035 cv_signal(&sc->cv); 1036 mtx_unlock(&sc->mtx); 1037 } 1038 if (sockevent & CBB_SOCKET_EVENT_CSTS) { 1039 DPRINTF((" cstsevent occured: 0x%08x\n", 1040 cbb_get(sc, CBB_SOCKET_STATE))); 1041 } 1042 if (sockevent & CBB_SOCKET_EVENT_POWER) { 1043 DPRINTF((" pwrevent occured: 0x%08x\n", 1044 cbb_get(sc, CBB_SOCKET_STATE))); 1045 } 1046 /* Other bits? */ 1047 } 1048 if (sc->flags & CBB_CARD_OK) { 1049 STAILQ_FOREACH(ih, &sc->intr_handlers, entries) { 1050 (*ih->intr)(ih->arg); 1051 } 1052 1053 } 1054 } 1055 1056 /************************************************************************/ 1057 /* Generic Power functions */ 1058 /************************************************************************/ 1059 1060 static int 1061 cbb_detect_voltage(device_t brdev) 1062 { 1063 struct cbb_softc *sc = device_get_softc(brdev); 1064 uint32_t psr; 1065 int vol = CARD_UKN_CARD; 1066 1067 psr = cbb_get(sc, CBB_SOCKET_STATE); 1068 1069 if (psr & CBB_SOCKET_STAT_5VCARD) 1070 vol |= CARD_5V_CARD; 1071 if (psr & CBB_SOCKET_STAT_3VCARD) 1072 vol |= CARD_3V_CARD; 1073 if (psr & CBB_SOCKET_STAT_XVCARD) 1074 vol |= CARD_XV_CARD; 1075 if (psr & CBB_SOCKET_STAT_YVCARD) 1076 vol |= CARD_YV_CARD; 1077 1078 return (vol); 1079 } 1080 1081 static int 1082 cbb_power(device_t brdev, int volts) 1083 { 1084 uint32_t status, sock_ctrl; 1085 struct cbb_softc *sc = device_get_softc(brdev); 1086 int timeout; 1087 uint32_t sockevent; 1088 1089 DEVPRINTF((sc->dev, "cbb_power: %s and %s [%x]\n", 1090 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" : 1091 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" : 1092 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" : 1093 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" : 1094 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" : 1095 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" : 1096 "VCC-UNKNOWN", 1097 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" : 1098 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" : 1099 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" : 1100 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" : 1101 "VPP-UNKNOWN", 1102 volts)); 1103 1104 status = cbb_get(sc, CBB_SOCKET_STATE); 1105 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 1106 1107 switch (volts & CARD_VCCMASK) { 1108 case CARD_VCC_UC: 1109 break; 1110 case CARD_VCC_5V: 1111 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */ 1112 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1113 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 1114 } else { 1115 device_printf(sc->dev, 1116 "BAD voltage request: no 5 V card\n"); 1117 } 1118 break; 1119 case CARD_VCC_3V: 1120 if (CBB_SOCKET_STAT_3VCARD & status) { 1121 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1122 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 1123 } else { 1124 device_printf(sc->dev, 1125 "BAD voltage request: no 3.3 V card\n"); 1126 } 1127 break; 1128 case CARD_VCC_0V: 1129 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1130 break; 1131 default: 1132 return (0); /* power NEVER changed */ 1133 break; 1134 } 1135 1136 switch (volts & CARD_VPPMASK) { 1137 case CARD_VPP_UC: 1138 break; 1139 case CARD_VPP_0V: 1140 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1141 break; 1142 case CARD_VPP_VCC: 1143 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1144 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 1145 break; 1146 case CARD_VPP_12V: 1147 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1148 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V; 1149 break; 1150 } 1151 1152 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 1153 return (1); /* no change necessary */ 1154 1155 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 1156 status = cbb_get(sc, CBB_SOCKET_STATE); 1157 1158 /* 1159 * XXX This busy wait is bogus. We should wait for a power 1160 * interrupt and then whine if the status is bad. If we're 1161 * worried about the card not coming up, then we should also 1162 * schedule a timeout which we can cacel in the power interrupt. 1163 */ 1164 timeout = 20; 1165 do { 1166 DELAY(20*1000); 1167 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 1168 } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0); 1169 /* reset event status */ 1170 /* XXX should only reset EVENT_POWER */ 1171 cbb_set(sc, CBB_SOCKET_EVENT, sockevent); 1172 if (timeout < 0) { 1173 printf ("VCC supply failed.\n"); 1174 return (0); 1175 } 1176 1177 /* XXX 1178 * delay 400 ms: thgough the standard defines that the Vcc set-up time 1179 * is 20 ms, some PC-Card bridge requires longer duration. 1180 * XXX Note: We should check the stutus AFTER the delay to give time 1181 * for things to stabilize. 1182 */ 1183 DELAY(400*1000); 1184 1185 if (status & CBB_SOCKET_STAT_BADVCC) { 1186 device_printf(sc->dev, 1187 "bad Vcc request. ctrl=0x%x, status=0x%x\n", 1188 sock_ctrl ,status); 1189 printf("cbb_power: %s and %s [%x]\n", 1190 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" : 1191 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" : 1192 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" : 1193 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" : 1194 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" : 1195 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" : 1196 "VCC-UNKNOWN", 1197 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" : 1198 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V": 1199 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC": 1200 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" : 1201 "VPP-UNKNOWN", 1202 volts); 1203 return (0); 1204 } 1205 return (1); /* power changed correctly */ 1206 } 1207 1208 /* 1209 * detect the voltage for the card, and set it. Since the power 1210 * used is the square of the voltage, lower voltages is a big win 1211 * and what Windows does (and what Microsoft prefers). The MS paper 1212 * also talks about preferring the CIS entry as well. 1213 */ 1214 static int 1215 cbb_do_power(device_t brdev) 1216 { 1217 int voltage; 1218 1219 /* Prefer lowest voltage supported */ 1220 voltage = cbb_detect_voltage(brdev); 1221 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1222 if (voltage & CARD_YV_CARD) 1223 cbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC); 1224 else if (voltage & CARD_XV_CARD) 1225 cbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC); 1226 else if (voltage & CARD_3V_CARD) 1227 cbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC); 1228 else if (voltage & CARD_5V_CARD) 1229 cbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC); 1230 else { 1231 device_printf(brdev, "Unknown card voltage\n"); 1232 return (ENXIO); 1233 } 1234 return (0); 1235 } 1236 1237 /************************************************************************/ 1238 /* CardBus power functions */ 1239 /************************************************************************/ 1240 1241 static void 1242 cbb_cardbus_reset(device_t brdev) 1243 { 1244 struct cbb_softc *sc = device_get_softc(brdev); 1245 int delay_us; 1246 1247 delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000; 1248 1249 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 1250 1251 DELAY(delay_us); 1252 1253 /* If a card exists, unreset it! */ 1254 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) { 1255 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 1256 &~CBBM_BRIDGECTRL_RESET, 2); 1257 DELAY(delay_us); 1258 } 1259 } 1260 1261 static int 1262 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1263 { 1264 struct cbb_softc *sc = device_get_softc(brdev); 1265 int err; 1266 1267 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 1268 CBB_SOCKET_STAT_CD) 1269 return (ENODEV); 1270 1271 err = cbb_do_power(brdev); 1272 if (err) 1273 return (err); 1274 cbb_cardbus_reset(brdev); 1275 return (0); 1276 } 1277 1278 static void 1279 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1280 { 1281 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1282 cbb_cardbus_reset(brdev); 1283 } 1284 1285 /************************************************************************/ 1286 /* CardBus Resource */ 1287 /************************************************************************/ 1288 1289 static int 1290 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1291 { 1292 int basereg; 1293 int limitreg; 1294 1295 if ((win < 0) || (win > 1)) { 1296 DEVPRINTF((brdev, 1297 "cbb_cardbus_io_open: window out of range %d\n", win)); 1298 return (EINVAL); 1299 } 1300 1301 basereg = win * 8 + CBBR_IOBASE0; 1302 limitreg = win * 8 + CBBR_IOLIMIT0; 1303 1304 pci_write_config(brdev, basereg, start, 4); 1305 pci_write_config(brdev, limitreg, end, 4); 1306 return (0); 1307 } 1308 1309 static int 1310 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1311 { 1312 int basereg; 1313 int limitreg; 1314 1315 if ((win < 0) || (win > 1)) { 1316 DEVPRINTF((brdev, 1317 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1318 return (EINVAL); 1319 } 1320 1321 basereg = win*8 + CBBR_MEMBASE0; 1322 limitreg = win*8 + CBBR_MEMLIMIT0; 1323 1324 pci_write_config(brdev, basereg, start, 4); 1325 pci_write_config(brdev, limitreg, end, 4); 1326 return (0); 1327 } 1328 1329 /* 1330 * XXX The following function belongs in the pci bus layer. 1331 */ 1332 static void 1333 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1334 { 1335 uint32_t starts[2]; 1336 uint32_t ends[2]; 1337 struct cbb_reslist *rle; 1338 int align; 1339 int prefetchable[2]; 1340 uint32_t reg; 1341 1342 starts[0] = starts[1] = 0xffffffff; 1343 ends[0] = ends[1] = 0; 1344 1345 if (type == SYS_RES_MEMORY) 1346 align = CBB_MEMALIGN; 1347 else if (type == SYS_RES_IOPORT) 1348 align = CBB_IOALIGN; 1349 else 1350 align = 1; 1351 1352 SLIST_FOREACH(rle, &sc->rl, link) { 1353 if (rle->type != type) 1354 ; 1355 else if (rle->res == NULL) { 1356 device_printf(sc->dev, "WARNING: Resource not reserved? " 1357 "(type=%d, addr=%lx)\n", 1358 rle->type, rman_get_start(rle->res)); 1359 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) { 1360 /* XXX */ 1361 } else if (starts[0] == 0xffffffff) { 1362 starts[0] = rman_get_start(rle->res); 1363 ends[0] = rman_get_end(rle->res); 1364 prefetchable[0] = 1365 rman_get_flags(rle->res) & RF_PREFETCHABLE; 1366 } else if (rman_get_end(rle->res) > ends[0] && 1367 rman_get_start(rle->res) - ends[0] < 1368 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] == 1369 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1370 ends[0] = rman_get_end(rle->res); 1371 } else if (rman_get_start(rle->res) < starts[0] && 1372 starts[0] - rman_get_end(rle->res) < 1373 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] == 1374 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1375 starts[0] = rman_get_start(rle->res); 1376 } else if (starts[1] == 0xffffffff) { 1377 starts[1] = rman_get_start(rle->res); 1378 ends[1] = rman_get_end(rle->res); 1379 prefetchable[1] = 1380 rman_get_flags(rle->res) & RF_PREFETCHABLE; 1381 } else if (rman_get_end(rle->res) > ends[1] && 1382 rman_get_start(rle->res) - ends[1] < 1383 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] == 1384 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1385 ends[1] = rman_get_end(rle->res); 1386 } else if (rman_get_start(rle->res) < starts[1] && 1387 starts[1] - rman_get_end(rle->res) < 1388 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] == 1389 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1390 starts[1] = rman_get_start(rle->res); 1391 } else { 1392 uint32_t diffs[2]; 1393 int win; 1394 1395 diffs[0] = diffs[1] = 0xffffffff; 1396 if (rman_get_start(rle->res) > ends[0]) 1397 diffs[0] = rman_get_start(rle->res) - ends[0]; 1398 else if (rman_get_end(rle->res) < starts[0]) 1399 diffs[0] = starts[0] - rman_get_end(rle->res); 1400 if (rman_get_start(rle->res) > ends[1]) 1401 diffs[1] = rman_get_start(rle->res) - ends[1]; 1402 else if (rman_get_end(rle->res) < starts[1]) 1403 diffs[1] = starts[1] - rman_get_end(rle->res); 1404 1405 win = (diffs[0] <= diffs[1])?0:1; 1406 if (rman_get_start(rle->res) > ends[win]) 1407 ends[win] = rman_get_end(rle->res); 1408 else if (rman_get_end(rle->res) < starts[win]) 1409 starts[win] = rman_get_start(rle->res); 1410 if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE)) 1411 prefetchable[win] = 0; 1412 } 1413 1414 if (starts[0] != 0xffffffff) 1415 starts[0] -= starts[0] % align; 1416 if (starts[1] != 0xffffffff) 1417 starts[1] -= starts[1] % align; 1418 if (ends[0] % align != 0) 1419 ends[0] += align - ends[0]%align - 1; 1420 if (ends[1] % align != 0) 1421 ends[1] += align - ends[1]%align - 1; 1422 } 1423 1424 if (type == SYS_RES_MEMORY) { 1425 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1426 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1427 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1428 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0| 1429 CBBM_BRIDGECTRL_PREFETCH_1); 1430 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)| 1431 (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0); 1432 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1433 } else if (type == SYS_RES_IOPORT) { 1434 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1435 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1436 } 1437 } 1438 1439 static int 1440 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1441 int rid, struct resource *res) 1442 { 1443 int ret; 1444 1445 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1446 type, rid, res); 1447 if (ret != 0) 1448 return (ret); 1449 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1450 return (0); 1451 } 1452 1453 static int 1454 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1455 int rid, struct resource *res) 1456 { 1457 int ret; 1458 1459 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1460 type, rid, res); 1461 if (ret != 0) 1462 return (ret); 1463 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1464 return (0); 1465 } 1466 1467 static struct resource * 1468 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1469 int *rid, u_long start, u_long end, u_long count, uint flags) 1470 { 1471 struct cbb_softc *sc = device_get_softc(brdev); 1472 int tmp; 1473 struct resource *res; 1474 1475 switch (type) { 1476 case SYS_RES_IRQ: 1477 tmp = rman_get_start(sc->irq_res); 1478 if (start > tmp || end < tmp || count != 1) { 1479 device_printf(child, "requested interrupt %ld-%ld," 1480 "count = %ld not supported by cbb\n", 1481 start, end, count); 1482 return (NULL); 1483 } 1484 start = end = tmp; 1485 break; 1486 case SYS_RES_IOPORT: 1487 if (start <= cbb_start_32_io) 1488 start = cbb_start_32_io; 1489 if (end < start) 1490 end = start; 1491 break; 1492 case SYS_RES_MEMORY: 1493 if (start <= cbb_start_mem) 1494 start = cbb_start_mem; 1495 if (end < start) 1496 end = start; 1497 break; 1498 } 1499 1500 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1501 start, end, count, flags & ~RF_ACTIVE); 1502 if (res == NULL) { 1503 printf("cbb alloc res fail\n"); 1504 return (NULL); 1505 } 1506 cbb_insert_res(sc, res, type, *rid); 1507 if (flags & RF_ACTIVE) 1508 if (bus_activate_resource(child, type, *rid, res) != 0) { 1509 bus_release_resource(child, type, *rid, res); 1510 return (NULL); 1511 } 1512 1513 return (res); 1514 } 1515 1516 static int 1517 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1518 int rid, struct resource *res) 1519 { 1520 struct cbb_softc *sc = device_get_softc(brdev); 1521 int error; 1522 1523 if (rman_get_flags(res) & RF_ACTIVE) { 1524 error = bus_deactivate_resource(child, type, rid, res); 1525 if (error != 0) 1526 return (error); 1527 } 1528 cbb_remove_res(sc, res); 1529 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1530 type, rid, res)); 1531 } 1532 1533 /************************************************************************/ 1534 /* PC Card Power Functions */ 1535 /************************************************************************/ 1536 1537 static int 1538 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1539 { 1540 struct cbb_softc *sc = device_get_softc(brdev); 1541 int err; 1542 1543 DPRINTF(("cbb_pcic_socket_enable:\n")); 1544 1545 /* power down/up the socket to reset */ 1546 err = cbb_do_power(brdev); 1547 if (err) 1548 return (err); 1549 exca_reset(&sc->exca, child); 1550 1551 return (0); 1552 } 1553 1554 static void 1555 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1556 { 1557 struct cbb_softc *sc = device_get_softc(brdev); 1558 1559 DPRINTF(("cbb_pcic_socket_disable\n")); 1560 1561 /* reset signal asserting... */ 1562 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 1563 DELAY(2*1000); 1564 1565 /* power down the socket */ 1566 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1567 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE); 1568 1569 /* wait 300ms until power fails (Tpf). */ 1570 DELAY(300 * 1000); 1571 } 1572 1573 /************************************************************************/ 1574 /* POWER methods */ 1575 /************************************************************************/ 1576 1577 static int 1578 cbb_power_enable_socket(device_t brdev, device_t child) 1579 { 1580 struct cbb_softc *sc = device_get_softc(brdev); 1581 1582 if (sc->flags & CBB_16BIT_CARD) 1583 return (cbb_pcic_power_enable_socket(brdev, child)); 1584 else 1585 return (cbb_cardbus_power_enable_socket(brdev, child)); 1586 } 1587 1588 static void 1589 cbb_power_disable_socket(device_t brdev, device_t child) 1590 { 1591 struct cbb_softc *sc = device_get_softc(brdev); 1592 if (sc->flags & CBB_16BIT_CARD) 1593 cbb_pcic_power_disable_socket(brdev, child); 1594 else 1595 cbb_cardbus_power_disable_socket(brdev, child); 1596 } 1597 static int 1598 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1599 struct resource *res) 1600 { 1601 int err; 1602 struct cbb_softc *sc = device_get_softc(brdev); 1603 if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */ 1604 switch (type) { 1605 case SYS_RES_IOPORT: 1606 err = exca_io_map(&sc->exca, 0, res); 1607 break; 1608 case SYS_RES_MEMORY: 1609 err = exca_mem_map(&sc->exca, 0, res); 1610 break; 1611 default: 1612 err = 0; 1613 break; 1614 } 1615 if (err) 1616 return (err); 1617 1618 } 1619 return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1620 type, rid, res)); 1621 } 1622 1623 static int 1624 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1625 int rid, struct resource *res) 1626 { 1627 struct cbb_softc *sc = device_get_softc(brdev); 1628 1629 if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */ 1630 switch (type) { 1631 case SYS_RES_IOPORT: 1632 if (exca_io_unmap_res(&sc->exca, res)) 1633 return (ENOENT); 1634 break; 1635 case SYS_RES_MEMORY: 1636 if (exca_mem_unmap_res(&sc->exca, res)) 1637 return (ENOENT); 1638 break; 1639 } 1640 } 1641 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1642 type, rid, res)); 1643 } 1644 1645 static struct resource * 1646 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1647 u_long start, u_long end, u_long count, uint flags) 1648 { 1649 struct resource *res = NULL; 1650 struct cbb_softc *sc = device_get_softc(brdev); 1651 int tmp; 1652 1653 switch (type) { 1654 case SYS_RES_MEMORY: 1655 if (start < cbb_start_mem) 1656 start = cbb_start_mem; 1657 if (end < start) 1658 end = start; 1659 flags = (flags & ~RF_ALIGNMENT_MASK) | 1660 rman_make_alignment_flags(CBB_MEMALIGN); 1661 break; 1662 case SYS_RES_IOPORT: 1663 if (start < cbb_start_16_io) 1664 start = cbb_start_16_io; 1665 if (end < start) 1666 end = start; 1667 break; 1668 case SYS_RES_IRQ: 1669 tmp = rman_get_start(sc->irq_res); 1670 if (start > tmp || end < tmp || count != 1) { 1671 device_printf(child, "requested interrupt %ld-%ld," 1672 "count = %ld not supported by cbb\n", 1673 start, end, count); 1674 return (NULL); 1675 } 1676 flags |= RF_SHAREABLE; 1677 start = end = rman_get_start(sc->irq_res); 1678 break; 1679 } 1680 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1681 start, end, count, flags & ~RF_ACTIVE); 1682 if (res == NULL) 1683 return (NULL); 1684 cbb_insert_res(sc, res, type, *rid); 1685 if (flags & RF_ACTIVE) { 1686 if (bus_activate_resource(child, type, *rid, res) != 0) { 1687 bus_release_resource(child, type, *rid, res); 1688 return (NULL); 1689 } 1690 } 1691 1692 return (res); 1693 } 1694 1695 static int 1696 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1697 int rid, struct resource *res) 1698 { 1699 struct cbb_softc *sc = device_get_softc(brdev); 1700 int error; 1701 1702 if (rman_get_flags(res) & RF_ACTIVE) { 1703 error = bus_deactivate_resource(child, type, rid, res); 1704 if (error != 0) 1705 return (error); 1706 } 1707 cbb_remove_res(sc, res); 1708 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1709 type, rid, res)); 1710 } 1711 1712 /************************************************************************/ 1713 /* PC Card methods */ 1714 /************************************************************************/ 1715 1716 static int 1717 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1718 uint32_t flags) 1719 { 1720 struct cbb_softc *sc = device_get_softc(brdev); 1721 struct resource *res; 1722 1723 if (type != SYS_RES_MEMORY) 1724 return (EINVAL); 1725 res = cbb_find_res(sc, type, rid); 1726 if (res == NULL) { 1727 device_printf(brdev, 1728 "set_res_flags: specified rid not found\n"); 1729 return (ENOENT); 1730 } 1731 return (exca_mem_set_flags(&sc->exca, res, flags)); 1732 } 1733 1734 static int 1735 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1736 uint32_t cardaddr, uint32_t *deltap) 1737 { 1738 struct cbb_softc *sc = device_get_softc(brdev); 1739 struct resource *res; 1740 1741 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1742 if (res == NULL) { 1743 device_printf(brdev, 1744 "set_memory_offset: specified rid not found\n"); 1745 return (ENOENT); 1746 } 1747 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap)); 1748 } 1749 1750 /************************************************************************/ 1751 /* BUS Methods */ 1752 /************************************************************************/ 1753 1754 1755 static int 1756 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1757 struct resource *r) 1758 { 1759 struct cbb_softc *sc = device_get_softc(brdev); 1760 1761 if (sc->flags & CBB_16BIT_CARD) 1762 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1763 else 1764 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1765 r)); 1766 } 1767 1768 static int 1769 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1770 int rid, struct resource *r) 1771 { 1772 struct cbb_softc *sc = device_get_softc(brdev); 1773 1774 if (sc->flags & CBB_16BIT_CARD) 1775 return (cbb_pcic_deactivate_resource(brdev, child, type, 1776 rid, r)); 1777 else 1778 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1779 rid, r)); 1780 } 1781 1782 static struct resource * 1783 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1784 u_long start, u_long end, u_long count, uint flags) 1785 { 1786 struct cbb_softc *sc = device_get_softc(brdev); 1787 1788 if (sc->flags & CBB_16BIT_CARD) 1789 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1790 start, end, count, flags)); 1791 else 1792 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1793 start, end, count, flags)); 1794 } 1795 1796 static int 1797 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1798 struct resource *r) 1799 { 1800 struct cbb_softc *sc = device_get_softc(brdev); 1801 1802 if (sc->flags & CBB_16BIT_CARD) 1803 return (cbb_pcic_release_resource(brdev, child, type, 1804 rid, r)); 1805 else 1806 return (cbb_cardbus_release_resource(brdev, child, type, 1807 rid, r)); 1808 } 1809 1810 static int 1811 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1812 { 1813 struct cbb_softc *sc = device_get_softc(brdev); 1814 1815 switch (which) { 1816 case PCIB_IVAR_BUS: 1817 *result = sc->secbus; 1818 return (0); 1819 } 1820 return (ENOENT); 1821 } 1822 1823 static int 1824 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1825 { 1826 struct cbb_softc *sc = device_get_softc(brdev); 1827 1828 switch (which) { 1829 case PCIB_IVAR_BUS: 1830 sc->secbus = value; 1831 break; 1832 } 1833 return (ENOENT); 1834 } 1835 1836 /************************************************************************/ 1837 /* PCI compat methods */ 1838 /************************************************************************/ 1839 1840 static int 1841 cbb_maxslots(device_t brdev) 1842 { 1843 return (0); 1844 } 1845 1846 static uint32_t 1847 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width) 1848 { 1849 /* 1850 * Pass through to the next ppb up the chain (i.e. our grandparent). 1851 */ 1852 return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)), 1853 b, s, f, reg, width)); 1854 } 1855 1856 static void 1857 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val, 1858 int width) 1859 { 1860 /* 1861 * Pass through to the next ppb up the chain (i.e. our grandparent). 1862 */ 1863 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)), 1864 b, s, f, reg, val, width); 1865 } 1866 1867 static int 1868 cbb_suspend(device_t self) 1869 { 1870 int error = 0; 1871 struct cbb_softc *sc = device_get_softc(self); 1872 1873 cbb_setb(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1874 bus_teardown_intr(self, sc->irq_res, sc->intrhand); 1875 error = bus_generic_suspend(self); 1876 return (error); 1877 } 1878 1879 static int 1880 cbb_resume(device_t self) 1881 { 1882 int error = 0; 1883 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1884 uint32_t tmp; 1885 1886 /* 1887 * Some BIOSes will not save the BARs for the pci chips, so we 1888 * must do it ourselves. If the BAR is reset to 0 for an I/O 1889 * device, it will read back as 0x1, so no explicit test for 1890 * memory devices are needed. 1891 * 1892 * Note: The PCI bus code should do this automatically for us on 1893 * suspend/resume, but until it does, we have to cope. 1894 */ 1895 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1896 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1897 rman_get_start(sc->base_res))); 1898 1899 cbb_chipinit(sc); 1900 1901 /* reset interrupt -- Do we really need to do this? */ 1902 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1903 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1904 1905 /* re-establish the interrupt. */ 1906 if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_AV, cbb_intr, sc, 1907 &sc->intrhand)) { 1908 device_printf(self, "couldn't re-establish interrupt"); 1909 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res); 1910 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE, 1911 sc->base_res); 1912 sc->irq_res = NULL; 1913 sc->base_res = NULL; 1914 return (ENOMEM); 1915 } 1916 1917 /* CSC Interrupt: Card detect interrupt on */ 1918 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1919 1920 /* Force us to go query the socket state */ 1921 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_SOCKET_EVENT_CD); 1922 1923 error = bus_generic_resume(self); 1924 1925 return (error); 1926 } 1927 1928 static device_method_t cbb_methods[] = { 1929 /* Device interface */ 1930 DEVMETHOD(device_probe, cbb_probe), 1931 DEVMETHOD(device_attach, cbb_attach), 1932 DEVMETHOD(device_detach, cbb_detach), 1933 DEVMETHOD(device_shutdown, cbb_shutdown), 1934 DEVMETHOD(device_suspend, cbb_suspend), 1935 DEVMETHOD(device_resume, cbb_resume), 1936 1937 /* bus methods */ 1938 DEVMETHOD(bus_print_child, bus_generic_print_child), 1939 DEVMETHOD(bus_read_ivar, cbb_read_ivar), 1940 DEVMETHOD(bus_write_ivar, cbb_write_ivar), 1941 DEVMETHOD(bus_alloc_resource, cbb_alloc_resource), 1942 DEVMETHOD(bus_release_resource, cbb_release_resource), 1943 DEVMETHOD(bus_activate_resource, cbb_activate_resource), 1944 DEVMETHOD(bus_deactivate_resource, cbb_deactivate_resource), 1945 DEVMETHOD(bus_driver_added, cbb_driver_added), 1946 DEVMETHOD(bus_child_detached, cbb_child_detached), 1947 DEVMETHOD(bus_setup_intr, cbb_setup_intr), 1948 DEVMETHOD(bus_teardown_intr, cbb_teardown_intr), 1949 1950 /* 16-bit card interface */ 1951 DEVMETHOD(card_set_res_flags, cbb_pcic_set_res_flags), 1952 DEVMETHOD(card_set_memory_offset, cbb_pcic_set_memory_offset), 1953 1954 /* power interface */ 1955 DEVMETHOD(power_enable_socket, cbb_power_enable_socket), 1956 DEVMETHOD(power_disable_socket, cbb_power_disable_socket), 1957 1958 /* pcib compatibility interface */ 1959 DEVMETHOD(pcib_maxslots, cbb_maxslots), 1960 DEVMETHOD(pcib_read_config, cbb_read_config), 1961 DEVMETHOD(pcib_write_config, cbb_write_config), 1962 {0,0} 1963 }; 1964 1965 static driver_t cbb_driver = { 1966 "cbb", 1967 cbb_methods, 1968 sizeof(struct cbb_softc) 1969 }; 1970 1971 static devclass_t cbb_devclass; 1972 1973 DRIVER_MODULE(cbb, pci, cbb_driver, cbb_devclass, 0, 0); 1974 MODULE_VERSION(cbb, 1); 1975 MODULE_DEPEND(cbb, exca, 1, 1, 1); 1976