1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/lock.h> 88 #include <sys/malloc.h> 89 #include <sys/mutex.h> 90 #include <sys/proc.h> 91 #include <sys/rman.h> 92 #include <sys/sysctl.h> 93 #include <sys/systm.h> 94 #include <machine/bus.h> 95 #include <machine/resource.h> 96 97 #include <dev/pci/pcireg.h> 98 #include <dev/pci/pcivar.h> 99 100 #include <dev/pccard/pccardreg.h> 101 #include <dev/pccard/pccardvar.h> 102 103 #include <dev/exca/excareg.h> 104 #include <dev/exca/excavar.h> 105 106 #include <dev/pccbb/pccbbreg.h> 107 #include <dev/pccbb/pccbbvar.h> 108 109 #include "power_if.h" 110 #include "card_if.h" 111 #include "pcib_if.h" 112 113 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 114 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 115 116 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 117 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 118 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 119 pci_write_config(DEV, REG, ( \ 120 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 121 122 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 123 124 #define CBB_START_MEM 0x88000000 125 #define CBB_START_32_IO 0x1000 126 #define CBB_START_16_IO 0x100 127 128 devclass_t cbb_devclass; 129 130 /* sysctl vars */ 131 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 132 133 /* There's no way to say TUNEABLE_LONG to get the right types */ 134 u_long cbb_start_mem = CBB_START_MEM; 135 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 136 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 137 &cbb_start_mem, CBB_START_MEM, 138 "Starting address for memory allocations"); 139 140 u_long cbb_start_16_io = CBB_START_16_IO; 141 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 142 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 143 &cbb_start_16_io, CBB_START_16_IO, 144 "Starting ioport for 16-bit cards"); 145 146 u_long cbb_start_32_io = CBB_START_32_IO; 147 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 148 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 149 &cbb_start_32_io, CBB_START_32_IO, 150 "Starting ioport for 32-bit cards"); 151 152 int cbb_debug = 0; 153 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 154 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 155 "Verbose cardbus bridge debugging"); 156 157 static void cbb_insert(struct cbb_softc *sc); 158 static void cbb_removal(struct cbb_softc *sc); 159 static uint32_t cbb_detect_voltage(device_t brdev); 160 static void cbb_cardbus_reset(device_t brdev); 161 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 162 uint32_t end); 163 static int cbb_cardbus_mem_open(device_t brdev, int win, 164 uint32_t start, uint32_t end); 165 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 166 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 167 int type, int rid, struct resource *res); 168 static int cbb_cardbus_deactivate_resource(device_t brdev, 169 device_t child, int type, int rid, struct resource *res); 170 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 171 device_t child, int type, int *rid, u_long start, 172 u_long end, u_long count, u_int flags); 173 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 174 int type, int rid, struct resource *res); 175 static int cbb_cardbus_power_enable_socket(device_t brdev, 176 device_t child); 177 static void cbb_cardbus_power_disable_socket(device_t brdev, 178 device_t child); 179 static void cbb_func_intr(void *arg); 180 181 static void 182 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 183 { 184 struct cbb_reslist *rle; 185 186 SLIST_FOREACH(rle, &sc->rl, link) { 187 if (rle->res == res) { 188 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 189 free(rle, M_DEVBUF); 190 return; 191 } 192 } 193 } 194 195 static struct resource * 196 cbb_find_res(struct cbb_softc *sc, int type, int rid) 197 { 198 struct cbb_reslist *rle; 199 200 SLIST_FOREACH(rle, &sc->rl, link) 201 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 202 return (rle->res); 203 return (NULL); 204 } 205 206 static void 207 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 208 int rid) 209 { 210 struct cbb_reslist *rle; 211 212 /* 213 * Need to record allocated resource so we can iterate through 214 * it later. 215 */ 216 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 217 if (rle == NULL) 218 panic("cbb_cardbus_alloc_resource: can't record entry!"); 219 rle->res = res; 220 rle->type = type; 221 rle->rid = rid; 222 SLIST_INSERT_HEAD(&sc->rl, rle, link); 223 } 224 225 static void 226 cbb_destroy_res(struct cbb_softc *sc) 227 { 228 struct cbb_reslist *rle; 229 230 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 231 device_printf(sc->dev, "Danger Will Robinson: Resource " 232 "left allocated! This is a bug... " 233 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 234 rman_get_start(rle->res)); 235 SLIST_REMOVE_HEAD(&sc->rl, link); 236 free(rle, M_DEVBUF); 237 } 238 } 239 240 /* 241 * Disable function interrupts by telling the bridge to generate IRQ1 242 * interrupts. These interrupts aren't really generated by the chip, since 243 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 244 * initialization, so this helps to work around the problem. 245 * 246 * XXX We can't do this workaround for all chipsets, because this 247 * XXX causes interference with the keyboard because somechipsets will 248 * XXX actually signal IRQ1 over their serial interrupt connections to 249 * XXX the south bridge. Disable it it for now. 250 */ 251 void 252 cbb_disable_func_intr(struct cbb_softc *sc) 253 { 254 #if 0 255 uint8_t reg; 256 257 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 258 EXCA_INTR_IRQ_RESERVED1; 259 exca_putb(&sc->exca[0], EXCA_INTR, reg); 260 #endif 261 } 262 263 /* 264 * Enable function interrupts. We turn on function interrupts when the card 265 * requests an interrupt. The PCMCIA standard says that we should set 266 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 267 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 268 * cards. 269 */ 270 static void 271 cbb_enable_func_intr(struct cbb_softc *sc) 272 { 273 uint8_t reg; 274 275 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 276 EXCA_INTR_IRQ_NONE; 277 exca_putb(&sc->exca[0], EXCA_INTR, reg); 278 } 279 280 int 281 cbb_detach(device_t brdev) 282 { 283 struct cbb_softc *sc = device_get_softc(brdev); 284 device_t *devlist; 285 int tmp, tries, error, numdevs; 286 287 /* 288 * Before we delete the children (which we have to do because 289 * attach doesn't check for children busses correctly), we have 290 * to detach the children. Even if we didn't need to delete the 291 * children, we have to detach them. 292 */ 293 error = bus_generic_detach(brdev); 294 if (error != 0) 295 return (error); 296 297 /* 298 * Since the attach routine doesn't search for children before it 299 * attaches them to this device, we must delete them here in order 300 * for the kldload/unload case to work. If we failed to do that, then 301 * we'd get duplicate devices when cbb.ko was reloaded. 302 */ 303 tries = 10; 304 do { 305 error = device_get_children(brdev, &devlist, &numdevs); 306 if (error == 0) 307 break; 308 /* 309 * Try hard to cope with low memory. 310 */ 311 if (error == ENOMEM) { 312 pause("cbbnomem", 1); 313 continue; 314 } 315 } while (tries-- > 0); 316 for (tmp = 0; tmp < numdevs; tmp++) 317 device_delete_child(brdev, devlist[tmp]); 318 free(devlist, M_TEMP); 319 320 /* Turn off the interrupts */ 321 cbb_set(sc, CBB_SOCKET_MASK, 0); 322 323 /* reset 16-bit pcmcia bus */ 324 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 325 326 /* turn off power */ 327 cbb_power(brdev, CARD_OFF); 328 329 /* Ack the interrupt */ 330 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 331 332 /* 333 * Wait for the thread to die. kthread_exit will do a wakeup 334 * on the event thread's struct thread * so that we know it is 335 * safe to proceed. IF the thread is running, set the please 336 * die flag and wait for it to comply. Since the wakeup on 337 * the event thread happens only in kthread_exit, we don't 338 * need to loop here. 339 */ 340 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 341 mtx_lock(&sc->mtx); 342 sc->flags |= CBB_KTHREAD_DONE; 343 while (sc->flags & CBB_KTHREAD_RUNNING) { 344 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 345 cv_broadcast(&sc->cv); 346 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 347 } 348 mtx_unlock(&sc->mtx); 349 350 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 351 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 352 sc->base_res); 353 mtx_destroy(&sc->mtx); 354 cv_destroy(&sc->cv); 355 cv_destroy(&sc->powercv); 356 return (0); 357 } 358 359 int 360 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 362 void **cookiep) 363 { 364 struct cbb_intrhand *ih; 365 struct cbb_softc *sc = device_get_softc(dev); 366 int err; 367 368 /* 369 * Well, this is no longer strictly true. You can have multiple 370 * FAST ISRs, but can't mix fast and slow, so we have to assume 371 * least common denominator until the base system supports mixing 372 * and matching better. 373 */ 374 if (filt != NULL) 375 return (EINVAL); 376 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 377 if (ih == NULL) 378 return (ENOMEM); 379 *cookiep = ih; 380 ih->intr = intr; 381 ih->arg = arg; 382 ih->sc = sc; 383 /* 384 * XXX need to turn on ISA interrupts, if we ever support them, but 385 * XXX for now that's all we need to do. 386 */ 387 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 388 NULL, cbb_func_intr, ih, &ih->cookie); 389 if (err != 0) { 390 free(ih, M_DEVBUF); 391 return (err); 392 } 393 cbb_enable_func_intr(sc); 394 sc->flags |= CBB_CARD_OK; 395 return 0; 396 } 397 398 int 399 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 400 void *cookie) 401 { 402 struct cbb_intrhand *ih; 403 int err; 404 405 /* XXX Need to do different things for ISA interrupts. */ 406 ih = (struct cbb_intrhand *) cookie; 407 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 408 ih->cookie); 409 if (err != 0) 410 return (err); 411 free(ih, M_DEVBUF); 412 return (0); 413 } 414 415 416 void 417 cbb_driver_added(device_t brdev, driver_t *driver) 418 { 419 struct cbb_softc *sc = device_get_softc(brdev); 420 device_t *devlist; 421 device_t dev; 422 int tmp; 423 int numdevs; 424 int wake = 0; 425 426 DEVICE_IDENTIFY(driver, brdev); 427 tmp = device_get_children(brdev, &devlist, &numdevs); 428 if (tmp != 0) { 429 device_printf(brdev, "Cannot get children list, no reprobe\n"); 430 return; 431 } 432 for (tmp = 0; tmp < numdevs; tmp++) { 433 dev = devlist[tmp]; 434 if (device_get_state(dev) == DS_NOTPRESENT && 435 device_probe_and_attach(dev) == 0) 436 wake++; 437 } 438 free(devlist, M_TEMP); 439 440 if (wake > 0) { 441 mtx_lock(&sc->mtx); 442 cv_signal(&sc->cv); 443 mtx_unlock(&sc->mtx); 444 } 445 } 446 447 void 448 cbb_child_detached(device_t brdev, device_t child) 449 { 450 struct cbb_softc *sc = device_get_softc(brdev); 451 452 /* I'm not sure we even need this */ 453 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 454 device_printf(brdev, "Unknown child detached: %s\n", 455 device_get_nameunit(child)); 456 } 457 458 /************************************************************************/ 459 /* Kthreads */ 460 /************************************************************************/ 461 462 void 463 cbb_event_thread(void *arg) 464 { 465 struct cbb_softc *sc = arg; 466 uint32_t status; 467 int err; 468 int not_a_card = 0; 469 470 mtx_lock(&sc->mtx); 471 sc->flags |= CBB_KTHREAD_RUNNING; 472 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 473 mtx_unlock(&sc->mtx); 474 /* 475 * We take out Giant here because we need it deep, 476 * down in the bowels of the vm system for mapping the 477 * memory we need to read the CIS. In addition, since 478 * we are adding/deleting devices from the dev tree, 479 * and that code isn't MP safe, we have to hold Giant. 480 */ 481 mtx_lock(&Giant); 482 status = cbb_get(sc, CBB_SOCKET_STATE); 483 DPRINTF(("Status is 0x%x\n", status)); 484 if (!CBB_CARD_PRESENT(status)) { 485 not_a_card = 0; /* We know card type */ 486 cbb_removal(sc); 487 } else if (status & CBB_STATE_NOT_A_CARD) { 488 /* 489 * Up to 10 times, try to rescan the card when we see 490 * NOT_A_CARD. 10 is somehwat arbitrary. When this 491 * pathology hits, there's a ~40% chance each try will 492 * fail. 10 tries takes about 5s and results in a 493 * 99.99% certainty of the results. 494 */ 495 if (not_a_card++ < 10) { 496 DEVPRINTF((sc->dev, 497 "Not a card bit set, rescanning\n")); 498 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 499 } else { 500 device_printf(sc->dev, 501 "Can't determine card type\n"); 502 } 503 } else { 504 not_a_card = 0; /* We know card type */ 505 cbb_insert(sc); 506 } 507 mtx_unlock(&Giant); 508 509 /* 510 * Wait until it has been 250ms since the last time we 511 * get an interrupt. We handle the rest of the interrupt 512 * at the top of the loop. Although we clear the bit in the 513 * ISR, we signal sc->cv from the detach path after we've 514 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 515 * 250ms sleep here. 516 * 517 * In our ISR, we turn off the card changed interrupt. Turn 518 * them back on here before we wait for them to happen. We 519 * turn them on/off so that we can tolerate a large latency 520 * between the time we signal cbb_event_thread and it gets 521 * a chance to run. 522 */ 523 mtx_lock(&sc->mtx); 524 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 525 cv_wait(&sc->cv, &sc->mtx); 526 err = 0; 527 while (err != EWOULDBLOCK && 528 (sc->flags & CBB_KTHREAD_DONE) == 0) 529 err = cv_timedwait(&sc->cv, &sc->mtx, hz / 4); 530 } 531 DEVPRINTF((sc->dev, "Thread terminating\n")); 532 sc->flags &= ~CBB_KTHREAD_RUNNING; 533 mtx_unlock(&sc->mtx); 534 kthread_exit(0); 535 } 536 537 /************************************************************************/ 538 /* Insert/removal */ 539 /************************************************************************/ 540 541 static void 542 cbb_insert(struct cbb_softc *sc) 543 { 544 uint32_t sockevent, sockstate; 545 546 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 547 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 548 549 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 550 sockevent, sockstate)); 551 552 if (sockstate & CBB_STATE_R2_CARD) { 553 if (device_is_attached(sc->exca[0].pccarddev)) { 554 sc->flags |= CBB_16BIT_CARD; 555 exca_insert(&sc->exca[0]); 556 } else { 557 device_printf(sc->dev, 558 "16-bit card inserted, but no pccard bus.\n"); 559 } 560 } else if (sockstate & CBB_STATE_CB_CARD) { 561 if (device_is_attached(sc->cbdev)) { 562 sc->flags &= ~CBB_16BIT_CARD; 563 CARD_ATTACH_CARD(sc->cbdev); 564 } else { 565 device_printf(sc->dev, 566 "CardBus card inserted, but no cardbus bus.\n"); 567 } 568 } else { 569 /* 570 * We should power the card down, and try again a couple of 571 * times if this happens. XXX 572 */ 573 device_printf(sc->dev, "Unsupported card type detected\n"); 574 } 575 } 576 577 static void 578 cbb_removal(struct cbb_softc *sc) 579 { 580 sc->flags &= ~CBB_CARD_OK; 581 if (sc->flags & CBB_16BIT_CARD) { 582 exca_removal(&sc->exca[0]); 583 } else { 584 if (device_is_attached(sc->cbdev)) 585 CARD_DETACH_CARD(sc->cbdev); 586 } 587 cbb_destroy_res(sc); 588 } 589 590 /************************************************************************/ 591 /* Interrupt Handler */ 592 /************************************************************************/ 593 594 /* 595 * Since we touch hardware in the worst case, we don't need to use atomic 596 * ops on the CARD_OK tests. They would save us a trip to the hardware 597 * if CARD_OK was recently cleared and the caches haven't updated yet. 598 * However, an atomic op costs between 100-200 CPU cycles. On a 3GHz 599 * machine, this is about 33-66ns, whereas a trip the the hardware 600 * is about that. On slower machines, the cost is even higher, so the 601 * trip to the hardware is cheaper and achieves the same ends that 602 * a fully locked operation would give us. 603 * 604 * This is a separate routine because we'd have to use locking and/or 605 * other synchronization in cbb_intr to do this there. That would be 606 * even more expensive. 607 * 608 * I need to investigate what this means for a SMP machine with multiple 609 * CPUs servicing the ISR when an eject happens. In the case of a dirty 610 * eject, CD glitches and we might read 'card present' from the hardware 611 * due to this jitter. If we assumed that cbb_intr() ran before 612 * cbb_func_intr(), we could just check the SOCKET_MASK register and if 613 * CD changes were clear there, then we'd know the card was gone. 614 */ 615 static void 616 cbb_func_intr(void *arg) 617 { 618 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 619 struct cbb_softc *sc = ih->sc; 620 621 /* 622 * Make sure that the card is really there. 623 */ 624 if ((sc->flags & CBB_CARD_OK) == 0) 625 return; 626 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 627 sc->flags &= ~CBB_CARD_OK; 628 return; 629 } 630 631 /* 632 * nb: don't have to check for giant or not, since that's done 633 * in the ISR dispatch 634 */ 635 (*ih->intr)(ih->arg); 636 } 637 638 /************************************************************************/ 639 /* Generic Power functions */ 640 /************************************************************************/ 641 642 static uint32_t 643 cbb_detect_voltage(device_t brdev) 644 { 645 struct cbb_softc *sc = device_get_softc(brdev); 646 uint32_t psr; 647 uint32_t vol = CARD_UKN_CARD; 648 649 psr = cbb_get(sc, CBB_SOCKET_STATE); 650 651 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 652 vol |= CARD_5V_CARD; 653 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 654 vol |= CARD_3V_CARD; 655 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 656 vol |= CARD_XV_CARD; 657 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 658 vol |= CARD_YV_CARD; 659 660 return (vol); 661 } 662 663 static uint8_t 664 cbb_o2micro_power_hack(struct cbb_softc *sc) 665 { 666 uint8_t reg; 667 668 /* 669 * Issue #2: INT# not qualified with IRQ Routing Bit. An 670 * unexpected PCI INT# may be generated during PC Card 671 * initialization even with the IRQ Routing Bit Set with some 672 * PC Cards. 673 * 674 * This is a two part issue. The first part is that some of 675 * our older controllers have an issue in which the slot's PCI 676 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 677 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 678 * is selected (ExCA register 03h bits 3:0, of the slot, are 679 * cleared) we will generate INT# if IREQ# is asserted. The 680 * second part is because some PC Cards prematurally assert 681 * IREQ# before the ExCA registers are fully programmed. This 682 * in turn asserts INT# because ExCA register 03h bits 3:0 683 * (ISA IRQ Select) are not yet programmed. 684 * 685 * The fix for this issue, which will work for any controller 686 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 687 * (select IRQ1), of the slot, before turning on slot power. 688 * Selecting IRQ1 will result in INT# NOT being asserted 689 * (because IRQ1 is selected), and IRQ1 won't be asserted 690 * because our controllers don't generate IRQ1. 691 * 692 * Other, non O2Micro controllers will generate irq 1 in some 693 * situations, so we can't do this hack for everybody. Reports of 694 * keyboard controller's interrupts being suppressed occurred when 695 * we did this. 696 */ 697 reg = exca_getb(&sc->exca[0], EXCA_INTR); 698 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 699 return (reg); 700 } 701 702 /* 703 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 704 * we don't have an interrupt storm on power on. This has the efect of 705 * disabling card status change interrupts for the duration of poweron. 706 */ 707 static void 708 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 709 { 710 exca_putb(&sc->exca[0], EXCA_INTR, reg); 711 } 712 713 int 714 cbb_power(device_t brdev, int volts) 715 { 716 uint32_t status, sock_ctrl, reg_ctrl, mask; 717 struct cbb_softc *sc = device_get_softc(brdev); 718 int cnt, sane; 719 int retval = 0; 720 int on = 0; 721 uint8_t reg = 0; 722 723 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 724 725 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 726 switch (volts & CARD_VCCMASK) { 727 case 5: 728 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 729 on++; 730 break; 731 case 3: 732 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 733 on++; 734 break; 735 case XV: 736 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 737 on++; 738 break; 739 case YV: 740 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 741 on++; 742 break; 743 case 0: 744 break; 745 default: 746 return (0); /* power NEVER changed */ 747 } 748 749 /* VPP == VCC */ 750 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 751 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 752 753 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 754 return (1); /* no change necessary */ 755 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 756 if (volts != 0 && sc->chipset == CB_O2MICRO) 757 reg = cbb_o2micro_power_hack(sc); 758 759 /* 760 * We have to mask the card change detect interrupt while 761 * we're messing with the power. It is allowed to bounce 762 * while we're messing with power as things settle down. In 763 * addition, we mask off the card's function interrupt by 764 * routing it via the ISA bus. This bit generally only 765 * affects 16-bit cards. Some bridges allow one to set 766 * another bit to have it also affect 32-bit cards. Since 767 * 32-bit cards are required to be better behaved, we don't 768 * bother to get into those bridge specific features. 769 */ 770 mask = cbb_get(sc, CBB_SOCKET_MASK); 771 mask |= CBB_SOCKET_MASK_POWER; 772 mask &= ~CBB_SOCKET_MASK_CD; 773 cbb_set(sc, CBB_SOCKET_MASK, mask); 774 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 775 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 776 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 777 if (on) { 778 mtx_lock(&sc->mtx); 779 cnt = sc->powerintr; 780 /* 781 * We have a shortish timeout of 500ms here. Some 782 * bridges do not generate a POWER_CYCLE event for 783 * 16-bit cards. In those cases, we have to cope the 784 * best we can, and having only a short delay is 785 * better than the alternatives. 786 */ 787 sane = 10; 788 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 789 cnt == sc->powerintr && sane-- > 0) 790 cv_timedwait(&sc->powercv, &sc->mtx, hz / 20); 791 mtx_unlock(&sc->mtx); 792 /* 793 * The TOPIC95B requires a little bit extra time to get 794 * its act together, so delay for an additional 100ms. Also 795 * as documented below, it doesn't seem to set the POWER_CYCLE 796 * bit, so don't whine if it never came on. 797 */ 798 if (sc->chipset == CB_TOPIC95) { 799 pause("cbb95B", hz / 10); 800 } else if (sane <= 0) { 801 device_printf(sc->dev, "power timeout, doom?\n"); 802 } 803 } 804 805 /* 806 * After the power is good, we can turn off the power interrupt. 807 * However, the PC Card standard says that we must delay turning the 808 * CD bit back on for a bit to allow for bouncyness on power down 809 * (recall that we don't wait above for a power down, since we don't 810 * get an interrupt for that). We're called either from the suspend 811 * code in which case we don't want to turn card change on again, or 812 * we're called from the card insertion code, in which case the cbb 813 * thread will turn it on for us before it waits to be woken by a 814 * change event. 815 * 816 * NB: Topic95B doesn't set the power cycle bit. we assume that 817 * both it and the TOPIC95 behave the same. 818 */ 819 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 820 status = cbb_get(sc, CBB_SOCKET_STATE); 821 if (on && sc->chipset != CB_TOPIC95) { 822 if ((status & CBB_STATE_POWER_CYCLE) == 0) 823 device_printf(sc->dev, "Power not on?\n"); 824 } 825 if (status & CBB_STATE_BAD_VCC_REQ) { 826 device_printf(sc->dev, "Bad Vcc requested\n"); 827 /* XXX Do we want to do something to mitigate things here? */ 828 goto done; 829 } 830 if (sc->chipset == CB_TOPIC97) { 831 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 832 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 833 if (on) 834 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 835 else 836 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 837 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 838 } 839 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 840 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 841 retval = 1; 842 done:; 843 if (volts != 0 && sc->chipset == CB_O2MICRO) 844 cbb_o2micro_power_hack2(sc, reg); 845 return (retval); 846 } 847 848 static int 849 cbb_current_voltage(device_t brdev) 850 { 851 struct cbb_softc *sc = device_get_softc(brdev); 852 uint32_t ctrl; 853 854 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 855 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 856 case CBB_SOCKET_CTRL_VCC_5V: 857 return CARD_5V_CARD; 858 case CBB_SOCKET_CTRL_VCC_3V: 859 return CARD_3V_CARD; 860 case CBB_SOCKET_CTRL_VCC_XV: 861 return CARD_XV_CARD; 862 case CBB_SOCKET_CTRL_VCC_YV: 863 return CARD_YV_CARD; 864 } 865 return 0; 866 } 867 868 /* 869 * detect the voltage for the card, and set it. Since the power 870 * used is the square of the voltage, lower voltages is a big win 871 * and what Windows does (and what Microsoft prefers). The MS paper 872 * also talks about preferring the CIS entry as well, but that has 873 * to be done elsewhere. We also optimize power sequencing here 874 * and don't change things if we're already powered up at a supported 875 * voltage. 876 * 877 * In addition, we power up with OE disabled. We'll set it later 878 * in the power up sequence. 879 */ 880 static int 881 cbb_do_power(device_t brdev) 882 { 883 struct cbb_softc *sc = device_get_softc(brdev); 884 uint32_t voltage, curpwr; 885 uint32_t status; 886 887 /* Don't enable OE (output enable) until power stable */ 888 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 889 890 voltage = cbb_detect_voltage(brdev); 891 curpwr = cbb_current_voltage(brdev); 892 status = cbb_get(sc, CBB_SOCKET_STATE); 893 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 894 return 0; 895 /* Prefer lowest voltage supported */ 896 cbb_power(brdev, CARD_OFF); 897 if (voltage & CARD_YV_CARD) 898 cbb_power(brdev, CARD_VCC(YV)); 899 else if (voltage & CARD_XV_CARD) 900 cbb_power(brdev, CARD_VCC(XV)); 901 else if (voltage & CARD_3V_CARD) 902 cbb_power(brdev, CARD_VCC(3)); 903 else if (voltage & CARD_5V_CARD) 904 cbb_power(brdev, CARD_VCC(5)); 905 else { 906 device_printf(brdev, "Unknown card voltage\n"); 907 return (ENXIO); 908 } 909 return (0); 910 } 911 912 /************************************************************************/ 913 /* CardBus power functions */ 914 /************************************************************************/ 915 916 static void 917 cbb_cardbus_reset(device_t brdev) 918 { 919 struct cbb_softc *sc = device_get_softc(brdev); 920 int delay; 921 922 /* 923 * 20ms is necessary for most bridges. For some reason, the Ricoh 924 * RF5C47x bridges need 400ms. 925 */ 926 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 927 928 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 929 930 pause("cbbP3", hz * delay / 1000); 931 932 /* If a card exists, unreset it! */ 933 if (CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 934 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 935 &~CBBM_BRIDGECTRL_RESET, 2); 936 pause("cbbP4", hz * delay / 1000); 937 } 938 } 939 940 static int 941 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 942 { 943 struct cbb_softc *sc = device_get_softc(brdev); 944 int err; 945 946 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 947 return (ENODEV); 948 949 err = cbb_do_power(brdev); 950 if (err) 951 return (err); 952 cbb_cardbus_reset(brdev); 953 return (0); 954 } 955 956 static void 957 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 958 { 959 cbb_power(brdev, CARD_OFF); 960 cbb_cardbus_reset(brdev); 961 } 962 963 /************************************************************************/ 964 /* CardBus Resource */ 965 /************************************************************************/ 966 967 static int 968 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 969 { 970 int basereg; 971 int limitreg; 972 973 if ((win < 0) || (win > 1)) { 974 DEVPRINTF((brdev, 975 "cbb_cardbus_io_open: window out of range %d\n", win)); 976 return (EINVAL); 977 } 978 979 basereg = win * 8 + CBBR_IOBASE0; 980 limitreg = win * 8 + CBBR_IOLIMIT0; 981 982 pci_write_config(brdev, basereg, start, 4); 983 pci_write_config(brdev, limitreg, end, 4); 984 return (0); 985 } 986 987 static int 988 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 989 { 990 int basereg; 991 int limitreg; 992 993 if ((win < 0) || (win > 1)) { 994 DEVPRINTF((brdev, 995 "cbb_cardbus_mem_open: window out of range %d\n", win)); 996 return (EINVAL); 997 } 998 999 basereg = win*8 + CBBR_MEMBASE0; 1000 limitreg = win*8 + CBBR_MEMLIMIT0; 1001 1002 pci_write_config(brdev, basereg, start, 4); 1003 pci_write_config(brdev, limitreg, end, 4); 1004 return (0); 1005 } 1006 1007 #define START_NONE 0xffffffff 1008 #define END_NONE 0 1009 1010 static void 1011 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1012 { 1013 uint32_t starts[2]; 1014 uint32_t ends[2]; 1015 struct cbb_reslist *rle; 1016 int align, i; 1017 uint32_t reg; 1018 1019 starts[0] = starts[1] = START_NONE; 1020 ends[0] = ends[1] = END_NONE; 1021 1022 if (type == SYS_RES_MEMORY) 1023 align = CBB_MEMALIGN; 1024 else if (type == SYS_RES_IOPORT) 1025 align = CBB_IOALIGN; 1026 else 1027 align = 1; 1028 1029 SLIST_FOREACH(rle, &sc->rl, link) { 1030 if (rle->type != type) 1031 continue; 1032 if (rle->res == NULL) 1033 continue; 1034 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1035 continue; 1036 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1037 i = 1; 1038 else 1039 i = 0; 1040 if (rman_get_start(rle->res) < starts[i]) 1041 starts[i] = rman_get_start(rle->res); 1042 if (rman_get_end(rle->res) > ends[i]) 1043 ends[i] = rman_get_end(rle->res); 1044 } 1045 for (i = 0; i < 2; i++) { 1046 if (starts[i] == START_NONE) 1047 continue; 1048 starts[i] &= ~(align - 1); 1049 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1050 } 1051 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1052 if (starts[0] < starts[1]) { 1053 if (ends[0] > starts[1]) { 1054 device_printf(sc->dev, "Overlapping ranges" 1055 " for prefetch and non-prefetch memory\n"); 1056 return; 1057 } 1058 } else { 1059 if (ends[1] > starts[0]) { 1060 device_printf(sc->dev, "Overlapping ranges" 1061 " for prefetch and non-prefetch memory\n"); 1062 return; 1063 } 1064 } 1065 } 1066 1067 if (type == SYS_RES_MEMORY) { 1068 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1069 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1070 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1071 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1072 CBBM_BRIDGECTRL_PREFETCH_1); 1073 if (starts[1] != START_NONE) 1074 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1075 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1076 if (bootverbose) { 1077 device_printf(sc->dev, "Opening memory:\n"); 1078 if (starts[0] != START_NONE) 1079 device_printf(sc->dev, "Normal: %#x-%#x\n", 1080 starts[0], ends[0]); 1081 if (starts[1] != START_NONE) 1082 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1083 starts[1], ends[1]); 1084 } 1085 } else if (type == SYS_RES_IOPORT) { 1086 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1087 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1088 if (bootverbose && starts[0] != START_NONE) 1089 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1090 starts[0], ends[0]); 1091 } 1092 } 1093 1094 static int 1095 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1096 int rid, struct resource *res) 1097 { 1098 int ret; 1099 1100 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1101 type, rid, res); 1102 if (ret != 0) 1103 return (ret); 1104 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1105 return (0); 1106 } 1107 1108 static int 1109 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1110 int rid, struct resource *res) 1111 { 1112 int ret; 1113 1114 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1115 type, rid, res); 1116 if (ret != 0) 1117 return (ret); 1118 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1119 return (0); 1120 } 1121 1122 static struct resource * 1123 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1124 int *rid, u_long start, u_long end, u_long count, u_int flags) 1125 { 1126 struct cbb_softc *sc = device_get_softc(brdev); 1127 int tmp; 1128 struct resource *res; 1129 u_long align; 1130 1131 switch (type) { 1132 case SYS_RES_IRQ: 1133 tmp = rman_get_start(sc->irq_res); 1134 if (start > tmp || end < tmp || count != 1) { 1135 device_printf(child, "requested interrupt %ld-%ld," 1136 "count = %ld not supported by cbb\n", 1137 start, end, count); 1138 return (NULL); 1139 } 1140 start = end = tmp; 1141 flags |= RF_SHAREABLE; 1142 break; 1143 case SYS_RES_IOPORT: 1144 if (start <= cbb_start_32_io) 1145 start = cbb_start_32_io; 1146 if (end < start) 1147 end = start; 1148 if (count > (1 << RF_ALIGNMENT(flags))) 1149 flags = (flags & ~RF_ALIGNMENT_MASK) | 1150 rman_make_alignment_flags(count); 1151 break; 1152 case SYS_RES_MEMORY: 1153 if (start <= cbb_start_mem) 1154 start = cbb_start_mem; 1155 if (end < start) 1156 end = start; 1157 if (count < CBB_MEMALIGN) 1158 align = CBB_MEMALIGN; 1159 else 1160 align = count; 1161 if (align > (1 << RF_ALIGNMENT(flags))) 1162 flags = (flags & ~RF_ALIGNMENT_MASK) | 1163 rman_make_alignment_flags(align); 1164 break; 1165 } 1166 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1167 start, end, count, flags & ~RF_ACTIVE); 1168 if (res == NULL) { 1169 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1170 return (NULL); 1171 } 1172 cbb_insert_res(sc, res, type, *rid); 1173 if (flags & RF_ACTIVE) 1174 if (bus_activate_resource(child, type, *rid, res) != 0) { 1175 bus_release_resource(child, type, *rid, res); 1176 return (NULL); 1177 } 1178 1179 return (res); 1180 } 1181 1182 static int 1183 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1184 int rid, struct resource *res) 1185 { 1186 struct cbb_softc *sc = device_get_softc(brdev); 1187 int error; 1188 1189 if (rman_get_flags(res) & RF_ACTIVE) { 1190 error = bus_deactivate_resource(child, type, rid, res); 1191 if (error != 0) 1192 return (error); 1193 } 1194 cbb_remove_res(sc, res); 1195 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1196 type, rid, res)); 1197 } 1198 1199 /************************************************************************/ 1200 /* PC Card Power Functions */ 1201 /************************************************************************/ 1202 1203 static int 1204 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1205 { 1206 struct cbb_softc *sc = device_get_softc(brdev); 1207 int err; 1208 1209 DPRINTF(("cbb_pcic_socket_enable:\n")); 1210 1211 /* power down/up the socket to reset */ 1212 err = cbb_do_power(brdev); 1213 if (err) 1214 return (err); 1215 exca_reset(&sc->exca[0], child); 1216 1217 return (0); 1218 } 1219 1220 static void 1221 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1222 { 1223 struct cbb_softc *sc = device_get_softc(brdev); 1224 1225 DPRINTF(("cbb_pcic_socket_disable\n")); 1226 1227 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1228 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1229 pause("cbbP1", hz / 100); 1230 1231 /* power down the socket */ 1232 cbb_power(brdev, CARD_OFF); 1233 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1234 1235 /* wait 300ms until power fails (Tpf). */ 1236 pause("cbbP2", hz * 300 / 1000); 1237 1238 /* enable CSC interrupts */ 1239 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1240 } 1241 1242 /************************************************************************/ 1243 /* POWER methods */ 1244 /************************************************************************/ 1245 1246 int 1247 cbb_power_enable_socket(device_t brdev, device_t child) 1248 { 1249 struct cbb_softc *sc = device_get_softc(brdev); 1250 1251 if (sc->flags & CBB_16BIT_CARD) 1252 return (cbb_pcic_power_enable_socket(brdev, child)); 1253 else 1254 return (cbb_cardbus_power_enable_socket(brdev, child)); 1255 } 1256 1257 void 1258 cbb_power_disable_socket(device_t brdev, device_t child) 1259 { 1260 struct cbb_softc *sc = device_get_softc(brdev); 1261 if (sc->flags & CBB_16BIT_CARD) 1262 cbb_pcic_power_disable_socket(brdev, child); 1263 else 1264 cbb_cardbus_power_disable_socket(brdev, child); 1265 } 1266 1267 static int 1268 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1269 struct resource *res) 1270 { 1271 struct cbb_softc *sc = device_get_softc(brdev); 1272 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1273 } 1274 1275 static int 1276 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1277 int rid, struct resource *res) 1278 { 1279 struct cbb_softc *sc = device_get_softc(brdev); 1280 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1281 } 1282 1283 static struct resource * 1284 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1285 u_long start, u_long end, u_long count, u_int flags) 1286 { 1287 struct resource *res = NULL; 1288 struct cbb_softc *sc = device_get_softc(brdev); 1289 int align; 1290 int tmp; 1291 1292 switch (type) { 1293 case SYS_RES_MEMORY: 1294 if (start < cbb_start_mem) 1295 start = cbb_start_mem; 1296 if (end < start) 1297 end = start; 1298 if (count < CBB_MEMALIGN) 1299 align = CBB_MEMALIGN; 1300 else 1301 align = count; 1302 if (align > (1 << RF_ALIGNMENT(flags))) 1303 flags = (flags & ~RF_ALIGNMENT_MASK) | 1304 rman_make_alignment_flags(align); 1305 break; 1306 case SYS_RES_IOPORT: 1307 if (start < cbb_start_16_io) 1308 start = cbb_start_16_io; 1309 if (end < start) 1310 end = start; 1311 break; 1312 case SYS_RES_IRQ: 1313 tmp = rman_get_start(sc->irq_res); 1314 if (start > tmp || end < tmp || count != 1) { 1315 device_printf(child, "requested interrupt %ld-%ld," 1316 "count = %ld not supported by cbb\n", 1317 start, end, count); 1318 return (NULL); 1319 } 1320 flags |= RF_SHAREABLE; 1321 start = end = rman_get_start(sc->irq_res); 1322 break; 1323 } 1324 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1325 start, end, count, flags & ~RF_ACTIVE); 1326 if (res == NULL) 1327 return (NULL); 1328 cbb_insert_res(sc, res, type, *rid); 1329 if (flags & RF_ACTIVE) { 1330 if (bus_activate_resource(child, type, *rid, res) != 0) { 1331 bus_release_resource(child, type, *rid, res); 1332 return (NULL); 1333 } 1334 } 1335 1336 return (res); 1337 } 1338 1339 static int 1340 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1341 int rid, struct resource *res) 1342 { 1343 struct cbb_softc *sc = device_get_softc(brdev); 1344 int error; 1345 1346 if (rman_get_flags(res) & RF_ACTIVE) { 1347 error = bus_deactivate_resource(child, type, rid, res); 1348 if (error != 0) 1349 return (error); 1350 } 1351 cbb_remove_res(sc, res); 1352 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1353 type, rid, res)); 1354 } 1355 1356 /************************************************************************/ 1357 /* PC Card methods */ 1358 /************************************************************************/ 1359 1360 int 1361 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1362 uint32_t flags) 1363 { 1364 struct cbb_softc *sc = device_get_softc(brdev); 1365 struct resource *res; 1366 1367 if (type != SYS_RES_MEMORY) 1368 return (EINVAL); 1369 res = cbb_find_res(sc, type, rid); 1370 if (res == NULL) { 1371 device_printf(brdev, 1372 "set_res_flags: specified rid not found\n"); 1373 return (ENOENT); 1374 } 1375 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1376 } 1377 1378 int 1379 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1380 uint32_t cardaddr, uint32_t *deltap) 1381 { 1382 struct cbb_softc *sc = device_get_softc(brdev); 1383 struct resource *res; 1384 1385 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1386 if (res == NULL) { 1387 device_printf(brdev, 1388 "set_memory_offset: specified rid not found\n"); 1389 return (ENOENT); 1390 } 1391 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1392 } 1393 1394 /************************************************************************/ 1395 /* BUS Methods */ 1396 /************************************************************************/ 1397 1398 1399 int 1400 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1401 struct resource *r) 1402 { 1403 struct cbb_softc *sc = device_get_softc(brdev); 1404 1405 if (sc->flags & CBB_16BIT_CARD) 1406 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1407 else 1408 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1409 r)); 1410 } 1411 1412 int 1413 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1414 int rid, struct resource *r) 1415 { 1416 struct cbb_softc *sc = device_get_softc(brdev); 1417 1418 if (sc->flags & CBB_16BIT_CARD) 1419 return (cbb_pcic_deactivate_resource(brdev, child, type, 1420 rid, r)); 1421 else 1422 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1423 rid, r)); 1424 } 1425 1426 struct resource * 1427 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1428 u_long start, u_long end, u_long count, u_int flags) 1429 { 1430 struct cbb_softc *sc = device_get_softc(brdev); 1431 1432 if (sc->flags & CBB_16BIT_CARD) 1433 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1434 start, end, count, flags)); 1435 else 1436 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1437 start, end, count, flags)); 1438 } 1439 1440 int 1441 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1442 struct resource *r) 1443 { 1444 struct cbb_softc *sc = device_get_softc(brdev); 1445 1446 if (sc->flags & CBB_16BIT_CARD) 1447 return (cbb_pcic_release_resource(brdev, child, type, 1448 rid, r)); 1449 else 1450 return (cbb_cardbus_release_resource(brdev, child, type, 1451 rid, r)); 1452 } 1453 1454 int 1455 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1456 { 1457 struct cbb_softc *sc = device_get_softc(brdev); 1458 1459 switch (which) { 1460 case PCIB_IVAR_BUS: 1461 *result = sc->secbus; 1462 return (0); 1463 } 1464 return (ENOENT); 1465 } 1466 1467 int 1468 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1469 { 1470 struct cbb_softc *sc = device_get_softc(brdev); 1471 1472 switch (which) { 1473 case PCIB_IVAR_BUS: 1474 sc->secbus = value; 1475 return (0); 1476 } 1477 return (ENOENT); 1478 } 1479 1480 int 1481 cbb_suspend(device_t self) 1482 { 1483 int error = 0; 1484 struct cbb_softc *sc = device_get_softc(self); 1485 1486 error = bus_generic_suspend(self); 1487 if (error != 0) 1488 return (error); 1489 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1490 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */ 1491 return (0); 1492 } 1493 1494 int 1495 cbb_resume(device_t self) 1496 { 1497 int error = 0; 1498 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1499 uint32_t tmp; 1500 1501 /* 1502 * Some BIOSes will not save the BARs for the pci chips, so we 1503 * must do it ourselves. If the BAR is reset to 0 for an I/O 1504 * device, it will read back as 0x1, so no explicit test for 1505 * memory devices are needed. 1506 * 1507 * Note: The PCI bus code should do this automatically for us on 1508 * suspend/resume, but until it does, we have to cope. 1509 */ 1510 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1511 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1512 rman_get_start(sc->base_res))); 1513 1514 sc->chipinit(sc); 1515 1516 /* reset interrupt -- Do we really need to do this? */ 1517 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1518 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1519 1520 /* CSC Interrupt: Card detect interrupt on */ 1521 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1522 1523 /* Signal the thread to wakeup. */ 1524 mtx_lock(&sc->mtx); 1525 cv_signal(&sc->cv); 1526 mtx_unlock(&sc->mtx); 1527 1528 error = bus_generic_resume(self); 1529 1530 return (error); 1531 } 1532 1533 int 1534 cbb_child_present(device_t self) 1535 { 1536 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1537 uint32_t sockstate; 1538 1539 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1540 return (CBB_CARD_PRESENT(sockstate) && 1541 (sc->flags & CBB_CARD_OK) == CBB_CARD_OK); 1542 } 1543