1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/interrupt.h> 88 #include <sys/lock.h> 89 #include <sys/malloc.h> 90 #include <sys/mutex.h> 91 #include <sys/proc.h> 92 #include <sys/rman.h> 93 #include <sys/sysctl.h> 94 #include <sys/systm.h> 95 #include <machine/bus.h> 96 #include <machine/resource.h> 97 98 #include <dev/pci/pcireg.h> 99 #include <dev/pci/pcivar.h> 100 101 #include <dev/pccard/pccardreg.h> 102 #include <dev/pccard/pccardvar.h> 103 104 #include <dev/exca/excareg.h> 105 #include <dev/exca/excavar.h> 106 107 #include <dev/pccbb/pccbbreg.h> 108 #include <dev/pccbb/pccbbvar.h> 109 110 #include "power_if.h" 111 #include "card_if.h" 112 #include "pcib_if.h" 113 114 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 115 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 116 117 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 118 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 119 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 120 pci_write_config(DEV, REG, ( \ 121 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 122 123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 124 125 #define CBB_START_MEM 0x88000000 126 #define CBB_START_32_IO 0x1000 127 #define CBB_START_16_IO 0x100 128 129 devclass_t cbb_devclass; 130 131 /* sysctl vars */ 132 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 133 134 /* There's no way to say TUNEABLE_LONG to get the right types */ 135 u_long cbb_start_mem = CBB_START_MEM; 136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 138 &cbb_start_mem, CBB_START_MEM, 139 "Starting address for memory allocations"); 140 141 u_long cbb_start_16_io = CBB_START_16_IO; 142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 144 &cbb_start_16_io, CBB_START_16_IO, 145 "Starting ioport for 16-bit cards"); 146 147 u_long cbb_start_32_io = CBB_START_32_IO; 148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 150 &cbb_start_32_io, CBB_START_32_IO, 151 "Starting ioport for 32-bit cards"); 152 153 int cbb_debug = 0; 154 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 155 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 156 "Verbose cardbus bridge debugging"); 157 158 static void cbb_insert(struct cbb_softc *sc); 159 static void cbb_removal(struct cbb_softc *sc); 160 static uint32_t cbb_detect_voltage(device_t brdev); 161 static void cbb_cardbus_reset_power(device_t brdev, device_t child, int on); 162 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 163 uint32_t end); 164 static int cbb_cardbus_mem_open(device_t brdev, int win, 165 uint32_t start, uint32_t end); 166 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 167 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 168 int type, int rid, struct resource *res); 169 static int cbb_cardbus_deactivate_resource(device_t brdev, 170 device_t child, int type, int rid, struct resource *res); 171 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 172 device_t child, int type, int *rid, u_long start, 173 u_long end, u_long count, u_int flags); 174 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 175 int type, int rid, struct resource *res); 176 static int cbb_cardbus_power_enable_socket(device_t brdev, 177 device_t child); 178 static int cbb_cardbus_power_disable_socket(device_t brdev, 179 device_t child); 180 static int cbb_func_filt(void *arg); 181 static void cbb_func_intr(void *arg); 182 183 static void 184 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 185 { 186 struct cbb_reslist *rle; 187 188 SLIST_FOREACH(rle, &sc->rl, link) { 189 if (rle->res == res) { 190 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 191 free(rle, M_DEVBUF); 192 return; 193 } 194 } 195 } 196 197 static struct resource * 198 cbb_find_res(struct cbb_softc *sc, int type, int rid) 199 { 200 struct cbb_reslist *rle; 201 202 SLIST_FOREACH(rle, &sc->rl, link) 203 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 204 return (rle->res); 205 return (NULL); 206 } 207 208 static void 209 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 210 int rid) 211 { 212 struct cbb_reslist *rle; 213 214 /* 215 * Need to record allocated resource so we can iterate through 216 * it later. 217 */ 218 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 219 if (rle == NULL) 220 panic("cbb_cardbus_alloc_resource: can't record entry!"); 221 rle->res = res; 222 rle->type = type; 223 rle->rid = rid; 224 SLIST_INSERT_HEAD(&sc->rl, rle, link); 225 } 226 227 static void 228 cbb_destroy_res(struct cbb_softc *sc) 229 { 230 struct cbb_reslist *rle; 231 232 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 233 device_printf(sc->dev, "Danger Will Robinson: Resource " 234 "left allocated! This is a bug... " 235 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 236 rman_get_start(rle->res)); 237 SLIST_REMOVE_HEAD(&sc->rl, link); 238 free(rle, M_DEVBUF); 239 } 240 } 241 242 /* 243 * Disable function interrupts by telling the bridge to generate IRQ1 244 * interrupts. These interrupts aren't really generated by the chip, since 245 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 246 * initialization, so this helps to work around the problem. 247 * 248 * XXX We can't do this workaround for all chipsets, because this 249 * XXX causes interference with the keyboard because somechipsets will 250 * XXX actually signal IRQ1 over their serial interrupt connections to 251 * XXX the south bridge. Disable it it for now. 252 */ 253 void 254 cbb_disable_func_intr(struct cbb_softc *sc) 255 { 256 #if 0 257 uint8_t reg; 258 259 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 260 EXCA_INTR_IRQ_RESERVED1; 261 exca_putb(&sc->exca[0], EXCA_INTR, reg); 262 #endif 263 } 264 265 /* 266 * Enable function interrupts. We turn on function interrupts when the card 267 * requests an interrupt. The PCMCIA standard says that we should set 268 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 269 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 270 * cards. 271 */ 272 static void 273 cbb_enable_func_intr(struct cbb_softc *sc) 274 { 275 uint8_t reg; 276 277 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 278 EXCA_INTR_IRQ_NONE; 279 exca_putb(&sc->exca[0], EXCA_INTR, reg); 280 } 281 282 int 283 cbb_detach(device_t brdev) 284 { 285 struct cbb_softc *sc = device_get_softc(brdev); 286 device_t *devlist; 287 int tmp, tries, error, numdevs; 288 289 /* 290 * Before we delete the children (which we have to do because 291 * attach doesn't check for children busses correctly), we have 292 * to detach the children. Even if we didn't need to delete the 293 * children, we have to detach them. 294 */ 295 error = bus_generic_detach(brdev); 296 if (error != 0) 297 return (error); 298 299 /* 300 * Since the attach routine doesn't search for children before it 301 * attaches them to this device, we must delete them here in order 302 * for the kldload/unload case to work. If we failed to do that, then 303 * we'd get duplicate devices when cbb.ko was reloaded. 304 */ 305 tries = 10; 306 do { 307 error = device_get_children(brdev, &devlist, &numdevs); 308 if (error == 0) 309 break; 310 /* 311 * Try hard to cope with low memory. 312 */ 313 if (error == ENOMEM) { 314 pause("cbbnomem", 1); 315 continue; 316 } 317 } while (tries-- > 0); 318 for (tmp = 0; tmp < numdevs; tmp++) 319 device_delete_child(brdev, devlist[tmp]); 320 free(devlist, M_TEMP); 321 322 /* Turn off the interrupts */ 323 cbb_set(sc, CBB_SOCKET_MASK, 0); 324 325 /* reset 16-bit pcmcia bus */ 326 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 327 328 /* turn off power */ 329 cbb_power(brdev, CARD_OFF); 330 331 /* Ack the interrupt */ 332 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 333 334 /* 335 * Wait for the thread to die. kproc_exit will do a wakeup 336 * on the event thread's struct thread * so that we know it is 337 * safe to proceed. IF the thread is running, set the please 338 * die flag and wait for it to comply. Since the wakeup on 339 * the event thread happens only in kproc_exit, we don't 340 * need to loop here. 341 */ 342 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 343 mtx_lock(&sc->mtx); 344 sc->flags |= CBB_KTHREAD_DONE; 345 while (sc->flags & CBB_KTHREAD_RUNNING) { 346 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 347 wakeup(&sc->intrhand); 348 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 349 } 350 mtx_unlock(&sc->mtx); 351 352 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 353 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 354 sc->base_res); 355 mtx_destroy(&sc->mtx); 356 return (0); 357 } 358 359 int 360 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 362 void **cookiep) 363 { 364 struct cbb_intrhand *ih; 365 struct cbb_softc *sc = device_get_softc(dev); 366 int err; 367 368 if (filt == NULL && intr == NULL) 369 return (EINVAL); 370 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 371 if (ih == NULL) 372 return (ENOMEM); 373 *cookiep = ih; 374 ih->filt = filt; 375 ih->intr = intr; 376 ih->arg = arg; 377 ih->sc = sc; 378 /* 379 * XXX need to turn on ISA interrupts, if we ever support them, but 380 * XXX for now that's all we need to do. 381 */ 382 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 383 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 384 &ih->cookie); 385 if (err != 0) { 386 free(ih, M_DEVBUF); 387 return (err); 388 } 389 cbb_enable_func_intr(sc); 390 sc->cardok = 1; 391 return 0; 392 } 393 394 int 395 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 396 void *cookie) 397 { 398 struct cbb_intrhand *ih; 399 int err; 400 401 /* XXX Need to do different things for ISA interrupts. */ 402 ih = (struct cbb_intrhand *) cookie; 403 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 404 ih->cookie); 405 if (err != 0) 406 return (err); 407 free(ih, M_DEVBUF); 408 return (0); 409 } 410 411 412 void 413 cbb_driver_added(device_t brdev, driver_t *driver) 414 { 415 struct cbb_softc *sc = device_get_softc(brdev); 416 device_t *devlist; 417 device_t dev; 418 int tmp; 419 int numdevs; 420 int wake = 0; 421 422 DEVICE_IDENTIFY(driver, brdev); 423 tmp = device_get_children(brdev, &devlist, &numdevs); 424 if (tmp != 0) { 425 device_printf(brdev, "Cannot get children list, no reprobe\n"); 426 return; 427 } 428 for (tmp = 0; tmp < numdevs; tmp++) { 429 dev = devlist[tmp]; 430 if (device_get_state(dev) == DS_NOTPRESENT && 431 device_probe_and_attach(dev) == 0) 432 wake++; 433 } 434 free(devlist, M_TEMP); 435 436 if (wake > 0) 437 wakeup(&sc->intrhand); 438 } 439 440 void 441 cbb_child_detached(device_t brdev, device_t child) 442 { 443 struct cbb_softc *sc = device_get_softc(brdev); 444 445 /* I'm not sure we even need this */ 446 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 447 device_printf(brdev, "Unknown child detached: %s\n", 448 device_get_nameunit(child)); 449 } 450 451 /************************************************************************/ 452 /* Kthreads */ 453 /************************************************************************/ 454 455 void 456 cbb_event_thread(void *arg) 457 { 458 struct cbb_softc *sc = arg; 459 uint32_t status; 460 int err; 461 int not_a_card = 0; 462 463 mtx_lock(&sc->mtx); 464 sc->flags |= CBB_KTHREAD_RUNNING; 465 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 466 mtx_unlock(&sc->mtx); 467 /* 468 * We take out Giant here because we need it deep, 469 * down in the bowels of the vm system for mapping the 470 * memory we need to read the CIS. In addition, since 471 * we are adding/deleting devices from the dev tree, 472 * and that code isn't MP safe, we have to hold Giant. 473 */ 474 mtx_lock(&Giant); 475 status = cbb_get(sc, CBB_SOCKET_STATE); 476 DPRINTF(("Status is 0x%x\n", status)); 477 if (!CBB_CARD_PRESENT(status)) { 478 not_a_card = 0; /* We know card type */ 479 cbb_removal(sc); 480 } else if (status & CBB_STATE_NOT_A_CARD) { 481 /* 482 * Up to 10 times, try to rescan the card when we see 483 * NOT_A_CARD. 10 is somehwat arbitrary. When this 484 * pathology hits, there's a ~40% chance each try will 485 * fail. 10 tries takes about 5s and results in a 486 * 99.99% certainty of the results. 487 */ 488 if (not_a_card++ < 10) { 489 DEVPRINTF((sc->dev, 490 "Not a card bit set, rescanning\n")); 491 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 492 } else { 493 device_printf(sc->dev, 494 "Can't determine card type\n"); 495 } 496 } else { 497 not_a_card = 0; /* We know card type */ 498 cbb_insert(sc); 499 } 500 mtx_unlock(&Giant); 501 502 /* 503 * First time through we need to tell mountroot that we're 504 * done. 505 */ 506 if (sc->sc_root_token) { 507 root_mount_rel(sc->sc_root_token); 508 sc->sc_root_token = NULL; 509 } 510 511 /* 512 * Wait until it has been 250ms since the last time we 513 * get an interrupt. We handle the rest of the interrupt 514 * at the top of the loop. Although we clear the bit in the 515 * ISR, we signal sc->cv from the detach path after we've 516 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 517 * 250ms sleep here. 518 * 519 * In our ISR, we turn off the card changed interrupt. Turn 520 * them back on here before we wait for them to happen. We 521 * turn them on/off so that we can tolerate a large latency 522 * between the time we signal cbb_event_thread and it gets 523 * a chance to run. 524 */ 525 mtx_lock(&sc->mtx); 526 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 527 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 528 err = 0; 529 while (err != EWOULDBLOCK && 530 (sc->flags & CBB_KTHREAD_DONE) == 0) 531 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 532 } 533 DEVPRINTF((sc->dev, "Thread terminating\n")); 534 sc->flags &= ~CBB_KTHREAD_RUNNING; 535 mtx_unlock(&sc->mtx); 536 kproc_exit(0); 537 } 538 539 /************************************************************************/ 540 /* Insert/removal */ 541 /************************************************************************/ 542 543 static void 544 cbb_insert(struct cbb_softc *sc) 545 { 546 uint32_t sockevent, sockstate; 547 548 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 549 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 550 551 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 552 sockevent, sockstate)); 553 554 if (sockstate & CBB_STATE_R2_CARD) { 555 if (device_is_attached(sc->exca[0].pccarddev)) { 556 sc->flags |= CBB_16BIT_CARD; 557 exca_insert(&sc->exca[0]); 558 } else { 559 device_printf(sc->dev, 560 "16-bit card inserted, but no pccard bus.\n"); 561 } 562 } else if (sockstate & CBB_STATE_CB_CARD) { 563 if (device_is_attached(sc->cbdev)) { 564 sc->flags &= ~CBB_16BIT_CARD; 565 CARD_ATTACH_CARD(sc->cbdev); 566 } else { 567 device_printf(sc->dev, 568 "CardBus card inserted, but no cardbus bus.\n"); 569 } 570 } else { 571 /* 572 * We should power the card down, and try again a couple of 573 * times if this happens. XXX 574 */ 575 device_printf(sc->dev, "Unsupported card type detected\n"); 576 } 577 } 578 579 static void 580 cbb_removal(struct cbb_softc *sc) 581 { 582 sc->cardok = 0; 583 if (sc->flags & CBB_16BIT_CARD) { 584 exca_removal(&sc->exca[0]); 585 } else { 586 if (device_is_attached(sc->cbdev)) 587 CARD_DETACH_CARD(sc->cbdev); 588 } 589 cbb_destroy_res(sc); 590 } 591 592 /************************************************************************/ 593 /* Interrupt Handler */ 594 /************************************************************************/ 595 596 static int 597 cbb_func_filt(void *arg) 598 { 599 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 600 struct cbb_softc *sc = ih->sc; 601 602 /* 603 * Make sure that the card is really there. 604 */ 605 if (!sc->cardok) 606 return (FILTER_STRAY); 607 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 608 sc->cardok = 0; 609 return (FILTER_HANDLED); 610 } 611 612 /* 613 * nb: don't have to check for giant or not, since that's done in the 614 * ISR dispatch and one can't hold Giant in a filter anyway... 615 */ 616 return ((*ih->filt)(ih->arg)); 617 } 618 619 static void 620 cbb_func_intr(void *arg) 621 { 622 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 623 struct cbb_softc *sc = ih->sc; 624 625 /* 626 * While this check may seem redundant, it helps close a race 627 * condition. If the card is ejected after the filter runs, but 628 * before this ISR can be scheduled, then we need to do the same 629 * filtering to prevent the card's ISR from being called. One could 630 * argue that the card's ISR should be able to cope, but experience 631 * has shown they can't always. This mitigates the problem by making 632 * the race quite a bit smaller. Properly written client ISRs should 633 * cope with the card going away in the middle of the ISR. We assume 634 * that drivers that are sophisticated enough to use filters don't 635 * need our protection. This also allows us to ensure they *ARE* 636 * called if their filter said they needed to be called. 637 */ 638 if (ih->filt == NULL) { 639 if (!sc->cardok) 640 return; 641 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 642 sc->cardok = 0; 643 return; 644 } 645 } 646 647 /* 648 * Call the registered ithread interrupt handler. This entire routine 649 * will be called with Giant if this isn't an MP safe driver, or not 650 * if it is. Either way, we don't have to worry. 651 */ 652 ih->intr(ih->arg); 653 } 654 655 /************************************************************************/ 656 /* Generic Power functions */ 657 /************************************************************************/ 658 659 static uint32_t 660 cbb_detect_voltage(device_t brdev) 661 { 662 struct cbb_softc *sc = device_get_softc(brdev); 663 uint32_t psr; 664 uint32_t vol = CARD_UKN_CARD; 665 666 psr = cbb_get(sc, CBB_SOCKET_STATE); 667 668 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 669 vol |= CARD_5V_CARD; 670 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 671 vol |= CARD_3V_CARD; 672 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 673 vol |= CARD_XV_CARD; 674 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 675 vol |= CARD_YV_CARD; 676 677 return (vol); 678 } 679 680 static uint8_t 681 cbb_o2micro_power_hack(struct cbb_softc *sc) 682 { 683 uint8_t reg; 684 685 /* 686 * Issue #2: INT# not qualified with IRQ Routing Bit. An 687 * unexpected PCI INT# may be generated during PC Card 688 * initialization even with the IRQ Routing Bit Set with some 689 * PC Cards. 690 * 691 * This is a two part issue. The first part is that some of 692 * our older controllers have an issue in which the slot's PCI 693 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 694 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 695 * is selected (ExCA register 03h bits 3:0, of the slot, are 696 * cleared) we will generate INT# if IREQ# is asserted. The 697 * second part is because some PC Cards prematurally assert 698 * IREQ# before the ExCA registers are fully programmed. This 699 * in turn asserts INT# because ExCA register 03h bits 3:0 700 * (ISA IRQ Select) are not yet programmed. 701 * 702 * The fix for this issue, which will work for any controller 703 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 704 * (select IRQ1), of the slot, before turning on slot power. 705 * Selecting IRQ1 will result in INT# NOT being asserted 706 * (because IRQ1 is selected), and IRQ1 won't be asserted 707 * because our controllers don't generate IRQ1. 708 * 709 * Other, non O2Micro controllers will generate irq 1 in some 710 * situations, so we can't do this hack for everybody. Reports of 711 * keyboard controller's interrupts being suppressed occurred when 712 * we did this. 713 */ 714 reg = exca_getb(&sc->exca[0], EXCA_INTR); 715 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 716 return (reg); 717 } 718 719 /* 720 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 721 * we don't have an interrupt storm on power on. This has the efect of 722 * disabling card status change interrupts for the duration of poweron. 723 */ 724 static void 725 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 726 { 727 exca_putb(&sc->exca[0], EXCA_INTR, reg); 728 } 729 730 int 731 cbb_power(device_t brdev, int volts) 732 { 733 uint32_t status, sock_ctrl, reg_ctrl, mask; 734 struct cbb_softc *sc = device_get_softc(brdev); 735 int cnt, sane; 736 int retval = 0; 737 int on = 0; 738 uint8_t reg = 0; 739 740 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 741 742 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 743 switch (volts & CARD_VCCMASK) { 744 case 5: 745 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 746 on++; 747 break; 748 case 3: 749 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 750 on++; 751 break; 752 case XV: 753 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 754 on++; 755 break; 756 case YV: 757 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 758 on++; 759 break; 760 case 0: 761 break; 762 default: 763 return (0); /* power NEVER changed */ 764 } 765 766 /* VPP == VCC */ 767 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 768 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 769 770 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 771 return (1); /* no change necessary */ 772 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 773 if (volts != 0 && sc->chipset == CB_O2MICRO) 774 reg = cbb_o2micro_power_hack(sc); 775 776 /* 777 * We have to mask the card change detect interrupt while we're 778 * messing with the power. It is allowed to bounce while we're 779 * messing with power as things settle down. In addition, we mask off 780 * the card's function interrupt by routing it via the ISA bus. This 781 * bit generally only affects 16-bit cards. Some bridges allow one to 782 * set another bit to have it also affect 32-bit cards. Since 32-bit 783 * cards are required to be better behaved, we don't bother to get 784 * into those bridge specific features. 785 * 786 * XXX I wonder if we need to enable the READY bit interrupt in the 787 * EXCA CSC register for 16-bit cards, and disable the CD bit? 788 */ 789 mask = cbb_get(sc, CBB_SOCKET_MASK); 790 mask |= CBB_SOCKET_MASK_POWER; 791 mask &= ~CBB_SOCKET_MASK_CD; 792 cbb_set(sc, CBB_SOCKET_MASK, mask); 793 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 794 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 795 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 796 if (on) { 797 mtx_lock(&sc->mtx); 798 cnt = sc->powerintr; 799 /* 800 * We have a shortish timeout of 500ms here. Some bridges do 801 * not generate a POWER_CYCLE event for 16-bit cards. In 802 * those cases, we have to cope the best we can, and having 803 * only a short delay is better than the alternatives. 804 */ 805 sane = 10; 806 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 807 cnt == sc->powerintr && sane-- > 0) 808 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 809 mtx_unlock(&sc->mtx); 810 /* 811 * The TOPIC95B requires a little bit extra time to get its 812 * act together, so delay for an additional 100ms. Also as 813 * documented below, it doesn't seem to set the POWER_CYCLE 814 * bit, so don't whine if it never came on. 815 */ 816 if (sc->chipset == CB_TOPIC95) { 817 pause("cbb95B", hz / 10); 818 } else if (sane <= 0) { 819 device_printf(sc->dev, "power timeout, doom?\n"); 820 } 821 } 822 823 /* 824 * After the power is good, we can turn off the power interrupt. 825 * However, the PC Card standard says that we must delay turning the 826 * CD bit back on for a bit to allow for bouncyness on power down 827 * (recall that we don't wait above for a power down, since we don't 828 * get an interrupt for that). We're called either from the suspend 829 * code in which case we don't want to turn card change on again, or 830 * we're called from the card insertion code, in which case the cbb 831 * thread will turn it on for us before it waits to be woken by a 832 * change event. 833 * 834 * NB: Topic95B doesn't set the power cycle bit. we assume that 835 * both it and the TOPIC95 behave the same. 836 */ 837 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 838 status = cbb_get(sc, CBB_SOCKET_STATE); 839 if (on && sc->chipset != CB_TOPIC95) { 840 if ((status & CBB_STATE_POWER_CYCLE) == 0) 841 device_printf(sc->dev, "Power not on?\n"); 842 } 843 if (status & CBB_STATE_BAD_VCC_REQ) { 844 device_printf(sc->dev, "Bad Vcc requested\n"); 845 /* 846 * Turn off the power, and try again. Retrigger other 847 * active interrupts via force register. From NetBSD 848 * PR 36652, coded by me to description there. 849 */ 850 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 851 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 852 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 853 status &= ~CBB_STATE_BAD_VCC_REQ; 854 status &= ~CBB_STATE_DATA_LOST; 855 status |= CBB_FORCE_CV_TEST; 856 cbb_set(sc, CBB_SOCKET_FORCE, status); 857 goto done; 858 } 859 if (sc->chipset == CB_TOPIC97) { 860 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 861 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 862 if (on) 863 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 864 else 865 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 866 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 867 } 868 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 869 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 870 retval = 1; 871 done:; 872 if (volts != 0 && sc->chipset == CB_O2MICRO) 873 cbb_o2micro_power_hack2(sc, reg); 874 return (retval); 875 } 876 877 static int 878 cbb_current_voltage(device_t brdev) 879 { 880 struct cbb_softc *sc = device_get_softc(brdev); 881 uint32_t ctrl; 882 883 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 884 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 885 case CBB_SOCKET_CTRL_VCC_5V: 886 return CARD_5V_CARD; 887 case CBB_SOCKET_CTRL_VCC_3V: 888 return CARD_3V_CARD; 889 case CBB_SOCKET_CTRL_VCC_XV: 890 return CARD_XV_CARD; 891 case CBB_SOCKET_CTRL_VCC_YV: 892 return CARD_YV_CARD; 893 } 894 return 0; 895 } 896 897 /* 898 * detect the voltage for the card, and set it. Since the power 899 * used is the square of the voltage, lower voltages is a big win 900 * and what Windows does (and what Microsoft prefers). The MS paper 901 * also talks about preferring the CIS entry as well, but that has 902 * to be done elsewhere. We also optimize power sequencing here 903 * and don't change things if we're already powered up at a supported 904 * voltage. 905 * 906 * In addition, we power up with OE disabled. We'll set it later 907 * in the power up sequence. 908 */ 909 static int 910 cbb_do_power(device_t brdev) 911 { 912 struct cbb_softc *sc = device_get_softc(brdev); 913 uint32_t voltage, curpwr; 914 uint32_t status; 915 916 /* Don't enable OE (output enable) until power stable */ 917 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 918 919 voltage = cbb_detect_voltage(brdev); 920 curpwr = cbb_current_voltage(brdev); 921 status = cbb_get(sc, CBB_SOCKET_STATE); 922 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 923 return 0; 924 /* Prefer lowest voltage supported */ 925 cbb_power(brdev, CARD_OFF); 926 if (voltage & CARD_YV_CARD) 927 cbb_power(brdev, CARD_VCC(YV)); 928 else if (voltage & CARD_XV_CARD) 929 cbb_power(brdev, CARD_VCC(XV)); 930 else if (voltage & CARD_3V_CARD) 931 cbb_power(brdev, CARD_VCC(3)); 932 else if (voltage & CARD_5V_CARD) 933 cbb_power(brdev, CARD_VCC(5)); 934 else { 935 device_printf(brdev, "Unknown card voltage\n"); 936 return (ENXIO); 937 } 938 return (0); 939 } 940 941 /************************************************************************/ 942 /* CardBus power functions */ 943 /************************************************************************/ 944 945 static void 946 cbb_cardbus_reset_power(device_t brdev, device_t child, int on) 947 { 948 struct cbb_softc *sc = device_get_softc(brdev); 949 uint32_t b; 950 int delay, count; 951 952 /* 953 * Asserting reset for 20ms is necessary for most bridges. For some 954 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 955 * root cause of this is unknown, and NetBSD does the same thing. 956 */ 957 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 958 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 959 pause("cbbP3", hz * delay / 1000); 960 961 /* 962 * If a card exists and we're turning it on, take it out of reset. 963 * After clearing reset, wait up to 1.1s for the first configuration 964 * register (vendor/product) configuration register of device 0.0 to 965 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 966 * says that when powering up the card, the PCI Spec v2.1 must be 967 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 968 * Config Access) is at most 2^25 clocks, or just over 1s. Section 969 * 2.2.1 states any card not ready to participate in bus transactions 970 * must tristate its outputs. Therefore, any access to its 971 * configuration registers must be ignored. In that state, the config 972 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 973 * 0xffff is invalid, so this can never match a real card. Print a 974 * warning if it never returns a real id. The PCMCIA PC Card 975 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 976 * a cardbus bus, so that's the only register we check here. 977 */ 978 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 979 /* 980 */ 981 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 982 &~CBBM_BRIDGECTRL_RESET, 2); 983 b = pcib_get_bus(child); 984 count = 1100 / 20; 985 do { 986 pause("cbbP4", hz * 2 / 100); 987 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 988 0xfffffffful && --count >= 0); 989 if (count < 0) 990 device_printf(brdev, "Warning: Bus reset timeout\n"); 991 } 992 } 993 994 static int 995 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 996 { 997 struct cbb_softc *sc = device_get_softc(brdev); 998 int err; 999 1000 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 1001 return (ENODEV); 1002 1003 err = cbb_do_power(brdev); 1004 if (err) 1005 return (err); 1006 cbb_cardbus_reset_power(brdev, child, 1); 1007 return (0); 1008 } 1009 1010 static int 1011 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1012 { 1013 cbb_power(brdev, CARD_OFF); 1014 cbb_cardbus_reset_power(brdev, child, 0); 1015 return (0); 1016 } 1017 1018 /************************************************************************/ 1019 /* CardBus Resource */ 1020 /************************************************************************/ 1021 1022 static int 1023 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1024 { 1025 int basereg; 1026 int limitreg; 1027 1028 if ((win < 0) || (win > 1)) { 1029 DEVPRINTF((brdev, 1030 "cbb_cardbus_io_open: window out of range %d\n", win)); 1031 return (EINVAL); 1032 } 1033 1034 basereg = win * 8 + CBBR_IOBASE0; 1035 limitreg = win * 8 + CBBR_IOLIMIT0; 1036 1037 pci_write_config(brdev, basereg, start, 4); 1038 pci_write_config(brdev, limitreg, end, 4); 1039 return (0); 1040 } 1041 1042 static int 1043 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1044 { 1045 int basereg; 1046 int limitreg; 1047 1048 if ((win < 0) || (win > 1)) { 1049 DEVPRINTF((brdev, 1050 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1051 return (EINVAL); 1052 } 1053 1054 basereg = win * 8 + CBBR_MEMBASE0; 1055 limitreg = win * 8 + CBBR_MEMLIMIT0; 1056 1057 pci_write_config(brdev, basereg, start, 4); 1058 pci_write_config(brdev, limitreg, end, 4); 1059 return (0); 1060 } 1061 1062 #define START_NONE 0xffffffff 1063 #define END_NONE 0 1064 1065 static void 1066 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1067 { 1068 uint32_t starts[2]; 1069 uint32_t ends[2]; 1070 struct cbb_reslist *rle; 1071 int align, i; 1072 uint32_t reg; 1073 1074 starts[0] = starts[1] = START_NONE; 1075 ends[0] = ends[1] = END_NONE; 1076 1077 if (type == SYS_RES_MEMORY) 1078 align = CBB_MEMALIGN; 1079 else if (type == SYS_RES_IOPORT) 1080 align = CBB_IOALIGN; 1081 else 1082 align = 1; 1083 1084 SLIST_FOREACH(rle, &sc->rl, link) { 1085 if (rle->type != type) 1086 continue; 1087 if (rle->res == NULL) 1088 continue; 1089 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1090 continue; 1091 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1092 i = 1; 1093 else 1094 i = 0; 1095 if (rman_get_start(rle->res) < starts[i]) 1096 starts[i] = rman_get_start(rle->res); 1097 if (rman_get_end(rle->res) > ends[i]) 1098 ends[i] = rman_get_end(rle->res); 1099 } 1100 for (i = 0; i < 2; i++) { 1101 if (starts[i] == START_NONE) 1102 continue; 1103 starts[i] &= ~(align - 1); 1104 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1105 } 1106 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1107 if (starts[0] < starts[1]) { 1108 if (ends[0] > starts[1]) { 1109 device_printf(sc->dev, "Overlapping ranges" 1110 " for prefetch and non-prefetch memory\n"); 1111 return; 1112 } 1113 } else { 1114 if (ends[1] > starts[0]) { 1115 device_printf(sc->dev, "Overlapping ranges" 1116 " for prefetch and non-prefetch memory\n"); 1117 return; 1118 } 1119 } 1120 } 1121 1122 if (type == SYS_RES_MEMORY) { 1123 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1124 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1125 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1126 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1127 CBBM_BRIDGECTRL_PREFETCH_1); 1128 if (starts[1] != START_NONE) 1129 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1130 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1131 if (bootverbose) { 1132 device_printf(sc->dev, "Opening memory:\n"); 1133 if (starts[0] != START_NONE) 1134 device_printf(sc->dev, "Normal: %#x-%#x\n", 1135 starts[0], ends[0]); 1136 if (starts[1] != START_NONE) 1137 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1138 starts[1], ends[1]); 1139 } 1140 } else if (type == SYS_RES_IOPORT) { 1141 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1142 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1143 if (bootverbose && starts[0] != START_NONE) 1144 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1145 starts[0], ends[0]); 1146 } 1147 } 1148 1149 static int 1150 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1151 int rid, struct resource *res) 1152 { 1153 int ret; 1154 1155 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1156 type, rid, res); 1157 if (ret != 0) 1158 return (ret); 1159 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1160 return (0); 1161 } 1162 1163 static int 1164 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1165 int rid, struct resource *res) 1166 { 1167 int ret; 1168 1169 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1170 type, rid, res); 1171 if (ret != 0) 1172 return (ret); 1173 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1174 return (0); 1175 } 1176 1177 static struct resource * 1178 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1179 int *rid, u_long start, u_long end, u_long count, u_int flags) 1180 { 1181 struct cbb_softc *sc = device_get_softc(brdev); 1182 int tmp; 1183 struct resource *res; 1184 u_long align; 1185 1186 switch (type) { 1187 case SYS_RES_IRQ: 1188 tmp = rman_get_start(sc->irq_res); 1189 if (start > tmp || end < tmp || count != 1) { 1190 device_printf(child, "requested interrupt %ld-%ld," 1191 "count = %ld not supported by cbb\n", 1192 start, end, count); 1193 return (NULL); 1194 } 1195 start = end = tmp; 1196 flags |= RF_SHAREABLE; 1197 break; 1198 case SYS_RES_IOPORT: 1199 if (start <= cbb_start_32_io) 1200 start = cbb_start_32_io; 1201 if (end < start) 1202 end = start; 1203 if (count > (1 << RF_ALIGNMENT(flags))) 1204 flags = (flags & ~RF_ALIGNMENT_MASK) | 1205 rman_make_alignment_flags(count); 1206 break; 1207 case SYS_RES_MEMORY: 1208 if (start <= cbb_start_mem) 1209 start = cbb_start_mem; 1210 if (end < start) 1211 end = start; 1212 if (count < CBB_MEMALIGN) 1213 align = CBB_MEMALIGN; 1214 else 1215 align = count; 1216 if (align > (1 << RF_ALIGNMENT(flags))) 1217 flags = (flags & ~RF_ALIGNMENT_MASK) | 1218 rman_make_alignment_flags(align); 1219 break; 1220 } 1221 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1222 start, end, count, flags & ~RF_ACTIVE); 1223 if (res == NULL) { 1224 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1225 return (NULL); 1226 } 1227 cbb_insert_res(sc, res, type, *rid); 1228 if (flags & RF_ACTIVE) 1229 if (bus_activate_resource(child, type, *rid, res) != 0) { 1230 bus_release_resource(child, type, *rid, res); 1231 return (NULL); 1232 } 1233 1234 return (res); 1235 } 1236 1237 static int 1238 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1239 int rid, struct resource *res) 1240 { 1241 struct cbb_softc *sc = device_get_softc(brdev); 1242 int error; 1243 1244 if (rman_get_flags(res) & RF_ACTIVE) { 1245 error = bus_deactivate_resource(child, type, rid, res); 1246 if (error != 0) 1247 return (error); 1248 } 1249 cbb_remove_res(sc, res); 1250 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1251 type, rid, res)); 1252 } 1253 1254 /************************************************************************/ 1255 /* PC Card Power Functions */ 1256 /************************************************************************/ 1257 1258 static int 1259 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1260 { 1261 struct cbb_softc *sc = device_get_softc(brdev); 1262 int err; 1263 1264 DPRINTF(("cbb_pcic_socket_enable:\n")); 1265 1266 /* power down/up the socket to reset */ 1267 err = cbb_do_power(brdev); 1268 if (err) 1269 return (err); 1270 exca_reset(&sc->exca[0], child); 1271 1272 return (0); 1273 } 1274 1275 static int 1276 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1277 { 1278 struct cbb_softc *sc = device_get_softc(brdev); 1279 1280 DPRINTF(("cbb_pcic_socket_disable\n")); 1281 1282 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1283 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1284 pause("cbbP1", hz / 100); 1285 1286 /* power down the socket */ 1287 cbb_power(brdev, CARD_OFF); 1288 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1289 1290 /* wait 300ms until power fails (Tpf). */ 1291 pause("cbbP2", hz * 300 / 1000); 1292 1293 /* enable CSC interrupts */ 1294 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1295 return (0); 1296 } 1297 1298 /************************************************************************/ 1299 /* POWER methods */ 1300 /************************************************************************/ 1301 1302 int 1303 cbb_power_enable_socket(device_t brdev, device_t child) 1304 { 1305 struct cbb_softc *sc = device_get_softc(brdev); 1306 1307 if (sc->flags & CBB_16BIT_CARD) 1308 return (cbb_pcic_power_enable_socket(brdev, child)); 1309 return (cbb_cardbus_power_enable_socket(brdev, child)); 1310 } 1311 1312 int 1313 cbb_power_disable_socket(device_t brdev, device_t child) 1314 { 1315 struct cbb_softc *sc = device_get_softc(brdev); 1316 if (sc->flags & CBB_16BIT_CARD) 1317 return (cbb_pcic_power_disable_socket(brdev, child)); 1318 return (cbb_cardbus_power_disable_socket(brdev, child)); 1319 } 1320 1321 static int 1322 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1323 struct resource *res) 1324 { 1325 struct cbb_softc *sc = device_get_softc(brdev); 1326 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1327 } 1328 1329 static int 1330 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1331 int rid, struct resource *res) 1332 { 1333 struct cbb_softc *sc = device_get_softc(brdev); 1334 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1335 } 1336 1337 static struct resource * 1338 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1339 u_long start, u_long end, u_long count, u_int flags) 1340 { 1341 struct resource *res = NULL; 1342 struct cbb_softc *sc = device_get_softc(brdev); 1343 int align; 1344 int tmp; 1345 1346 switch (type) { 1347 case SYS_RES_MEMORY: 1348 if (start < cbb_start_mem) 1349 start = cbb_start_mem; 1350 if (end < start) 1351 end = start; 1352 if (count < CBB_MEMALIGN) 1353 align = CBB_MEMALIGN; 1354 else 1355 align = count; 1356 if (align > (1 << RF_ALIGNMENT(flags))) 1357 flags = (flags & ~RF_ALIGNMENT_MASK) | 1358 rman_make_alignment_flags(align); 1359 break; 1360 case SYS_RES_IOPORT: 1361 if (start < cbb_start_16_io) 1362 start = cbb_start_16_io; 1363 if (end < start) 1364 end = start; 1365 break; 1366 case SYS_RES_IRQ: 1367 tmp = rman_get_start(sc->irq_res); 1368 if (start > tmp || end < tmp || count != 1) { 1369 device_printf(child, "requested interrupt %ld-%ld," 1370 "count = %ld not supported by cbb\n", 1371 start, end, count); 1372 return (NULL); 1373 } 1374 flags |= RF_SHAREABLE; 1375 start = end = rman_get_start(sc->irq_res); 1376 break; 1377 } 1378 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1379 start, end, count, flags & ~RF_ACTIVE); 1380 if (res == NULL) 1381 return (NULL); 1382 cbb_insert_res(sc, res, type, *rid); 1383 if (flags & RF_ACTIVE) { 1384 if (bus_activate_resource(child, type, *rid, res) != 0) { 1385 bus_release_resource(child, type, *rid, res); 1386 return (NULL); 1387 } 1388 } 1389 1390 return (res); 1391 } 1392 1393 static int 1394 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1395 int rid, struct resource *res) 1396 { 1397 struct cbb_softc *sc = device_get_softc(brdev); 1398 int error; 1399 1400 if (rman_get_flags(res) & RF_ACTIVE) { 1401 error = bus_deactivate_resource(child, type, rid, res); 1402 if (error != 0) 1403 return (error); 1404 } 1405 cbb_remove_res(sc, res); 1406 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1407 type, rid, res)); 1408 } 1409 1410 /************************************************************************/ 1411 /* PC Card methods */ 1412 /************************************************************************/ 1413 1414 int 1415 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1416 u_long flags) 1417 { 1418 struct cbb_softc *sc = device_get_softc(brdev); 1419 struct resource *res; 1420 1421 if (type != SYS_RES_MEMORY) 1422 return (EINVAL); 1423 res = cbb_find_res(sc, type, rid); 1424 if (res == NULL) { 1425 device_printf(brdev, 1426 "set_res_flags: specified rid not found\n"); 1427 return (ENOENT); 1428 } 1429 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1430 } 1431 1432 int 1433 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1434 uint32_t cardaddr, uint32_t *deltap) 1435 { 1436 struct cbb_softc *sc = device_get_softc(brdev); 1437 struct resource *res; 1438 1439 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1440 if (res == NULL) { 1441 device_printf(brdev, 1442 "set_memory_offset: specified rid not found\n"); 1443 return (ENOENT); 1444 } 1445 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1446 } 1447 1448 /************************************************************************/ 1449 /* BUS Methods */ 1450 /************************************************************************/ 1451 1452 1453 int 1454 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1455 struct resource *r) 1456 { 1457 struct cbb_softc *sc = device_get_softc(brdev); 1458 1459 if (sc->flags & CBB_16BIT_CARD) 1460 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1461 else 1462 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1463 r)); 1464 } 1465 1466 int 1467 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1468 int rid, struct resource *r) 1469 { 1470 struct cbb_softc *sc = device_get_softc(brdev); 1471 1472 if (sc->flags & CBB_16BIT_CARD) 1473 return (cbb_pcic_deactivate_resource(brdev, child, type, 1474 rid, r)); 1475 else 1476 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1477 rid, r)); 1478 } 1479 1480 struct resource * 1481 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1482 u_long start, u_long end, u_long count, u_int flags) 1483 { 1484 struct cbb_softc *sc = device_get_softc(brdev); 1485 1486 if (sc->flags & CBB_16BIT_CARD) 1487 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1488 start, end, count, flags)); 1489 else 1490 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1491 start, end, count, flags)); 1492 } 1493 1494 int 1495 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1496 struct resource *r) 1497 { 1498 struct cbb_softc *sc = device_get_softc(brdev); 1499 1500 if (sc->flags & CBB_16BIT_CARD) 1501 return (cbb_pcic_release_resource(brdev, child, type, 1502 rid, r)); 1503 else 1504 return (cbb_cardbus_release_resource(brdev, child, type, 1505 rid, r)); 1506 } 1507 1508 int 1509 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1510 { 1511 struct cbb_softc *sc = device_get_softc(brdev); 1512 1513 switch (which) { 1514 case PCIB_IVAR_DOMAIN: 1515 *result = sc->domain; 1516 return (0); 1517 case PCIB_IVAR_BUS: 1518 *result = sc->secbus; 1519 return (0); 1520 } 1521 return (ENOENT); 1522 } 1523 1524 int 1525 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1526 { 1527 struct cbb_softc *sc = device_get_softc(brdev); 1528 1529 switch (which) { 1530 case PCIB_IVAR_DOMAIN: 1531 return (EINVAL); 1532 case PCIB_IVAR_BUS: 1533 sc->secbus = value; 1534 return (0); 1535 } 1536 return (ENOENT); 1537 } 1538 1539 int 1540 cbb_suspend(device_t self) 1541 { 1542 int error = 0; 1543 struct cbb_softc *sc = device_get_softc(self); 1544 1545 error = bus_generic_suspend(self); 1546 if (error != 0) 1547 return (error); 1548 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1549 sc->cardok = 0; /* Card is bogus now */ 1550 return (0); 1551 } 1552 1553 int 1554 cbb_resume(device_t self) 1555 { 1556 int error = 0; 1557 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1558 uint32_t tmp; 1559 1560 /* 1561 * Some BIOSes will not save the BARs for the pci chips, so we 1562 * must do it ourselves. If the BAR is reset to 0 for an I/O 1563 * device, it will read back as 0x1, so no explicit test for 1564 * memory devices are needed. 1565 * 1566 * Note: The PCI bus code should do this automatically for us on 1567 * suspend/resume, but until it does, we have to cope. 1568 */ 1569 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1570 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1571 rman_get_start(sc->base_res))); 1572 1573 sc->chipinit(sc); 1574 1575 /* reset interrupt -- Do we really need to do this? */ 1576 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1577 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1578 1579 /* CSC Interrupt: Card detect interrupt on */ 1580 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1581 1582 /* Signal the thread to wakeup. */ 1583 wakeup(&sc->intrhand); 1584 1585 error = bus_generic_resume(self); 1586 1587 return (error); 1588 } 1589 1590 int 1591 cbb_child_present(device_t parent, device_t child) 1592 { 1593 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent); 1594 uint32_t sockstate; 1595 1596 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1597 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1598 } 1599