1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2002-2004 M. Warner Losh. 5 * Copyright (c) 2000-2001 Jonathan Chen. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30 31 /*- 32 * Copyright (c) 1998, 1999 and 2000 33 * HAYAKAWA Koichi. All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. All advertising materials mentioning features or use of this software 44 * must display the following acknowledgement: 45 * This product includes software developed by HAYAKAWA Koichi. 46 * 4. The name of the author may not be used to endorse or promote products 47 * derived from this software without specific prior written permission. 48 * 49 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 50 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 51 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 52 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 53 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 54 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 55 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 56 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 57 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 58 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 59 */ 60 61 /* 62 * Driver for PCI to CardBus Bridge chips 63 * and PCI to PCMCIA Bridge chips 64 * and ISA to PCMCIA host adapters 65 * and C Bus to PCMCIA host adapters 66 * 67 * References: 68 * TI Datasheets: 69 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 70 * 71 * Written by Jonathan Chen <jon@freebsd.org> 72 * The author would like to acknowledge: 73 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 74 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 75 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 76 * * David Cross: Author of the initial ugly hack for a specific cardbus card 77 */ 78 79 #include <sys/cdefs.h> 80 __FBSDID("$FreeBSD$"); 81 82 #include <sys/param.h> 83 #include <sys/bus.h> 84 #include <sys/condvar.h> 85 #include <sys/errno.h> 86 #include <sys/kernel.h> 87 #include <sys/module.h> 88 #include <sys/kthread.h> 89 #include <sys/lock.h> 90 #include <sys/malloc.h> 91 #include <sys/mutex.h> 92 #include <sys/proc.h> 93 #include <sys/rman.h> 94 #include <sys/sysctl.h> 95 #include <sys/systm.h> 96 #include <machine/bus.h> 97 #include <machine/resource.h> 98 99 #include <dev/pci/pcireg.h> 100 #include <dev/pci/pcivar.h> 101 #include <dev/pci/pcib_private.h> 102 103 #include <dev/pccard/pccardreg.h> 104 #include <dev/pccard/pccardvar.h> 105 106 #include <dev/exca/excareg.h> 107 #include <dev/exca/excavar.h> 108 109 #include <dev/pccbb/pccbbreg.h> 110 #include <dev/pccbb/pccbbvar.h> 111 112 #include "power_if.h" 113 #include "card_if.h" 114 #include "pcib_if.h" 115 116 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 117 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 118 119 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 120 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 121 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 122 pci_write_config(DEV, REG, ( \ 123 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 124 125 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 126 127 #define CBB_START_MEM 0x88000000 128 #define CBB_START_32_IO 0x1000 129 #define CBB_START_16_IO 0x100 130 131 devclass_t cbb_devclass; 132 133 /* sysctl vars */ 134 static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 135 136 /* There's no way to say TUNEABLE_LONG to get the right types */ 137 u_long cbb_start_mem = CBB_START_MEM; 138 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RWTUN, 139 &cbb_start_mem, CBB_START_MEM, 140 "Starting address for memory allocations"); 141 142 u_long cbb_start_16_io = CBB_START_16_IO; 143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RWTUN, 144 &cbb_start_16_io, CBB_START_16_IO, 145 "Starting ioport for 16-bit cards"); 146 147 u_long cbb_start_32_io = CBB_START_32_IO; 148 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RWTUN, 149 &cbb_start_32_io, CBB_START_32_IO, 150 "Starting ioport for 32-bit cards"); 151 152 int cbb_debug = 0; 153 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RWTUN, &cbb_debug, 0, 154 "Verbose cardbus bridge debugging"); 155 156 static void cbb_insert(struct cbb_softc *sc); 157 static void cbb_removal(struct cbb_softc *sc); 158 static uint32_t cbb_detect_voltage(device_t brdev); 159 static int cbb_cardbus_reset_power(device_t brdev, device_t child, int on); 160 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 161 uint32_t end); 162 static int cbb_cardbus_mem_open(device_t brdev, int win, 163 uint32_t start, uint32_t end); 164 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 165 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 166 int type, int rid, struct resource *res); 167 static int cbb_cardbus_deactivate_resource(device_t brdev, 168 device_t child, int type, int rid, struct resource *res); 169 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 170 device_t child, int type, int *rid, rman_res_t start, 171 rman_res_t end, rman_res_t count, u_int flags); 172 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 173 int type, int rid, struct resource *res); 174 static int cbb_cardbus_power_enable_socket(device_t brdev, 175 device_t child); 176 static int cbb_cardbus_power_disable_socket(device_t brdev, 177 device_t child); 178 static int cbb_func_filt(void *arg); 179 static void cbb_func_intr(void *arg); 180 181 static void 182 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 183 { 184 struct cbb_reslist *rle; 185 186 SLIST_FOREACH(rle, &sc->rl, link) { 187 if (rle->res == res) { 188 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 189 free(rle, M_DEVBUF); 190 return; 191 } 192 } 193 } 194 195 static struct resource * 196 cbb_find_res(struct cbb_softc *sc, int type, int rid) 197 { 198 struct cbb_reslist *rle; 199 200 SLIST_FOREACH(rle, &sc->rl, link) 201 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 202 return (rle->res); 203 return (NULL); 204 } 205 206 static void 207 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 208 int rid) 209 { 210 struct cbb_reslist *rle; 211 212 /* 213 * Need to record allocated resource so we can iterate through 214 * it later. 215 */ 216 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 217 if (rle == NULL) 218 panic("cbb_cardbus_alloc_resource: can't record entry!"); 219 rle->res = res; 220 rle->type = type; 221 rle->rid = rid; 222 SLIST_INSERT_HEAD(&sc->rl, rle, link); 223 } 224 225 static void 226 cbb_destroy_res(struct cbb_softc *sc) 227 { 228 struct cbb_reslist *rle; 229 230 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 231 device_printf(sc->dev, "Danger Will Robinson: Resource " 232 "left allocated! This is a bug... " 233 "(rid=%x, type=%d, addr=%jx)\n", rle->rid, rle->type, 234 rman_get_start(rle->res)); 235 SLIST_REMOVE_HEAD(&sc->rl, link); 236 free(rle, M_DEVBUF); 237 } 238 } 239 240 /* 241 * Disable function interrupts by telling the bridge to generate IRQ1 242 * interrupts. These interrupts aren't really generated by the chip, since 243 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 244 * initialization, so this helps to work around the problem. 245 * 246 * XXX We can't do this workaround for all chipsets, because this 247 * XXX causes interference with the keyboard because somechipsets will 248 * XXX actually signal IRQ1 over their serial interrupt connections to 249 * XXX the south bridge. Disable it it for now. 250 */ 251 void 252 cbb_disable_func_intr(struct cbb_softc *sc) 253 { 254 #if 0 255 uint8_t reg; 256 257 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 258 EXCA_INTR_IRQ_RESERVED1; 259 exca_putb(&sc->exca[0], EXCA_INTR, reg); 260 #endif 261 } 262 263 /* 264 * Enable function interrupts. We turn on function interrupts when the card 265 * requests an interrupt. The PCMCIA standard says that we should set 266 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 267 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 268 * cards. 269 */ 270 static void 271 cbb_enable_func_intr(struct cbb_softc *sc) 272 { 273 uint8_t reg; 274 275 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 276 EXCA_INTR_IRQ_NONE; 277 exca_putb(&sc->exca[0], EXCA_INTR, reg); 278 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 279 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 280 } 281 282 int 283 cbb_detach(device_t brdev) 284 { 285 struct cbb_softc *sc = device_get_softc(brdev); 286 device_t *devlist; 287 int tmp, tries, error, numdevs; 288 289 /* 290 * Before we delete the children (which we have to do because 291 * attach doesn't check for children busses correctly), we have 292 * to detach the children. Even if we didn't need to delete the 293 * children, we have to detach them. 294 */ 295 error = bus_generic_detach(brdev); 296 if (error != 0) 297 return (error); 298 299 /* 300 * Since the attach routine doesn't search for children before it 301 * attaches them to this device, we must delete them here in order 302 * for the kldload/unload case to work. If we failed to do that, then 303 * we'd get duplicate devices when cbb.ko was reloaded. 304 */ 305 tries = 10; 306 do { 307 error = device_get_children(brdev, &devlist, &numdevs); 308 if (error == 0) 309 break; 310 /* 311 * Try hard to cope with low memory. 312 */ 313 if (error == ENOMEM) { 314 pause("cbbnomem", 1); 315 continue; 316 } 317 } while (tries-- > 0); 318 for (tmp = 0; tmp < numdevs; tmp++) 319 device_delete_child(brdev, devlist[tmp]); 320 free(devlist, M_TEMP); 321 322 /* Turn off the interrupts */ 323 cbb_set(sc, CBB_SOCKET_MASK, 0); 324 325 /* reset 16-bit pcmcia bus */ 326 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 327 328 /* turn off power */ 329 cbb_power(brdev, CARD_OFF); 330 331 /* Ack the interrupt */ 332 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 333 334 /* 335 * Wait for the thread to die. kproc_exit will do a wakeup 336 * on the event thread's struct proc * so that we know it is 337 * safe to proceed. IF the thread is running, set the please 338 * die flag and wait for it to comply. Since the wakeup on 339 * the event thread happens only in kproc_exit, we don't 340 * need to loop here. 341 */ 342 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 343 mtx_lock(&sc->mtx); 344 sc->flags |= CBB_KTHREAD_DONE; 345 while (sc->flags & CBB_KTHREAD_RUNNING) { 346 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 347 wakeup(&sc->intrhand); 348 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 349 } 350 mtx_unlock(&sc->mtx); 351 352 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 353 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 354 sc->base_res); 355 mtx_destroy(&sc->mtx); 356 return (0); 357 } 358 359 int 360 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 362 void **cookiep) 363 { 364 struct cbb_intrhand *ih; 365 struct cbb_softc *sc = device_get_softc(dev); 366 int err; 367 368 if (filt == NULL && intr == NULL) 369 return (EINVAL); 370 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 371 if (ih == NULL) 372 return (ENOMEM); 373 *cookiep = ih; 374 ih->filt = filt; 375 ih->intr = intr; 376 ih->arg = arg; 377 ih->sc = sc; 378 /* 379 * XXX need to turn on ISA interrupts, if we ever support them, but 380 * XXX for now that's all we need to do. 381 */ 382 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 383 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 384 &ih->cookie); 385 if (err != 0) { 386 free(ih, M_DEVBUF); 387 return (err); 388 } 389 cbb_enable_func_intr(sc); 390 sc->cardok = 1; 391 return 0; 392 } 393 394 int 395 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 396 void *cookie) 397 { 398 struct cbb_intrhand *ih; 399 int err; 400 401 /* XXX Need to do different things for ISA interrupts. */ 402 ih = (struct cbb_intrhand *) cookie; 403 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 404 ih->cookie); 405 if (err != 0) 406 return (err); 407 free(ih, M_DEVBUF); 408 return (0); 409 } 410 411 412 void 413 cbb_driver_added(device_t brdev, driver_t *driver) 414 { 415 struct cbb_softc *sc = device_get_softc(brdev); 416 device_t *devlist; 417 device_t dev; 418 int tmp; 419 int numdevs; 420 int wake = 0; 421 422 DEVICE_IDENTIFY(driver, brdev); 423 tmp = device_get_children(brdev, &devlist, &numdevs); 424 if (tmp != 0) { 425 device_printf(brdev, "Cannot get children list, no reprobe\n"); 426 return; 427 } 428 for (tmp = 0; tmp < numdevs; tmp++) { 429 dev = devlist[tmp]; 430 if (device_get_state(dev) == DS_NOTPRESENT && 431 device_probe_and_attach(dev) == 0) 432 wake++; 433 } 434 free(devlist, M_TEMP); 435 436 if (wake > 0) 437 wakeup(&sc->intrhand); 438 } 439 440 void 441 cbb_child_detached(device_t brdev, device_t child) 442 { 443 struct cbb_softc *sc = device_get_softc(brdev); 444 445 /* I'm not sure we even need this */ 446 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 447 device_printf(brdev, "Unknown child detached: %s\n", 448 device_get_nameunit(child)); 449 } 450 451 /************************************************************************/ 452 /* Kthreads */ 453 /************************************************************************/ 454 455 void 456 cbb_event_thread(void *arg) 457 { 458 struct cbb_softc *sc = arg; 459 uint32_t status; 460 int err; 461 int not_a_card = 0; 462 463 /* 464 * We need to act as a power sequencer on startup. Delay 2s/channel 465 * to ensure the other channels have had a chance to come up. We likely 466 * should add a lock that's shared on a per-slot basis so that only 467 * one power event can happen per slot at a time. 468 */ 469 pause("cbbstart", hz * device_get_unit(sc->dev) * 2); 470 mtx_lock(&sc->mtx); 471 sc->flags |= CBB_KTHREAD_RUNNING; 472 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 473 mtx_unlock(&sc->mtx); 474 status = cbb_get(sc, CBB_SOCKET_STATE); 475 DPRINTF(("Status is 0x%x\n", status)); 476 if (!CBB_CARD_PRESENT(status)) { 477 not_a_card = 0; /* We know card type */ 478 cbb_removal(sc); 479 } else if (status & CBB_STATE_NOT_A_CARD) { 480 /* 481 * Up to 10 times, try to rescan the card when we see 482 * NOT_A_CARD. 10 is somehwat arbitrary. When this 483 * pathology hits, there's a ~40% chance each try will 484 * fail. 10 tries takes about 5s and results in a 485 * 99.99% certainty of the results. 486 */ 487 if (not_a_card++ < 10) { 488 DEVPRINTF((sc->dev, 489 "Not a card bit set, rescanning\n")); 490 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 491 } else { 492 device_printf(sc->dev, 493 "Can't determine card type\n"); 494 } 495 } else { 496 not_a_card = 0; /* We know card type */ 497 cbb_insert(sc); 498 } 499 500 /* 501 * First time through we need to tell mountroot that we're 502 * done. 503 */ 504 if (sc->sc_root_token) { 505 root_mount_rel(sc->sc_root_token); 506 sc->sc_root_token = NULL; 507 } 508 509 /* 510 * Wait until it has been 250ms since the last time we 511 * get an interrupt. We handle the rest of the interrupt 512 * at the top of the loop. Although we clear the bit in the 513 * ISR, we signal sc->cv from the detach path after we've 514 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 515 * 250ms sleep here. 516 * 517 * In our ISR, we turn off the card changed interrupt. Turn 518 * them back on here before we wait for them to happen. We 519 * turn them on/off so that we can tolerate a large latency 520 * between the time we signal cbb_event_thread and it gets 521 * a chance to run. 522 */ 523 mtx_lock(&sc->mtx); 524 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 525 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 526 err = 0; 527 while (err != EWOULDBLOCK && 528 (sc->flags & CBB_KTHREAD_DONE) == 0) 529 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 530 } 531 DEVPRINTF((sc->dev, "Thread terminating\n")); 532 sc->flags &= ~CBB_KTHREAD_RUNNING; 533 mtx_unlock(&sc->mtx); 534 kproc_exit(0); 535 } 536 537 /************************************************************************/ 538 /* Insert/removal */ 539 /************************************************************************/ 540 541 static void 542 cbb_insert(struct cbb_softc *sc) 543 { 544 uint32_t sockevent, sockstate; 545 546 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 547 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 548 549 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 550 sockevent, sockstate)); 551 552 if (sockstate & CBB_STATE_R2_CARD) { 553 if (device_is_attached(sc->exca[0].pccarddev)) { 554 sc->flags |= CBB_16BIT_CARD; 555 exca_insert(&sc->exca[0]); 556 } else { 557 device_printf(sc->dev, 558 "16-bit card inserted, but no pccard bus.\n"); 559 } 560 } else if (sockstate & CBB_STATE_CB_CARD) { 561 if (device_is_attached(sc->cbdev)) { 562 sc->flags &= ~CBB_16BIT_CARD; 563 CARD_ATTACH_CARD(sc->cbdev); 564 } else { 565 device_printf(sc->dev, 566 "CardBus card inserted, but no cardbus bus.\n"); 567 } 568 } else { 569 /* 570 * We should power the card down, and try again a couple of 571 * times if this happens. XXX 572 */ 573 device_printf(sc->dev, "Unsupported card type detected\n"); 574 } 575 } 576 577 static void 578 cbb_removal(struct cbb_softc *sc) 579 { 580 sc->cardok = 0; 581 if (sc->flags & CBB_16BIT_CARD) { 582 exca_removal(&sc->exca[0]); 583 } else { 584 if (device_is_attached(sc->cbdev)) 585 CARD_DETACH_CARD(sc->cbdev); 586 } 587 cbb_destroy_res(sc); 588 } 589 590 /************************************************************************/ 591 /* Interrupt Handler */ 592 /************************************************************************/ 593 594 static int 595 cbb_func_filt(void *arg) 596 { 597 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 598 struct cbb_softc *sc = ih->sc; 599 600 /* 601 * Make sure that the card is really there. 602 */ 603 if (!sc->cardok) 604 return (FILTER_STRAY); 605 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 606 sc->cardok = 0; 607 return (FILTER_HANDLED); 608 } 609 610 /* 611 * nb: don't have to check for giant or not, since that's done in the 612 * ISR dispatch and one can't hold Giant in a filter anyway... 613 */ 614 return ((*ih->filt)(ih->arg)); 615 } 616 617 static void 618 cbb_func_intr(void *arg) 619 { 620 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 621 struct cbb_softc *sc = ih->sc; 622 623 /* 624 * While this check may seem redundant, it helps close a race 625 * condition. If the card is ejected after the filter runs, but 626 * before this ISR can be scheduled, then we need to do the same 627 * filtering to prevent the card's ISR from being called. One could 628 * argue that the card's ISR should be able to cope, but experience 629 * has shown they can't always. This mitigates the problem by making 630 * the race quite a bit smaller. Properly written client ISRs should 631 * cope with the card going away in the middle of the ISR. We assume 632 * that drivers that are sophisticated enough to use filters don't 633 * need our protection. This also allows us to ensure they *ARE* 634 * called if their filter said they needed to be called. 635 */ 636 if (ih->filt == NULL) { 637 if (!sc->cardok) 638 return; 639 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 640 sc->cardok = 0; 641 return; 642 } 643 } 644 645 /* 646 * Call the registered ithread interrupt handler. This entire routine 647 * will be called with Giant if this isn't an MP safe driver, or not 648 * if it is. Either way, we don't have to worry. 649 */ 650 ih->intr(ih->arg); 651 } 652 653 /************************************************************************/ 654 /* Generic Power functions */ 655 /************************************************************************/ 656 657 static uint32_t 658 cbb_detect_voltage(device_t brdev) 659 { 660 struct cbb_softc *sc = device_get_softc(brdev); 661 uint32_t psr; 662 uint32_t vol = CARD_UKN_CARD; 663 664 psr = cbb_get(sc, CBB_SOCKET_STATE); 665 666 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 667 vol |= CARD_5V_CARD; 668 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 669 vol |= CARD_3V_CARD; 670 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 671 vol |= CARD_XV_CARD; 672 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 673 vol |= CARD_YV_CARD; 674 675 return (vol); 676 } 677 678 static uint8_t 679 cbb_o2micro_power_hack(struct cbb_softc *sc) 680 { 681 uint8_t reg; 682 683 /* 684 * Issue #2: INT# not qualified with IRQ Routing Bit. An 685 * unexpected PCI INT# may be generated during PC Card 686 * initialization even with the IRQ Routing Bit Set with some 687 * PC Cards. 688 * 689 * This is a two part issue. The first part is that some of 690 * our older controllers have an issue in which the slot's PCI 691 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 692 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 693 * is selected (ExCA register 03h bits 3:0, of the slot, are 694 * cleared) we will generate INT# if IREQ# is asserted. The 695 * second part is because some PC Cards prematurally assert 696 * IREQ# before the ExCA registers are fully programmed. This 697 * in turn asserts INT# because ExCA register 03h bits 3:0 698 * (ISA IRQ Select) are not yet programmed. 699 * 700 * The fix for this issue, which will work for any controller 701 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 702 * (select IRQ1), of the slot, before turning on slot power. 703 * Selecting IRQ1 will result in INT# NOT being asserted 704 * (because IRQ1 is selected), and IRQ1 won't be asserted 705 * because our controllers don't generate IRQ1. 706 * 707 * Other, non O2Micro controllers will generate irq 1 in some 708 * situations, so we can't do this hack for everybody. Reports of 709 * keyboard controller's interrupts being suppressed occurred when 710 * we did this. 711 */ 712 reg = exca_getb(&sc->exca[0], EXCA_INTR); 713 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 714 return (reg); 715 } 716 717 /* 718 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 719 * we don't have an interrupt storm on power on. This has the effect of 720 * disabling card status change interrupts for the duration of poweron. 721 */ 722 static void 723 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 724 { 725 exca_putb(&sc->exca[0], EXCA_INTR, reg); 726 } 727 728 int 729 cbb_power(device_t brdev, int volts) 730 { 731 uint32_t status, sock_ctrl, reg_ctrl, mask; 732 struct cbb_softc *sc = device_get_softc(brdev); 733 int cnt, sane; 734 int retval = 0; 735 int on = 0; 736 uint8_t reg = 0; 737 738 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 739 740 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 741 switch (volts & CARD_VCCMASK) { 742 case 5: 743 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 744 on++; 745 break; 746 case 3: 747 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 748 on++; 749 break; 750 case XV: 751 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 752 on++; 753 break; 754 case YV: 755 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 756 on++; 757 break; 758 case 0: 759 break; 760 default: 761 return (0); /* power NEVER changed */ 762 } 763 764 /* VPP == VCC */ 765 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 766 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 767 768 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 769 return (1); /* no change necessary */ 770 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 771 if (volts != 0 && sc->chipset == CB_O2MICRO) 772 reg = cbb_o2micro_power_hack(sc); 773 774 /* 775 * We have to mask the card change detect interrupt while we're 776 * messing with the power. It is allowed to bounce while we're 777 * messing with power as things settle down. In addition, we mask off 778 * the card's function interrupt by routing it via the ISA bus. This 779 * bit generally only affects 16-bit cards. Some bridges allow one to 780 * set another bit to have it also affect 32-bit cards. Since 32-bit 781 * cards are required to be better behaved, we don't bother to get 782 * into those bridge specific features. 783 * 784 * XXX I wonder if we need to enable the READY bit interrupt in the 785 * EXCA CSC register for 16-bit cards, and disable the CD bit? 786 */ 787 mask = cbb_get(sc, CBB_SOCKET_MASK); 788 mask |= CBB_SOCKET_MASK_POWER; 789 mask &= ~CBB_SOCKET_MASK_CD; 790 cbb_set(sc, CBB_SOCKET_MASK, mask); 791 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 792 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 793 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 794 if (on) { 795 mtx_lock(&sc->mtx); 796 cnt = sc->powerintr; 797 /* 798 * We have a shortish timeout of 500ms here. Some bridges do 799 * not generate a POWER_CYCLE event for 16-bit cards. In 800 * those cases, we have to cope the best we can, and having 801 * only a short delay is better than the alternatives. Others 802 * raise the power cycle a smidge before it is really ready. 803 * We deal with those below. 804 */ 805 sane = 10; 806 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 807 cnt == sc->powerintr && sane-- > 0) 808 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 809 mtx_unlock(&sc->mtx); 810 811 /* 812 * Relax for 100ms. Some bridges appear to assert this signal 813 * right away, but before the card has stabilized. Other 814 * cards need need more time to cope up reliabily. 815 * Experiments with troublesome setups show this to be a 816 * "cheap" way to enhance reliabilty. We need not do this for 817 * "off" since we don't touch the card after we turn it off. 818 */ 819 pause("cbbPwr", min(hz / 10, 1)); 820 821 /* 822 * The TOPIC95B requires a little bit extra time to get its 823 * act together, so delay for an additional 100ms. Also as 824 * documented below, it doesn't seem to set the POWER_CYCLE 825 * bit, so don't whine if it never came on. 826 */ 827 if (sc->chipset == CB_TOPIC95) 828 pause("cbb95B", hz / 10); 829 else if (sane <= 0) 830 device_printf(sc->dev, "power timeout, doom?\n"); 831 } 832 833 /* 834 * After the power is good, we can turn off the power interrupt. 835 * However, the PC Card standard says that we must delay turning the 836 * CD bit back on for a bit to allow for bouncyness on power down 837 * (recall that we don't wait above for a power down, since we don't 838 * get an interrupt for that). We're called either from the suspend 839 * code in which case we don't want to turn card change on again, or 840 * we're called from the card insertion code, in which case the cbb 841 * thread will turn it on for us before it waits to be woken by a 842 * change event. 843 * 844 * NB: Topic95B doesn't set the power cycle bit. we assume that 845 * both it and the TOPIC95 behave the same. 846 */ 847 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 848 status = cbb_get(sc, CBB_SOCKET_STATE); 849 if (on && sc->chipset != CB_TOPIC95) { 850 if ((status & CBB_STATE_POWER_CYCLE) == 0) 851 device_printf(sc->dev, "Power not on?\n"); 852 } 853 if (status & CBB_STATE_BAD_VCC_REQ) { 854 device_printf(sc->dev, "Bad Vcc requested\n"); 855 /* 856 * Turn off the power, and try again. Retrigger other 857 * active interrupts via force register. From NetBSD 858 * PR 36652, coded by me to description there. 859 */ 860 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 861 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 862 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 863 status &= ~CBB_STATE_BAD_VCC_REQ; 864 status &= ~CBB_STATE_DATA_LOST; 865 status |= CBB_FORCE_CV_TEST; 866 cbb_set(sc, CBB_SOCKET_FORCE, status); 867 goto done; 868 } 869 if (sc->chipset == CB_TOPIC97) { 870 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 871 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 872 if (on) 873 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 874 else 875 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 876 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 877 } 878 retval = 1; 879 done:; 880 if (volts != 0 && sc->chipset == CB_O2MICRO) 881 cbb_o2micro_power_hack2(sc, reg); 882 return (retval); 883 } 884 885 static int 886 cbb_current_voltage(device_t brdev) 887 { 888 struct cbb_softc *sc = device_get_softc(brdev); 889 uint32_t ctrl; 890 891 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 892 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 893 case CBB_SOCKET_CTRL_VCC_5V: 894 return CARD_5V_CARD; 895 case CBB_SOCKET_CTRL_VCC_3V: 896 return CARD_3V_CARD; 897 case CBB_SOCKET_CTRL_VCC_XV: 898 return CARD_XV_CARD; 899 case CBB_SOCKET_CTRL_VCC_YV: 900 return CARD_YV_CARD; 901 } 902 return 0; 903 } 904 905 /* 906 * detect the voltage for the card, and set it. Since the power 907 * used is the square of the voltage, lower voltages is a big win 908 * and what Windows does (and what Microsoft prefers). The MS paper 909 * also talks about preferring the CIS entry as well, but that has 910 * to be done elsewhere. We also optimize power sequencing here 911 * and don't change things if we're already powered up at a supported 912 * voltage. 913 * 914 * In addition, we power up with OE disabled. We'll set it later 915 * in the power up sequence. 916 */ 917 static int 918 cbb_do_power(device_t brdev) 919 { 920 struct cbb_softc *sc = device_get_softc(brdev); 921 uint32_t voltage, curpwr; 922 uint32_t status; 923 924 /* Don't enable OE (output enable) until power stable */ 925 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 926 927 voltage = cbb_detect_voltage(brdev); 928 curpwr = cbb_current_voltage(brdev); 929 status = cbb_get(sc, CBB_SOCKET_STATE); 930 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 931 return 0; 932 /* Prefer lowest voltage supported */ 933 cbb_power(brdev, CARD_OFF); 934 if (voltage & CARD_YV_CARD) 935 cbb_power(brdev, CARD_VCC(YV)); 936 else if (voltage & CARD_XV_CARD) 937 cbb_power(brdev, CARD_VCC(XV)); 938 else if (voltage & CARD_3V_CARD) 939 cbb_power(brdev, CARD_VCC(3)); 940 else if (voltage & CARD_5V_CARD) 941 cbb_power(brdev, CARD_VCC(5)); 942 else { 943 device_printf(brdev, "Unknown card voltage\n"); 944 return (ENXIO); 945 } 946 return (0); 947 } 948 949 /************************************************************************/ 950 /* CardBus power functions */ 951 /************************************************************************/ 952 953 static int 954 cbb_cardbus_reset_power(device_t brdev, device_t child, int on) 955 { 956 struct cbb_softc *sc = device_get_softc(brdev); 957 uint32_t b, h; 958 int delay, count, zero_seen, func; 959 960 /* 961 * Asserting reset for 20ms is necessary for most bridges. For some 962 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 963 * root cause of this is unknown, and NetBSD does the same thing. 964 */ 965 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 966 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 967 pause("cbbP3", hz * delay / 1000); 968 969 /* 970 * If a card exists and we're turning it on, take it out of reset. 971 * After clearing reset, wait up to 1.1s for the first configuration 972 * register (vendor/product) configuration register of device 0.0 to 973 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 974 * says that when powering up the card, the PCI Spec v2.1 must be 975 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 976 * Config Access) is at most 2^25 clocks, or just over 1s. Section 977 * 2.2.1 states any card not ready to participate in bus transactions 978 * must tristate its outputs. Therefore, any access to its 979 * configuration registers must be ignored. In that state, the config 980 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 981 * 0xffff is invalid, so this can never match a real card. Print a 982 * warning if it never returns a real id. The PCMCIA PC Card 983 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 984 * a cardbus bus, so that's the only register we check here. 985 */ 986 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 987 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 988 &~CBBM_BRIDGECTRL_RESET, 2); 989 b = pcib_get_bus(child); 990 count = 1100 / 20; 991 do { 992 pause("cbbP4", hz * 2 / 100); 993 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 994 0xfffffffful && --count >= 0); 995 if (count < 0) 996 device_printf(brdev, "Warning: Bus reset timeout\n"); 997 998 /* 999 * Some cards (so far just an atheros card I have) seem to 1000 * come out of reset in a funky state. They report they are 1001 * multi-function cards, but have nonsense for some of the 1002 * higher functions. So if the card claims to be MFDEV, and 1003 * any of the higher functions' ID is 0, then we've hit the 1004 * bug and we'll try again. 1005 */ 1006 h = PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_HDRTYPE, 1); 1007 if ((h & PCIM_MFDEV) == 0) 1008 return 0; 1009 zero_seen = 0; 1010 for (func = 1; func < 8; func++) { 1011 h = PCIB_READ_CONFIG(brdev, b, 0, func, 1012 PCIR_DEVVENDOR, 4); 1013 if (h == 0) 1014 zero_seen++; 1015 } 1016 if (!zero_seen) 1017 return 0; 1018 return (EINVAL); 1019 } 1020 return 0; 1021 } 1022 1023 static int 1024 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1025 { 1026 cbb_power(brdev, CARD_OFF); 1027 cbb_cardbus_reset_power(brdev, child, 0); 1028 return (0); 1029 } 1030 1031 static int 1032 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1033 { 1034 struct cbb_softc *sc = device_get_softc(brdev); 1035 int err, count; 1036 1037 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 1038 return (ENODEV); 1039 1040 count = 10; 1041 do { 1042 err = cbb_do_power(brdev); 1043 if (err) 1044 return (err); 1045 err = cbb_cardbus_reset_power(brdev, child, 1); 1046 if (err) { 1047 device_printf(brdev, "Reset failed, trying again.\n"); 1048 cbb_cardbus_power_disable_socket(brdev, child); 1049 pause("cbbErr1", hz / 10); /* wait 100ms */ 1050 } 1051 } while (err != 0 && count-- > 0); 1052 return (0); 1053 } 1054 1055 /************************************************************************/ 1056 /* CardBus Resource */ 1057 /************************************************************************/ 1058 1059 static void 1060 cbb_activate_window(device_t brdev, int type) 1061 { 1062 1063 PCI_ENABLE_IO(device_get_parent(brdev), brdev, type); 1064 } 1065 1066 static int 1067 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1068 { 1069 int basereg; 1070 int limitreg; 1071 1072 if ((win < 0) || (win > 1)) { 1073 DEVPRINTF((brdev, 1074 "cbb_cardbus_io_open: window out of range %d\n", win)); 1075 return (EINVAL); 1076 } 1077 1078 basereg = win * 8 + CBBR_IOBASE0; 1079 limitreg = win * 8 + CBBR_IOLIMIT0; 1080 1081 pci_write_config(brdev, basereg, start, 4); 1082 pci_write_config(brdev, limitreg, end, 4); 1083 cbb_activate_window(brdev, SYS_RES_IOPORT); 1084 return (0); 1085 } 1086 1087 static int 1088 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1089 { 1090 int basereg; 1091 int limitreg; 1092 1093 if ((win < 0) || (win > 1)) { 1094 DEVPRINTF((brdev, 1095 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1096 return (EINVAL); 1097 } 1098 1099 basereg = win * 8 + CBBR_MEMBASE0; 1100 limitreg = win * 8 + CBBR_MEMLIMIT0; 1101 1102 pci_write_config(brdev, basereg, start, 4); 1103 pci_write_config(brdev, limitreg, end, 4); 1104 cbb_activate_window(brdev, SYS_RES_MEMORY); 1105 return (0); 1106 } 1107 1108 #define START_NONE 0xffffffff 1109 #define END_NONE 0 1110 1111 static void 1112 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1113 { 1114 uint32_t starts[2]; 1115 uint32_t ends[2]; 1116 struct cbb_reslist *rle; 1117 int align, i; 1118 uint32_t reg; 1119 1120 starts[0] = starts[1] = START_NONE; 1121 ends[0] = ends[1] = END_NONE; 1122 1123 if (type == SYS_RES_MEMORY) 1124 align = CBB_MEMALIGN; 1125 else if (type == SYS_RES_IOPORT) 1126 align = CBB_IOALIGN; 1127 else 1128 align = 1; 1129 1130 SLIST_FOREACH(rle, &sc->rl, link) { 1131 if (rle->type != type) 1132 continue; 1133 if (rle->res == NULL) 1134 continue; 1135 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1136 continue; 1137 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1138 i = 1; 1139 else 1140 i = 0; 1141 if (rman_get_start(rle->res) < starts[i]) 1142 starts[i] = rman_get_start(rle->res); 1143 if (rman_get_end(rle->res) > ends[i]) 1144 ends[i] = rman_get_end(rle->res); 1145 } 1146 for (i = 0; i < 2; i++) { 1147 if (starts[i] == START_NONE) 1148 continue; 1149 starts[i] &= ~(align - 1); 1150 ends[i] = roundup2(ends[i], align) - 1; 1151 } 1152 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1153 if (starts[0] < starts[1]) { 1154 if (ends[0] > starts[1]) { 1155 device_printf(sc->dev, "Overlapping ranges" 1156 " for prefetch and non-prefetch memory\n"); 1157 return; 1158 } 1159 } else { 1160 if (ends[1] > starts[0]) { 1161 device_printf(sc->dev, "Overlapping ranges" 1162 " for prefetch and non-prefetch memory\n"); 1163 return; 1164 } 1165 } 1166 } 1167 1168 if (type == SYS_RES_MEMORY) { 1169 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1170 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1171 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1172 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1173 CBBM_BRIDGECTRL_PREFETCH_1); 1174 if (starts[1] != START_NONE) 1175 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1176 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1177 if (bootverbose) { 1178 device_printf(sc->dev, "Opening memory:\n"); 1179 if (starts[0] != START_NONE) 1180 device_printf(sc->dev, "Normal: %#x-%#x\n", 1181 starts[0], ends[0]); 1182 if (starts[1] != START_NONE) 1183 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1184 starts[1], ends[1]); 1185 } 1186 } else if (type == SYS_RES_IOPORT) { 1187 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1188 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1189 if (bootverbose && starts[0] != START_NONE) 1190 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1191 starts[0], ends[0]); 1192 } 1193 } 1194 1195 static int 1196 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1197 int rid, struct resource *res) 1198 { 1199 int ret; 1200 1201 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1202 type, rid, res); 1203 if (ret != 0) 1204 return (ret); 1205 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1206 return (0); 1207 } 1208 1209 static int 1210 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1211 int rid, struct resource *res) 1212 { 1213 int ret; 1214 1215 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1216 type, rid, res); 1217 if (ret != 0) 1218 return (ret); 1219 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1220 return (0); 1221 } 1222 1223 static struct resource * 1224 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1225 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1226 { 1227 struct cbb_softc *sc = device_get_softc(brdev); 1228 int tmp; 1229 struct resource *res; 1230 rman_res_t align; 1231 1232 switch (type) { 1233 case SYS_RES_IRQ: 1234 tmp = rman_get_start(sc->irq_res); 1235 if (start > tmp || end < tmp || count != 1) { 1236 device_printf(child, "requested interrupt %jd-%jd," 1237 "count = %jd not supported by cbb\n", 1238 start, end, count); 1239 return (NULL); 1240 } 1241 start = end = tmp; 1242 flags |= RF_SHAREABLE; 1243 break; 1244 case SYS_RES_IOPORT: 1245 if (start <= cbb_start_32_io) 1246 start = cbb_start_32_io; 1247 if (end < start) 1248 end = start; 1249 if (count > (1 << RF_ALIGNMENT(flags))) 1250 flags = (flags & ~RF_ALIGNMENT_MASK) | 1251 rman_make_alignment_flags(count); 1252 break; 1253 case SYS_RES_MEMORY: 1254 if (start <= cbb_start_mem) 1255 start = cbb_start_mem; 1256 if (end < start) 1257 end = start; 1258 if (count < CBB_MEMALIGN) 1259 align = CBB_MEMALIGN; 1260 else 1261 align = count; 1262 if (align > (1 << RF_ALIGNMENT(flags))) 1263 flags = (flags & ~RF_ALIGNMENT_MASK) | 1264 rman_make_alignment_flags(align); 1265 break; 1266 } 1267 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1268 start, end, count, flags & ~RF_ACTIVE); 1269 if (res == NULL) { 1270 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1271 return (NULL); 1272 } 1273 cbb_insert_res(sc, res, type, *rid); 1274 if (flags & RF_ACTIVE) 1275 if (bus_activate_resource(child, type, *rid, res) != 0) { 1276 bus_release_resource(child, type, *rid, res); 1277 return (NULL); 1278 } 1279 1280 return (res); 1281 } 1282 1283 static int 1284 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1285 int rid, struct resource *res) 1286 { 1287 struct cbb_softc *sc = device_get_softc(brdev); 1288 int error; 1289 1290 if (rman_get_flags(res) & RF_ACTIVE) { 1291 error = bus_deactivate_resource(child, type, rid, res); 1292 if (error != 0) 1293 return (error); 1294 } 1295 cbb_remove_res(sc, res); 1296 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1297 type, rid, res)); 1298 } 1299 1300 /************************************************************************/ 1301 /* PC Card Power Functions */ 1302 /************************************************************************/ 1303 1304 static int 1305 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1306 { 1307 struct cbb_softc *sc = device_get_softc(brdev); 1308 int err; 1309 1310 DPRINTF(("cbb_pcic_socket_enable:\n")); 1311 1312 /* power down/up the socket to reset */ 1313 err = cbb_do_power(brdev); 1314 if (err) 1315 return (err); 1316 exca_reset(&sc->exca[0], child); 1317 1318 return (0); 1319 } 1320 1321 static int 1322 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1323 { 1324 struct cbb_softc *sc = device_get_softc(brdev); 1325 1326 DPRINTF(("cbb_pcic_socket_disable\n")); 1327 1328 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1329 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1330 pause("cbbP1", hz / 100); 1331 1332 /* power down the socket */ 1333 cbb_power(brdev, CARD_OFF); 1334 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1335 1336 /* wait 300ms until power fails (Tpf). */ 1337 pause("cbbP2", hz * 300 / 1000); 1338 1339 /* enable CSC interrupts */ 1340 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1341 return (0); 1342 } 1343 1344 /************************************************************************/ 1345 /* POWER methods */ 1346 /************************************************************************/ 1347 1348 int 1349 cbb_power_enable_socket(device_t brdev, device_t child) 1350 { 1351 struct cbb_softc *sc = device_get_softc(brdev); 1352 1353 if (sc->flags & CBB_16BIT_CARD) 1354 return (cbb_pcic_power_enable_socket(brdev, child)); 1355 return (cbb_cardbus_power_enable_socket(brdev, child)); 1356 } 1357 1358 int 1359 cbb_power_disable_socket(device_t brdev, device_t child) 1360 { 1361 struct cbb_softc *sc = device_get_softc(brdev); 1362 if (sc->flags & CBB_16BIT_CARD) 1363 return (cbb_pcic_power_disable_socket(brdev, child)); 1364 return (cbb_cardbus_power_disable_socket(brdev, child)); 1365 } 1366 1367 static int 1368 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1369 struct resource *res) 1370 { 1371 struct cbb_softc *sc = device_get_softc(brdev); 1372 int error; 1373 1374 error = exca_activate_resource(&sc->exca[0], child, type, rid, res); 1375 if (error == 0) 1376 cbb_activate_window(brdev, type); 1377 return (error); 1378 } 1379 1380 static int 1381 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1382 int rid, struct resource *res) 1383 { 1384 struct cbb_softc *sc = device_get_softc(brdev); 1385 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1386 } 1387 1388 static struct resource * 1389 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1390 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1391 { 1392 struct resource *res = NULL; 1393 struct cbb_softc *sc = device_get_softc(brdev); 1394 int align; 1395 int tmp; 1396 1397 switch (type) { 1398 case SYS_RES_MEMORY: 1399 if (start < cbb_start_mem) 1400 start = cbb_start_mem; 1401 if (end < start) 1402 end = start; 1403 if (count < CBB_MEMALIGN) 1404 align = CBB_MEMALIGN; 1405 else 1406 align = count; 1407 if (align > (1 << RF_ALIGNMENT(flags))) 1408 flags = (flags & ~RF_ALIGNMENT_MASK) | 1409 rman_make_alignment_flags(align); 1410 break; 1411 case SYS_RES_IOPORT: 1412 if (start < cbb_start_16_io) 1413 start = cbb_start_16_io; 1414 if (end < start) 1415 end = start; 1416 break; 1417 case SYS_RES_IRQ: 1418 tmp = rman_get_start(sc->irq_res); 1419 if (start > tmp || end < tmp || count != 1) { 1420 device_printf(child, "requested interrupt %jd-%jd," 1421 "count = %jd not supported by cbb\n", 1422 start, end, count); 1423 return (NULL); 1424 } 1425 flags |= RF_SHAREABLE; 1426 start = end = rman_get_start(sc->irq_res); 1427 break; 1428 } 1429 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1430 start, end, count, flags & ~RF_ACTIVE); 1431 if (res == NULL) 1432 return (NULL); 1433 cbb_insert_res(sc, res, type, *rid); 1434 if (flags & RF_ACTIVE) { 1435 if (bus_activate_resource(child, type, *rid, res) != 0) { 1436 bus_release_resource(child, type, *rid, res); 1437 return (NULL); 1438 } 1439 } 1440 1441 return (res); 1442 } 1443 1444 static int 1445 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1446 int rid, struct resource *res) 1447 { 1448 struct cbb_softc *sc = device_get_softc(brdev); 1449 int error; 1450 1451 if (rman_get_flags(res) & RF_ACTIVE) { 1452 error = bus_deactivate_resource(child, type, rid, res); 1453 if (error != 0) 1454 return (error); 1455 } 1456 cbb_remove_res(sc, res); 1457 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1458 type, rid, res)); 1459 } 1460 1461 /************************************************************************/ 1462 /* PC Card methods */ 1463 /************************************************************************/ 1464 1465 int 1466 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1467 u_long flags) 1468 { 1469 struct cbb_softc *sc = device_get_softc(brdev); 1470 struct resource *res; 1471 1472 if (type != SYS_RES_MEMORY) 1473 return (EINVAL); 1474 res = cbb_find_res(sc, type, rid); 1475 if (res == NULL) { 1476 device_printf(brdev, 1477 "set_res_flags: specified rid not found\n"); 1478 return (ENOENT); 1479 } 1480 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1481 } 1482 1483 int 1484 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1485 uint32_t cardaddr, uint32_t *deltap) 1486 { 1487 struct cbb_softc *sc = device_get_softc(brdev); 1488 struct resource *res; 1489 1490 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1491 if (res == NULL) { 1492 device_printf(brdev, 1493 "set_memory_offset: specified rid not found\n"); 1494 return (ENOENT); 1495 } 1496 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1497 } 1498 1499 /************************************************************************/ 1500 /* BUS Methods */ 1501 /************************************************************************/ 1502 1503 1504 int 1505 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1506 struct resource *r) 1507 { 1508 struct cbb_softc *sc = device_get_softc(brdev); 1509 1510 if (sc->flags & CBB_16BIT_CARD) 1511 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1512 else 1513 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1514 r)); 1515 } 1516 1517 int 1518 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1519 int rid, struct resource *r) 1520 { 1521 struct cbb_softc *sc = device_get_softc(brdev); 1522 1523 if (sc->flags & CBB_16BIT_CARD) 1524 return (cbb_pcic_deactivate_resource(brdev, child, type, 1525 rid, r)); 1526 else 1527 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1528 rid, r)); 1529 } 1530 1531 struct resource * 1532 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1533 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1534 { 1535 struct cbb_softc *sc = device_get_softc(brdev); 1536 1537 if (sc->flags & CBB_16BIT_CARD) 1538 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1539 start, end, count, flags)); 1540 else 1541 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1542 start, end, count, flags)); 1543 } 1544 1545 int 1546 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1547 struct resource *r) 1548 { 1549 struct cbb_softc *sc = device_get_softc(brdev); 1550 1551 if (sc->flags & CBB_16BIT_CARD) 1552 return (cbb_pcic_release_resource(brdev, child, type, 1553 rid, r)); 1554 else 1555 return (cbb_cardbus_release_resource(brdev, child, type, 1556 rid, r)); 1557 } 1558 1559 int 1560 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1561 { 1562 struct cbb_softc *sc = device_get_softc(brdev); 1563 1564 switch (which) { 1565 case PCIB_IVAR_DOMAIN: 1566 *result = sc->domain; 1567 return (0); 1568 case PCIB_IVAR_BUS: 1569 *result = sc->bus.sec; 1570 return (0); 1571 } 1572 return (ENOENT); 1573 } 1574 1575 int 1576 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1577 { 1578 1579 switch (which) { 1580 case PCIB_IVAR_DOMAIN: 1581 return (EINVAL); 1582 case PCIB_IVAR_BUS: 1583 return (EINVAL); 1584 } 1585 return (ENOENT); 1586 } 1587 1588 int 1589 cbb_child_present(device_t parent, device_t child) 1590 { 1591 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent); 1592 uint32_t sockstate; 1593 1594 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1595 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1596 } 1597