1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/interrupt.h> 88 #include <sys/lock.h> 89 #include <sys/malloc.h> 90 #include <sys/mutex.h> 91 #include <sys/proc.h> 92 #include <sys/rman.h> 93 #include <sys/sysctl.h> 94 #include <sys/systm.h> 95 #include <machine/bus.h> 96 #include <machine/resource.h> 97 98 #include <dev/pci/pcireg.h> 99 #include <dev/pci/pcivar.h> 100 101 #include <dev/pccard/pccardreg.h> 102 #include <dev/pccard/pccardvar.h> 103 104 #include <dev/exca/excareg.h> 105 #include <dev/exca/excavar.h> 106 107 #include <dev/pccbb/pccbbreg.h> 108 #include <dev/pccbb/pccbbvar.h> 109 110 #include "power_if.h" 111 #include "card_if.h" 112 #include "pcib_if.h" 113 114 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 115 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 116 117 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 118 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 119 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 120 pci_write_config(DEV, REG, ( \ 121 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 122 123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 124 125 #define CBB_START_MEM 0x88000000 126 #define CBB_START_32_IO 0x1000 127 #define CBB_START_16_IO 0x100 128 129 devclass_t cbb_devclass; 130 131 /* sysctl vars */ 132 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 133 134 /* There's no way to say TUNEABLE_LONG to get the right types */ 135 u_long cbb_start_mem = CBB_START_MEM; 136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 138 &cbb_start_mem, CBB_START_MEM, 139 "Starting address for memory allocations"); 140 141 u_long cbb_start_16_io = CBB_START_16_IO; 142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 144 &cbb_start_16_io, CBB_START_16_IO, 145 "Starting ioport for 16-bit cards"); 146 147 u_long cbb_start_32_io = CBB_START_32_IO; 148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 150 &cbb_start_32_io, CBB_START_32_IO, 151 "Starting ioport for 32-bit cards"); 152 153 int cbb_debug = 0; 154 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 155 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 156 "Verbose cardbus bridge debugging"); 157 158 static void cbb_insert(struct cbb_softc *sc); 159 static void cbb_removal(struct cbb_softc *sc); 160 static uint32_t cbb_detect_voltage(device_t brdev); 161 static void cbb_cardbus_reset(device_t brdev, device_t child, int on); 162 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 163 uint32_t end); 164 static int cbb_cardbus_mem_open(device_t brdev, int win, 165 uint32_t start, uint32_t end); 166 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 167 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 168 int type, int rid, struct resource *res); 169 static int cbb_cardbus_deactivate_resource(device_t brdev, 170 device_t child, int type, int rid, struct resource *res); 171 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 172 device_t child, int type, int *rid, u_long start, 173 u_long end, u_long count, u_int flags); 174 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 175 int type, int rid, struct resource *res); 176 static int cbb_cardbus_power_enable_socket(device_t brdev, 177 device_t child); 178 static void cbb_cardbus_power_disable_socket(device_t brdev, 179 device_t child); 180 static int cbb_func_filt(void *arg); 181 static void cbb_func_intr(void *arg); 182 183 static void 184 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 185 { 186 struct cbb_reslist *rle; 187 188 SLIST_FOREACH(rle, &sc->rl, link) { 189 if (rle->res == res) { 190 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 191 free(rle, M_DEVBUF); 192 return; 193 } 194 } 195 } 196 197 static struct resource * 198 cbb_find_res(struct cbb_softc *sc, int type, int rid) 199 { 200 struct cbb_reslist *rle; 201 202 SLIST_FOREACH(rle, &sc->rl, link) 203 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 204 return (rle->res); 205 return (NULL); 206 } 207 208 static void 209 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 210 int rid) 211 { 212 struct cbb_reslist *rle; 213 214 /* 215 * Need to record allocated resource so we can iterate through 216 * it later. 217 */ 218 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 219 if (rle == NULL) 220 panic("cbb_cardbus_alloc_resource: can't record entry!"); 221 rle->res = res; 222 rle->type = type; 223 rle->rid = rid; 224 SLIST_INSERT_HEAD(&sc->rl, rle, link); 225 } 226 227 static void 228 cbb_destroy_res(struct cbb_softc *sc) 229 { 230 struct cbb_reslist *rle; 231 232 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 233 device_printf(sc->dev, "Danger Will Robinson: Resource " 234 "left allocated! This is a bug... " 235 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 236 rman_get_start(rle->res)); 237 SLIST_REMOVE_HEAD(&sc->rl, link); 238 free(rle, M_DEVBUF); 239 } 240 } 241 242 /* 243 * Disable function interrupts by telling the bridge to generate IRQ1 244 * interrupts. These interrupts aren't really generated by the chip, since 245 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 246 * initialization, so this helps to work around the problem. 247 * 248 * XXX We can't do this workaround for all chipsets, because this 249 * XXX causes interference with the keyboard because somechipsets will 250 * XXX actually signal IRQ1 over their serial interrupt connections to 251 * XXX the south bridge. Disable it it for now. 252 */ 253 void 254 cbb_disable_func_intr(struct cbb_softc *sc) 255 { 256 #if 0 257 uint8_t reg; 258 259 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 260 EXCA_INTR_IRQ_RESERVED1; 261 exca_putb(&sc->exca[0], EXCA_INTR, reg); 262 #endif 263 } 264 265 /* 266 * Enable function interrupts. We turn on function interrupts when the card 267 * requests an interrupt. The PCMCIA standard says that we should set 268 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 269 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 270 * cards. 271 */ 272 static void 273 cbb_enable_func_intr(struct cbb_softc *sc) 274 { 275 uint8_t reg; 276 277 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 278 EXCA_INTR_IRQ_NONE; 279 exca_putb(&sc->exca[0], EXCA_INTR, reg); 280 } 281 282 int 283 cbb_detach(device_t brdev) 284 { 285 struct cbb_softc *sc = device_get_softc(brdev); 286 device_t *devlist; 287 int tmp, tries, error, numdevs; 288 289 /* 290 * Before we delete the children (which we have to do because 291 * attach doesn't check for children busses correctly), we have 292 * to detach the children. Even if we didn't need to delete the 293 * children, we have to detach them. 294 */ 295 error = bus_generic_detach(brdev); 296 if (error != 0) 297 return (error); 298 299 /* 300 * Since the attach routine doesn't search for children before it 301 * attaches them to this device, we must delete them here in order 302 * for the kldload/unload case to work. If we failed to do that, then 303 * we'd get duplicate devices when cbb.ko was reloaded. 304 */ 305 tries = 10; 306 do { 307 error = device_get_children(brdev, &devlist, &numdevs); 308 if (error == 0) 309 break; 310 /* 311 * Try hard to cope with low memory. 312 */ 313 if (error == ENOMEM) { 314 pause("cbbnomem", 1); 315 continue; 316 } 317 } while (tries-- > 0); 318 for (tmp = 0; tmp < numdevs; tmp++) 319 device_delete_child(brdev, devlist[tmp]); 320 free(devlist, M_TEMP); 321 322 /* Turn off the interrupts */ 323 cbb_set(sc, CBB_SOCKET_MASK, 0); 324 325 /* reset 16-bit pcmcia bus */ 326 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 327 328 /* turn off power */ 329 cbb_power(brdev, CARD_OFF); 330 331 /* Ack the interrupt */ 332 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 333 334 /* 335 * Wait for the thread to die. kproc_exit will do a wakeup 336 * on the event thread's struct thread * so that we know it is 337 * safe to proceed. IF the thread is running, set the please 338 * die flag and wait for it to comply. Since the wakeup on 339 * the event thread happens only in kproc_exit, we don't 340 * need to loop here. 341 */ 342 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 343 mtx_lock(&sc->mtx); 344 sc->flags |= CBB_KTHREAD_DONE; 345 while (sc->flags & CBB_KTHREAD_RUNNING) { 346 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 347 cv_broadcast(&sc->cv); 348 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 349 } 350 mtx_unlock(&sc->mtx); 351 352 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 353 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 354 sc->base_res); 355 mtx_destroy(&sc->mtx); 356 cv_destroy(&sc->cv); 357 cv_destroy(&sc->powercv); 358 return (0); 359 } 360 361 int 362 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 363 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 364 void **cookiep) 365 { 366 struct cbb_intrhand *ih; 367 struct cbb_softc *sc = device_get_softc(dev); 368 int err; 369 370 if (filt == NULL && intr == NULL) 371 return (EINVAL); 372 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 373 if (ih == NULL) 374 return (ENOMEM); 375 *cookiep = ih; 376 ih->filt = filt; 377 ih->intr = intr; 378 ih->arg = arg; 379 ih->sc = sc; 380 /* 381 * XXX need to turn on ISA interrupts, if we ever support them, but 382 * XXX for now that's all we need to do. 383 */ 384 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 385 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 386 &ih->cookie); 387 if (err != 0) { 388 free(ih, M_DEVBUF); 389 return (err); 390 } 391 cbb_enable_func_intr(sc); 392 sc->cardok = 1; 393 return 0; 394 } 395 396 int 397 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 398 void *cookie) 399 { 400 struct cbb_intrhand *ih; 401 int err; 402 403 /* XXX Need to do different things for ISA interrupts. */ 404 ih = (struct cbb_intrhand *) cookie; 405 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 406 ih->cookie); 407 if (err != 0) 408 return (err); 409 free(ih, M_DEVBUF); 410 return (0); 411 } 412 413 414 void 415 cbb_driver_added(device_t brdev, driver_t *driver) 416 { 417 struct cbb_softc *sc = device_get_softc(brdev); 418 device_t *devlist; 419 device_t dev; 420 int tmp; 421 int numdevs; 422 int wake = 0; 423 424 DEVICE_IDENTIFY(driver, brdev); 425 tmp = device_get_children(brdev, &devlist, &numdevs); 426 if (tmp != 0) { 427 device_printf(brdev, "Cannot get children list, no reprobe\n"); 428 return; 429 } 430 for (tmp = 0; tmp < numdevs; tmp++) { 431 dev = devlist[tmp]; 432 if (device_get_state(dev) == DS_NOTPRESENT && 433 device_probe_and_attach(dev) == 0) 434 wake++; 435 } 436 free(devlist, M_TEMP); 437 438 if (wake > 0) { 439 mtx_lock(&sc->mtx); 440 cv_signal(&sc->cv); 441 mtx_unlock(&sc->mtx); 442 } 443 } 444 445 void 446 cbb_child_detached(device_t brdev, device_t child) 447 { 448 struct cbb_softc *sc = device_get_softc(brdev); 449 450 /* I'm not sure we even need this */ 451 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 452 device_printf(brdev, "Unknown child detached: %s\n", 453 device_get_nameunit(child)); 454 } 455 456 /************************************************************************/ 457 /* Kthreads */ 458 /************************************************************************/ 459 460 void 461 cbb_event_thread(void *arg) 462 { 463 struct cbb_softc *sc = arg; 464 uint32_t status; 465 int err; 466 int not_a_card = 0; 467 468 mtx_lock(&sc->mtx); 469 sc->flags |= CBB_KTHREAD_RUNNING; 470 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 471 mtx_unlock(&sc->mtx); 472 /* 473 * We take out Giant here because we need it deep, 474 * down in the bowels of the vm system for mapping the 475 * memory we need to read the CIS. In addition, since 476 * we are adding/deleting devices from the dev tree, 477 * and that code isn't MP safe, we have to hold Giant. 478 */ 479 mtx_lock(&Giant); 480 status = cbb_get(sc, CBB_SOCKET_STATE); 481 DPRINTF(("Status is 0x%x\n", status)); 482 if (!CBB_CARD_PRESENT(status)) { 483 not_a_card = 0; /* We know card type */ 484 cbb_removal(sc); 485 } else if (status & CBB_STATE_NOT_A_CARD) { 486 /* 487 * Up to 10 times, try to rescan the card when we see 488 * NOT_A_CARD. 10 is somehwat arbitrary. When this 489 * pathology hits, there's a ~40% chance each try will 490 * fail. 10 tries takes about 5s and results in a 491 * 99.99% certainty of the results. 492 */ 493 if (not_a_card++ < 10) { 494 DEVPRINTF((sc->dev, 495 "Not a card bit set, rescanning\n")); 496 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 497 } else { 498 device_printf(sc->dev, 499 "Can't determine card type\n"); 500 } 501 } else { 502 not_a_card = 0; /* We know card type */ 503 cbb_insert(sc); 504 } 505 mtx_unlock(&Giant); 506 507 /* 508 * Wait until it has been 250ms since the last time we 509 * get an interrupt. We handle the rest of the interrupt 510 * at the top of the loop. Although we clear the bit in the 511 * ISR, we signal sc->cv from the detach path after we've 512 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 513 * 250ms sleep here. 514 * 515 * In our ISR, we turn off the card changed interrupt. Turn 516 * them back on here before we wait for them to happen. We 517 * turn them on/off so that we can tolerate a large latency 518 * between the time we signal cbb_event_thread and it gets 519 * a chance to run. 520 */ 521 mtx_lock(&sc->mtx); 522 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 523 cv_wait(&sc->cv, &sc->mtx); 524 err = 0; 525 while (err != EWOULDBLOCK && 526 (sc->flags & CBB_KTHREAD_DONE) == 0) 527 err = cv_timedwait(&sc->cv, &sc->mtx, hz / 4); 528 } 529 DEVPRINTF((sc->dev, "Thread terminating\n")); 530 sc->flags &= ~CBB_KTHREAD_RUNNING; 531 mtx_unlock(&sc->mtx); 532 kproc_exit(0); 533 } 534 535 /************************************************************************/ 536 /* Insert/removal */ 537 /************************************************************************/ 538 539 static void 540 cbb_insert(struct cbb_softc *sc) 541 { 542 uint32_t sockevent, sockstate; 543 544 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 545 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 546 547 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 548 sockevent, sockstate)); 549 550 if (sockstate & CBB_STATE_R2_CARD) { 551 if (device_is_attached(sc->exca[0].pccarddev)) { 552 sc->flags |= CBB_16BIT_CARD; 553 exca_insert(&sc->exca[0]); 554 } else { 555 device_printf(sc->dev, 556 "16-bit card inserted, but no pccard bus.\n"); 557 } 558 } else if (sockstate & CBB_STATE_CB_CARD) { 559 if (device_is_attached(sc->cbdev)) { 560 sc->flags &= ~CBB_16BIT_CARD; 561 CARD_ATTACH_CARD(sc->cbdev); 562 } else { 563 device_printf(sc->dev, 564 "CardBus card inserted, but no cardbus bus.\n"); 565 } 566 } else { 567 /* 568 * We should power the card down, and try again a couple of 569 * times if this happens. XXX 570 */ 571 device_printf(sc->dev, "Unsupported card type detected\n"); 572 } 573 } 574 575 static void 576 cbb_removal(struct cbb_softc *sc) 577 { 578 sc->cardok = 0; 579 if (sc->flags & CBB_16BIT_CARD) { 580 exca_removal(&sc->exca[0]); 581 } else { 582 if (device_is_attached(sc->cbdev)) 583 CARD_DETACH_CARD(sc->cbdev); 584 } 585 cbb_destroy_res(sc); 586 } 587 588 /************************************************************************/ 589 /* Interrupt Handler */ 590 /************************************************************************/ 591 592 static int 593 cbb_func_filt(void *arg) 594 { 595 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 596 struct cbb_softc *sc = ih->sc; 597 598 /* 599 * Make sure that the card is really there. 600 */ 601 if (!sc->cardok) 602 return (FILTER_STRAY); 603 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 604 sc->cardok = 0; 605 return (FILTER_HANDLED); 606 } 607 608 /* 609 * nb: don't have to check for giant or not, since that's done in the 610 * ISR dispatch and one can't hold Giant in a filter anyway... 611 */ 612 return ((*ih->filt)(ih->arg)); 613 } 614 615 static void 616 cbb_func_intr(void *arg) 617 { 618 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 619 struct cbb_softc *sc = ih->sc; 620 621 /* 622 * While this check may seem redundant, it helps close a race 623 * condition. If the card is ejected after the filter runs, but 624 * before this ISR can be scheduled, then we need to do the same 625 * filtering to prevent the card's ISR from being called. One could 626 * argue that the card's ISR should be able to cope, but experience 627 * has shown they can't always. This mitigates the problem by making 628 * the race quite a bit smaller. Properly written client ISRs should 629 * cope with the card going away in the middle of the ISR. We assume 630 * that drivers that are sophisticated enough to use filters don't 631 * need our protection. This also allows us to ensure they *ARE* 632 * called if their filter said they needed to be called. 633 */ 634 if (ih->filt == NULL) { 635 if (!sc->cardok) 636 return; 637 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 638 sc->cardok = 0; 639 return; 640 } 641 } 642 643 /* 644 * Call the registered ithread interrupt handler. This entire routine 645 * will be called with Giant if this isn't an MP safe driver, or not 646 * if it is. Either way, we don't have to worry. 647 */ 648 ih->intr(ih->arg); 649 } 650 651 /************************************************************************/ 652 /* Generic Power functions */ 653 /************************************************************************/ 654 655 static uint32_t 656 cbb_detect_voltage(device_t brdev) 657 { 658 struct cbb_softc *sc = device_get_softc(brdev); 659 uint32_t psr; 660 uint32_t vol = CARD_UKN_CARD; 661 662 psr = cbb_get(sc, CBB_SOCKET_STATE); 663 664 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 665 vol |= CARD_5V_CARD; 666 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 667 vol |= CARD_3V_CARD; 668 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 669 vol |= CARD_XV_CARD; 670 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 671 vol |= CARD_YV_CARD; 672 673 return (vol); 674 } 675 676 static uint8_t 677 cbb_o2micro_power_hack(struct cbb_softc *sc) 678 { 679 uint8_t reg; 680 681 /* 682 * Issue #2: INT# not qualified with IRQ Routing Bit. An 683 * unexpected PCI INT# may be generated during PC Card 684 * initialization even with the IRQ Routing Bit Set with some 685 * PC Cards. 686 * 687 * This is a two part issue. The first part is that some of 688 * our older controllers have an issue in which the slot's PCI 689 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 690 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 691 * is selected (ExCA register 03h bits 3:0, of the slot, are 692 * cleared) we will generate INT# if IREQ# is asserted. The 693 * second part is because some PC Cards prematurally assert 694 * IREQ# before the ExCA registers are fully programmed. This 695 * in turn asserts INT# because ExCA register 03h bits 3:0 696 * (ISA IRQ Select) are not yet programmed. 697 * 698 * The fix for this issue, which will work for any controller 699 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 700 * (select IRQ1), of the slot, before turning on slot power. 701 * Selecting IRQ1 will result in INT# NOT being asserted 702 * (because IRQ1 is selected), and IRQ1 won't be asserted 703 * because our controllers don't generate IRQ1. 704 * 705 * Other, non O2Micro controllers will generate irq 1 in some 706 * situations, so we can't do this hack for everybody. Reports of 707 * keyboard controller's interrupts being suppressed occurred when 708 * we did this. 709 */ 710 reg = exca_getb(&sc->exca[0], EXCA_INTR); 711 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 712 return (reg); 713 } 714 715 /* 716 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 717 * we don't have an interrupt storm on power on. This has the efect of 718 * disabling card status change interrupts for the duration of poweron. 719 */ 720 static void 721 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 722 { 723 exca_putb(&sc->exca[0], EXCA_INTR, reg); 724 } 725 726 int 727 cbb_power(device_t brdev, int volts) 728 { 729 uint32_t status, sock_ctrl, reg_ctrl, mask; 730 struct cbb_softc *sc = device_get_softc(brdev); 731 int cnt, sane; 732 int retval = 0; 733 int on = 0; 734 uint8_t reg = 0; 735 736 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 737 738 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 739 switch (volts & CARD_VCCMASK) { 740 case 5: 741 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 742 on++; 743 break; 744 case 3: 745 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 746 on++; 747 break; 748 case XV: 749 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 750 on++; 751 break; 752 case YV: 753 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 754 on++; 755 break; 756 case 0: 757 break; 758 default: 759 return (0); /* power NEVER changed */ 760 } 761 762 /* VPP == VCC */ 763 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 764 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 765 766 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 767 return (1); /* no change necessary */ 768 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 769 if (volts != 0 && sc->chipset == CB_O2MICRO) 770 reg = cbb_o2micro_power_hack(sc); 771 772 /* 773 * We have to mask the card change detect interrupt while 774 * we're messing with the power. It is allowed to bounce 775 * while we're messing with power as things settle down. In 776 * addition, we mask off the card's function interrupt by 777 * routing it via the ISA bus. This bit generally only 778 * affects 16-bit cards. Some bridges allow one to set 779 * another bit to have it also affect 32-bit cards. Since 780 * 32-bit cards are required to be better behaved, we don't 781 * bother to get into those bridge specific features. 782 */ 783 mask = cbb_get(sc, CBB_SOCKET_MASK); 784 mask |= CBB_SOCKET_MASK_POWER; 785 mask &= ~CBB_SOCKET_MASK_CD; 786 cbb_set(sc, CBB_SOCKET_MASK, mask); 787 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 788 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 789 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 790 if (on) { 791 mtx_lock(&sc->mtx); 792 cnt = sc->powerintr; 793 /* 794 * We have a shortish timeout of 500ms here. Some 795 * bridges do not generate a POWER_CYCLE event for 796 * 16-bit cards. In those cases, we have to cope the 797 * best we can, and having only a short delay is 798 * better than the alternatives. 799 */ 800 sane = 10; 801 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 802 cnt == sc->powerintr && sane-- > 0) 803 cv_timedwait(&sc->powercv, &sc->mtx, hz / 20); 804 mtx_unlock(&sc->mtx); 805 /* 806 * The TOPIC95B requires a little bit extra time to get 807 * its act together, so delay for an additional 100ms. Also 808 * as documented below, it doesn't seem to set the POWER_CYCLE 809 * bit, so don't whine if it never came on. 810 */ 811 if (sc->chipset == CB_TOPIC95) { 812 pause("cbb95B", hz / 10); 813 } else if (sane <= 0) { 814 device_printf(sc->dev, "power timeout, doom?\n"); 815 } 816 } 817 818 /* 819 * After the power is good, we can turn off the power interrupt. 820 * However, the PC Card standard says that we must delay turning the 821 * CD bit back on for a bit to allow for bouncyness on power down 822 * (recall that we don't wait above for a power down, since we don't 823 * get an interrupt for that). We're called either from the suspend 824 * code in which case we don't want to turn card change on again, or 825 * we're called from the card insertion code, in which case the cbb 826 * thread will turn it on for us before it waits to be woken by a 827 * change event. 828 * 829 * NB: Topic95B doesn't set the power cycle bit. we assume that 830 * both it and the TOPIC95 behave the same. 831 */ 832 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 833 status = cbb_get(sc, CBB_SOCKET_STATE); 834 if (on && sc->chipset != CB_TOPIC95) { 835 if ((status & CBB_STATE_POWER_CYCLE) == 0) 836 device_printf(sc->dev, "Power not on?\n"); 837 } 838 if (status & CBB_STATE_BAD_VCC_REQ) { 839 device_printf(sc->dev, "Bad Vcc requested\n"); 840 /* XXX Do we want to do something to mitigate things here? */ 841 goto done; 842 } 843 if (sc->chipset == CB_TOPIC97) { 844 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 845 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 846 if (on) 847 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 848 else 849 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 850 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 851 } 852 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 853 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 854 retval = 1; 855 done:; 856 if (volts != 0 && sc->chipset == CB_O2MICRO) 857 cbb_o2micro_power_hack2(sc, reg); 858 return (retval); 859 } 860 861 static int 862 cbb_current_voltage(device_t brdev) 863 { 864 struct cbb_softc *sc = device_get_softc(brdev); 865 uint32_t ctrl; 866 867 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 868 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 869 case CBB_SOCKET_CTRL_VCC_5V: 870 return CARD_5V_CARD; 871 case CBB_SOCKET_CTRL_VCC_3V: 872 return CARD_3V_CARD; 873 case CBB_SOCKET_CTRL_VCC_XV: 874 return CARD_XV_CARD; 875 case CBB_SOCKET_CTRL_VCC_YV: 876 return CARD_YV_CARD; 877 } 878 return 0; 879 } 880 881 /* 882 * detect the voltage for the card, and set it. Since the power 883 * used is the square of the voltage, lower voltages is a big win 884 * and what Windows does (and what Microsoft prefers). The MS paper 885 * also talks about preferring the CIS entry as well, but that has 886 * to be done elsewhere. We also optimize power sequencing here 887 * and don't change things if we're already powered up at a supported 888 * voltage. 889 * 890 * In addition, we power up with OE disabled. We'll set it later 891 * in the power up sequence. 892 */ 893 static int 894 cbb_do_power(device_t brdev) 895 { 896 struct cbb_softc *sc = device_get_softc(brdev); 897 uint32_t voltage, curpwr; 898 uint32_t status; 899 900 /* Don't enable OE (output enable) until power stable */ 901 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 902 903 voltage = cbb_detect_voltage(brdev); 904 curpwr = cbb_current_voltage(brdev); 905 status = cbb_get(sc, CBB_SOCKET_STATE); 906 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 907 return 0; 908 /* Prefer lowest voltage supported */ 909 cbb_power(brdev, CARD_OFF); 910 if (voltage & CARD_YV_CARD) 911 cbb_power(brdev, CARD_VCC(YV)); 912 else if (voltage & CARD_XV_CARD) 913 cbb_power(brdev, CARD_VCC(XV)); 914 else if (voltage & CARD_3V_CARD) 915 cbb_power(brdev, CARD_VCC(3)); 916 else if (voltage & CARD_5V_CARD) 917 cbb_power(brdev, CARD_VCC(5)); 918 else { 919 device_printf(brdev, "Unknown card voltage\n"); 920 return (ENXIO); 921 } 922 return (0); 923 } 924 925 /************************************************************************/ 926 /* CardBus power functions */ 927 /************************************************************************/ 928 929 static void 930 cbb_cardbus_reset(device_t brdev, device_t child, int on) 931 { 932 struct cbb_softc *sc = device_get_softc(brdev); 933 uint32_t b; 934 int delay, count; 935 936 /* 937 * Asserting reset for 20ms is necessary for most bridges. For some 938 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. 939 */ 940 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 941 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 942 pause("cbbP3", hz * delay / 1000); 943 944 /* 945 * If a card exists and we're turning it on, take it out of reset. 946 */ 947 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 948 /* 949 * After clearing reset, wait up to 1.1s for the first 950 * configuration register (vendor/product) configuration 951 * register of device 0.0 to become != 0xffffffff. The PCMCIA 952 * PC Card Host System Specification says that when powering 953 * up the card, the PCI Spec v2.1 must be followed. In PCI 954 * spec v2.2 Table 4-6, Trhfa (Reset High to first Config 955 * Access) is at most 2^25 clocks, or just over 1s. Section 956 * 2.2.1 states any card not ready to participate in bus 957 * transactions must tristate its outputs. Therefore, any 958 * access to its configuration registers must be ignored. In 959 * that state, the config reg will read 0xffffffff. Section 960 * 6.2.1 states a vendor id of 0xffff is invalid, so this can 961 * never match a real card. Print a warning if it never 962 * returns a real id. The PCMCIA PC Card Electrical Spec 963 * Section 5.2.7.1 implies only device 0. 964 */ 965 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 966 &~CBBM_BRIDGECTRL_RESET, 2); 967 b = pcib_get_bus(child); 968 count = 1100 / 20; 969 do { 970 pause("cbbP4", hz * 2 / 100); 971 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 972 0xfffffffful && --count >= 0); 973 if (count < 0) 974 device_printf(brdev, "Warning: Bus reset timeout\n"); 975 } 976 } 977 978 static int 979 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 980 { 981 struct cbb_softc *sc = device_get_softc(brdev); 982 int err; 983 984 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 985 return (ENODEV); 986 987 err = cbb_do_power(brdev); 988 if (err) 989 return (err); 990 cbb_cardbus_reset(brdev, child, 1); 991 return (0); 992 } 993 994 static void 995 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 996 { 997 cbb_power(brdev, CARD_OFF); 998 cbb_cardbus_reset(brdev, child, 0); 999 } 1000 1001 /************************************************************************/ 1002 /* CardBus Resource */ 1003 /************************************************************************/ 1004 1005 static int 1006 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1007 { 1008 int basereg; 1009 int limitreg; 1010 1011 if ((win < 0) || (win > 1)) { 1012 DEVPRINTF((brdev, 1013 "cbb_cardbus_io_open: window out of range %d\n", win)); 1014 return (EINVAL); 1015 } 1016 1017 basereg = win * 8 + CBBR_IOBASE0; 1018 limitreg = win * 8 + CBBR_IOLIMIT0; 1019 1020 pci_write_config(brdev, basereg, start, 4); 1021 pci_write_config(brdev, limitreg, end, 4); 1022 return (0); 1023 } 1024 1025 static int 1026 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1027 { 1028 int basereg; 1029 int limitreg; 1030 1031 if ((win < 0) || (win > 1)) { 1032 DEVPRINTF((brdev, 1033 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1034 return (EINVAL); 1035 } 1036 1037 basereg = win*8 + CBBR_MEMBASE0; 1038 limitreg = win*8 + CBBR_MEMLIMIT0; 1039 1040 pci_write_config(brdev, basereg, start, 4); 1041 pci_write_config(brdev, limitreg, end, 4); 1042 return (0); 1043 } 1044 1045 #define START_NONE 0xffffffff 1046 #define END_NONE 0 1047 1048 static void 1049 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1050 { 1051 uint32_t starts[2]; 1052 uint32_t ends[2]; 1053 struct cbb_reslist *rle; 1054 int align, i; 1055 uint32_t reg; 1056 1057 starts[0] = starts[1] = START_NONE; 1058 ends[0] = ends[1] = END_NONE; 1059 1060 if (type == SYS_RES_MEMORY) 1061 align = CBB_MEMALIGN; 1062 else if (type == SYS_RES_IOPORT) 1063 align = CBB_IOALIGN; 1064 else 1065 align = 1; 1066 1067 SLIST_FOREACH(rle, &sc->rl, link) { 1068 if (rle->type != type) 1069 continue; 1070 if (rle->res == NULL) 1071 continue; 1072 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1073 continue; 1074 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1075 i = 1; 1076 else 1077 i = 0; 1078 if (rman_get_start(rle->res) < starts[i]) 1079 starts[i] = rman_get_start(rle->res); 1080 if (rman_get_end(rle->res) > ends[i]) 1081 ends[i] = rman_get_end(rle->res); 1082 } 1083 for (i = 0; i < 2; i++) { 1084 if (starts[i] == START_NONE) 1085 continue; 1086 starts[i] &= ~(align - 1); 1087 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1088 } 1089 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1090 if (starts[0] < starts[1]) { 1091 if (ends[0] > starts[1]) { 1092 device_printf(sc->dev, "Overlapping ranges" 1093 " for prefetch and non-prefetch memory\n"); 1094 return; 1095 } 1096 } else { 1097 if (ends[1] > starts[0]) { 1098 device_printf(sc->dev, "Overlapping ranges" 1099 " for prefetch and non-prefetch memory\n"); 1100 return; 1101 } 1102 } 1103 } 1104 1105 if (type == SYS_RES_MEMORY) { 1106 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1107 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1108 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1109 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1110 CBBM_BRIDGECTRL_PREFETCH_1); 1111 if (starts[1] != START_NONE) 1112 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1113 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1114 if (bootverbose) { 1115 device_printf(sc->dev, "Opening memory:\n"); 1116 if (starts[0] != START_NONE) 1117 device_printf(sc->dev, "Normal: %#x-%#x\n", 1118 starts[0], ends[0]); 1119 if (starts[1] != START_NONE) 1120 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1121 starts[1], ends[1]); 1122 } 1123 } else if (type == SYS_RES_IOPORT) { 1124 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1125 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1126 if (bootverbose && starts[0] != START_NONE) 1127 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1128 starts[0], ends[0]); 1129 } 1130 } 1131 1132 static int 1133 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1134 int rid, struct resource *res) 1135 { 1136 int ret; 1137 1138 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1139 type, rid, res); 1140 if (ret != 0) 1141 return (ret); 1142 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1143 return (0); 1144 } 1145 1146 static int 1147 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1148 int rid, struct resource *res) 1149 { 1150 int ret; 1151 1152 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1153 type, rid, res); 1154 if (ret != 0) 1155 return (ret); 1156 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1157 return (0); 1158 } 1159 1160 static struct resource * 1161 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1162 int *rid, u_long start, u_long end, u_long count, u_int flags) 1163 { 1164 struct cbb_softc *sc = device_get_softc(brdev); 1165 int tmp; 1166 struct resource *res; 1167 u_long align; 1168 1169 switch (type) { 1170 case SYS_RES_IRQ: 1171 tmp = rman_get_start(sc->irq_res); 1172 if (start > tmp || end < tmp || count != 1) { 1173 device_printf(child, "requested interrupt %ld-%ld," 1174 "count = %ld not supported by cbb\n", 1175 start, end, count); 1176 return (NULL); 1177 } 1178 start = end = tmp; 1179 flags |= RF_SHAREABLE; 1180 break; 1181 case SYS_RES_IOPORT: 1182 if (start <= cbb_start_32_io) 1183 start = cbb_start_32_io; 1184 if (end < start) 1185 end = start; 1186 if (count > (1 << RF_ALIGNMENT(flags))) 1187 flags = (flags & ~RF_ALIGNMENT_MASK) | 1188 rman_make_alignment_flags(count); 1189 break; 1190 case SYS_RES_MEMORY: 1191 if (start <= cbb_start_mem) 1192 start = cbb_start_mem; 1193 if (end < start) 1194 end = start; 1195 if (count < CBB_MEMALIGN) 1196 align = CBB_MEMALIGN; 1197 else 1198 align = count; 1199 if (align > (1 << RF_ALIGNMENT(flags))) 1200 flags = (flags & ~RF_ALIGNMENT_MASK) | 1201 rman_make_alignment_flags(align); 1202 break; 1203 } 1204 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1205 start, end, count, flags & ~RF_ACTIVE); 1206 if (res == NULL) { 1207 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1208 return (NULL); 1209 } 1210 cbb_insert_res(sc, res, type, *rid); 1211 if (flags & RF_ACTIVE) 1212 if (bus_activate_resource(child, type, *rid, res) != 0) { 1213 bus_release_resource(child, type, *rid, res); 1214 return (NULL); 1215 } 1216 1217 return (res); 1218 } 1219 1220 static int 1221 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1222 int rid, struct resource *res) 1223 { 1224 struct cbb_softc *sc = device_get_softc(brdev); 1225 int error; 1226 1227 if (rman_get_flags(res) & RF_ACTIVE) { 1228 error = bus_deactivate_resource(child, type, rid, res); 1229 if (error != 0) 1230 return (error); 1231 } 1232 cbb_remove_res(sc, res); 1233 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1234 type, rid, res)); 1235 } 1236 1237 /************************************************************************/ 1238 /* PC Card Power Functions */ 1239 /************************************************************************/ 1240 1241 static int 1242 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1243 { 1244 struct cbb_softc *sc = device_get_softc(brdev); 1245 int err; 1246 1247 DPRINTF(("cbb_pcic_socket_enable:\n")); 1248 1249 /* power down/up the socket to reset */ 1250 err = cbb_do_power(brdev); 1251 if (err) 1252 return (err); 1253 exca_reset(&sc->exca[0], child); 1254 1255 return (0); 1256 } 1257 1258 static void 1259 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1260 { 1261 struct cbb_softc *sc = device_get_softc(brdev); 1262 1263 DPRINTF(("cbb_pcic_socket_disable\n")); 1264 1265 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1266 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1267 pause("cbbP1", hz / 100); 1268 1269 /* power down the socket */ 1270 cbb_power(brdev, CARD_OFF); 1271 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1272 1273 /* wait 300ms until power fails (Tpf). */ 1274 pause("cbbP2", hz * 300 / 1000); 1275 1276 /* enable CSC interrupts */ 1277 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1278 } 1279 1280 /************************************************************************/ 1281 /* POWER methods */ 1282 /************************************************************************/ 1283 1284 int 1285 cbb_power_enable_socket(device_t brdev, device_t child) 1286 { 1287 struct cbb_softc *sc = device_get_softc(brdev); 1288 1289 if (sc->flags & CBB_16BIT_CARD) 1290 return (cbb_pcic_power_enable_socket(brdev, child)); 1291 else 1292 return (cbb_cardbus_power_enable_socket(brdev, child)); 1293 } 1294 1295 void 1296 cbb_power_disable_socket(device_t brdev, device_t child) 1297 { 1298 struct cbb_softc *sc = device_get_softc(brdev); 1299 if (sc->flags & CBB_16BIT_CARD) 1300 cbb_pcic_power_disable_socket(brdev, child); 1301 else 1302 cbb_cardbus_power_disable_socket(brdev, child); 1303 } 1304 1305 static int 1306 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1307 struct resource *res) 1308 { 1309 struct cbb_softc *sc = device_get_softc(brdev); 1310 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1311 } 1312 1313 static int 1314 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1315 int rid, struct resource *res) 1316 { 1317 struct cbb_softc *sc = device_get_softc(brdev); 1318 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1319 } 1320 1321 static struct resource * 1322 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1323 u_long start, u_long end, u_long count, u_int flags) 1324 { 1325 struct resource *res = NULL; 1326 struct cbb_softc *sc = device_get_softc(brdev); 1327 int align; 1328 int tmp; 1329 1330 switch (type) { 1331 case SYS_RES_MEMORY: 1332 if (start < cbb_start_mem) 1333 start = cbb_start_mem; 1334 if (end < start) 1335 end = start; 1336 if (count < CBB_MEMALIGN) 1337 align = CBB_MEMALIGN; 1338 else 1339 align = count; 1340 if (align > (1 << RF_ALIGNMENT(flags))) 1341 flags = (flags & ~RF_ALIGNMENT_MASK) | 1342 rman_make_alignment_flags(align); 1343 break; 1344 case SYS_RES_IOPORT: 1345 if (start < cbb_start_16_io) 1346 start = cbb_start_16_io; 1347 if (end < start) 1348 end = start; 1349 break; 1350 case SYS_RES_IRQ: 1351 tmp = rman_get_start(sc->irq_res); 1352 if (start > tmp || end < tmp || count != 1) { 1353 device_printf(child, "requested interrupt %ld-%ld," 1354 "count = %ld not supported by cbb\n", 1355 start, end, count); 1356 return (NULL); 1357 } 1358 flags |= RF_SHAREABLE; 1359 start = end = rman_get_start(sc->irq_res); 1360 break; 1361 } 1362 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1363 start, end, count, flags & ~RF_ACTIVE); 1364 if (res == NULL) 1365 return (NULL); 1366 cbb_insert_res(sc, res, type, *rid); 1367 if (flags & RF_ACTIVE) { 1368 if (bus_activate_resource(child, type, *rid, res) != 0) { 1369 bus_release_resource(child, type, *rid, res); 1370 return (NULL); 1371 } 1372 } 1373 1374 return (res); 1375 } 1376 1377 static int 1378 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1379 int rid, struct resource *res) 1380 { 1381 struct cbb_softc *sc = device_get_softc(brdev); 1382 int error; 1383 1384 if (rman_get_flags(res) & RF_ACTIVE) { 1385 error = bus_deactivate_resource(child, type, rid, res); 1386 if (error != 0) 1387 return (error); 1388 } 1389 cbb_remove_res(sc, res); 1390 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1391 type, rid, res)); 1392 } 1393 1394 /************************************************************************/ 1395 /* PC Card methods */ 1396 /************************************************************************/ 1397 1398 int 1399 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1400 uint32_t flags) 1401 { 1402 struct cbb_softc *sc = device_get_softc(brdev); 1403 struct resource *res; 1404 1405 if (type != SYS_RES_MEMORY) 1406 return (EINVAL); 1407 res = cbb_find_res(sc, type, rid); 1408 if (res == NULL) { 1409 device_printf(brdev, 1410 "set_res_flags: specified rid not found\n"); 1411 return (ENOENT); 1412 } 1413 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1414 } 1415 1416 int 1417 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1418 uint32_t cardaddr, uint32_t *deltap) 1419 { 1420 struct cbb_softc *sc = device_get_softc(brdev); 1421 struct resource *res; 1422 1423 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1424 if (res == NULL) { 1425 device_printf(brdev, 1426 "set_memory_offset: specified rid not found\n"); 1427 return (ENOENT); 1428 } 1429 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1430 } 1431 1432 /************************************************************************/ 1433 /* BUS Methods */ 1434 /************************************************************************/ 1435 1436 1437 int 1438 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1439 struct resource *r) 1440 { 1441 struct cbb_softc *sc = device_get_softc(brdev); 1442 1443 if (sc->flags & CBB_16BIT_CARD) 1444 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1445 else 1446 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1447 r)); 1448 } 1449 1450 int 1451 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1452 int rid, struct resource *r) 1453 { 1454 struct cbb_softc *sc = device_get_softc(brdev); 1455 1456 if (sc->flags & CBB_16BIT_CARD) 1457 return (cbb_pcic_deactivate_resource(brdev, child, type, 1458 rid, r)); 1459 else 1460 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1461 rid, r)); 1462 } 1463 1464 struct resource * 1465 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1466 u_long start, u_long end, u_long count, u_int flags) 1467 { 1468 struct cbb_softc *sc = device_get_softc(brdev); 1469 1470 if (sc->flags & CBB_16BIT_CARD) 1471 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1472 start, end, count, flags)); 1473 else 1474 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1475 start, end, count, flags)); 1476 } 1477 1478 int 1479 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1480 struct resource *r) 1481 { 1482 struct cbb_softc *sc = device_get_softc(brdev); 1483 1484 if (sc->flags & CBB_16BIT_CARD) 1485 return (cbb_pcic_release_resource(brdev, child, type, 1486 rid, r)); 1487 else 1488 return (cbb_cardbus_release_resource(brdev, child, type, 1489 rid, r)); 1490 } 1491 1492 int 1493 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1494 { 1495 struct cbb_softc *sc = device_get_softc(brdev); 1496 1497 switch (which) { 1498 case PCIB_IVAR_DOMAIN: 1499 *result = sc->domain; 1500 return (0); 1501 case PCIB_IVAR_BUS: 1502 *result = sc->secbus; 1503 return (0); 1504 } 1505 return (ENOENT); 1506 } 1507 1508 int 1509 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1510 { 1511 struct cbb_softc *sc = device_get_softc(brdev); 1512 1513 switch (which) { 1514 case PCIB_IVAR_DOMAIN: 1515 return (EINVAL); 1516 case PCIB_IVAR_BUS: 1517 sc->secbus = value; 1518 return (0); 1519 } 1520 return (ENOENT); 1521 } 1522 1523 int 1524 cbb_suspend(device_t self) 1525 { 1526 int error = 0; 1527 struct cbb_softc *sc = device_get_softc(self); 1528 1529 error = bus_generic_suspend(self); 1530 if (error != 0) 1531 return (error); 1532 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1533 sc->cardok = 0; /* Card is bogus now */ 1534 return (0); 1535 } 1536 1537 int 1538 cbb_resume(device_t self) 1539 { 1540 int error = 0; 1541 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1542 uint32_t tmp; 1543 1544 /* 1545 * Some BIOSes will not save the BARs for the pci chips, so we 1546 * must do it ourselves. If the BAR is reset to 0 for an I/O 1547 * device, it will read back as 0x1, so no explicit test for 1548 * memory devices are needed. 1549 * 1550 * Note: The PCI bus code should do this automatically for us on 1551 * suspend/resume, but until it does, we have to cope. 1552 */ 1553 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1554 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1555 rman_get_start(sc->base_res))); 1556 1557 sc->chipinit(sc); 1558 1559 /* reset interrupt -- Do we really need to do this? */ 1560 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1561 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1562 1563 /* CSC Interrupt: Card detect interrupt on */ 1564 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1565 1566 /* Signal the thread to wakeup. */ 1567 mtx_lock(&sc->mtx); 1568 cv_signal(&sc->cv); 1569 mtx_unlock(&sc->mtx); 1570 1571 error = bus_generic_resume(self); 1572 1573 return (error); 1574 } 1575 1576 int 1577 cbb_child_present(device_t self) 1578 { 1579 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1580 uint32_t sockstate; 1581 1582 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1583 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1584 } 1585