1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/interrupt.h> 88 #include <sys/lock.h> 89 #include <sys/malloc.h> 90 #include <sys/mutex.h> 91 #include <sys/proc.h> 92 #include <sys/rman.h> 93 #include <sys/sysctl.h> 94 #include <sys/systm.h> 95 #include <machine/bus.h> 96 #include <machine/resource.h> 97 98 #include <dev/pci/pcireg.h> 99 #include <dev/pci/pcivar.h> 100 101 #include <dev/pccard/pccardreg.h> 102 #include <dev/pccard/pccardvar.h> 103 104 #include <dev/exca/excareg.h> 105 #include <dev/exca/excavar.h> 106 107 #include <dev/pccbb/pccbbreg.h> 108 #include <dev/pccbb/pccbbvar.h> 109 110 #include "power_if.h" 111 #include "card_if.h" 112 #include "pcib_if.h" 113 114 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 115 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 116 117 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 118 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 119 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 120 pci_write_config(DEV, REG, ( \ 121 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 122 123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 124 125 #define CBB_START_MEM 0x88000000 126 #define CBB_START_32_IO 0x1000 127 #define CBB_START_16_IO 0x100 128 129 devclass_t cbb_devclass; 130 131 /* sysctl vars */ 132 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 133 134 /* There's no way to say TUNEABLE_LONG to get the right types */ 135 u_long cbb_start_mem = CBB_START_MEM; 136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 138 &cbb_start_mem, CBB_START_MEM, 139 "Starting address for memory allocations"); 140 141 u_long cbb_start_16_io = CBB_START_16_IO; 142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 144 &cbb_start_16_io, CBB_START_16_IO, 145 "Starting ioport for 16-bit cards"); 146 147 u_long cbb_start_32_io = CBB_START_32_IO; 148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 150 &cbb_start_32_io, CBB_START_32_IO, 151 "Starting ioport for 32-bit cards"); 152 153 int cbb_debug = 0; 154 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 155 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 156 "Verbose cardbus bridge debugging"); 157 158 static void cbb_insert(struct cbb_softc *sc); 159 static void cbb_removal(struct cbb_softc *sc); 160 static uint32_t cbb_detect_voltage(device_t brdev); 161 static void cbb_cardbus_reset(device_t brdev, device_t child, int on); 162 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 163 uint32_t end); 164 static int cbb_cardbus_mem_open(device_t brdev, int win, 165 uint32_t start, uint32_t end); 166 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 167 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 168 int type, int rid, struct resource *res); 169 static int cbb_cardbus_deactivate_resource(device_t brdev, 170 device_t child, int type, int rid, struct resource *res); 171 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 172 device_t child, int type, int *rid, u_long start, 173 u_long end, u_long count, u_int flags); 174 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 175 int type, int rid, struct resource *res); 176 static int cbb_cardbus_power_enable_socket(device_t brdev, 177 device_t child); 178 static void cbb_cardbus_power_disable_socket(device_t brdev, 179 device_t child); 180 static int cbb_func_filt(void *arg); 181 static void cbb_func_intr(void *arg); 182 183 static void 184 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 185 { 186 struct cbb_reslist *rle; 187 188 SLIST_FOREACH(rle, &sc->rl, link) { 189 if (rle->res == res) { 190 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 191 free(rle, M_DEVBUF); 192 return; 193 } 194 } 195 } 196 197 static struct resource * 198 cbb_find_res(struct cbb_softc *sc, int type, int rid) 199 { 200 struct cbb_reslist *rle; 201 202 SLIST_FOREACH(rle, &sc->rl, link) 203 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 204 return (rle->res); 205 return (NULL); 206 } 207 208 static void 209 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 210 int rid) 211 { 212 struct cbb_reslist *rle; 213 214 /* 215 * Need to record allocated resource so we can iterate through 216 * it later. 217 */ 218 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 219 if (rle == NULL) 220 panic("cbb_cardbus_alloc_resource: can't record entry!"); 221 rle->res = res; 222 rle->type = type; 223 rle->rid = rid; 224 SLIST_INSERT_HEAD(&sc->rl, rle, link); 225 } 226 227 static void 228 cbb_destroy_res(struct cbb_softc *sc) 229 { 230 struct cbb_reslist *rle; 231 232 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 233 device_printf(sc->dev, "Danger Will Robinson: Resource " 234 "left allocated! This is a bug... " 235 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 236 rman_get_start(rle->res)); 237 SLIST_REMOVE_HEAD(&sc->rl, link); 238 free(rle, M_DEVBUF); 239 } 240 } 241 242 /* 243 * Disable function interrupts by telling the bridge to generate IRQ1 244 * interrupts. These interrupts aren't really generated by the chip, since 245 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 246 * initialization, so this helps to work around the problem. 247 * 248 * XXX We can't do this workaround for all chipsets, because this 249 * XXX causes interference with the keyboard because somechipsets will 250 * XXX actually signal IRQ1 over their serial interrupt connections to 251 * XXX the south bridge. Disable it it for now. 252 */ 253 void 254 cbb_disable_func_intr(struct cbb_softc *sc) 255 { 256 #if 0 257 uint8_t reg; 258 259 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 260 EXCA_INTR_IRQ_RESERVED1; 261 exca_putb(&sc->exca[0], EXCA_INTR, reg); 262 #endif 263 } 264 265 /* 266 * Enable function interrupts. We turn on function interrupts when the card 267 * requests an interrupt. The PCMCIA standard says that we should set 268 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 269 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 270 * cards. 271 */ 272 static void 273 cbb_enable_func_intr(struct cbb_softc *sc) 274 { 275 uint8_t reg; 276 277 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 278 EXCA_INTR_IRQ_NONE; 279 exca_putb(&sc->exca[0], EXCA_INTR, reg); 280 } 281 282 int 283 cbb_detach(device_t brdev) 284 { 285 struct cbb_softc *sc = device_get_softc(brdev); 286 device_t *devlist; 287 int tmp, tries, error, numdevs; 288 289 /* 290 * Before we delete the children (which we have to do because 291 * attach doesn't check for children busses correctly), we have 292 * to detach the children. Even if we didn't need to delete the 293 * children, we have to detach them. 294 */ 295 error = bus_generic_detach(brdev); 296 if (error != 0) 297 return (error); 298 299 /* 300 * Since the attach routine doesn't search for children before it 301 * attaches them to this device, we must delete them here in order 302 * for the kldload/unload case to work. If we failed to do that, then 303 * we'd get duplicate devices when cbb.ko was reloaded. 304 */ 305 tries = 10; 306 do { 307 error = device_get_children(brdev, &devlist, &numdevs); 308 if (error == 0) 309 break; 310 /* 311 * Try hard to cope with low memory. 312 */ 313 if (error == ENOMEM) { 314 pause("cbbnomem", 1); 315 continue; 316 } 317 } while (tries-- > 0); 318 for (tmp = 0; tmp < numdevs; tmp++) 319 device_delete_child(brdev, devlist[tmp]); 320 free(devlist, M_TEMP); 321 322 /* Turn off the interrupts */ 323 cbb_set(sc, CBB_SOCKET_MASK, 0); 324 325 /* reset 16-bit pcmcia bus */ 326 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 327 328 /* turn off power */ 329 cbb_power(brdev, CARD_OFF); 330 331 /* Ack the interrupt */ 332 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 333 334 /* 335 * Wait for the thread to die. kproc_exit will do a wakeup 336 * on the event thread's struct thread * so that we know it is 337 * safe to proceed. IF the thread is running, set the please 338 * die flag and wait for it to comply. Since the wakeup on 339 * the event thread happens only in kproc_exit, we don't 340 * need to loop here. 341 */ 342 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 343 mtx_lock(&sc->mtx); 344 sc->flags |= CBB_KTHREAD_DONE; 345 while (sc->flags & CBB_KTHREAD_RUNNING) { 346 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 347 wakeup(&sc->intrhand); 348 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 349 } 350 mtx_unlock(&sc->mtx); 351 352 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 353 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 354 sc->base_res); 355 mtx_destroy(&sc->mtx); 356 return (0); 357 } 358 359 int 360 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 362 void **cookiep) 363 { 364 struct cbb_intrhand *ih; 365 struct cbb_softc *sc = device_get_softc(dev); 366 int err; 367 368 if (filt == NULL && intr == NULL) 369 return (EINVAL); 370 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 371 if (ih == NULL) 372 return (ENOMEM); 373 *cookiep = ih; 374 ih->filt = filt; 375 ih->intr = intr; 376 ih->arg = arg; 377 ih->sc = sc; 378 /* 379 * XXX need to turn on ISA interrupts, if we ever support them, but 380 * XXX for now that's all we need to do. 381 */ 382 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 383 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 384 &ih->cookie); 385 if (err != 0) { 386 free(ih, M_DEVBUF); 387 return (err); 388 } 389 cbb_enable_func_intr(sc); 390 sc->cardok = 1; 391 return 0; 392 } 393 394 int 395 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 396 void *cookie) 397 { 398 struct cbb_intrhand *ih; 399 int err; 400 401 /* XXX Need to do different things for ISA interrupts. */ 402 ih = (struct cbb_intrhand *) cookie; 403 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 404 ih->cookie); 405 if (err != 0) 406 return (err); 407 free(ih, M_DEVBUF); 408 return (0); 409 } 410 411 412 void 413 cbb_driver_added(device_t brdev, driver_t *driver) 414 { 415 struct cbb_softc *sc = device_get_softc(brdev); 416 device_t *devlist; 417 device_t dev; 418 int tmp; 419 int numdevs; 420 int wake = 0; 421 422 DEVICE_IDENTIFY(driver, brdev); 423 tmp = device_get_children(brdev, &devlist, &numdevs); 424 if (tmp != 0) { 425 device_printf(brdev, "Cannot get children list, no reprobe\n"); 426 return; 427 } 428 for (tmp = 0; tmp < numdevs; tmp++) { 429 dev = devlist[tmp]; 430 if (device_get_state(dev) == DS_NOTPRESENT && 431 device_probe_and_attach(dev) == 0) 432 wake++; 433 } 434 free(devlist, M_TEMP); 435 436 if (wake > 0) 437 wakeup(&sc->intrhand); 438 } 439 440 void 441 cbb_child_detached(device_t brdev, device_t child) 442 { 443 struct cbb_softc *sc = device_get_softc(brdev); 444 445 /* I'm not sure we even need this */ 446 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 447 device_printf(brdev, "Unknown child detached: %s\n", 448 device_get_nameunit(child)); 449 } 450 451 /************************************************************************/ 452 /* Kthreads */ 453 /************************************************************************/ 454 455 void 456 cbb_event_thread(void *arg) 457 { 458 struct cbb_softc *sc = arg; 459 uint32_t status; 460 int err; 461 int not_a_card = 0; 462 463 mtx_lock(&sc->mtx); 464 sc->flags |= CBB_KTHREAD_RUNNING; 465 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 466 mtx_unlock(&sc->mtx); 467 /* 468 * We take out Giant here because we need it deep, 469 * down in the bowels of the vm system for mapping the 470 * memory we need to read the CIS. In addition, since 471 * we are adding/deleting devices from the dev tree, 472 * and that code isn't MP safe, we have to hold Giant. 473 */ 474 mtx_lock(&Giant); 475 status = cbb_get(sc, CBB_SOCKET_STATE); 476 DPRINTF(("Status is 0x%x\n", status)); 477 if (!CBB_CARD_PRESENT(status)) { 478 not_a_card = 0; /* We know card type */ 479 cbb_removal(sc); 480 } else if (status & CBB_STATE_NOT_A_CARD) { 481 /* 482 * Up to 10 times, try to rescan the card when we see 483 * NOT_A_CARD. 10 is somehwat arbitrary. When this 484 * pathology hits, there's a ~40% chance each try will 485 * fail. 10 tries takes about 5s and results in a 486 * 99.99% certainty of the results. 487 */ 488 if (not_a_card++ < 10) { 489 DEVPRINTF((sc->dev, 490 "Not a card bit set, rescanning\n")); 491 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 492 } else { 493 device_printf(sc->dev, 494 "Can't determine card type\n"); 495 } 496 } else { 497 not_a_card = 0; /* We know card type */ 498 cbb_insert(sc); 499 } 500 mtx_unlock(&Giant); 501 502 /* 503 * Wait until it has been 250ms since the last time we 504 * get an interrupt. We handle the rest of the interrupt 505 * at the top of the loop. Although we clear the bit in the 506 * ISR, we signal sc->cv from the detach path after we've 507 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 508 * 250ms sleep here. 509 * 510 * In our ISR, we turn off the card changed interrupt. Turn 511 * them back on here before we wait for them to happen. We 512 * turn them on/off so that we can tolerate a large latency 513 * between the time we signal cbb_event_thread and it gets 514 * a chance to run. 515 */ 516 mtx_lock(&sc->mtx); 517 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 518 msleep(&sc->intrhand, &sc->mtx, PZERO, "-", 0); 519 err = 0; 520 while (err != EWOULDBLOCK && 521 (sc->flags & CBB_KTHREAD_DONE) == 0) 522 err = msleep(&sc->intrhand, &sc->mtx, PZERO, "-", hz / 5); 523 } 524 DEVPRINTF((sc->dev, "Thread terminating\n")); 525 sc->flags &= ~CBB_KTHREAD_RUNNING; 526 mtx_unlock(&sc->mtx); 527 kproc_exit(0); 528 } 529 530 /************************************************************************/ 531 /* Insert/removal */ 532 /************************************************************************/ 533 534 static void 535 cbb_insert(struct cbb_softc *sc) 536 { 537 uint32_t sockevent, sockstate; 538 539 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 540 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 541 542 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 543 sockevent, sockstate)); 544 545 if (sockstate & CBB_STATE_R2_CARD) { 546 if (device_is_attached(sc->exca[0].pccarddev)) { 547 sc->flags |= CBB_16BIT_CARD; 548 exca_insert(&sc->exca[0]); 549 } else { 550 device_printf(sc->dev, 551 "16-bit card inserted, but no pccard bus.\n"); 552 } 553 } else if (sockstate & CBB_STATE_CB_CARD) { 554 if (device_is_attached(sc->cbdev)) { 555 sc->flags &= ~CBB_16BIT_CARD; 556 CARD_ATTACH_CARD(sc->cbdev); 557 } else { 558 device_printf(sc->dev, 559 "CardBus card inserted, but no cardbus bus.\n"); 560 } 561 } else { 562 /* 563 * We should power the card down, and try again a couple of 564 * times if this happens. XXX 565 */ 566 device_printf(sc->dev, "Unsupported card type detected\n"); 567 } 568 } 569 570 static void 571 cbb_removal(struct cbb_softc *sc) 572 { 573 sc->cardok = 0; 574 if (sc->flags & CBB_16BIT_CARD) { 575 exca_removal(&sc->exca[0]); 576 } else { 577 if (device_is_attached(sc->cbdev)) 578 CARD_DETACH_CARD(sc->cbdev); 579 } 580 cbb_destroy_res(sc); 581 } 582 583 /************************************************************************/ 584 /* Interrupt Handler */ 585 /************************************************************************/ 586 587 static int 588 cbb_func_filt(void *arg) 589 { 590 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 591 struct cbb_softc *sc = ih->sc; 592 593 /* 594 * Make sure that the card is really there. 595 */ 596 if (!sc->cardok) 597 return (FILTER_STRAY); 598 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 599 sc->cardok = 0; 600 return (FILTER_HANDLED); 601 } 602 603 /* 604 * nb: don't have to check for giant or not, since that's done in the 605 * ISR dispatch and one can't hold Giant in a filter anyway... 606 */ 607 return ((*ih->filt)(ih->arg)); 608 } 609 610 static void 611 cbb_func_intr(void *arg) 612 { 613 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 614 struct cbb_softc *sc = ih->sc; 615 616 /* 617 * While this check may seem redundant, it helps close a race 618 * condition. If the card is ejected after the filter runs, but 619 * before this ISR can be scheduled, then we need to do the same 620 * filtering to prevent the card's ISR from being called. One could 621 * argue that the card's ISR should be able to cope, but experience 622 * has shown they can't always. This mitigates the problem by making 623 * the race quite a bit smaller. Properly written client ISRs should 624 * cope with the card going away in the middle of the ISR. We assume 625 * that drivers that are sophisticated enough to use filters don't 626 * need our protection. This also allows us to ensure they *ARE* 627 * called if their filter said they needed to be called. 628 */ 629 if (ih->filt == NULL) { 630 if (!sc->cardok) 631 return; 632 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 633 sc->cardok = 0; 634 return; 635 } 636 } 637 638 /* 639 * Call the registered ithread interrupt handler. This entire routine 640 * will be called with Giant if this isn't an MP safe driver, or not 641 * if it is. Either way, we don't have to worry. 642 */ 643 ih->intr(ih->arg); 644 } 645 646 /************************************************************************/ 647 /* Generic Power functions */ 648 /************************************************************************/ 649 650 static uint32_t 651 cbb_detect_voltage(device_t brdev) 652 { 653 struct cbb_softc *sc = device_get_softc(brdev); 654 uint32_t psr; 655 uint32_t vol = CARD_UKN_CARD; 656 657 psr = cbb_get(sc, CBB_SOCKET_STATE); 658 659 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 660 vol |= CARD_5V_CARD; 661 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 662 vol |= CARD_3V_CARD; 663 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 664 vol |= CARD_XV_CARD; 665 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 666 vol |= CARD_YV_CARD; 667 668 return (vol); 669 } 670 671 static uint8_t 672 cbb_o2micro_power_hack(struct cbb_softc *sc) 673 { 674 uint8_t reg; 675 676 /* 677 * Issue #2: INT# not qualified with IRQ Routing Bit. An 678 * unexpected PCI INT# may be generated during PC Card 679 * initialization even with the IRQ Routing Bit Set with some 680 * PC Cards. 681 * 682 * This is a two part issue. The first part is that some of 683 * our older controllers have an issue in which the slot's PCI 684 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 685 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 686 * is selected (ExCA register 03h bits 3:0, of the slot, are 687 * cleared) we will generate INT# if IREQ# is asserted. The 688 * second part is because some PC Cards prematurally assert 689 * IREQ# before the ExCA registers are fully programmed. This 690 * in turn asserts INT# because ExCA register 03h bits 3:0 691 * (ISA IRQ Select) are not yet programmed. 692 * 693 * The fix for this issue, which will work for any controller 694 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 695 * (select IRQ1), of the slot, before turning on slot power. 696 * Selecting IRQ1 will result in INT# NOT being asserted 697 * (because IRQ1 is selected), and IRQ1 won't be asserted 698 * because our controllers don't generate IRQ1. 699 * 700 * Other, non O2Micro controllers will generate irq 1 in some 701 * situations, so we can't do this hack for everybody. Reports of 702 * keyboard controller's interrupts being suppressed occurred when 703 * we did this. 704 */ 705 reg = exca_getb(&sc->exca[0], EXCA_INTR); 706 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 707 return (reg); 708 } 709 710 /* 711 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 712 * we don't have an interrupt storm on power on. This has the efect of 713 * disabling card status change interrupts for the duration of poweron. 714 */ 715 static void 716 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 717 { 718 exca_putb(&sc->exca[0], EXCA_INTR, reg); 719 } 720 721 int 722 cbb_power(device_t brdev, int volts) 723 { 724 uint32_t status, sock_ctrl, reg_ctrl, mask; 725 struct cbb_softc *sc = device_get_softc(brdev); 726 int cnt, sane; 727 int retval = 0; 728 int on = 0; 729 uint8_t reg = 0; 730 731 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 732 733 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 734 switch (volts & CARD_VCCMASK) { 735 case 5: 736 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 737 on++; 738 break; 739 case 3: 740 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 741 on++; 742 break; 743 case XV: 744 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 745 on++; 746 break; 747 case YV: 748 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 749 on++; 750 break; 751 case 0: 752 break; 753 default: 754 return (0); /* power NEVER changed */ 755 } 756 757 /* VPP == VCC */ 758 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 759 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 760 761 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 762 return (1); /* no change necessary */ 763 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 764 if (volts != 0 && sc->chipset == CB_O2MICRO) 765 reg = cbb_o2micro_power_hack(sc); 766 767 /* 768 * We have to mask the card change detect interrupt while 769 * we're messing with the power. It is allowed to bounce 770 * while we're messing with power as things settle down. In 771 * addition, we mask off the card's function interrupt by 772 * routing it via the ISA bus. This bit generally only 773 * affects 16-bit cards. Some bridges allow one to set 774 * another bit to have it also affect 32-bit cards. Since 775 * 32-bit cards are required to be better behaved, we don't 776 * bother to get into those bridge specific features. 777 */ 778 mask = cbb_get(sc, CBB_SOCKET_MASK); 779 mask |= CBB_SOCKET_MASK_POWER; 780 mask &= ~CBB_SOCKET_MASK_CD; 781 cbb_set(sc, CBB_SOCKET_MASK, mask); 782 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 783 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 784 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 785 if (on) { 786 mtx_lock(&sc->mtx); 787 cnt = sc->powerintr; 788 /* 789 * We have a shortish timeout of 500ms here. Some 790 * bridges do not generate a POWER_CYCLE event for 791 * 16-bit cards. In those cases, we have to cope the 792 * best we can, and having only a short delay is 793 * better than the alternatives. 794 */ 795 sane = 10; 796 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 797 cnt == sc->powerintr && sane-- > 0) 798 msleep(&sc->powerintr, &sc->mtx, PZERO, "-", hz / 20); 799 mtx_unlock(&sc->mtx); 800 /* 801 * The TOPIC95B requires a little bit extra time to get 802 * its act together, so delay for an additional 100ms. Also 803 * as documented below, it doesn't seem to set the POWER_CYCLE 804 * bit, so don't whine if it never came on. 805 */ 806 if (sc->chipset == CB_TOPIC95) { 807 pause("cbb95B", hz / 10); 808 } else if (sane <= 0) { 809 device_printf(sc->dev, "power timeout, doom?\n"); 810 } 811 } 812 813 /* 814 * After the power is good, we can turn off the power interrupt. 815 * However, the PC Card standard says that we must delay turning the 816 * CD bit back on for a bit to allow for bouncyness on power down 817 * (recall that we don't wait above for a power down, since we don't 818 * get an interrupt for that). We're called either from the suspend 819 * code in which case we don't want to turn card change on again, or 820 * we're called from the card insertion code, in which case the cbb 821 * thread will turn it on for us before it waits to be woken by a 822 * change event. 823 * 824 * NB: Topic95B doesn't set the power cycle bit. we assume that 825 * both it and the TOPIC95 behave the same. 826 */ 827 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 828 status = cbb_get(sc, CBB_SOCKET_STATE); 829 if (on && sc->chipset != CB_TOPIC95) { 830 if ((status & CBB_STATE_POWER_CYCLE) == 0) 831 device_printf(sc->dev, "Power not on?\n"); 832 } 833 if (status & CBB_STATE_BAD_VCC_REQ) { 834 device_printf(sc->dev, "Bad Vcc requested\n"); 835 /* 836 * Turn off the power, and try again. Retrigger other 837 * active interrupts via force register. From NetBSD 838 * PR 36652, coded by me to description there. 839 */ 840 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 841 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 842 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 843 status &= ~CBB_STATE_BAD_VCC_REQ; 844 status &= ~CBB_STATE_DATA_LOST; 845 status |= CBB_FORCE_CV_TEST; 846 cbb_set(sc, CBB_SOCKET_FORCE, status); 847 goto done; 848 } 849 if (sc->chipset == CB_TOPIC97) { 850 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 851 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 852 if (on) 853 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 854 else 855 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 856 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 857 } 858 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 859 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 860 retval = 1; 861 done:; 862 if (volts != 0 && sc->chipset == CB_O2MICRO) 863 cbb_o2micro_power_hack2(sc, reg); 864 return (retval); 865 } 866 867 static int 868 cbb_current_voltage(device_t brdev) 869 { 870 struct cbb_softc *sc = device_get_softc(brdev); 871 uint32_t ctrl; 872 873 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 874 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 875 case CBB_SOCKET_CTRL_VCC_5V: 876 return CARD_5V_CARD; 877 case CBB_SOCKET_CTRL_VCC_3V: 878 return CARD_3V_CARD; 879 case CBB_SOCKET_CTRL_VCC_XV: 880 return CARD_XV_CARD; 881 case CBB_SOCKET_CTRL_VCC_YV: 882 return CARD_YV_CARD; 883 } 884 return 0; 885 } 886 887 /* 888 * detect the voltage for the card, and set it. Since the power 889 * used is the square of the voltage, lower voltages is a big win 890 * and what Windows does (and what Microsoft prefers). The MS paper 891 * also talks about preferring the CIS entry as well, but that has 892 * to be done elsewhere. We also optimize power sequencing here 893 * and don't change things if we're already powered up at a supported 894 * voltage. 895 * 896 * In addition, we power up with OE disabled. We'll set it later 897 * in the power up sequence. 898 */ 899 static int 900 cbb_do_power(device_t brdev) 901 { 902 struct cbb_softc *sc = device_get_softc(brdev); 903 uint32_t voltage, curpwr; 904 uint32_t status; 905 906 /* Don't enable OE (output enable) until power stable */ 907 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 908 909 voltage = cbb_detect_voltage(brdev); 910 curpwr = cbb_current_voltage(brdev); 911 status = cbb_get(sc, CBB_SOCKET_STATE); 912 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 913 return 0; 914 /* Prefer lowest voltage supported */ 915 cbb_power(brdev, CARD_OFF); 916 if (voltage & CARD_YV_CARD) 917 cbb_power(brdev, CARD_VCC(YV)); 918 else if (voltage & CARD_XV_CARD) 919 cbb_power(brdev, CARD_VCC(XV)); 920 else if (voltage & CARD_3V_CARD) 921 cbb_power(brdev, CARD_VCC(3)); 922 else if (voltage & CARD_5V_CARD) 923 cbb_power(brdev, CARD_VCC(5)); 924 else { 925 device_printf(brdev, "Unknown card voltage\n"); 926 return (ENXIO); 927 } 928 return (0); 929 } 930 931 /************************************************************************/ 932 /* CardBus power functions */ 933 /************************************************************************/ 934 935 static void 936 cbb_cardbus_reset(device_t brdev, device_t child, int on) 937 { 938 struct cbb_softc *sc = device_get_softc(brdev); 939 uint32_t b; 940 int delay, count; 941 942 /* 943 * Asserting reset for 20ms is necessary for most bridges. For some 944 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 945 * root cause of this is unknown, and NetBSD does the same thing. 946 */ 947 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 948 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 949 pause("cbbP3", hz * delay / 1000); 950 951 /* 952 * If a card exists and we're turning it on, take it out of reset. 953 * After clearing reset, wait up to 1.1s for the first configuration 954 * register (vendor/product) configuration register of device 0.0 to 955 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 956 * says that when powering up the card, the PCI Spec v2.1 must be 957 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 958 * Config Access) is at most 2^25 clocks, or just over 1s. Section 959 * 2.2.1 states any card not ready to participate in bus transactions 960 * must tristate its outputs. Therefore, any access to its 961 * configuration registers must be ignored. In that state, the config 962 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 963 * 0xffff is invalid, so this can never match a real card. Print a 964 * warning if it never returns a real id. The PCMCIA PC Card 965 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 966 * a cardbus bus, so that's the only register we check here. 967 */ 968 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 969 /* 970 */ 971 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 972 &~CBBM_BRIDGECTRL_RESET, 2); 973 b = pcib_get_bus(child); 974 count = 1100 / 20; 975 do { 976 pause("cbbP4", hz * 2 / 100); 977 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 978 0xfffffffful && --count >= 0); 979 if (count < 0) 980 device_printf(brdev, "Warning: Bus reset timeout\n"); 981 } 982 } 983 984 static int 985 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 986 { 987 struct cbb_softc *sc = device_get_softc(brdev); 988 int err; 989 990 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 991 return (ENODEV); 992 993 err = cbb_do_power(brdev); 994 if (err) 995 return (err); 996 cbb_cardbus_reset(brdev, child, 1); 997 return (0); 998 } 999 1000 static void 1001 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1002 { 1003 cbb_power(brdev, CARD_OFF); 1004 cbb_cardbus_reset(brdev, child, 0); 1005 } 1006 1007 /************************************************************************/ 1008 /* CardBus Resource */ 1009 /************************************************************************/ 1010 1011 static int 1012 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1013 { 1014 int basereg; 1015 int limitreg; 1016 1017 if ((win < 0) || (win > 1)) { 1018 DEVPRINTF((brdev, 1019 "cbb_cardbus_io_open: window out of range %d\n", win)); 1020 return (EINVAL); 1021 } 1022 1023 basereg = win * 8 + CBBR_IOBASE0; 1024 limitreg = win * 8 + CBBR_IOLIMIT0; 1025 1026 pci_write_config(brdev, basereg, start, 4); 1027 pci_write_config(brdev, limitreg, end, 4); 1028 return (0); 1029 } 1030 1031 static int 1032 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1033 { 1034 int basereg; 1035 int limitreg; 1036 1037 if ((win < 0) || (win > 1)) { 1038 DEVPRINTF((brdev, 1039 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1040 return (EINVAL); 1041 } 1042 1043 basereg = win * 8 + CBBR_MEMBASE0; 1044 limitreg = win * 8 + CBBR_MEMLIMIT0; 1045 1046 pci_write_config(brdev, basereg, start, 4); 1047 pci_write_config(brdev, limitreg, end, 4); 1048 return (0); 1049 } 1050 1051 #define START_NONE 0xffffffff 1052 #define END_NONE 0 1053 1054 static void 1055 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1056 { 1057 uint32_t starts[2]; 1058 uint32_t ends[2]; 1059 struct cbb_reslist *rle; 1060 int align, i; 1061 uint32_t reg; 1062 1063 starts[0] = starts[1] = START_NONE; 1064 ends[0] = ends[1] = END_NONE; 1065 1066 if (type == SYS_RES_MEMORY) 1067 align = CBB_MEMALIGN; 1068 else if (type == SYS_RES_IOPORT) 1069 align = CBB_IOALIGN; 1070 else 1071 align = 1; 1072 1073 SLIST_FOREACH(rle, &sc->rl, link) { 1074 if (rle->type != type) 1075 continue; 1076 if (rle->res == NULL) 1077 continue; 1078 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1079 continue; 1080 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1081 i = 1; 1082 else 1083 i = 0; 1084 if (rman_get_start(rle->res) < starts[i]) 1085 starts[i] = rman_get_start(rle->res); 1086 if (rman_get_end(rle->res) > ends[i]) 1087 ends[i] = rman_get_end(rle->res); 1088 } 1089 for (i = 0; i < 2; i++) { 1090 if (starts[i] == START_NONE) 1091 continue; 1092 starts[i] &= ~(align - 1); 1093 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1094 } 1095 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1096 if (starts[0] < starts[1]) { 1097 if (ends[0] > starts[1]) { 1098 device_printf(sc->dev, "Overlapping ranges" 1099 " for prefetch and non-prefetch memory\n"); 1100 return; 1101 } 1102 } else { 1103 if (ends[1] > starts[0]) { 1104 device_printf(sc->dev, "Overlapping ranges" 1105 " for prefetch and non-prefetch memory\n"); 1106 return; 1107 } 1108 } 1109 } 1110 1111 if (type == SYS_RES_MEMORY) { 1112 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1113 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1114 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1115 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1116 CBBM_BRIDGECTRL_PREFETCH_1); 1117 if (starts[1] != START_NONE) 1118 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1119 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1120 if (bootverbose) { 1121 device_printf(sc->dev, "Opening memory:\n"); 1122 if (starts[0] != START_NONE) 1123 device_printf(sc->dev, "Normal: %#x-%#x\n", 1124 starts[0], ends[0]); 1125 if (starts[1] != START_NONE) 1126 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1127 starts[1], ends[1]); 1128 } 1129 } else if (type == SYS_RES_IOPORT) { 1130 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1131 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1132 if (bootverbose && starts[0] != START_NONE) 1133 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1134 starts[0], ends[0]); 1135 } 1136 } 1137 1138 static int 1139 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1140 int rid, struct resource *res) 1141 { 1142 int ret; 1143 1144 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1145 type, rid, res); 1146 if (ret != 0) 1147 return (ret); 1148 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1149 return (0); 1150 } 1151 1152 static int 1153 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1154 int rid, struct resource *res) 1155 { 1156 int ret; 1157 1158 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1159 type, rid, res); 1160 if (ret != 0) 1161 return (ret); 1162 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1163 return (0); 1164 } 1165 1166 static struct resource * 1167 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1168 int *rid, u_long start, u_long end, u_long count, u_int flags) 1169 { 1170 struct cbb_softc *sc = device_get_softc(brdev); 1171 int tmp; 1172 struct resource *res; 1173 u_long align; 1174 1175 switch (type) { 1176 case SYS_RES_IRQ: 1177 tmp = rman_get_start(sc->irq_res); 1178 if (start > tmp || end < tmp || count != 1) { 1179 device_printf(child, "requested interrupt %ld-%ld," 1180 "count = %ld not supported by cbb\n", 1181 start, end, count); 1182 return (NULL); 1183 } 1184 start = end = tmp; 1185 flags |= RF_SHAREABLE; 1186 break; 1187 case SYS_RES_IOPORT: 1188 if (start <= cbb_start_32_io) 1189 start = cbb_start_32_io; 1190 if (end < start) 1191 end = start; 1192 if (count > (1 << RF_ALIGNMENT(flags))) 1193 flags = (flags & ~RF_ALIGNMENT_MASK) | 1194 rman_make_alignment_flags(count); 1195 break; 1196 case SYS_RES_MEMORY: 1197 if (start <= cbb_start_mem) 1198 start = cbb_start_mem; 1199 if (end < start) 1200 end = start; 1201 if (count < CBB_MEMALIGN) 1202 align = CBB_MEMALIGN; 1203 else 1204 align = count; 1205 if (align > (1 << RF_ALIGNMENT(flags))) 1206 flags = (flags & ~RF_ALIGNMENT_MASK) | 1207 rman_make_alignment_flags(align); 1208 break; 1209 } 1210 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1211 start, end, count, flags & ~RF_ACTIVE); 1212 if (res == NULL) { 1213 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1214 return (NULL); 1215 } 1216 cbb_insert_res(sc, res, type, *rid); 1217 if (flags & RF_ACTIVE) 1218 if (bus_activate_resource(child, type, *rid, res) != 0) { 1219 bus_release_resource(child, type, *rid, res); 1220 return (NULL); 1221 } 1222 1223 return (res); 1224 } 1225 1226 static int 1227 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1228 int rid, struct resource *res) 1229 { 1230 struct cbb_softc *sc = device_get_softc(brdev); 1231 int error; 1232 1233 if (rman_get_flags(res) & RF_ACTIVE) { 1234 error = bus_deactivate_resource(child, type, rid, res); 1235 if (error != 0) 1236 return (error); 1237 } 1238 cbb_remove_res(sc, res); 1239 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1240 type, rid, res)); 1241 } 1242 1243 /************************************************************************/ 1244 /* PC Card Power Functions */ 1245 /************************************************************************/ 1246 1247 static int 1248 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1249 { 1250 struct cbb_softc *sc = device_get_softc(brdev); 1251 int err; 1252 1253 DPRINTF(("cbb_pcic_socket_enable:\n")); 1254 1255 /* power down/up the socket to reset */ 1256 err = cbb_do_power(brdev); 1257 if (err) 1258 return (err); 1259 exca_reset(&sc->exca[0], child); 1260 1261 return (0); 1262 } 1263 1264 static void 1265 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1266 { 1267 struct cbb_softc *sc = device_get_softc(brdev); 1268 1269 DPRINTF(("cbb_pcic_socket_disable\n")); 1270 1271 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1272 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1273 pause("cbbP1", hz / 100); 1274 1275 /* power down the socket */ 1276 cbb_power(brdev, CARD_OFF); 1277 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1278 1279 /* wait 300ms until power fails (Tpf). */ 1280 pause("cbbP2", hz * 300 / 1000); 1281 1282 /* enable CSC interrupts */ 1283 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1284 } 1285 1286 /************************************************************************/ 1287 /* POWER methods */ 1288 /************************************************************************/ 1289 1290 int 1291 cbb_power_enable_socket(device_t brdev, device_t child) 1292 { 1293 struct cbb_softc *sc = device_get_softc(brdev); 1294 1295 if (sc->flags & CBB_16BIT_CARD) 1296 return (cbb_pcic_power_enable_socket(brdev, child)); 1297 else 1298 return (cbb_cardbus_power_enable_socket(brdev, child)); 1299 } 1300 1301 void 1302 cbb_power_disable_socket(device_t brdev, device_t child) 1303 { 1304 struct cbb_softc *sc = device_get_softc(brdev); 1305 if (sc->flags & CBB_16BIT_CARD) 1306 cbb_pcic_power_disable_socket(brdev, child); 1307 else 1308 cbb_cardbus_power_disable_socket(brdev, child); 1309 } 1310 1311 static int 1312 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1313 struct resource *res) 1314 { 1315 struct cbb_softc *sc = device_get_softc(brdev); 1316 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1317 } 1318 1319 static int 1320 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1321 int rid, struct resource *res) 1322 { 1323 struct cbb_softc *sc = device_get_softc(brdev); 1324 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1325 } 1326 1327 static struct resource * 1328 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1329 u_long start, u_long end, u_long count, u_int flags) 1330 { 1331 struct resource *res = NULL; 1332 struct cbb_softc *sc = device_get_softc(brdev); 1333 int align; 1334 int tmp; 1335 1336 switch (type) { 1337 case SYS_RES_MEMORY: 1338 if (start < cbb_start_mem) 1339 start = cbb_start_mem; 1340 if (end < start) 1341 end = start; 1342 if (count < CBB_MEMALIGN) 1343 align = CBB_MEMALIGN; 1344 else 1345 align = count; 1346 if (align > (1 << RF_ALIGNMENT(flags))) 1347 flags = (flags & ~RF_ALIGNMENT_MASK) | 1348 rman_make_alignment_flags(align); 1349 break; 1350 case SYS_RES_IOPORT: 1351 if (start < cbb_start_16_io) 1352 start = cbb_start_16_io; 1353 if (end < start) 1354 end = start; 1355 break; 1356 case SYS_RES_IRQ: 1357 tmp = rman_get_start(sc->irq_res); 1358 if (start > tmp || end < tmp || count != 1) { 1359 device_printf(child, "requested interrupt %ld-%ld," 1360 "count = %ld not supported by cbb\n", 1361 start, end, count); 1362 return (NULL); 1363 } 1364 flags |= RF_SHAREABLE; 1365 start = end = rman_get_start(sc->irq_res); 1366 break; 1367 } 1368 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1369 start, end, count, flags & ~RF_ACTIVE); 1370 if (res == NULL) 1371 return (NULL); 1372 cbb_insert_res(sc, res, type, *rid); 1373 if (flags & RF_ACTIVE) { 1374 if (bus_activate_resource(child, type, *rid, res) != 0) { 1375 bus_release_resource(child, type, *rid, res); 1376 return (NULL); 1377 } 1378 } 1379 1380 return (res); 1381 } 1382 1383 static int 1384 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1385 int rid, struct resource *res) 1386 { 1387 struct cbb_softc *sc = device_get_softc(brdev); 1388 int error; 1389 1390 if (rman_get_flags(res) & RF_ACTIVE) { 1391 error = bus_deactivate_resource(child, type, rid, res); 1392 if (error != 0) 1393 return (error); 1394 } 1395 cbb_remove_res(sc, res); 1396 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1397 type, rid, res)); 1398 } 1399 1400 /************************************************************************/ 1401 /* PC Card methods */ 1402 /************************************************************************/ 1403 1404 int 1405 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1406 uint32_t flags) 1407 { 1408 struct cbb_softc *sc = device_get_softc(brdev); 1409 struct resource *res; 1410 1411 if (type != SYS_RES_MEMORY) 1412 return (EINVAL); 1413 res = cbb_find_res(sc, type, rid); 1414 if (res == NULL) { 1415 device_printf(brdev, 1416 "set_res_flags: specified rid not found\n"); 1417 return (ENOENT); 1418 } 1419 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1420 } 1421 1422 int 1423 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1424 uint32_t cardaddr, uint32_t *deltap) 1425 { 1426 struct cbb_softc *sc = device_get_softc(brdev); 1427 struct resource *res; 1428 1429 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1430 if (res == NULL) { 1431 device_printf(brdev, 1432 "set_memory_offset: specified rid not found\n"); 1433 return (ENOENT); 1434 } 1435 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1436 } 1437 1438 /************************************************************************/ 1439 /* BUS Methods */ 1440 /************************************************************************/ 1441 1442 1443 int 1444 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1445 struct resource *r) 1446 { 1447 struct cbb_softc *sc = device_get_softc(brdev); 1448 1449 if (sc->flags & CBB_16BIT_CARD) 1450 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1451 else 1452 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1453 r)); 1454 } 1455 1456 int 1457 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1458 int rid, struct resource *r) 1459 { 1460 struct cbb_softc *sc = device_get_softc(brdev); 1461 1462 if (sc->flags & CBB_16BIT_CARD) 1463 return (cbb_pcic_deactivate_resource(brdev, child, type, 1464 rid, r)); 1465 else 1466 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1467 rid, r)); 1468 } 1469 1470 struct resource * 1471 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1472 u_long start, u_long end, u_long count, u_int flags) 1473 { 1474 struct cbb_softc *sc = device_get_softc(brdev); 1475 1476 if (sc->flags & CBB_16BIT_CARD) 1477 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1478 start, end, count, flags)); 1479 else 1480 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1481 start, end, count, flags)); 1482 } 1483 1484 int 1485 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1486 struct resource *r) 1487 { 1488 struct cbb_softc *sc = device_get_softc(brdev); 1489 1490 if (sc->flags & CBB_16BIT_CARD) 1491 return (cbb_pcic_release_resource(brdev, child, type, 1492 rid, r)); 1493 else 1494 return (cbb_cardbus_release_resource(brdev, child, type, 1495 rid, r)); 1496 } 1497 1498 int 1499 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1500 { 1501 struct cbb_softc *sc = device_get_softc(brdev); 1502 1503 switch (which) { 1504 case PCIB_IVAR_DOMAIN: 1505 *result = sc->domain; 1506 return (0); 1507 case PCIB_IVAR_BUS: 1508 *result = sc->secbus; 1509 return (0); 1510 } 1511 return (ENOENT); 1512 } 1513 1514 int 1515 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1516 { 1517 struct cbb_softc *sc = device_get_softc(brdev); 1518 1519 switch (which) { 1520 case PCIB_IVAR_DOMAIN: 1521 return (EINVAL); 1522 case PCIB_IVAR_BUS: 1523 sc->secbus = value; 1524 return (0); 1525 } 1526 return (ENOENT); 1527 } 1528 1529 int 1530 cbb_suspend(device_t self) 1531 { 1532 int error = 0; 1533 struct cbb_softc *sc = device_get_softc(self); 1534 1535 error = bus_generic_suspend(self); 1536 if (error != 0) 1537 return (error); 1538 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1539 sc->cardok = 0; /* Card is bogus now */ 1540 return (0); 1541 } 1542 1543 int 1544 cbb_resume(device_t self) 1545 { 1546 int error = 0; 1547 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1548 uint32_t tmp; 1549 1550 /* 1551 * Some BIOSes will not save the BARs for the pci chips, so we 1552 * must do it ourselves. If the BAR is reset to 0 for an I/O 1553 * device, it will read back as 0x1, so no explicit test for 1554 * memory devices are needed. 1555 * 1556 * Note: The PCI bus code should do this automatically for us on 1557 * suspend/resume, but until it does, we have to cope. 1558 */ 1559 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1560 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1561 rman_get_start(sc->base_res))); 1562 1563 sc->chipinit(sc); 1564 1565 /* reset interrupt -- Do we really need to do this? */ 1566 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1567 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1568 1569 /* CSC Interrupt: Card detect interrupt on */ 1570 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1571 1572 /* Signal the thread to wakeup. */ 1573 wakeup(&sc->intrhand); 1574 1575 error = bus_generic_resume(self); 1576 1577 return (error); 1578 } 1579 1580 int 1581 cbb_child_present(device_t self) 1582 { 1583 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1584 uint32_t sockstate; 1585 1586 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1587 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1588 } 1589