1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/lock.h> 88 #include <sys/malloc.h> 89 #include <sys/mutex.h> 90 #include <sys/proc.h> 91 #include <sys/rman.h> 92 #include <sys/sysctl.h> 93 #include <sys/systm.h> 94 #include <machine/bus.h> 95 #include <machine/resource.h> 96 97 #include <dev/pci/pcireg.h> 98 #include <dev/pci/pcivar.h> 99 #include <machine/clock.h> 100 101 #include <dev/pccard/pccardreg.h> 102 #include <dev/pccard/pccardvar.h> 103 104 #include <dev/exca/excareg.h> 105 #include <dev/exca/excavar.h> 106 107 #include <dev/pccbb/pccbbreg.h> 108 #include <dev/pccbb/pccbbvar.h> 109 110 #include "power_if.h" 111 #include "card_if.h" 112 #include "pcib_if.h" 113 114 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 115 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 116 117 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 118 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 119 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 120 pci_write_config(DEV, REG, ( \ 121 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 122 123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 124 125 #define CBB_START_MEM 0x88000000 126 #define CBB_START_32_IO 0x1000 127 #define CBB_START_16_IO 0x100 128 129 devclass_t cbb_devclass; 130 131 /* sysctl vars */ 132 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 133 134 /* There's no way to say TUNEABLE_LONG to get the right types */ 135 u_long cbb_start_mem = CBB_START_MEM; 136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 138 &cbb_start_mem, CBB_START_MEM, 139 "Starting address for memory allocations"); 140 141 u_long cbb_start_16_io = CBB_START_16_IO; 142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 144 &cbb_start_16_io, CBB_START_16_IO, 145 "Starting ioport for 16-bit cards"); 146 147 u_long cbb_start_32_io = CBB_START_32_IO; 148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 150 &cbb_start_32_io, CBB_START_32_IO, 151 "Starting ioport for 32-bit cards"); 152 153 int cbb_debug = 0; 154 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 155 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 156 "Verbose cardbus bridge debugging"); 157 158 static void cbb_insert(struct cbb_softc *sc); 159 static void cbb_removal(struct cbb_softc *sc); 160 static uint32_t cbb_detect_voltage(device_t brdev); 161 static void cbb_cardbus_reset(device_t brdev); 162 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 163 uint32_t end); 164 static int cbb_cardbus_mem_open(device_t brdev, int win, 165 uint32_t start, uint32_t end); 166 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 167 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 168 int type, int rid, struct resource *res); 169 static int cbb_cardbus_deactivate_resource(device_t brdev, 170 device_t child, int type, int rid, struct resource *res); 171 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 172 device_t child, int type, int *rid, u_long start, 173 u_long end, u_long count, u_int flags); 174 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 175 int type, int rid, struct resource *res); 176 static int cbb_cardbus_power_enable_socket(device_t brdev, 177 device_t child); 178 static void cbb_cardbus_power_disable_socket(device_t brdev, 179 device_t child); 180 static void cbb_func_intr(void *arg); 181 182 static void 183 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 184 { 185 struct cbb_reslist *rle; 186 187 SLIST_FOREACH(rle, &sc->rl, link) { 188 if (rle->res == res) { 189 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 190 free(rle, M_DEVBUF); 191 return; 192 } 193 } 194 } 195 196 static struct resource * 197 cbb_find_res(struct cbb_softc *sc, int type, int rid) 198 { 199 struct cbb_reslist *rle; 200 201 SLIST_FOREACH(rle, &sc->rl, link) 202 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 203 return (rle->res); 204 return (NULL); 205 } 206 207 static void 208 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 209 int rid) 210 { 211 struct cbb_reslist *rle; 212 213 /* 214 * Need to record allocated resource so we can iterate through 215 * it later. 216 */ 217 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 218 if (rle == NULL) 219 panic("cbb_cardbus_alloc_resource: can't record entry!"); 220 rle->res = res; 221 rle->type = type; 222 rle->rid = rid; 223 SLIST_INSERT_HEAD(&sc->rl, rle, link); 224 } 225 226 static void 227 cbb_destroy_res(struct cbb_softc *sc) 228 { 229 struct cbb_reslist *rle; 230 231 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 232 device_printf(sc->dev, "Danger Will Robinson: Resource " 233 "left allocated! This is a bug... " 234 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 235 rman_get_start(rle->res)); 236 SLIST_REMOVE_HEAD(&sc->rl, link); 237 free(rle, M_DEVBUF); 238 } 239 } 240 241 /* 242 * Disable function interrupts by telling the bridge to generate IRQ1 243 * interrupts. These interrupts aren't really generated by the chip, since 244 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 245 * initialization, so this helps to work around the problem. 246 * 247 * XXX We can't do this workaround for all chipsets, because this 248 * XXX causes interference with the keyboard because somechipsets will 249 * XXX actually signal IRQ1 over their serial interrupt connections to 250 * XXX the south bridge. Disable it it for now. 251 */ 252 void 253 cbb_disable_func_intr(struct cbb_softc *sc) 254 { 255 #if 0 256 uint8_t reg; 257 258 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 259 EXCA_INTR_IRQ_RESERVED1; 260 exca_putb(&sc->exca[0], EXCA_INTR, reg); 261 #endif 262 } 263 264 /* 265 * Enable function interrupts. We turn on function interrupts when the card 266 * requests an interrupt. The PCMCIA standard says that we should set 267 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 268 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 269 * cards. 270 */ 271 static void 272 cbb_enable_func_intr(struct cbb_softc *sc) 273 { 274 uint8_t reg; 275 276 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 277 EXCA_INTR_IRQ_NONE; 278 exca_putb(&sc->exca[0], EXCA_INTR, reg); 279 } 280 281 int 282 cbb_detach(device_t brdev) 283 { 284 struct cbb_softc *sc = device_get_softc(brdev); 285 int numdevs; 286 device_t *devlist; 287 int tmp; 288 int error; 289 290 device_get_children(brdev, &devlist, &numdevs); 291 292 error = 0; 293 for (tmp = 0; tmp < numdevs; tmp++) { 294 if (device_detach(devlist[tmp]) == 0) 295 device_delete_child(brdev, devlist[tmp]); 296 else 297 error++; 298 } 299 free(devlist, M_TEMP); 300 if (error > 0) 301 return (ENXIO); 302 303 /* Turn off the interrupts */ 304 cbb_set(sc, CBB_SOCKET_MASK, 0); 305 306 /* reset 16-bit pcmcia bus */ 307 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 308 309 /* turn off power */ 310 cbb_power(brdev, CARD_OFF); 311 312 /* Ack the interrupt */ 313 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 314 315 /* 316 * Wait for the thread to die. kthread_exit will do a wakeup 317 * on the event thread's struct thread * so that we know it is 318 * save to proceed. IF the thread is running, set the please 319 * die flag and wait for it to comply. Since the wakeup on 320 * the event thread happens only in kthread_exit, we don't 321 * need to loop here. 322 */ 323 mtx_lock(&sc->mtx); 324 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 325 sc->flags |= CBB_KTHREAD_DONE; 326 if (sc->flags & CBB_KTHREAD_RUNNING) { 327 cv_broadcast(&sc->cv); 328 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 329 } 330 mtx_unlock(&sc->mtx); 331 332 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 333 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 334 sc->base_res); 335 mtx_destroy(&sc->mtx); 336 cv_destroy(&sc->cv); 337 cv_destroy(&sc->powercv); 338 return (0); 339 } 340 341 int 342 cbb_shutdown(device_t brdev) 343 { 344 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev); 345 346 /* 347 * Place the cards in reset, turn off the interrupts and power 348 * down the socket. 349 */ 350 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 351 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 352 cbb_set(sc, CBB_SOCKET_MASK, 0); 353 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 354 cbb_power(brdev, CARD_OFF); 355 356 /* 357 * For paranoia, turn off all address decoding. Really not needed, 358 * it seems, but it can't hurt 359 */ 360 exca_putb(&sc->exca[0], EXCA_ADDRWIN_ENABLE, 0); 361 pci_write_config(brdev, CBBR_MEMBASE0, 0, 4); 362 pci_write_config(brdev, CBBR_MEMLIMIT0, 0, 4); 363 pci_write_config(brdev, CBBR_MEMBASE1, 0, 4); 364 pci_write_config(brdev, CBBR_MEMLIMIT1, 0, 4); 365 pci_write_config(brdev, CBBR_IOBASE0, 0, 4); 366 pci_write_config(brdev, CBBR_IOLIMIT0, 0, 4); 367 pci_write_config(brdev, CBBR_IOBASE1, 0, 4); 368 pci_write_config(brdev, CBBR_IOLIMIT1, 0, 4); 369 return (0); 370 } 371 372 int 373 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 374 int flags, driver_intr_t *intr, void *arg, void **cookiep) 375 { 376 struct cbb_intrhand *ih; 377 struct cbb_softc *sc = device_get_softc(dev); 378 int err; 379 380 /* 381 * Well, this is no longer strictly true. You can have multiple 382 * FAST ISRs, but can't mix fast and slow, so we have to assume 383 * least common denominator until the base system supports mixing 384 * and matching better. 385 */ 386 if ((flags & INTR_FAST) != 0) 387 return (EINVAL); 388 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 389 if (ih == NULL) 390 return (ENOMEM); 391 *cookiep = ih; 392 ih->intr = intr; 393 ih->arg = arg; 394 ih->sc = sc; 395 /* 396 * XXX need to turn on ISA interrupts, if we ever support them, but 397 * XXX for now that's all we need to do. 398 */ 399 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 400 cbb_func_intr, ih, &ih->cookie); 401 if (err != 0) { 402 free(ih, M_DEVBUF); 403 return (err); 404 } 405 cbb_enable_func_intr(sc); 406 sc->flags |= CBB_CARD_OK; 407 return 0; 408 } 409 410 int 411 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 412 void *cookie) 413 { 414 struct cbb_intrhand *ih; 415 int err; 416 417 /* XXX Need to do different things for ISA interrupts. */ 418 ih = (struct cbb_intrhand *) cookie; 419 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 420 ih->cookie); 421 if (err != 0) 422 return (err); 423 free(ih, M_DEVBUF); 424 return (0); 425 } 426 427 428 void 429 cbb_driver_added(device_t brdev, driver_t *driver) 430 { 431 struct cbb_softc *sc = device_get_softc(brdev); 432 device_t *devlist; 433 device_t dev; 434 int tmp; 435 int numdevs; 436 int wake = 0; 437 438 DEVICE_IDENTIFY(driver, brdev); 439 device_get_children(brdev, &devlist, &numdevs); 440 for (tmp = 0; tmp < numdevs; tmp++) { 441 dev = devlist[tmp]; 442 if (device_get_state(dev) == DS_NOTPRESENT && 443 device_probe_and_attach(dev) == 0) 444 wake++; 445 } 446 free(devlist, M_TEMP); 447 448 if (wake > 0) { 449 mtx_lock(&sc->mtx); 450 cv_signal(&sc->cv); 451 mtx_unlock(&sc->mtx); 452 } 453 } 454 455 void 456 cbb_child_detached(device_t brdev, device_t child) 457 { 458 struct cbb_softc *sc = device_get_softc(brdev); 459 460 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 461 device_printf(brdev, "Unknown child detached: %s\n", 462 device_get_nameunit(child)); 463 } 464 465 /************************************************************************/ 466 /* Kthreads */ 467 /************************************************************************/ 468 469 void 470 cbb_event_thread(void *arg) 471 { 472 struct cbb_softc *sc = arg; 473 uint32_t status; 474 int err; 475 int not_a_card = 0; 476 477 sc->flags |= CBB_KTHREAD_RUNNING; 478 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 479 /* 480 * We take out Giant here because we need it deep, 481 * down in the bowels of the vm system for mapping the 482 * memory we need to read the CIS. In addition, since 483 * we are adding/deleting devices from the dev tree, 484 * and that code isn't MP safe, we have to hold Giant. 485 */ 486 mtx_lock(&Giant); 487 status = cbb_get(sc, CBB_SOCKET_STATE); 488 DPRINTF(("Status is 0x%x\n", status)); 489 if (!CBB_CARD_PRESENT(status)) { 490 not_a_card = 0; /* We know card type */ 491 cbb_removal(sc); 492 } else if (status & CBB_STATE_NOT_A_CARD) { 493 /* 494 * Up to 20 times, try to rescan the card when we 495 * see NOT_A_CARD. 496 */ 497 if (not_a_card++ < 20) { 498 DEVPRINTF((sc->dev, 499 "Not a card bit set, rescanning\n")); 500 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 501 } else { 502 device_printf(sc->dev, 503 "Can't determine card type\n"); 504 } 505 } else { 506 not_a_card = 0; /* We know card type */ 507 cbb_insert(sc); 508 } 509 mtx_unlock(&Giant); 510 511 /* 512 * Wait until it has been 1s since the last time we 513 * get an interrupt. We handle the rest of the interrupt 514 * at the top of the loop. Although we clear the bit in the 515 * ISR, we signal sc->cv from the detach path after we've 516 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 517 * 1s sleep here. 518 * 519 * In our ISR, we turn off the card changed interrupt. Turn 520 * them back on here before we wait for them to happen. We 521 * turn them on/off so that we can tolerate a large latency 522 * between the time we signal cbb_event_thread and it gets 523 * a chance to run. 524 */ 525 mtx_lock(&sc->mtx); 526 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 527 cv_wait(&sc->cv, &sc->mtx); 528 err = 0; 529 while (err != EWOULDBLOCK && 530 (sc->flags & CBB_KTHREAD_DONE) == 0) 531 err = cv_timedwait(&sc->cv, &sc->mtx, 1 * hz); 532 mtx_unlock(&sc->mtx); 533 } 534 sc->flags &= ~CBB_KTHREAD_RUNNING; 535 kthread_exit(0); 536 } 537 538 /************************************************************************/ 539 /* Insert/removal */ 540 /************************************************************************/ 541 542 static void 543 cbb_insert(struct cbb_softc *sc) 544 { 545 uint32_t sockevent, sockstate; 546 547 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 548 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 549 550 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 551 sockevent, sockstate)); 552 553 if (sockstate & CBB_STATE_R2_CARD) { 554 if (sc->exca[0].pccarddev) { 555 sc->flags |= CBB_16BIT_CARD; 556 exca_insert(&sc->exca[0]); 557 } else { 558 device_printf(sc->dev, 559 "16-bit card inserted, but no pccard bus.\n"); 560 } 561 } else if (sockstate & CBB_STATE_CB_CARD) { 562 if (sc->cbdev != NULL) { 563 sc->flags &= ~CBB_16BIT_CARD; 564 CARD_ATTACH_CARD(sc->cbdev); 565 } else { 566 device_printf(sc->dev, 567 "CardBus card inserted, but no cardbus bus.\n"); 568 } 569 } else { 570 /* 571 * We should power the card down, and try again a couple of 572 * times if this happens. XXX 573 */ 574 device_printf(sc->dev, "Unsupported card type detected\n"); 575 } 576 } 577 578 static void 579 cbb_removal(struct cbb_softc *sc) 580 { 581 sc->flags &= ~CBB_CARD_OK; 582 if (sc->flags & CBB_16BIT_CARD) { 583 exca_removal(&sc->exca[0]); 584 } else { 585 if (sc->cbdev != NULL) 586 CARD_DETACH_CARD(sc->cbdev); 587 } 588 cbb_destroy_res(sc); 589 } 590 591 /************************************************************************/ 592 /* Interrupt Handler */ 593 /************************************************************************/ 594 595 /* 596 * Since we touch hardware in the worst case, we don't need to use atomic 597 * ops on the CARD_OK tests. They would save us a trip to the hardware 598 * if CARD_OK was recently cleared and the caches haven't updated yet. 599 * However, an atomic op costs between 100-200 CPU cycles. On a 3GHz 600 * machine, this is about 33-66ns, whereas a trip the the hardware 601 * is about that. On slower machines, the cost is even higher, so the 602 * trip to the hardware is cheaper and achieves the same ends that 603 * a fully locked operation would give us. 604 * 605 * This is a separate routine because we'd have to use locking and/or 606 * other synchronization in cbb_intr to do this there. That would be 607 * even more expensive. 608 * 609 * I need to investigate what this means for a SMP machine with multiple 610 * CPUs servicing the ISR when an eject happens. In the case of a dirty 611 * eject, CD glitches and we might read 'card present' from the hardware 612 * due to this jitter. If we assumed that cbb_intr() ran before 613 * cbb_func_intr(), we could just check the SOCKET_MASK register and if 614 * CD changes were clear there, then we'd know the card was gone. 615 */ 616 static void 617 cbb_func_intr(void *arg) 618 { 619 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 620 struct cbb_softc *sc = ih->sc; 621 622 /* 623 * Make sure that the card is really there. 624 */ 625 if ((sc->flags & CBB_CARD_OK) == 0) 626 return; 627 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 628 sc->flags &= ~CBB_CARD_OK; 629 return; 630 } 631 632 /* 633 * nb: don't have to check for giant or not, since that's done 634 * in the ISR dispatch 635 */ 636 (*ih->intr)(ih->arg); 637 } 638 639 void 640 cbb_intr(void *arg) 641 { 642 struct cbb_softc *sc = arg; 643 uint32_t sockevent; 644 645 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 646 if (sockevent != 0) { 647 /* ack the interrupt */ 648 cbb_set(sc, CBB_SOCKET_EVENT, sockevent); 649 650 /* 651 * If anything has happened to the socket, we assume that 652 * the card is no longer OK, and we shouldn't call its 653 * ISR. We set CARD_OK as soon as we've attached the 654 * card. This helps in a noisy eject, which happens 655 * all too often when users are ejecting their PC Cards. 656 * 657 * We use this method in preference to checking to see if 658 * the card is still there because the check suffers from 659 * a race condition in the bouncing case. Prior versions 660 * of the pccard software used a similar trick and achieved 661 * excellent results. 662 */ 663 if (sockevent & CBB_SOCKET_EVENT_CD) { 664 mtx_lock(&sc->mtx); 665 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 666 sc->flags &= ~CBB_CARD_OK; 667 cbb_disable_func_intr(sc); 668 cv_signal(&sc->cv); 669 mtx_unlock(&sc->mtx); 670 } 671 /* 672 * If we get a power interrupt, wakeup anybody that might 673 * be waiting for one. 674 */ 675 if (sockevent & CBB_SOCKET_EVENT_POWER) { 676 mtx_lock(&sc->mtx); 677 sc->powerintr++; 678 cv_signal(&sc->powercv); 679 mtx_unlock(&sc->mtx); 680 } 681 } 682 /* 683 * Some chips also require us to read the old ExCA registe for 684 * card status change when we route CSC vis PCI. This isn't supposed 685 * to be required, but it clears the interrupt state on some chipsets. 686 * Maybe there's a setting that would obviate its need. Maybe we 687 * should test the status bits and deal with them, but so far we've 688 * not found any machines that don't also give us the socket status 689 * indication above. 690 * 691 * We have to call this unconditionally because some bridges deliver 692 * the even independent of the CBB_SOCKET_EVENT_CD above. 693 */ 694 exca_getb(&sc->exca[0], EXCA_CSC); 695 } 696 697 /************************************************************************/ 698 /* Generic Power functions */ 699 /************************************************************************/ 700 701 static uint32_t 702 cbb_detect_voltage(device_t brdev) 703 { 704 struct cbb_softc *sc = device_get_softc(brdev); 705 uint32_t psr; 706 uint32_t vol = CARD_UKN_CARD; 707 708 psr = cbb_get(sc, CBB_SOCKET_STATE); 709 710 if (psr & CBB_STATE_5VCARD) 711 vol |= CARD_5V_CARD; 712 if (psr & CBB_STATE_3VCARD) 713 vol |= CARD_3V_CARD; 714 if (psr & CBB_STATE_XVCARD) 715 vol |= CARD_XV_CARD; 716 if (psr & CBB_STATE_YVCARD) 717 vol |= CARD_YV_CARD; 718 719 return (vol); 720 } 721 722 static uint8_t 723 cbb_o2micro_power_hack(struct cbb_softc *sc) 724 { 725 uint8_t reg; 726 727 /* 728 * Issue #2: INT# not qualified with IRQ Routing Bit. An 729 * unexpected PCI INT# may be generated during PC Card 730 * initialization even with the IRQ Routing Bit Set with some 731 * PC Cards. 732 * 733 * This is a two part issue. The first part is that some of 734 * our older controllers have an issue in which the slot's PCI 735 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 736 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 737 * is selected (ExCA register 03h bits 3:0, of the slot, are 738 * cleared) we will generate INT# if IREQ# is asserted. The 739 * second part is because some PC Cards prematurally assert 740 * IREQ# before the ExCA registers are fully programmed. This 741 * in turn asserts INT# because ExCA register 03h bits 3:0 742 * (ISA IRQ Select) are not yet programmed. 743 * 744 * The fix for this issue, which will work for any controller 745 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 746 * (select IRQ1), of the slot, before turning on slot power. 747 * Selecting IRQ1 will result in INT# NOT being asserted 748 * (because IRQ1 is selected), and IRQ1 won't be asserted 749 * because our controllers don't generate IRQ1. 750 * 751 * Other, non O2Micro controllers will generate irq 1 in some 752 * situations, so we can't do this hack for everybody. Reports of 753 * keyboard controller's interrupts being suppressed occurred when 754 * we did this. 755 */ 756 reg = exca_getb(&sc->exca[0], EXCA_INTR); 757 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 758 return (reg); 759 } 760 761 /* 762 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 763 * we don't have an interrupt storm on power on. This has the efect of 764 * disabling card status change interrupts for the duration of poweron. 765 */ 766 static void 767 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 768 { 769 exca_putb(&sc->exca[0], EXCA_INTR, reg); 770 } 771 772 int 773 cbb_power(device_t brdev, int volts) 774 { 775 uint32_t status, sock_ctrl, mask; 776 struct cbb_softc *sc = device_get_softc(brdev); 777 int cnt, sane; 778 int retval = 0; 779 int on = 0; 780 uint8_t reg = 0; 781 782 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 783 784 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 785 switch (volts & CARD_VCCMASK) { 786 case 5: 787 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 788 on++; 789 break; 790 case 3: 791 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 792 on++; 793 break; 794 case XV: 795 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 796 on++; 797 break; 798 case YV: 799 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 800 on++; 801 break; 802 case 0: 803 break; 804 default: 805 return (0); /* power NEVER changed */ 806 } 807 808 /* VPP == VCC */ 809 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 810 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 811 812 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 813 return (1); /* no change necessary */ 814 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 815 if (volts != 0 && sc->chipset == CB_O2MICRO) 816 reg = cbb_o2micro_power_hack(sc); 817 818 /* 819 * We have to mask the card change detect interrupt while we're 820 * messing with the power. It is allowed to bounce while we're 821 * messing with power as things settle down. In addition, we mask off 822 * the card's function interrupt by routing it via the ISA bus. This 823 * bit generally only affects 16bit cards. Some bridges allow one to 824 * set another bit to have it also affect 32bit cards. Since 32bit 825 * cards are required to be better behaved, we don't bother to get 826 * into those bridge specific features. 827 */ 828 mask = cbb_get(sc, CBB_SOCKET_MASK); 829 mask |= CBB_SOCKET_MASK_POWER; 830 mask &= ~CBB_SOCKET_MASK_CD; 831 cbb_set(sc, CBB_SOCKET_MASK, mask); 832 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 833 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 834 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 835 if (on) { 836 mtx_lock(&sc->mtx); 837 cnt = sc->powerintr; 838 sane = 200; 839 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 840 cnt == sc->powerintr && sane-- > 0) 841 cv_timedwait(&sc->powercv, &sc->mtx, hz / 10); 842 mtx_unlock(&sc->mtx); 843 if (sane <= 0) 844 device_printf(sc->dev, "power timeout, doom?\n"); 845 } 846 847 /* 848 * After the power is good, we can turn off the power interrupt. 849 * However, the PC Card standard says that we must delay turning the 850 * CD bit back on for a bit to allow for bouncyness on power down 851 * (recall that we don't wait above for a power down, since we don't 852 * get an interrupt for that). We're called either from the suspend 853 * code in which case we don't want to turn card change on again, or 854 * we're called from the card insertion code, in which case the cbb 855 * thread will turn it on for us before it waits to be woken by a 856 * change event. 857 */ 858 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 859 status = cbb_get(sc, CBB_SOCKET_STATE); 860 if (on) { 861 if ((status & CBB_STATE_POWER_CYCLE) == 0) 862 device_printf(sc->dev, "Power not on?\n"); 863 } 864 if (status & CBB_STATE_BAD_VCC_REQ) { 865 device_printf(sc->dev, "Bad Vcc requested\n"); 866 /* XXX Do we want to do something to mitigate things here? */ 867 goto done; 868 } 869 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 870 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 871 retval = 1; 872 done:; 873 if (volts != 0 && sc->chipset == CB_O2MICRO) 874 cbb_o2micro_power_hack2(sc, reg); 875 return (retval); 876 } 877 878 static int 879 cbb_current_voltage(device_t brdev) 880 { 881 struct cbb_softc *sc = device_get_softc(brdev); 882 uint32_t ctrl; 883 884 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 885 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 886 case CBB_SOCKET_CTRL_VCC_5V: 887 return CARD_5V_CARD; 888 case CBB_SOCKET_CTRL_VCC_3V: 889 return CARD_3V_CARD; 890 case CBB_SOCKET_CTRL_VCC_XV: 891 return CARD_XV_CARD; 892 case CBB_SOCKET_CTRL_VCC_YV: 893 return CARD_YV_CARD; 894 } 895 return 0; 896 } 897 898 /* 899 * detect the voltage for the card, and set it. Since the power 900 * used is the square of the voltage, lower voltages is a big win 901 * and what Windows does (and what Microsoft prefers). The MS paper 902 * also talks about preferring the CIS entry as well, but that has 903 * to be done elsewhere. We also optimize power sequencing here 904 * and don't change things if we're already powered up at a supported 905 * voltage. 906 * 907 * In addition, we power up with OE disabled. We'll set it later 908 * in the power up sequence. 909 */ 910 static int 911 cbb_do_power(device_t brdev) 912 { 913 struct cbb_softc *sc = device_get_softc(brdev); 914 uint32_t voltage, curpwr; 915 uint32_t status; 916 917 /* Don't enable OE (output enable) until power stable */ 918 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 919 920 voltage = cbb_detect_voltage(brdev); 921 curpwr = cbb_current_voltage(brdev); 922 status = cbb_get(sc, CBB_SOCKET_STATE); 923 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 924 return 0; 925 /* Prefer lowest voltage supported */ 926 cbb_power(brdev, CARD_OFF); 927 if (voltage & CARD_YV_CARD) 928 cbb_power(brdev, CARD_VCC(YV)); 929 else if (voltage & CARD_XV_CARD) 930 cbb_power(brdev, CARD_VCC(XV)); 931 else if (voltage & CARD_3V_CARD) 932 cbb_power(brdev, CARD_VCC(3)); 933 else if (voltage & CARD_5V_CARD) 934 cbb_power(brdev, CARD_VCC(5)); 935 else { 936 device_printf(brdev, "Unknown card voltage\n"); 937 return (ENXIO); 938 } 939 return (0); 940 } 941 942 /************************************************************************/ 943 /* CardBus power functions */ 944 /************************************************************************/ 945 946 static void 947 cbb_cardbus_reset(device_t brdev) 948 { 949 struct cbb_softc *sc = device_get_softc(brdev); 950 int delay; 951 952 /* 953 * 20ms is necessary for most bridges. For some reason, the Ricoh 954 * RF5C47x bridges need 400ms. 955 */ 956 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 957 958 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 959 960 tsleep(sc, PZERO, "cbbP3", hz * delay / 1000); 961 962 /* If a card exists, unreset it! */ 963 if (CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 964 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 965 &~CBBM_BRIDGECTRL_RESET, 2); 966 tsleep(sc, PZERO, "cbbP3", hz * delay / 1000); 967 } 968 } 969 970 static int 971 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 972 { 973 struct cbb_softc *sc = device_get_softc(brdev); 974 int err; 975 976 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 977 return (ENODEV); 978 979 err = cbb_do_power(brdev); 980 if (err) 981 return (err); 982 cbb_cardbus_reset(brdev); 983 return (0); 984 } 985 986 static void 987 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 988 { 989 cbb_power(brdev, CARD_OFF); 990 cbb_cardbus_reset(brdev); 991 } 992 993 /************************************************************************/ 994 /* CardBus Resource */ 995 /************************************************************************/ 996 997 static int 998 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 999 { 1000 int basereg; 1001 int limitreg; 1002 1003 if ((win < 0) || (win > 1)) { 1004 DEVPRINTF((brdev, 1005 "cbb_cardbus_io_open: window out of range %d\n", win)); 1006 return (EINVAL); 1007 } 1008 1009 basereg = win * 8 + CBBR_IOBASE0; 1010 limitreg = win * 8 + CBBR_IOLIMIT0; 1011 1012 pci_write_config(brdev, basereg, start, 4); 1013 pci_write_config(brdev, limitreg, end, 4); 1014 return (0); 1015 } 1016 1017 static int 1018 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1019 { 1020 int basereg; 1021 int limitreg; 1022 1023 if ((win < 0) || (win > 1)) { 1024 DEVPRINTF((brdev, 1025 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1026 return (EINVAL); 1027 } 1028 1029 basereg = win*8 + CBBR_MEMBASE0; 1030 limitreg = win*8 + CBBR_MEMLIMIT0; 1031 1032 pci_write_config(brdev, basereg, start, 4); 1033 pci_write_config(brdev, limitreg, end, 4); 1034 return (0); 1035 } 1036 1037 #define START_NONE 0xffffffff 1038 #define END_NONE 0 1039 1040 static void 1041 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1042 { 1043 uint32_t starts[2]; 1044 uint32_t ends[2]; 1045 struct cbb_reslist *rle; 1046 int align, i; 1047 uint32_t reg; 1048 1049 starts[0] = starts[1] = START_NONE; 1050 ends[0] = ends[1] = END_NONE; 1051 1052 if (type == SYS_RES_MEMORY) 1053 align = CBB_MEMALIGN; 1054 else if (type == SYS_RES_IOPORT) 1055 align = CBB_IOALIGN; 1056 else 1057 align = 1; 1058 1059 SLIST_FOREACH(rle, &sc->rl, link) { 1060 if (rle->type != type) 1061 continue; 1062 if (rle->res == NULL) 1063 continue; 1064 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1065 continue; 1066 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1067 i = 1; 1068 else 1069 i = 0; 1070 if (rman_get_start(rle->res) < starts[i]) 1071 starts[i] = rman_get_start(rle->res); 1072 if (rman_get_end(rle->res) > ends[i]) 1073 ends[i] = rman_get_end(rle->res); 1074 } 1075 for (i = 0; i < 2; i++) { 1076 if (starts[i] == START_NONE) 1077 continue; 1078 starts[i] &= ~(align - 1); 1079 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1080 } 1081 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1082 if (starts[0] < starts[1]) { 1083 if (ends[0] > starts[1]) { 1084 device_printf(sc->dev, "Overlapping ranges" 1085 " for prefetch and non-prefetch memory\n"); 1086 return; 1087 } 1088 } else { 1089 if (ends[1] > starts[0]) { 1090 device_printf(sc->dev, "Overlapping ranges" 1091 " for prefetch and non-prefetch memory\n"); 1092 return; 1093 } 1094 } 1095 } 1096 1097 if (type == SYS_RES_MEMORY) { 1098 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1099 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1100 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1101 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1102 CBBM_BRIDGECTRL_PREFETCH_1); 1103 if (starts[1] != START_NONE) 1104 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1105 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1106 if (bootverbose) { 1107 device_printf(sc->dev, "Opening memory:\n"); 1108 if (starts[0] != START_NONE) 1109 device_printf(sc->dev, "Normal: %#x-%#x\n", 1110 starts[0], ends[0]); 1111 if (starts[1] != START_NONE) 1112 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1113 starts[1], ends[1]); 1114 } 1115 } else if (type == SYS_RES_IOPORT) { 1116 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1117 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1118 if (bootverbose && starts[0] != START_NONE) 1119 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1120 starts[0], ends[0]); 1121 } 1122 } 1123 1124 static int 1125 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1126 int rid, struct resource *res) 1127 { 1128 int ret; 1129 1130 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1131 type, rid, res); 1132 if (ret != 0) 1133 return (ret); 1134 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1135 return (0); 1136 } 1137 1138 static int 1139 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1140 int rid, struct resource *res) 1141 { 1142 int ret; 1143 1144 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1145 type, rid, res); 1146 if (ret != 0) 1147 return (ret); 1148 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1149 return (0); 1150 } 1151 1152 static struct resource * 1153 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1154 int *rid, u_long start, u_long end, u_long count, u_int flags) 1155 { 1156 struct cbb_softc *sc = device_get_softc(brdev); 1157 int tmp; 1158 struct resource *res; 1159 u_long align; 1160 1161 switch (type) { 1162 case SYS_RES_IRQ: 1163 tmp = rman_get_start(sc->irq_res); 1164 if (start > tmp || end < tmp || count != 1) { 1165 device_printf(child, "requested interrupt %ld-%ld," 1166 "count = %ld not supported by cbb\n", 1167 start, end, count); 1168 return (NULL); 1169 } 1170 start = end = tmp; 1171 flags |= RF_SHAREABLE; 1172 break; 1173 case SYS_RES_IOPORT: 1174 if (start <= cbb_start_32_io) 1175 start = cbb_start_32_io; 1176 if (end < start) 1177 end = start; 1178 if (count > (1 << RF_ALIGNMENT(flags))) 1179 flags = (flags & ~RF_ALIGNMENT_MASK) | 1180 rman_make_alignment_flags(count); 1181 break; 1182 case SYS_RES_MEMORY: 1183 if (start <= cbb_start_mem) 1184 start = cbb_start_mem; 1185 if (end < start) 1186 end = start; 1187 if (count < CBB_MEMALIGN) 1188 align = CBB_MEMALIGN; 1189 else 1190 align = count; 1191 if (align > (1 << RF_ALIGNMENT(flags))) 1192 flags = (flags & ~RF_ALIGNMENT_MASK) | 1193 rman_make_alignment_flags(align); 1194 break; 1195 } 1196 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1197 start, end, count, flags & ~RF_ACTIVE); 1198 if (res == NULL) { 1199 printf("cbb alloc res fail\n"); 1200 return (NULL); 1201 } 1202 cbb_insert_res(sc, res, type, *rid); 1203 if (flags & RF_ACTIVE) 1204 if (bus_activate_resource(child, type, *rid, res) != 0) { 1205 bus_release_resource(child, type, *rid, res); 1206 return (NULL); 1207 } 1208 1209 return (res); 1210 } 1211 1212 static int 1213 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1214 int rid, struct resource *res) 1215 { 1216 struct cbb_softc *sc = device_get_softc(brdev); 1217 int error; 1218 1219 if (rman_get_flags(res) & RF_ACTIVE) { 1220 error = bus_deactivate_resource(child, type, rid, res); 1221 if (error != 0) 1222 return (error); 1223 } 1224 cbb_remove_res(sc, res); 1225 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1226 type, rid, res)); 1227 } 1228 1229 /************************************************************************/ 1230 /* PC Card Power Functions */ 1231 /************************************************************************/ 1232 1233 static int 1234 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1235 { 1236 struct cbb_softc *sc = device_get_softc(brdev); 1237 int err; 1238 1239 DPRINTF(("cbb_pcic_socket_enable:\n")); 1240 1241 /* power down/up the socket to reset */ 1242 err = cbb_do_power(brdev); 1243 if (err) 1244 return (err); 1245 exca_reset(&sc->exca[0], child); 1246 1247 return (0); 1248 } 1249 1250 static void 1251 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1252 { 1253 struct cbb_softc *sc = device_get_softc(brdev); 1254 1255 DPRINTF(("cbb_pcic_socket_disable\n")); 1256 1257 /* Turn off the card's interrupt and leave it in reset */ 1258 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1259 tsleep(sc, PZERO, "cbbP1", hz / 100); 1260 1261 /* power down the socket */ 1262 cbb_power(brdev, CARD_OFF); 1263 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1264 1265 /* wait 300ms until power fails (Tpf). */ 1266 tsleep(sc, PZERO, "cbbP1", hz * 300 / 1000); 1267 } 1268 1269 /************************************************************************/ 1270 /* POWER methods */ 1271 /************************************************************************/ 1272 1273 int 1274 cbb_power_enable_socket(device_t brdev, device_t child) 1275 { 1276 struct cbb_softc *sc = device_get_softc(brdev); 1277 1278 if (sc->flags & CBB_16BIT_CARD) 1279 return (cbb_pcic_power_enable_socket(brdev, child)); 1280 else 1281 return (cbb_cardbus_power_enable_socket(brdev, child)); 1282 } 1283 1284 void 1285 cbb_power_disable_socket(device_t brdev, device_t child) 1286 { 1287 struct cbb_softc *sc = device_get_softc(brdev); 1288 if (sc->flags & CBB_16BIT_CARD) 1289 cbb_pcic_power_disable_socket(brdev, child); 1290 else 1291 cbb_cardbus_power_disable_socket(brdev, child); 1292 } 1293 1294 static int 1295 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1296 struct resource *res) 1297 { 1298 struct cbb_softc *sc = device_get_softc(brdev); 1299 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1300 } 1301 1302 static int 1303 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1304 int rid, struct resource *res) 1305 { 1306 struct cbb_softc *sc = device_get_softc(brdev); 1307 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1308 } 1309 1310 static struct resource * 1311 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1312 u_long start, u_long end, u_long count, u_int flags) 1313 { 1314 struct resource *res = NULL; 1315 struct cbb_softc *sc = device_get_softc(brdev); 1316 int align; 1317 int tmp; 1318 1319 switch (type) { 1320 case SYS_RES_MEMORY: 1321 if (start < cbb_start_mem) 1322 start = cbb_start_mem; 1323 if (end < start) 1324 end = start; 1325 if (count < CBB_MEMALIGN) 1326 align = CBB_MEMALIGN; 1327 else 1328 align = count; 1329 if (align > (1 << RF_ALIGNMENT(flags))) 1330 flags = (flags & ~RF_ALIGNMENT_MASK) | 1331 rman_make_alignment_flags(align); 1332 break; 1333 case SYS_RES_IOPORT: 1334 if (start < cbb_start_16_io) 1335 start = cbb_start_16_io; 1336 if (end < start) 1337 end = start; 1338 break; 1339 case SYS_RES_IRQ: 1340 tmp = rman_get_start(sc->irq_res); 1341 if (start > tmp || end < tmp || count != 1) { 1342 device_printf(child, "requested interrupt %ld-%ld," 1343 "count = %ld not supported by cbb\n", 1344 start, end, count); 1345 return (NULL); 1346 } 1347 flags |= RF_SHAREABLE; 1348 start = end = rman_get_start(sc->irq_res); 1349 break; 1350 } 1351 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1352 start, end, count, flags & ~RF_ACTIVE); 1353 if (res == NULL) 1354 return (NULL); 1355 cbb_insert_res(sc, res, type, *rid); 1356 if (flags & RF_ACTIVE) { 1357 if (bus_activate_resource(child, type, *rid, res) != 0) { 1358 bus_release_resource(child, type, *rid, res); 1359 return (NULL); 1360 } 1361 } 1362 1363 return (res); 1364 } 1365 1366 static int 1367 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1368 int rid, struct resource *res) 1369 { 1370 struct cbb_softc *sc = device_get_softc(brdev); 1371 int error; 1372 1373 if (rman_get_flags(res) & RF_ACTIVE) { 1374 error = bus_deactivate_resource(child, type, rid, res); 1375 if (error != 0) 1376 return (error); 1377 } 1378 cbb_remove_res(sc, res); 1379 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1380 type, rid, res)); 1381 } 1382 1383 /************************************************************************/ 1384 /* PC Card methods */ 1385 /************************************************************************/ 1386 1387 int 1388 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1389 uint32_t flags) 1390 { 1391 struct cbb_softc *sc = device_get_softc(brdev); 1392 struct resource *res; 1393 1394 if (type != SYS_RES_MEMORY) 1395 return (EINVAL); 1396 res = cbb_find_res(sc, type, rid); 1397 if (res == NULL) { 1398 device_printf(brdev, 1399 "set_res_flags: specified rid not found\n"); 1400 return (ENOENT); 1401 } 1402 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1403 } 1404 1405 int 1406 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1407 uint32_t cardaddr, uint32_t *deltap) 1408 { 1409 struct cbb_softc *sc = device_get_softc(brdev); 1410 struct resource *res; 1411 1412 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1413 if (res == NULL) { 1414 device_printf(brdev, 1415 "set_memory_offset: specified rid not found\n"); 1416 return (ENOENT); 1417 } 1418 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1419 } 1420 1421 /************************************************************************/ 1422 /* BUS Methods */ 1423 /************************************************************************/ 1424 1425 1426 int 1427 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1428 struct resource *r) 1429 { 1430 struct cbb_softc *sc = device_get_softc(brdev); 1431 1432 if (sc->flags & CBB_16BIT_CARD) 1433 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1434 else 1435 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1436 r)); 1437 } 1438 1439 int 1440 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1441 int rid, struct resource *r) 1442 { 1443 struct cbb_softc *sc = device_get_softc(brdev); 1444 1445 if (sc->flags & CBB_16BIT_CARD) 1446 return (cbb_pcic_deactivate_resource(brdev, child, type, 1447 rid, r)); 1448 else 1449 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1450 rid, r)); 1451 } 1452 1453 struct resource * 1454 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1455 u_long start, u_long end, u_long count, u_int flags) 1456 { 1457 struct cbb_softc *sc = device_get_softc(brdev); 1458 1459 if (sc->flags & CBB_16BIT_CARD) 1460 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1461 start, end, count, flags)); 1462 else 1463 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1464 start, end, count, flags)); 1465 } 1466 1467 int 1468 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1469 struct resource *r) 1470 { 1471 struct cbb_softc *sc = device_get_softc(brdev); 1472 1473 if (sc->flags & CBB_16BIT_CARD) 1474 return (cbb_pcic_release_resource(brdev, child, type, 1475 rid, r)); 1476 else 1477 return (cbb_cardbus_release_resource(brdev, child, type, 1478 rid, r)); 1479 } 1480 1481 int 1482 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1483 { 1484 struct cbb_softc *sc = device_get_softc(brdev); 1485 1486 switch (which) { 1487 case PCIB_IVAR_BUS: 1488 *result = sc->secbus; 1489 return (0); 1490 } 1491 return (ENOENT); 1492 } 1493 1494 int 1495 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1496 { 1497 struct cbb_softc *sc = device_get_softc(brdev); 1498 1499 switch (which) { 1500 case PCIB_IVAR_BUS: 1501 sc->secbus = value; 1502 break; 1503 } 1504 return (ENOENT); 1505 } 1506 1507 /************************************************************************/ 1508 /* PCI compat methods */ 1509 /************************************************************************/ 1510 1511 int 1512 cbb_maxslots(device_t brdev) 1513 { 1514 return (0); 1515 } 1516 1517 uint32_t 1518 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width) 1519 { 1520 uint32_t rv; 1521 1522 /* 1523 * Pass through to the next ppb up the chain (i.e. our grandparent). 1524 */ 1525 rv = PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)), 1526 b, s, f, reg, width); 1527 return (rv); 1528 } 1529 1530 void 1531 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val, 1532 int width) 1533 { 1534 /* 1535 * Pass through to the next ppb up the chain (i.e. our grandparent). 1536 */ 1537 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)), 1538 b, s, f, reg, val, width); 1539 } 1540 1541 int 1542 cbb_suspend(device_t self) 1543 { 1544 int error = 0; 1545 struct cbb_softc *sc = device_get_softc(self); 1546 1547 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1548 bus_teardown_intr(self, sc->irq_res, sc->intrhand); 1549 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */ 1550 error = bus_generic_suspend(self); 1551 return (error); 1552 } 1553 1554 int 1555 cbb_resume(device_t self) 1556 { 1557 int error = 0; 1558 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1559 uint32_t tmp; 1560 1561 /* 1562 * Some BIOSes will not save the BARs for the pci chips, so we 1563 * must do it ourselves. If the BAR is reset to 0 for an I/O 1564 * device, it will read back as 0x1, so no explicit test for 1565 * memory devices are needed. 1566 * 1567 * Note: The PCI bus code should do this automatically for us on 1568 * suspend/resume, but until it does, we have to cope. 1569 */ 1570 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1571 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1572 rman_get_start(sc->base_res))); 1573 1574 sc->chipinit(sc); 1575 1576 /* reset interrupt -- Do we really need to do this? */ 1577 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1578 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1579 1580 /* re-establish the interrupt. */ 1581 if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_AV | INTR_MPSAFE, 1582 cbb_intr, sc, &sc->intrhand)) { 1583 device_printf(self, "couldn't re-establish interrupt"); 1584 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res); 1585 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE, 1586 sc->base_res); 1587 sc->irq_res = NULL; 1588 sc->base_res = NULL; 1589 return (ENOMEM); 1590 } 1591 1592 /* CSC Interrupt: Card detect interrupt on */ 1593 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1594 1595 /* Signal the thread to wakeup. */ 1596 mtx_lock(&sc->mtx); 1597 cv_signal(&sc->cv); 1598 mtx_unlock(&sc->mtx); 1599 1600 error = bus_generic_resume(self); 1601 1602 return (error); 1603 } 1604 1605 int 1606 cbb_child_present(device_t self) 1607 { 1608 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1609 uint32_t sockstate; 1610 1611 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1612 return (CBB_CARD_PRESENT(sockstate) && 1613 (sc->flags & CBB_CARD_OK) == CBB_CARD_OK); 1614 } 1615