1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/lock.h> 88 #include <sys/malloc.h> 89 #include <sys/mutex.h> 90 #include <sys/proc.h> 91 #include <sys/rman.h> 92 #include <sys/sysctl.h> 93 #include <sys/systm.h> 94 #include <machine/bus.h> 95 #include <machine/resource.h> 96 97 #include <dev/pci/pcireg.h> 98 #include <dev/pci/pcivar.h> 99 100 #include <dev/pccard/pccardreg.h> 101 #include <dev/pccard/pccardvar.h> 102 103 #include <dev/exca/excareg.h> 104 #include <dev/exca/excavar.h> 105 106 #include <dev/pccbb/pccbbreg.h> 107 #include <dev/pccbb/pccbbvar.h> 108 109 #include "power_if.h" 110 #include "card_if.h" 111 #include "pcib_if.h" 112 113 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 114 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 115 116 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 117 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 118 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 119 pci_write_config(DEV, REG, ( \ 120 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 121 122 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 123 124 #define CBB_START_MEM 0x88000000 125 #define CBB_START_32_IO 0x1000 126 #define CBB_START_16_IO 0x100 127 128 devclass_t cbb_devclass; 129 130 /* sysctl vars */ 131 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 132 133 /* There's no way to say TUNEABLE_LONG to get the right types */ 134 u_long cbb_start_mem = CBB_START_MEM; 135 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 136 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 137 &cbb_start_mem, CBB_START_MEM, 138 "Starting address for memory allocations"); 139 140 u_long cbb_start_16_io = CBB_START_16_IO; 141 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 142 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 143 &cbb_start_16_io, CBB_START_16_IO, 144 "Starting ioport for 16-bit cards"); 145 146 u_long cbb_start_32_io = CBB_START_32_IO; 147 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 148 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 149 &cbb_start_32_io, CBB_START_32_IO, 150 "Starting ioport for 32-bit cards"); 151 152 int cbb_debug = 0; 153 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 154 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 155 "Verbose cardbus bridge debugging"); 156 157 static void cbb_insert(struct cbb_softc *sc); 158 static void cbb_removal(struct cbb_softc *sc); 159 static uint32_t cbb_detect_voltage(device_t brdev); 160 static void cbb_cardbus_reset(device_t brdev); 161 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 162 uint32_t end); 163 static int cbb_cardbus_mem_open(device_t brdev, int win, 164 uint32_t start, uint32_t end); 165 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 166 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 167 int type, int rid, struct resource *res); 168 static int cbb_cardbus_deactivate_resource(device_t brdev, 169 device_t child, int type, int rid, struct resource *res); 170 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 171 device_t child, int type, int *rid, u_long start, 172 u_long end, u_long count, u_int flags); 173 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 174 int type, int rid, struct resource *res); 175 static int cbb_cardbus_power_enable_socket(device_t brdev, 176 device_t child); 177 static void cbb_cardbus_power_disable_socket(device_t brdev, 178 device_t child); 179 static void cbb_func_intr(void *arg); 180 181 static void 182 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 183 { 184 struct cbb_reslist *rle; 185 186 SLIST_FOREACH(rle, &sc->rl, link) { 187 if (rle->res == res) { 188 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 189 free(rle, M_DEVBUF); 190 return; 191 } 192 } 193 } 194 195 static struct resource * 196 cbb_find_res(struct cbb_softc *sc, int type, int rid) 197 { 198 struct cbb_reslist *rle; 199 200 SLIST_FOREACH(rle, &sc->rl, link) 201 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 202 return (rle->res); 203 return (NULL); 204 } 205 206 static void 207 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 208 int rid) 209 { 210 struct cbb_reslist *rle; 211 212 /* 213 * Need to record allocated resource so we can iterate through 214 * it later. 215 */ 216 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 217 if (rle == NULL) 218 panic("cbb_cardbus_alloc_resource: can't record entry!"); 219 rle->res = res; 220 rle->type = type; 221 rle->rid = rid; 222 SLIST_INSERT_HEAD(&sc->rl, rle, link); 223 } 224 225 static void 226 cbb_destroy_res(struct cbb_softc *sc) 227 { 228 struct cbb_reslist *rle; 229 230 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 231 device_printf(sc->dev, "Danger Will Robinson: Resource " 232 "left allocated! This is a bug... " 233 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 234 rman_get_start(rle->res)); 235 SLIST_REMOVE_HEAD(&sc->rl, link); 236 free(rle, M_DEVBUF); 237 } 238 } 239 240 /* 241 * Disable function interrupts by telling the bridge to generate IRQ1 242 * interrupts. These interrupts aren't really generated by the chip, since 243 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 244 * initialization, so this helps to work around the problem. 245 * 246 * XXX We can't do this workaround for all chipsets, because this 247 * XXX causes interference with the keyboard because somechipsets will 248 * XXX actually signal IRQ1 over their serial interrupt connections to 249 * XXX the south bridge. Disable it it for now. 250 */ 251 void 252 cbb_disable_func_intr(struct cbb_softc *sc) 253 { 254 #if 0 255 uint8_t reg; 256 257 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 258 EXCA_INTR_IRQ_RESERVED1; 259 exca_putb(&sc->exca[0], EXCA_INTR, reg); 260 #endif 261 } 262 263 /* 264 * Enable function interrupts. We turn on function interrupts when the card 265 * requests an interrupt. The PCMCIA standard says that we should set 266 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 267 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 268 * cards. 269 */ 270 static void 271 cbb_enable_func_intr(struct cbb_softc *sc) 272 { 273 uint8_t reg; 274 275 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 276 EXCA_INTR_IRQ_NONE; 277 exca_putb(&sc->exca[0], EXCA_INTR, reg); 278 } 279 280 int 281 cbb_detach(device_t brdev) 282 { 283 struct cbb_softc *sc = device_get_softc(brdev); 284 device_t *devlist; 285 int tmp, tries, error, numdevs; 286 287 /* 288 * Before we delete the children (which we have to do because 289 * attach doesn't check for children busses correctly), we have 290 * to detach the children. Even if we didn't need to delete the 291 * children, we have to detach them. 292 */ 293 error = bus_generic_detach(brdev); 294 if (error != 0) 295 return (error); 296 297 /* 298 * Since the attach routine doesn't search for children before it 299 * attaches them to this device, we must delete them here in order 300 * for the kldload/unload case to work. If we failed to do that, then 301 * we'd get duplicate devices when cbb.ko was reloaded. 302 */ 303 tries = 10; 304 do { 305 error = device_get_children(brdev, &devlist, &numdevs); 306 if (error == 0) 307 break; 308 /* 309 * Try hard to cope with low memory. 310 */ 311 if (error == ENOMEM) { 312 tsleep(sc, PZERO, "cbbnomem", 1); 313 continue; 314 } 315 } while (tries-- > 0); 316 for (tmp = 0; tmp < numdevs; tmp++) 317 device_delete_child(brdev, devlist[tmp]); 318 free(devlist, M_TEMP); 319 320 /* Turn off the interrupts */ 321 cbb_set(sc, CBB_SOCKET_MASK, 0); 322 323 /* reset 16-bit pcmcia bus */ 324 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 325 326 /* turn off power */ 327 cbb_power(brdev, CARD_OFF); 328 329 /* Ack the interrupt */ 330 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 331 332 /* 333 * Wait for the thread to die. kthread_exit will do a wakeup 334 * on the event thread's struct thread * so that we know it is 335 * save to proceed. IF the thread is running, set the please 336 * die flag and wait for it to comply. Since the wakeup on 337 * the event thread happens only in kthread_exit, we don't 338 * need to loop here. 339 */ 340 mtx_lock(&sc->mtx); 341 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 342 sc->flags |= CBB_KTHREAD_DONE; 343 while (sc->flags & CBB_KTHREAD_RUNNING) { 344 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 345 cv_broadcast(&sc->cv); 346 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 347 } 348 mtx_unlock(&sc->mtx); 349 350 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 351 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 352 sc->base_res); 353 mtx_destroy(&sc->mtx); 354 cv_destroy(&sc->cv); 355 cv_destroy(&sc->powercv); 356 return (0); 357 } 358 359 int 360 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_intr_t *intr, void *arg, void **cookiep) 362 { 363 struct cbb_intrhand *ih; 364 struct cbb_softc *sc = device_get_softc(dev); 365 int err; 366 367 /* 368 * Well, this is no longer strictly true. You can have multiple 369 * FAST ISRs, but can't mix fast and slow, so we have to assume 370 * least common denominator until the base system supports mixing 371 * and matching better. 372 */ 373 if ((flags & INTR_FAST) != 0) 374 return (EINVAL); 375 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 376 if (ih == NULL) 377 return (ENOMEM); 378 *cookiep = ih; 379 ih->intr = intr; 380 ih->arg = arg; 381 ih->sc = sc; 382 /* 383 * XXX need to turn on ISA interrupts, if we ever support them, but 384 * XXX for now that's all we need to do. 385 */ 386 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 387 cbb_func_intr, ih, &ih->cookie); 388 if (err != 0) { 389 free(ih, M_DEVBUF); 390 return (err); 391 } 392 cbb_enable_func_intr(sc); 393 sc->flags |= CBB_CARD_OK; 394 return 0; 395 } 396 397 int 398 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 399 void *cookie) 400 { 401 struct cbb_intrhand *ih; 402 int err; 403 404 /* XXX Need to do different things for ISA interrupts. */ 405 ih = (struct cbb_intrhand *) cookie; 406 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 407 ih->cookie); 408 if (err != 0) 409 return (err); 410 free(ih, M_DEVBUF); 411 return (0); 412 } 413 414 415 void 416 cbb_driver_added(device_t brdev, driver_t *driver) 417 { 418 struct cbb_softc *sc = device_get_softc(brdev); 419 device_t *devlist; 420 device_t dev; 421 int tmp; 422 int numdevs; 423 int wake = 0; 424 425 DEVICE_IDENTIFY(driver, brdev); 426 tmp = device_get_children(brdev, &devlist, &numdevs); 427 if (tmp != 0) { 428 device_printf(brdev, "Cannot get children list, no reprobe\n"); 429 return; 430 } 431 for (tmp = 0; tmp < numdevs; tmp++) { 432 dev = devlist[tmp]; 433 if (device_get_state(dev) == DS_NOTPRESENT && 434 device_probe_and_attach(dev) == 0) 435 wake++; 436 } 437 free(devlist, M_TEMP); 438 439 if (wake > 0) { 440 mtx_lock(&sc->mtx); 441 cv_signal(&sc->cv); 442 mtx_unlock(&sc->mtx); 443 } 444 } 445 446 void 447 cbb_child_detached(device_t brdev, device_t child) 448 { 449 struct cbb_softc *sc = device_get_softc(brdev); 450 451 /* I'm not sure we even need this */ 452 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 453 device_printf(brdev, "Unknown child detached: %s\n", 454 device_get_nameunit(child)); 455 } 456 457 /************************************************************************/ 458 /* Kthreads */ 459 /************************************************************************/ 460 461 void 462 cbb_event_thread(void *arg) 463 { 464 struct cbb_softc *sc = arg; 465 uint32_t status; 466 int err; 467 int not_a_card = 0; 468 469 mtx_lock(&sc->mtx); 470 sc->flags |= CBB_KTHREAD_RUNNING; 471 mtx_unlock(&sc->mtx); 472 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 473 /* 474 * We take out Giant here because we need it deep, 475 * down in the bowels of the vm system for mapping the 476 * memory we need to read the CIS. In addition, since 477 * we are adding/deleting devices from the dev tree, 478 * and that code isn't MP safe, we have to hold Giant. 479 */ 480 mtx_lock(&Giant); 481 status = cbb_get(sc, CBB_SOCKET_STATE); 482 DPRINTF(("Status is 0x%x\n", status)); 483 if (!CBB_CARD_PRESENT(status)) { 484 not_a_card = 0; /* We know card type */ 485 cbb_removal(sc); 486 } else if (status & CBB_STATE_NOT_A_CARD) { 487 /* 488 * Up to 20 times, try to rescan the card when we 489 * see NOT_A_CARD. 490 */ 491 if (not_a_card++ < 20) { 492 DEVPRINTF((sc->dev, 493 "Not a card bit set, rescanning\n")); 494 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 495 } else { 496 device_printf(sc->dev, 497 "Can't determine card type\n"); 498 } 499 } else { 500 not_a_card = 0; /* We know card type */ 501 cbb_insert(sc); 502 } 503 mtx_unlock(&Giant); 504 505 /* 506 * Wait until it has been 1s since the last time we 507 * get an interrupt. We handle the rest of the interrupt 508 * at the top of the loop. Although we clear the bit in the 509 * ISR, we signal sc->cv from the detach path after we've 510 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 511 * 1s sleep here. 512 * 513 * In our ISR, we turn off the card changed interrupt. Turn 514 * them back on here before we wait for them to happen. We 515 * turn them on/off so that we can tolerate a large latency 516 * between the time we signal cbb_event_thread and it gets 517 * a chance to run. 518 */ 519 mtx_lock(&sc->mtx); 520 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 521 cv_wait(&sc->cv, &sc->mtx); 522 err = 0; 523 while (err != EWOULDBLOCK && 524 (sc->flags & CBB_KTHREAD_DONE) == 0) 525 err = cv_timedwait(&sc->cv, &sc->mtx, hz / 4); 526 mtx_unlock(&sc->mtx); 527 } 528 DEVPRINTF((sc->dev, "Thread terminating\n")); 529 mtx_lock(&sc->mtx); 530 sc->flags &= ~CBB_KTHREAD_RUNNING; 531 mtx_unlock(&sc->mtx); 532 kthread_exit(0); 533 } 534 535 /************************************************************************/ 536 /* Insert/removal */ 537 /************************************************************************/ 538 539 static void 540 cbb_insert(struct cbb_softc *sc) 541 { 542 uint32_t sockevent, sockstate; 543 544 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 545 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 546 547 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 548 sockevent, sockstate)); 549 550 if (sockstate & CBB_STATE_R2_CARD) { 551 if (device_is_attached(sc->exca[0].pccarddev)) { 552 sc->flags |= CBB_16BIT_CARD; 553 exca_insert(&sc->exca[0]); 554 } else { 555 device_printf(sc->dev, 556 "16-bit card inserted, but no pccard bus.\n"); 557 } 558 } else if (sockstate & CBB_STATE_CB_CARD) { 559 if (device_is_attached(sc->cbdev)) { 560 sc->flags &= ~CBB_16BIT_CARD; 561 CARD_ATTACH_CARD(sc->cbdev); 562 } else { 563 device_printf(sc->dev, 564 "CardBus card inserted, but no cardbus bus.\n"); 565 } 566 } else { 567 /* 568 * We should power the card down, and try again a couple of 569 * times if this happens. XXX 570 */ 571 device_printf(sc->dev, "Unsupported card type detected\n"); 572 } 573 } 574 575 static void 576 cbb_removal(struct cbb_softc *sc) 577 { 578 sc->flags &= ~CBB_CARD_OK; 579 if (sc->flags & CBB_16BIT_CARD) { 580 exca_removal(&sc->exca[0]); 581 } else { 582 if (device_is_attached(sc->cbdev)) 583 CARD_DETACH_CARD(sc->cbdev); 584 } 585 cbb_destroy_res(sc); 586 } 587 588 /************************************************************************/ 589 /* Interrupt Handler */ 590 /************************************************************************/ 591 592 /* 593 * Since we touch hardware in the worst case, we don't need to use atomic 594 * ops on the CARD_OK tests. They would save us a trip to the hardware 595 * if CARD_OK was recently cleared and the caches haven't updated yet. 596 * However, an atomic op costs between 100-200 CPU cycles. On a 3GHz 597 * machine, this is about 33-66ns, whereas a trip the the hardware 598 * is about that. On slower machines, the cost is even higher, so the 599 * trip to the hardware is cheaper and achieves the same ends that 600 * a fully locked operation would give us. 601 * 602 * This is a separate routine because we'd have to use locking and/or 603 * other synchronization in cbb_intr to do this there. That would be 604 * even more expensive. 605 * 606 * I need to investigate what this means for a SMP machine with multiple 607 * CPUs servicing the ISR when an eject happens. In the case of a dirty 608 * eject, CD glitches and we might read 'card present' from the hardware 609 * due to this jitter. If we assumed that cbb_intr() ran before 610 * cbb_func_intr(), we could just check the SOCKET_MASK register and if 611 * CD changes were clear there, then we'd know the card was gone. 612 */ 613 static void 614 cbb_func_intr(void *arg) 615 { 616 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 617 struct cbb_softc *sc = ih->sc; 618 619 /* 620 * Make sure that the card is really there. 621 */ 622 if ((sc->flags & CBB_CARD_OK) == 0) 623 return; 624 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 625 sc->flags &= ~CBB_CARD_OK; 626 return; 627 } 628 629 /* 630 * nb: don't have to check for giant or not, since that's done 631 * in the ISR dispatch 632 */ 633 (*ih->intr)(ih->arg); 634 } 635 636 /************************************************************************/ 637 /* Generic Power functions */ 638 /************************************************************************/ 639 640 static uint32_t 641 cbb_detect_voltage(device_t brdev) 642 { 643 struct cbb_softc *sc = device_get_softc(brdev); 644 uint32_t psr; 645 uint32_t vol = CARD_UKN_CARD; 646 647 psr = cbb_get(sc, CBB_SOCKET_STATE); 648 649 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 650 vol |= CARD_5V_CARD; 651 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 652 vol |= CARD_3V_CARD; 653 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 654 vol |= CARD_XV_CARD; 655 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 656 vol |= CARD_YV_CARD; 657 658 return (vol); 659 } 660 661 static uint8_t 662 cbb_o2micro_power_hack(struct cbb_softc *sc) 663 { 664 uint8_t reg; 665 666 /* 667 * Issue #2: INT# not qualified with IRQ Routing Bit. An 668 * unexpected PCI INT# may be generated during PC Card 669 * initialization even with the IRQ Routing Bit Set with some 670 * PC Cards. 671 * 672 * This is a two part issue. The first part is that some of 673 * our older controllers have an issue in which the slot's PCI 674 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 675 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 676 * is selected (ExCA register 03h bits 3:0, of the slot, are 677 * cleared) we will generate INT# if IREQ# is asserted. The 678 * second part is because some PC Cards prematurally assert 679 * IREQ# before the ExCA registers are fully programmed. This 680 * in turn asserts INT# because ExCA register 03h bits 3:0 681 * (ISA IRQ Select) are not yet programmed. 682 * 683 * The fix for this issue, which will work for any controller 684 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 685 * (select IRQ1), of the slot, before turning on slot power. 686 * Selecting IRQ1 will result in INT# NOT being asserted 687 * (because IRQ1 is selected), and IRQ1 won't be asserted 688 * because our controllers don't generate IRQ1. 689 * 690 * Other, non O2Micro controllers will generate irq 1 in some 691 * situations, so we can't do this hack for everybody. Reports of 692 * keyboard controller's interrupts being suppressed occurred when 693 * we did this. 694 */ 695 reg = exca_getb(&sc->exca[0], EXCA_INTR); 696 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 697 return (reg); 698 } 699 700 /* 701 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 702 * we don't have an interrupt storm on power on. This has the efect of 703 * disabling card status change interrupts for the duration of poweron. 704 */ 705 static void 706 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 707 { 708 exca_putb(&sc->exca[0], EXCA_INTR, reg); 709 } 710 711 int 712 cbb_power(device_t brdev, int volts) 713 { 714 uint32_t status, sock_ctrl, reg_ctrl, mask; 715 struct cbb_softc *sc = device_get_softc(brdev); 716 int cnt, sane; 717 int retval = 0; 718 int on = 0; 719 uint8_t reg = 0; 720 721 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 722 723 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 724 switch (volts & CARD_VCCMASK) { 725 case 5: 726 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 727 on++; 728 break; 729 case 3: 730 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 731 on++; 732 break; 733 case XV: 734 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 735 on++; 736 break; 737 case YV: 738 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 739 on++; 740 break; 741 case 0: 742 break; 743 default: 744 return (0); /* power NEVER changed */ 745 } 746 747 /* VPP == VCC */ 748 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 749 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 750 751 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 752 return (1); /* no change necessary */ 753 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 754 if (volts != 0 && sc->chipset == CB_O2MICRO) 755 reg = cbb_o2micro_power_hack(sc); 756 757 /* 758 * We have to mask the card change detect interrupt while 759 * we're messing with the power. It is allowed to bounce 760 * while we're messing with power as things settle down. In 761 * addition, we mask off the card's function interrupt by 762 * routing it via the ISA bus. This bit generally only 763 * affects 16-bit cards. Some bridges allow one to set 764 * another bit to have it also affect 32-bit cards. Since 765 * 32-bit cards are required to be better behaved, we don't 766 * bother to get into those bridge specific features. 767 */ 768 mask = cbb_get(sc, CBB_SOCKET_MASK); 769 mask |= CBB_SOCKET_MASK_POWER; 770 mask &= ~CBB_SOCKET_MASK_CD; 771 cbb_set(sc, CBB_SOCKET_MASK, mask); 772 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 773 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 774 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 775 if (on) { 776 mtx_lock(&sc->mtx); 777 cnt = sc->powerintr; 778 /* 779 * We have a shortish timeout of 500ms here. Some 780 * bridges do not generate a POWER_CYCLE event for 781 * 16-bit cards. In those cases, we have to cope the 782 * best we can, and having only a short delay is 783 * better than the alternatives. 784 */ 785 sane = 10; 786 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 787 cnt == sc->powerintr && sane-- > 0) 788 cv_timedwait(&sc->powercv, &sc->mtx, hz / 20); 789 mtx_unlock(&sc->mtx); 790 /* 791 * The TOPIC95B requires a little bit extra time to get 792 * its act together, so delay for an additional 100ms. Also 793 * as documented below, it doesn't seem to set the POWER_CYCLE 794 * bit, so don't whine if it never came on. 795 */ 796 if (sc->chipset == CB_TOPIC95) { 797 tsleep(sc, PZERO, "cbb95B", hz / 10); 798 } else if (sane <= 0) { 799 device_printf(sc->dev, "power timeout, doom?\n"); 800 } 801 } 802 803 /* 804 * After the power is good, we can turn off the power interrupt. 805 * However, the PC Card standard says that we must delay turning the 806 * CD bit back on for a bit to allow for bouncyness on power down 807 * (recall that we don't wait above for a power down, since we don't 808 * get an interrupt for that). We're called either from the suspend 809 * code in which case we don't want to turn card change on again, or 810 * we're called from the card insertion code, in which case the cbb 811 * thread will turn it on for us before it waits to be woken by a 812 * change event. 813 * 814 * NB: Topic95B doesn't set the power cycle bit. we assume that 815 * both it and the TOPIC95 behave the same. 816 */ 817 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 818 status = cbb_get(sc, CBB_SOCKET_STATE); 819 if (on && sc->chipset != CB_TOPIC95) { 820 if ((status & CBB_STATE_POWER_CYCLE) == 0) 821 device_printf(sc->dev, "Power not on?\n"); 822 } 823 if (status & CBB_STATE_BAD_VCC_REQ) { 824 device_printf(sc->dev, "Bad Vcc requested\n"); 825 /* XXX Do we want to do something to mitigate things here? */ 826 goto done; 827 } 828 if (sc->chipset == CB_TOPIC97) { 829 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 830 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 831 if (on) 832 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 833 else 834 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 835 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 836 } 837 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 838 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 839 retval = 1; 840 done:; 841 if (volts != 0 && sc->chipset == CB_O2MICRO) 842 cbb_o2micro_power_hack2(sc, reg); 843 return (retval); 844 } 845 846 static int 847 cbb_current_voltage(device_t brdev) 848 { 849 struct cbb_softc *sc = device_get_softc(brdev); 850 uint32_t ctrl; 851 852 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 853 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 854 case CBB_SOCKET_CTRL_VCC_5V: 855 return CARD_5V_CARD; 856 case CBB_SOCKET_CTRL_VCC_3V: 857 return CARD_3V_CARD; 858 case CBB_SOCKET_CTRL_VCC_XV: 859 return CARD_XV_CARD; 860 case CBB_SOCKET_CTRL_VCC_YV: 861 return CARD_YV_CARD; 862 } 863 return 0; 864 } 865 866 /* 867 * detect the voltage for the card, and set it. Since the power 868 * used is the square of the voltage, lower voltages is a big win 869 * and what Windows does (and what Microsoft prefers). The MS paper 870 * also talks about preferring the CIS entry as well, but that has 871 * to be done elsewhere. We also optimize power sequencing here 872 * and don't change things if we're already powered up at a supported 873 * voltage. 874 * 875 * In addition, we power up with OE disabled. We'll set it later 876 * in the power up sequence. 877 */ 878 static int 879 cbb_do_power(device_t brdev) 880 { 881 struct cbb_softc *sc = device_get_softc(brdev); 882 uint32_t voltage, curpwr; 883 uint32_t status; 884 885 /* Don't enable OE (output enable) until power stable */ 886 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 887 888 voltage = cbb_detect_voltage(brdev); 889 curpwr = cbb_current_voltage(brdev); 890 status = cbb_get(sc, CBB_SOCKET_STATE); 891 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 892 return 0; 893 /* Prefer lowest voltage supported */ 894 cbb_power(brdev, CARD_OFF); 895 if (voltage & CARD_YV_CARD) 896 cbb_power(brdev, CARD_VCC(YV)); 897 else if (voltage & CARD_XV_CARD) 898 cbb_power(brdev, CARD_VCC(XV)); 899 else if (voltage & CARD_3V_CARD) 900 cbb_power(brdev, CARD_VCC(3)); 901 else if (voltage & CARD_5V_CARD) 902 cbb_power(brdev, CARD_VCC(5)); 903 else { 904 device_printf(brdev, "Unknown card voltage\n"); 905 return (ENXIO); 906 } 907 return (0); 908 } 909 910 /************************************************************************/ 911 /* CardBus power functions */ 912 /************************************************************************/ 913 914 static void 915 cbb_cardbus_reset(device_t brdev) 916 { 917 struct cbb_softc *sc = device_get_softc(brdev); 918 int delay; 919 920 /* 921 * 20ms is necessary for most bridges. For some reason, the Ricoh 922 * RF5C47x bridges need 400ms. 923 */ 924 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 925 926 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 927 928 tsleep(sc, PZERO, "cbbP3", hz * delay / 1000); 929 930 /* If a card exists, unreset it! */ 931 if (CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 932 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 933 &~CBBM_BRIDGECTRL_RESET, 2); 934 tsleep(sc, PZERO, "cbbP4", hz * delay / 1000); 935 } 936 } 937 938 static int 939 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 940 { 941 struct cbb_softc *sc = device_get_softc(brdev); 942 int err; 943 944 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 945 return (ENODEV); 946 947 err = cbb_do_power(brdev); 948 if (err) 949 return (err); 950 cbb_cardbus_reset(brdev); 951 return (0); 952 } 953 954 static void 955 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 956 { 957 cbb_power(brdev, CARD_OFF); 958 cbb_cardbus_reset(brdev); 959 } 960 961 /************************************************************************/ 962 /* CardBus Resource */ 963 /************************************************************************/ 964 965 static int 966 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 967 { 968 int basereg; 969 int limitreg; 970 971 if ((win < 0) || (win > 1)) { 972 DEVPRINTF((brdev, 973 "cbb_cardbus_io_open: window out of range %d\n", win)); 974 return (EINVAL); 975 } 976 977 basereg = win * 8 + CBBR_IOBASE0; 978 limitreg = win * 8 + CBBR_IOLIMIT0; 979 980 pci_write_config(brdev, basereg, start, 4); 981 pci_write_config(brdev, limitreg, end, 4); 982 return (0); 983 } 984 985 static int 986 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 987 { 988 int basereg; 989 int limitreg; 990 991 if ((win < 0) || (win > 1)) { 992 DEVPRINTF((brdev, 993 "cbb_cardbus_mem_open: window out of range %d\n", win)); 994 return (EINVAL); 995 } 996 997 basereg = win*8 + CBBR_MEMBASE0; 998 limitreg = win*8 + CBBR_MEMLIMIT0; 999 1000 pci_write_config(brdev, basereg, start, 4); 1001 pci_write_config(brdev, limitreg, end, 4); 1002 return (0); 1003 } 1004 1005 #define START_NONE 0xffffffff 1006 #define END_NONE 0 1007 1008 static void 1009 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1010 { 1011 uint32_t starts[2]; 1012 uint32_t ends[2]; 1013 struct cbb_reslist *rle; 1014 int align, i; 1015 uint32_t reg; 1016 1017 starts[0] = starts[1] = START_NONE; 1018 ends[0] = ends[1] = END_NONE; 1019 1020 if (type == SYS_RES_MEMORY) 1021 align = CBB_MEMALIGN; 1022 else if (type == SYS_RES_IOPORT) 1023 align = CBB_IOALIGN; 1024 else 1025 align = 1; 1026 1027 SLIST_FOREACH(rle, &sc->rl, link) { 1028 if (rle->type != type) 1029 continue; 1030 if (rle->res == NULL) 1031 continue; 1032 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1033 continue; 1034 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1035 i = 1; 1036 else 1037 i = 0; 1038 if (rman_get_start(rle->res) < starts[i]) 1039 starts[i] = rman_get_start(rle->res); 1040 if (rman_get_end(rle->res) > ends[i]) 1041 ends[i] = rman_get_end(rle->res); 1042 } 1043 for (i = 0; i < 2; i++) { 1044 if (starts[i] == START_NONE) 1045 continue; 1046 starts[i] &= ~(align - 1); 1047 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1048 } 1049 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1050 if (starts[0] < starts[1]) { 1051 if (ends[0] > starts[1]) { 1052 device_printf(sc->dev, "Overlapping ranges" 1053 " for prefetch and non-prefetch memory\n"); 1054 return; 1055 } 1056 } else { 1057 if (ends[1] > starts[0]) { 1058 device_printf(sc->dev, "Overlapping ranges" 1059 " for prefetch and non-prefetch memory\n"); 1060 return; 1061 } 1062 } 1063 } 1064 1065 if (type == SYS_RES_MEMORY) { 1066 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1067 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1068 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1069 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1070 CBBM_BRIDGECTRL_PREFETCH_1); 1071 if (starts[1] != START_NONE) 1072 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1073 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1074 if (bootverbose) { 1075 device_printf(sc->dev, "Opening memory:\n"); 1076 if (starts[0] != START_NONE) 1077 device_printf(sc->dev, "Normal: %#x-%#x\n", 1078 starts[0], ends[0]); 1079 if (starts[1] != START_NONE) 1080 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1081 starts[1], ends[1]); 1082 } 1083 } else if (type == SYS_RES_IOPORT) { 1084 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1085 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1086 if (bootverbose && starts[0] != START_NONE) 1087 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1088 starts[0], ends[0]); 1089 } 1090 } 1091 1092 static int 1093 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1094 int rid, struct resource *res) 1095 { 1096 int ret; 1097 1098 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1099 type, rid, res); 1100 if (ret != 0) 1101 return (ret); 1102 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1103 return (0); 1104 } 1105 1106 static int 1107 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1108 int rid, struct resource *res) 1109 { 1110 int ret; 1111 1112 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1113 type, rid, res); 1114 if (ret != 0) 1115 return (ret); 1116 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1117 return (0); 1118 } 1119 1120 static struct resource * 1121 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1122 int *rid, u_long start, u_long end, u_long count, u_int flags) 1123 { 1124 struct cbb_softc *sc = device_get_softc(brdev); 1125 int tmp; 1126 struct resource *res; 1127 u_long align; 1128 1129 switch (type) { 1130 case SYS_RES_IRQ: 1131 tmp = rman_get_start(sc->irq_res); 1132 if (start > tmp || end < tmp || count != 1) { 1133 device_printf(child, "requested interrupt %ld-%ld," 1134 "count = %ld not supported by cbb\n", 1135 start, end, count); 1136 return (NULL); 1137 } 1138 start = end = tmp; 1139 flags |= RF_SHAREABLE; 1140 break; 1141 case SYS_RES_IOPORT: 1142 if (start <= cbb_start_32_io) 1143 start = cbb_start_32_io; 1144 if (end < start) 1145 end = start; 1146 if (count > (1 << RF_ALIGNMENT(flags))) 1147 flags = (flags & ~RF_ALIGNMENT_MASK) | 1148 rman_make_alignment_flags(count); 1149 break; 1150 case SYS_RES_MEMORY: 1151 if (start <= cbb_start_mem) 1152 start = cbb_start_mem; 1153 if (end < start) 1154 end = start; 1155 if (count < CBB_MEMALIGN) 1156 align = CBB_MEMALIGN; 1157 else 1158 align = count; 1159 if (align > (1 << RF_ALIGNMENT(flags))) 1160 flags = (flags & ~RF_ALIGNMENT_MASK) | 1161 rman_make_alignment_flags(align); 1162 break; 1163 } 1164 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1165 start, end, count, flags & ~RF_ACTIVE); 1166 if (res == NULL) { 1167 printf("cbb alloc res fail\n"); 1168 return (NULL); 1169 } 1170 cbb_insert_res(sc, res, type, *rid); 1171 if (flags & RF_ACTIVE) 1172 if (bus_activate_resource(child, type, *rid, res) != 0) { 1173 bus_release_resource(child, type, *rid, res); 1174 return (NULL); 1175 } 1176 1177 return (res); 1178 } 1179 1180 static int 1181 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1182 int rid, struct resource *res) 1183 { 1184 struct cbb_softc *sc = device_get_softc(brdev); 1185 int error; 1186 1187 if (rman_get_flags(res) & RF_ACTIVE) { 1188 error = bus_deactivate_resource(child, type, rid, res); 1189 if (error != 0) 1190 return (error); 1191 } 1192 cbb_remove_res(sc, res); 1193 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1194 type, rid, res)); 1195 } 1196 1197 /************************************************************************/ 1198 /* PC Card Power Functions */ 1199 /************************************************************************/ 1200 1201 static int 1202 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1203 { 1204 struct cbb_softc *sc = device_get_softc(brdev); 1205 int err; 1206 1207 DPRINTF(("cbb_pcic_socket_enable:\n")); 1208 1209 /* power down/up the socket to reset */ 1210 err = cbb_do_power(brdev); 1211 if (err) 1212 return (err); 1213 exca_reset(&sc->exca[0], child); 1214 1215 return (0); 1216 } 1217 1218 static void 1219 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1220 { 1221 struct cbb_softc *sc = device_get_softc(brdev); 1222 1223 DPRINTF(("cbb_pcic_socket_disable\n")); 1224 1225 /* Turn off the card's interrupt and leave it in reset */ 1226 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1227 tsleep(sc, PZERO, "cbbP1", hz / 100); 1228 1229 /* power down the socket */ 1230 cbb_power(brdev, CARD_OFF); 1231 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1232 1233 /* wait 300ms until power fails (Tpf). */ 1234 tsleep(sc, PZERO, "cbbP1", hz * 300 / 1000); 1235 1236 /* enable CSC interrupts */ 1237 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1238 } 1239 1240 /************************************************************************/ 1241 /* POWER methods */ 1242 /************************************************************************/ 1243 1244 int 1245 cbb_power_enable_socket(device_t brdev, device_t child) 1246 { 1247 struct cbb_softc *sc = device_get_softc(brdev); 1248 1249 if (sc->flags & CBB_16BIT_CARD) 1250 return (cbb_pcic_power_enable_socket(brdev, child)); 1251 else 1252 return (cbb_cardbus_power_enable_socket(brdev, child)); 1253 } 1254 1255 void 1256 cbb_power_disable_socket(device_t brdev, device_t child) 1257 { 1258 struct cbb_softc *sc = device_get_softc(brdev); 1259 if (sc->flags & CBB_16BIT_CARD) 1260 cbb_pcic_power_disable_socket(brdev, child); 1261 else 1262 cbb_cardbus_power_disable_socket(brdev, child); 1263 } 1264 1265 static int 1266 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1267 struct resource *res) 1268 { 1269 struct cbb_softc *sc = device_get_softc(brdev); 1270 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1271 } 1272 1273 static int 1274 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1275 int rid, struct resource *res) 1276 { 1277 struct cbb_softc *sc = device_get_softc(brdev); 1278 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1279 } 1280 1281 static struct resource * 1282 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1283 u_long start, u_long end, u_long count, u_int flags) 1284 { 1285 struct resource *res = NULL; 1286 struct cbb_softc *sc = device_get_softc(brdev); 1287 int align; 1288 int tmp; 1289 1290 switch (type) { 1291 case SYS_RES_MEMORY: 1292 if (start < cbb_start_mem) 1293 start = cbb_start_mem; 1294 if (end < start) 1295 end = start; 1296 if (count < CBB_MEMALIGN) 1297 align = CBB_MEMALIGN; 1298 else 1299 align = count; 1300 if (align > (1 << RF_ALIGNMENT(flags))) 1301 flags = (flags & ~RF_ALIGNMENT_MASK) | 1302 rman_make_alignment_flags(align); 1303 break; 1304 case SYS_RES_IOPORT: 1305 if (start < cbb_start_16_io) 1306 start = cbb_start_16_io; 1307 if (end < start) 1308 end = start; 1309 break; 1310 case SYS_RES_IRQ: 1311 tmp = rman_get_start(sc->irq_res); 1312 if (start > tmp || end < tmp || count != 1) { 1313 device_printf(child, "requested interrupt %ld-%ld," 1314 "count = %ld not supported by cbb\n", 1315 start, end, count); 1316 return (NULL); 1317 } 1318 flags |= RF_SHAREABLE; 1319 start = end = rman_get_start(sc->irq_res); 1320 break; 1321 } 1322 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1323 start, end, count, flags & ~RF_ACTIVE); 1324 if (res == NULL) 1325 return (NULL); 1326 cbb_insert_res(sc, res, type, *rid); 1327 if (flags & RF_ACTIVE) { 1328 if (bus_activate_resource(child, type, *rid, res) != 0) { 1329 bus_release_resource(child, type, *rid, res); 1330 return (NULL); 1331 } 1332 } 1333 1334 return (res); 1335 } 1336 1337 static int 1338 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1339 int rid, struct resource *res) 1340 { 1341 struct cbb_softc *sc = device_get_softc(brdev); 1342 int error; 1343 1344 if (rman_get_flags(res) & RF_ACTIVE) { 1345 error = bus_deactivate_resource(child, type, rid, res); 1346 if (error != 0) 1347 return (error); 1348 } 1349 cbb_remove_res(sc, res); 1350 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1351 type, rid, res)); 1352 } 1353 1354 /************************************************************************/ 1355 /* PC Card methods */ 1356 /************************************************************************/ 1357 1358 int 1359 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1360 uint32_t flags) 1361 { 1362 struct cbb_softc *sc = device_get_softc(brdev); 1363 struct resource *res; 1364 1365 if (type != SYS_RES_MEMORY) 1366 return (EINVAL); 1367 res = cbb_find_res(sc, type, rid); 1368 if (res == NULL) { 1369 device_printf(brdev, 1370 "set_res_flags: specified rid not found\n"); 1371 return (ENOENT); 1372 } 1373 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1374 } 1375 1376 int 1377 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1378 uint32_t cardaddr, uint32_t *deltap) 1379 { 1380 struct cbb_softc *sc = device_get_softc(brdev); 1381 struct resource *res; 1382 1383 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1384 if (res == NULL) { 1385 device_printf(brdev, 1386 "set_memory_offset: specified rid not found\n"); 1387 return (ENOENT); 1388 } 1389 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1390 } 1391 1392 /************************************************************************/ 1393 /* BUS Methods */ 1394 /************************************************************************/ 1395 1396 1397 int 1398 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1399 struct resource *r) 1400 { 1401 struct cbb_softc *sc = device_get_softc(brdev); 1402 1403 if (sc->flags & CBB_16BIT_CARD) 1404 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1405 else 1406 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1407 r)); 1408 } 1409 1410 int 1411 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1412 int rid, struct resource *r) 1413 { 1414 struct cbb_softc *sc = device_get_softc(brdev); 1415 1416 if (sc->flags & CBB_16BIT_CARD) 1417 return (cbb_pcic_deactivate_resource(brdev, child, type, 1418 rid, r)); 1419 else 1420 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1421 rid, r)); 1422 } 1423 1424 struct resource * 1425 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1426 u_long start, u_long end, u_long count, u_int flags) 1427 { 1428 struct cbb_softc *sc = device_get_softc(brdev); 1429 1430 if (sc->flags & CBB_16BIT_CARD) 1431 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1432 start, end, count, flags)); 1433 else 1434 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1435 start, end, count, flags)); 1436 } 1437 1438 int 1439 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1440 struct resource *r) 1441 { 1442 struct cbb_softc *sc = device_get_softc(brdev); 1443 1444 if (sc->flags & CBB_16BIT_CARD) 1445 return (cbb_pcic_release_resource(brdev, child, type, 1446 rid, r)); 1447 else 1448 return (cbb_cardbus_release_resource(brdev, child, type, 1449 rid, r)); 1450 } 1451 1452 int 1453 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1454 { 1455 struct cbb_softc *sc = device_get_softc(brdev); 1456 1457 switch (which) { 1458 case PCIB_IVAR_BUS: 1459 *result = sc->secbus; 1460 return (0); 1461 } 1462 return (ENOENT); 1463 } 1464 1465 int 1466 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1467 { 1468 struct cbb_softc *sc = device_get_softc(brdev); 1469 1470 switch (which) { 1471 case PCIB_IVAR_BUS: 1472 sc->secbus = value; 1473 return (0); 1474 } 1475 return (ENOENT); 1476 } 1477 1478 int 1479 cbb_suspend(device_t self) 1480 { 1481 int error = 0; 1482 struct cbb_softc *sc = device_get_softc(self); 1483 1484 error = bus_generic_suspend(self); 1485 if (error != 0) 1486 return (error); 1487 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1488 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */ 1489 return (0); 1490 } 1491 1492 int 1493 cbb_resume(device_t self) 1494 { 1495 int error = 0; 1496 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1497 uint32_t tmp; 1498 1499 /* 1500 * Some BIOSes will not save the BARs for the pci chips, so we 1501 * must do it ourselves. If the BAR is reset to 0 for an I/O 1502 * device, it will read back as 0x1, so no explicit test for 1503 * memory devices are needed. 1504 * 1505 * Note: The PCI bus code should do this automatically for us on 1506 * suspend/resume, but until it does, we have to cope. 1507 */ 1508 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1509 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1510 rman_get_start(sc->base_res))); 1511 1512 sc->chipinit(sc); 1513 1514 /* reset interrupt -- Do we really need to do this? */ 1515 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1516 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1517 1518 /* CSC Interrupt: Card detect interrupt on */ 1519 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1520 1521 /* Signal the thread to wakeup. */ 1522 mtx_lock(&sc->mtx); 1523 cv_signal(&sc->cv); 1524 mtx_unlock(&sc->mtx); 1525 1526 error = bus_generic_resume(self); 1527 1528 return (error); 1529 } 1530 1531 int 1532 cbb_child_present(device_t self) 1533 { 1534 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1535 uint32_t sockstate; 1536 1537 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1538 return (CBB_CARD_PRESENT(sockstate) && 1539 (sc->flags & CBB_CARD_OK) == CBB_CARD_OK); 1540 } 1541