1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/interrupt.h> 88 #include <sys/lock.h> 89 #include <sys/malloc.h> 90 #include <sys/mutex.h> 91 #include <sys/proc.h> 92 #include <sys/rman.h> 93 #include <sys/sysctl.h> 94 #include <sys/systm.h> 95 #include <machine/bus.h> 96 #include <machine/resource.h> 97 98 #include <dev/pci/pcireg.h> 99 #include <dev/pci/pcivar.h> 100 101 #include <dev/pccard/pccardreg.h> 102 #include <dev/pccard/pccardvar.h> 103 104 #include <dev/exca/excareg.h> 105 #include <dev/exca/excavar.h> 106 107 #include <dev/pccbb/pccbbreg.h> 108 #include <dev/pccbb/pccbbvar.h> 109 110 #include "power_if.h" 111 #include "card_if.h" 112 #include "pcib_if.h" 113 114 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 115 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 116 117 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 118 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 119 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 120 pci_write_config(DEV, REG, ( \ 121 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 122 123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 124 125 #define CBB_START_MEM 0x88000000 126 #define CBB_START_32_IO 0x1000 127 #define CBB_START_16_IO 0x100 128 129 devclass_t cbb_devclass; 130 131 /* sysctl vars */ 132 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 133 134 /* There's no way to say TUNEABLE_LONG to get the right types */ 135 u_long cbb_start_mem = CBB_START_MEM; 136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 138 &cbb_start_mem, CBB_START_MEM, 139 "Starting address for memory allocations"); 140 141 u_long cbb_start_16_io = CBB_START_16_IO; 142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 144 &cbb_start_16_io, CBB_START_16_IO, 145 "Starting ioport for 16-bit cards"); 146 147 u_long cbb_start_32_io = CBB_START_32_IO; 148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 150 &cbb_start_32_io, CBB_START_32_IO, 151 "Starting ioport for 32-bit cards"); 152 153 int cbb_debug = 0; 154 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 155 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 156 "Verbose cardbus bridge debugging"); 157 158 static void cbb_insert(struct cbb_softc *sc); 159 static void cbb_removal(struct cbb_softc *sc); 160 static uint32_t cbb_detect_voltage(device_t brdev); 161 static void cbb_cardbus_reset(device_t brdev, device_t child, int on); 162 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 163 uint32_t end); 164 static int cbb_cardbus_mem_open(device_t brdev, int win, 165 uint32_t start, uint32_t end); 166 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 167 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 168 int type, int rid, struct resource *res); 169 static int cbb_cardbus_deactivate_resource(device_t brdev, 170 device_t child, int type, int rid, struct resource *res); 171 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 172 device_t child, int type, int *rid, u_long start, 173 u_long end, u_long count, u_int flags); 174 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 175 int type, int rid, struct resource *res); 176 static int cbb_cardbus_power_enable_socket(device_t brdev, 177 device_t child); 178 static void cbb_cardbus_power_disable_socket(device_t brdev, 179 device_t child); 180 static int cbb_func_filt(void *arg); 181 static void cbb_func_intr(void *arg); 182 183 static void 184 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 185 { 186 struct cbb_reslist *rle; 187 188 SLIST_FOREACH(rle, &sc->rl, link) { 189 if (rle->res == res) { 190 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 191 free(rle, M_DEVBUF); 192 return; 193 } 194 } 195 } 196 197 static struct resource * 198 cbb_find_res(struct cbb_softc *sc, int type, int rid) 199 { 200 struct cbb_reslist *rle; 201 202 SLIST_FOREACH(rle, &sc->rl, link) 203 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 204 return (rle->res); 205 return (NULL); 206 } 207 208 static void 209 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 210 int rid) 211 { 212 struct cbb_reslist *rle; 213 214 /* 215 * Need to record allocated resource so we can iterate through 216 * it later. 217 */ 218 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 219 if (rle == NULL) 220 panic("cbb_cardbus_alloc_resource: can't record entry!"); 221 rle->res = res; 222 rle->type = type; 223 rle->rid = rid; 224 SLIST_INSERT_HEAD(&sc->rl, rle, link); 225 } 226 227 static void 228 cbb_destroy_res(struct cbb_softc *sc) 229 { 230 struct cbb_reslist *rle; 231 232 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 233 device_printf(sc->dev, "Danger Will Robinson: Resource " 234 "left allocated! This is a bug... " 235 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 236 rman_get_start(rle->res)); 237 SLIST_REMOVE_HEAD(&sc->rl, link); 238 free(rle, M_DEVBUF); 239 } 240 } 241 242 /* 243 * Disable function interrupts by telling the bridge to generate IRQ1 244 * interrupts. These interrupts aren't really generated by the chip, since 245 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 246 * initialization, so this helps to work around the problem. 247 * 248 * XXX We can't do this workaround for all chipsets, because this 249 * XXX causes interference with the keyboard because somechipsets will 250 * XXX actually signal IRQ1 over their serial interrupt connections to 251 * XXX the south bridge. Disable it it for now. 252 */ 253 void 254 cbb_disable_func_intr(struct cbb_softc *sc) 255 { 256 #if 0 257 uint8_t reg; 258 259 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 260 EXCA_INTR_IRQ_RESERVED1; 261 exca_putb(&sc->exca[0], EXCA_INTR, reg); 262 #endif 263 } 264 265 /* 266 * Enable function interrupts. We turn on function interrupts when the card 267 * requests an interrupt. The PCMCIA standard says that we should set 268 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 269 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 270 * cards. 271 */ 272 static void 273 cbb_enable_func_intr(struct cbb_softc *sc) 274 { 275 uint8_t reg; 276 277 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 278 EXCA_INTR_IRQ_NONE; 279 exca_putb(&sc->exca[0], EXCA_INTR, reg); 280 } 281 282 int 283 cbb_detach(device_t brdev) 284 { 285 struct cbb_softc *sc = device_get_softc(brdev); 286 device_t *devlist; 287 int tmp, tries, error, numdevs; 288 289 /* 290 * Before we delete the children (which we have to do because 291 * attach doesn't check for children busses correctly), we have 292 * to detach the children. Even if we didn't need to delete the 293 * children, we have to detach them. 294 */ 295 error = bus_generic_detach(brdev); 296 if (error != 0) 297 return (error); 298 299 /* 300 * Since the attach routine doesn't search for children before it 301 * attaches them to this device, we must delete them here in order 302 * for the kldload/unload case to work. If we failed to do that, then 303 * we'd get duplicate devices when cbb.ko was reloaded. 304 */ 305 tries = 10; 306 do { 307 error = device_get_children(brdev, &devlist, &numdevs); 308 if (error == 0) 309 break; 310 /* 311 * Try hard to cope with low memory. 312 */ 313 if (error == ENOMEM) { 314 pause("cbbnomem", 1); 315 continue; 316 } 317 } while (tries-- > 0); 318 for (tmp = 0; tmp < numdevs; tmp++) 319 device_delete_child(brdev, devlist[tmp]); 320 free(devlist, M_TEMP); 321 322 /* Turn off the interrupts */ 323 cbb_set(sc, CBB_SOCKET_MASK, 0); 324 325 /* reset 16-bit pcmcia bus */ 326 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 327 328 /* turn off power */ 329 cbb_power(brdev, CARD_OFF); 330 331 /* Ack the interrupt */ 332 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 333 334 /* 335 * Wait for the thread to die. kproc_exit will do a wakeup 336 * on the event thread's struct thread * so that we know it is 337 * safe to proceed. IF the thread is running, set the please 338 * die flag and wait for it to comply. Since the wakeup on 339 * the event thread happens only in kproc_exit, we don't 340 * need to loop here. 341 */ 342 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 343 mtx_lock(&sc->mtx); 344 sc->flags |= CBB_KTHREAD_DONE; 345 while (sc->flags & CBB_KTHREAD_RUNNING) { 346 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 347 wakeup(&sc->intrhand); 348 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 349 } 350 mtx_unlock(&sc->mtx); 351 352 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 353 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 354 sc->base_res); 355 mtx_destroy(&sc->mtx); 356 return (0); 357 } 358 359 int 360 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 362 void **cookiep) 363 { 364 struct cbb_intrhand *ih; 365 struct cbb_softc *sc = device_get_softc(dev); 366 int err; 367 368 if (filt == NULL && intr == NULL) 369 return (EINVAL); 370 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 371 if (ih == NULL) 372 return (ENOMEM); 373 *cookiep = ih; 374 ih->filt = filt; 375 ih->intr = intr; 376 ih->arg = arg; 377 ih->sc = sc; 378 /* 379 * XXX need to turn on ISA interrupts, if we ever support them, but 380 * XXX for now that's all we need to do. 381 */ 382 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 383 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 384 &ih->cookie); 385 if (err != 0) { 386 free(ih, M_DEVBUF); 387 return (err); 388 } 389 cbb_enable_func_intr(sc); 390 sc->cardok = 1; 391 return 0; 392 } 393 394 int 395 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 396 void *cookie) 397 { 398 struct cbb_intrhand *ih; 399 int err; 400 401 /* XXX Need to do different things for ISA interrupts. */ 402 ih = (struct cbb_intrhand *) cookie; 403 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 404 ih->cookie); 405 if (err != 0) 406 return (err); 407 free(ih, M_DEVBUF); 408 return (0); 409 } 410 411 412 void 413 cbb_driver_added(device_t brdev, driver_t *driver) 414 { 415 struct cbb_softc *sc = device_get_softc(brdev); 416 device_t *devlist; 417 device_t dev; 418 int tmp; 419 int numdevs; 420 int wake = 0; 421 422 DEVICE_IDENTIFY(driver, brdev); 423 tmp = device_get_children(brdev, &devlist, &numdevs); 424 if (tmp != 0) { 425 device_printf(brdev, "Cannot get children list, no reprobe\n"); 426 return; 427 } 428 for (tmp = 0; tmp < numdevs; tmp++) { 429 dev = devlist[tmp]; 430 if (device_get_state(dev) == DS_NOTPRESENT && 431 device_probe_and_attach(dev) == 0) 432 wake++; 433 } 434 free(devlist, M_TEMP); 435 436 if (wake > 0) 437 wakeup(&sc->intrhand); 438 } 439 440 void 441 cbb_child_detached(device_t brdev, device_t child) 442 { 443 struct cbb_softc *sc = device_get_softc(brdev); 444 445 /* I'm not sure we even need this */ 446 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 447 device_printf(brdev, "Unknown child detached: %s\n", 448 device_get_nameunit(child)); 449 } 450 451 /************************************************************************/ 452 /* Kthreads */ 453 /************************************************************************/ 454 455 void 456 cbb_event_thread(void *arg) 457 { 458 struct cbb_softc *sc = arg; 459 uint32_t status; 460 int err; 461 int not_a_card = 0; 462 463 mtx_lock(&sc->mtx); 464 sc->flags |= CBB_KTHREAD_RUNNING; 465 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 466 mtx_unlock(&sc->mtx); 467 /* 468 * We take out Giant here because we need it deep, 469 * down in the bowels of the vm system for mapping the 470 * memory we need to read the CIS. In addition, since 471 * we are adding/deleting devices from the dev tree, 472 * and that code isn't MP safe, we have to hold Giant. 473 */ 474 mtx_lock(&Giant); 475 status = cbb_get(sc, CBB_SOCKET_STATE); 476 DPRINTF(("Status is 0x%x\n", status)); 477 if (!CBB_CARD_PRESENT(status)) { 478 not_a_card = 0; /* We know card type */ 479 cbb_removal(sc); 480 } else if (status & CBB_STATE_NOT_A_CARD) { 481 /* 482 * Up to 10 times, try to rescan the card when we see 483 * NOT_A_CARD. 10 is somehwat arbitrary. When this 484 * pathology hits, there's a ~40% chance each try will 485 * fail. 10 tries takes about 5s and results in a 486 * 99.99% certainty of the results. 487 */ 488 if (not_a_card++ < 10) { 489 DEVPRINTF((sc->dev, 490 "Not a card bit set, rescanning\n")); 491 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 492 } else { 493 device_printf(sc->dev, 494 "Can't determine card type\n"); 495 } 496 } else { 497 not_a_card = 0; /* We know card type */ 498 cbb_insert(sc); 499 } 500 mtx_unlock(&Giant); 501 502 /* 503 * Wait until it has been 250ms since the last time we 504 * get an interrupt. We handle the rest of the interrupt 505 * at the top of the loop. Although we clear the bit in the 506 * ISR, we signal sc->cv from the detach path after we've 507 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 508 * 250ms sleep here. 509 * 510 * In our ISR, we turn off the card changed interrupt. Turn 511 * them back on here before we wait for them to happen. We 512 * turn them on/off so that we can tolerate a large latency 513 * between the time we signal cbb_event_thread and it gets 514 * a chance to run. 515 */ 516 mtx_lock(&sc->mtx); 517 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 518 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 519 err = 0; 520 while (err != EWOULDBLOCK && 521 (sc->flags & CBB_KTHREAD_DONE) == 0) 522 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 523 } 524 DEVPRINTF((sc->dev, "Thread terminating\n")); 525 sc->flags &= ~CBB_KTHREAD_RUNNING; 526 mtx_unlock(&sc->mtx); 527 kproc_exit(0); 528 } 529 530 /************************************************************************/ 531 /* Insert/removal */ 532 /************************************************************************/ 533 534 static void 535 cbb_insert(struct cbb_softc *sc) 536 { 537 uint32_t sockevent, sockstate; 538 539 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 540 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 541 542 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 543 sockevent, sockstate)); 544 545 if (sockstate & CBB_STATE_R2_CARD) { 546 if (device_is_attached(sc->exca[0].pccarddev)) { 547 sc->flags |= CBB_16BIT_CARD; 548 exca_insert(&sc->exca[0]); 549 } else { 550 device_printf(sc->dev, 551 "16-bit card inserted, but no pccard bus.\n"); 552 } 553 } else if (sockstate & CBB_STATE_CB_CARD) { 554 if (device_is_attached(sc->cbdev)) { 555 sc->flags &= ~CBB_16BIT_CARD; 556 CARD_ATTACH_CARD(sc->cbdev); 557 } else { 558 device_printf(sc->dev, 559 "CardBus card inserted, but no cardbus bus.\n"); 560 } 561 } else { 562 /* 563 * We should power the card down, and try again a couple of 564 * times if this happens. XXX 565 */ 566 device_printf(sc->dev, "Unsupported card type detected\n"); 567 } 568 } 569 570 static void 571 cbb_removal(struct cbb_softc *sc) 572 { 573 sc->cardok = 0; 574 if (sc->flags & CBB_16BIT_CARD) { 575 exca_removal(&sc->exca[0]); 576 } else { 577 if (device_is_attached(sc->cbdev)) 578 CARD_DETACH_CARD(sc->cbdev); 579 } 580 cbb_destroy_res(sc); 581 } 582 583 /************************************************************************/ 584 /* Interrupt Handler */ 585 /************************************************************************/ 586 587 static int 588 cbb_func_filt(void *arg) 589 { 590 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 591 struct cbb_softc *sc = ih->sc; 592 593 /* 594 * Make sure that the card is really there. 595 */ 596 if (!sc->cardok) 597 return (FILTER_STRAY); 598 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 599 sc->cardok = 0; 600 return (FILTER_HANDLED); 601 } 602 603 /* 604 * nb: don't have to check for giant or not, since that's done in the 605 * ISR dispatch and one can't hold Giant in a filter anyway... 606 */ 607 return ((*ih->filt)(ih->arg)); 608 } 609 610 static void 611 cbb_func_intr(void *arg) 612 { 613 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 614 struct cbb_softc *sc = ih->sc; 615 616 /* 617 * While this check may seem redundant, it helps close a race 618 * condition. If the card is ejected after the filter runs, but 619 * before this ISR can be scheduled, then we need to do the same 620 * filtering to prevent the card's ISR from being called. One could 621 * argue that the card's ISR should be able to cope, but experience 622 * has shown they can't always. This mitigates the problem by making 623 * the race quite a bit smaller. Properly written client ISRs should 624 * cope with the card going away in the middle of the ISR. We assume 625 * that drivers that are sophisticated enough to use filters don't 626 * need our protection. This also allows us to ensure they *ARE* 627 * called if their filter said they needed to be called. 628 */ 629 if (ih->filt == NULL) { 630 if (!sc->cardok) 631 return; 632 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 633 sc->cardok = 0; 634 return; 635 } 636 } 637 638 /* 639 * Call the registered ithread interrupt handler. This entire routine 640 * will be called with Giant if this isn't an MP safe driver, or not 641 * if it is. Either way, we don't have to worry. 642 */ 643 ih->intr(ih->arg); 644 } 645 646 /************************************************************************/ 647 /* Generic Power functions */ 648 /************************************************************************/ 649 650 static uint32_t 651 cbb_detect_voltage(device_t brdev) 652 { 653 struct cbb_softc *sc = device_get_softc(brdev); 654 uint32_t psr; 655 uint32_t vol = CARD_UKN_CARD; 656 657 psr = cbb_get(sc, CBB_SOCKET_STATE); 658 659 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 660 vol |= CARD_5V_CARD; 661 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 662 vol |= CARD_3V_CARD; 663 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 664 vol |= CARD_XV_CARD; 665 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 666 vol |= CARD_YV_CARD; 667 668 return (vol); 669 } 670 671 static uint8_t 672 cbb_o2micro_power_hack(struct cbb_softc *sc) 673 { 674 uint8_t reg; 675 676 /* 677 * Issue #2: INT# not qualified with IRQ Routing Bit. An 678 * unexpected PCI INT# may be generated during PC Card 679 * initialization even with the IRQ Routing Bit Set with some 680 * PC Cards. 681 * 682 * This is a two part issue. The first part is that some of 683 * our older controllers have an issue in which the slot's PCI 684 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 685 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 686 * is selected (ExCA register 03h bits 3:0, of the slot, are 687 * cleared) we will generate INT# if IREQ# is asserted. The 688 * second part is because some PC Cards prematurally assert 689 * IREQ# before the ExCA registers are fully programmed. This 690 * in turn asserts INT# because ExCA register 03h bits 3:0 691 * (ISA IRQ Select) are not yet programmed. 692 * 693 * The fix for this issue, which will work for any controller 694 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 695 * (select IRQ1), of the slot, before turning on slot power. 696 * Selecting IRQ1 will result in INT# NOT being asserted 697 * (because IRQ1 is selected), and IRQ1 won't be asserted 698 * because our controllers don't generate IRQ1. 699 * 700 * Other, non O2Micro controllers will generate irq 1 in some 701 * situations, so we can't do this hack for everybody. Reports of 702 * keyboard controller's interrupts being suppressed occurred when 703 * we did this. 704 */ 705 reg = exca_getb(&sc->exca[0], EXCA_INTR); 706 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 707 return (reg); 708 } 709 710 /* 711 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 712 * we don't have an interrupt storm on power on. This has the efect of 713 * disabling card status change interrupts for the duration of poweron. 714 */ 715 static void 716 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 717 { 718 exca_putb(&sc->exca[0], EXCA_INTR, reg); 719 } 720 721 int 722 cbb_power(device_t brdev, int volts) 723 { 724 uint32_t status, sock_ctrl, reg_ctrl, mask; 725 struct cbb_softc *sc = device_get_softc(brdev); 726 int cnt, sane; 727 int retval = 0; 728 int on = 0; 729 uint8_t reg = 0; 730 731 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 732 733 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 734 switch (volts & CARD_VCCMASK) { 735 case 5: 736 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 737 on++; 738 break; 739 case 3: 740 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 741 on++; 742 break; 743 case XV: 744 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 745 on++; 746 break; 747 case YV: 748 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 749 on++; 750 break; 751 case 0: 752 break; 753 default: 754 return (0); /* power NEVER changed */ 755 } 756 757 /* VPP == VCC */ 758 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 759 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 760 761 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 762 return (1); /* no change necessary */ 763 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 764 if (volts != 0 && sc->chipset == CB_O2MICRO) 765 reg = cbb_o2micro_power_hack(sc); 766 767 /* 768 * We have to mask the card change detect interrupt while we're 769 * messing with the power. It is allowed to bounce while we're 770 * messing with power as things settle down. In addition, we mask off 771 * the card's function interrupt by routing it via the ISA bus. This 772 * bit generally only affects 16-bit cards. Some bridges allow one to 773 * set another bit to have it also affect 32-bit cards. Since 32-bit 774 * cards are required to be better behaved, we don't bother to get 775 * into those bridge specific features. 776 * 777 * XXX I wonder if we need to enable the READY bit interrupt in the 778 * EXCA CSC register for 16-bit cards, and disable the CD bit? 779 */ 780 mask = cbb_get(sc, CBB_SOCKET_MASK); 781 mask |= CBB_SOCKET_MASK_POWER; 782 mask &= ~CBB_SOCKET_MASK_CD; 783 cbb_set(sc, CBB_SOCKET_MASK, mask); 784 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 785 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 786 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 787 if (on) { 788 mtx_lock(&sc->mtx); 789 cnt = sc->powerintr; 790 /* 791 * We have a shortish timeout of 500ms here. Some bridges do 792 * not generate a POWER_CYCLE event for 16-bit cards. In 793 * those cases, we have to cope the best we can, and having 794 * only a short delay is better than the alternatives. 795 */ 796 sane = 10; 797 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 798 cnt == sc->powerintr && sane-- > 0) 799 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 800 mtx_unlock(&sc->mtx); 801 /* 802 * The TOPIC95B requires a little bit extra time to get its 803 * act together, so delay for an additional 100ms. Also as 804 * documented below, it doesn't seem to set the POWER_CYCLE 805 * bit, so don't whine if it never came on. 806 */ 807 if (sc->chipset == CB_TOPIC95) { 808 pause("cbb95B", hz / 10); 809 } else if (sane <= 0) { 810 device_printf(sc->dev, "power timeout, doom?\n"); 811 } 812 } 813 814 /* 815 * After the power is good, we can turn off the power interrupt. 816 * However, the PC Card standard says that we must delay turning the 817 * CD bit back on for a bit to allow for bouncyness on power down 818 * (recall that we don't wait above for a power down, since we don't 819 * get an interrupt for that). We're called either from the suspend 820 * code in which case we don't want to turn card change on again, or 821 * we're called from the card insertion code, in which case the cbb 822 * thread will turn it on for us before it waits to be woken by a 823 * change event. 824 * 825 * NB: Topic95B doesn't set the power cycle bit. we assume that 826 * both it and the TOPIC95 behave the same. 827 */ 828 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 829 status = cbb_get(sc, CBB_SOCKET_STATE); 830 if (on && sc->chipset != CB_TOPIC95) { 831 if ((status & CBB_STATE_POWER_CYCLE) == 0) 832 device_printf(sc->dev, "Power not on?\n"); 833 } 834 if (status & CBB_STATE_BAD_VCC_REQ) { 835 device_printf(sc->dev, "Bad Vcc requested\n"); 836 /* 837 * Turn off the power, and try again. Retrigger other 838 * active interrupts via force register. From NetBSD 839 * PR 36652, coded by me to description there. 840 */ 841 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 842 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 843 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 844 status &= ~CBB_STATE_BAD_VCC_REQ; 845 status &= ~CBB_STATE_DATA_LOST; 846 status |= CBB_FORCE_CV_TEST; 847 cbb_set(sc, CBB_SOCKET_FORCE, status); 848 goto done; 849 } 850 if (sc->chipset == CB_TOPIC97) { 851 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 852 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 853 if (on) 854 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 855 else 856 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 857 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 858 } 859 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 860 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 861 retval = 1; 862 done:; 863 if (volts != 0 && sc->chipset == CB_O2MICRO) 864 cbb_o2micro_power_hack2(sc, reg); 865 return (retval); 866 } 867 868 static int 869 cbb_current_voltage(device_t brdev) 870 { 871 struct cbb_softc *sc = device_get_softc(brdev); 872 uint32_t ctrl; 873 874 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 875 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 876 case CBB_SOCKET_CTRL_VCC_5V: 877 return CARD_5V_CARD; 878 case CBB_SOCKET_CTRL_VCC_3V: 879 return CARD_3V_CARD; 880 case CBB_SOCKET_CTRL_VCC_XV: 881 return CARD_XV_CARD; 882 case CBB_SOCKET_CTRL_VCC_YV: 883 return CARD_YV_CARD; 884 } 885 return 0; 886 } 887 888 /* 889 * detect the voltage for the card, and set it. Since the power 890 * used is the square of the voltage, lower voltages is a big win 891 * and what Windows does (and what Microsoft prefers). The MS paper 892 * also talks about preferring the CIS entry as well, but that has 893 * to be done elsewhere. We also optimize power sequencing here 894 * and don't change things if we're already powered up at a supported 895 * voltage. 896 * 897 * In addition, we power up with OE disabled. We'll set it later 898 * in the power up sequence. 899 */ 900 static int 901 cbb_do_power(device_t brdev) 902 { 903 struct cbb_softc *sc = device_get_softc(brdev); 904 uint32_t voltage, curpwr; 905 uint32_t status; 906 907 /* Don't enable OE (output enable) until power stable */ 908 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 909 910 voltage = cbb_detect_voltage(brdev); 911 curpwr = cbb_current_voltage(brdev); 912 status = cbb_get(sc, CBB_SOCKET_STATE); 913 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 914 return 0; 915 /* Prefer lowest voltage supported */ 916 cbb_power(brdev, CARD_OFF); 917 if (voltage & CARD_YV_CARD) 918 cbb_power(brdev, CARD_VCC(YV)); 919 else if (voltage & CARD_XV_CARD) 920 cbb_power(brdev, CARD_VCC(XV)); 921 else if (voltage & CARD_3V_CARD) 922 cbb_power(brdev, CARD_VCC(3)); 923 else if (voltage & CARD_5V_CARD) 924 cbb_power(brdev, CARD_VCC(5)); 925 else { 926 device_printf(brdev, "Unknown card voltage\n"); 927 return (ENXIO); 928 } 929 return (0); 930 } 931 932 /************************************************************************/ 933 /* CardBus power functions */ 934 /************************************************************************/ 935 936 static void 937 cbb_cardbus_reset(device_t brdev, device_t child, int on) 938 { 939 struct cbb_softc *sc = device_get_softc(brdev); 940 uint32_t b; 941 int delay, count; 942 943 /* 944 * Asserting reset for 20ms is necessary for most bridges. For some 945 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 946 * root cause of this is unknown, and NetBSD does the same thing. 947 */ 948 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 949 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 950 pause("cbbP3", hz * delay / 1000); 951 952 /* 953 * If a card exists and we're turning it on, take it out of reset. 954 * After clearing reset, wait up to 1.1s for the first configuration 955 * register (vendor/product) configuration register of device 0.0 to 956 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 957 * says that when powering up the card, the PCI Spec v2.1 must be 958 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 959 * Config Access) is at most 2^25 clocks, or just over 1s. Section 960 * 2.2.1 states any card not ready to participate in bus transactions 961 * must tristate its outputs. Therefore, any access to its 962 * configuration registers must be ignored. In that state, the config 963 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 964 * 0xffff is invalid, so this can never match a real card. Print a 965 * warning if it never returns a real id. The PCMCIA PC Card 966 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 967 * a cardbus bus, so that's the only register we check here. 968 */ 969 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 970 /* 971 */ 972 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 973 &~CBBM_BRIDGECTRL_RESET, 2); 974 b = pcib_get_bus(child); 975 count = 1100 / 20; 976 do { 977 pause("cbbP4", hz * 2 / 100); 978 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 979 0xfffffffful && --count >= 0); 980 if (count < 0) 981 device_printf(brdev, "Warning: Bus reset timeout\n"); 982 } 983 } 984 985 static int 986 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 987 { 988 struct cbb_softc *sc = device_get_softc(brdev); 989 int err; 990 991 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 992 return (ENODEV); 993 994 err = cbb_do_power(brdev); 995 if (err) 996 return (err); 997 cbb_cardbus_reset(brdev, child, 1); 998 return (0); 999 } 1000 1001 static void 1002 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1003 { 1004 cbb_power(brdev, CARD_OFF); 1005 cbb_cardbus_reset(brdev, child, 0); 1006 } 1007 1008 /************************************************************************/ 1009 /* CardBus Resource */ 1010 /************************************************************************/ 1011 1012 static int 1013 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1014 { 1015 int basereg; 1016 int limitreg; 1017 1018 if ((win < 0) || (win > 1)) { 1019 DEVPRINTF((brdev, 1020 "cbb_cardbus_io_open: window out of range %d\n", win)); 1021 return (EINVAL); 1022 } 1023 1024 basereg = win * 8 + CBBR_IOBASE0; 1025 limitreg = win * 8 + CBBR_IOLIMIT0; 1026 1027 pci_write_config(brdev, basereg, start, 4); 1028 pci_write_config(brdev, limitreg, end, 4); 1029 return (0); 1030 } 1031 1032 static int 1033 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1034 { 1035 int basereg; 1036 int limitreg; 1037 1038 if ((win < 0) || (win > 1)) { 1039 DEVPRINTF((brdev, 1040 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1041 return (EINVAL); 1042 } 1043 1044 basereg = win * 8 + CBBR_MEMBASE0; 1045 limitreg = win * 8 + CBBR_MEMLIMIT0; 1046 1047 pci_write_config(brdev, basereg, start, 4); 1048 pci_write_config(brdev, limitreg, end, 4); 1049 return (0); 1050 } 1051 1052 #define START_NONE 0xffffffff 1053 #define END_NONE 0 1054 1055 static void 1056 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1057 { 1058 uint32_t starts[2]; 1059 uint32_t ends[2]; 1060 struct cbb_reslist *rle; 1061 int align, i; 1062 uint32_t reg; 1063 1064 starts[0] = starts[1] = START_NONE; 1065 ends[0] = ends[1] = END_NONE; 1066 1067 if (type == SYS_RES_MEMORY) 1068 align = CBB_MEMALIGN; 1069 else if (type == SYS_RES_IOPORT) 1070 align = CBB_IOALIGN; 1071 else 1072 align = 1; 1073 1074 SLIST_FOREACH(rle, &sc->rl, link) { 1075 if (rle->type != type) 1076 continue; 1077 if (rle->res == NULL) 1078 continue; 1079 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1080 continue; 1081 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1082 i = 1; 1083 else 1084 i = 0; 1085 if (rman_get_start(rle->res) < starts[i]) 1086 starts[i] = rman_get_start(rle->res); 1087 if (rman_get_end(rle->res) > ends[i]) 1088 ends[i] = rman_get_end(rle->res); 1089 } 1090 for (i = 0; i < 2; i++) { 1091 if (starts[i] == START_NONE) 1092 continue; 1093 starts[i] &= ~(align - 1); 1094 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1095 } 1096 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1097 if (starts[0] < starts[1]) { 1098 if (ends[0] > starts[1]) { 1099 device_printf(sc->dev, "Overlapping ranges" 1100 " for prefetch and non-prefetch memory\n"); 1101 return; 1102 } 1103 } else { 1104 if (ends[1] > starts[0]) { 1105 device_printf(sc->dev, "Overlapping ranges" 1106 " for prefetch and non-prefetch memory\n"); 1107 return; 1108 } 1109 } 1110 } 1111 1112 if (type == SYS_RES_MEMORY) { 1113 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1114 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1115 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1116 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1117 CBBM_BRIDGECTRL_PREFETCH_1); 1118 if (starts[1] != START_NONE) 1119 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1120 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1121 if (bootverbose) { 1122 device_printf(sc->dev, "Opening memory:\n"); 1123 if (starts[0] != START_NONE) 1124 device_printf(sc->dev, "Normal: %#x-%#x\n", 1125 starts[0], ends[0]); 1126 if (starts[1] != START_NONE) 1127 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1128 starts[1], ends[1]); 1129 } 1130 } else if (type == SYS_RES_IOPORT) { 1131 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1132 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1133 if (bootverbose && starts[0] != START_NONE) 1134 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1135 starts[0], ends[0]); 1136 } 1137 } 1138 1139 static int 1140 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1141 int rid, struct resource *res) 1142 { 1143 int ret; 1144 1145 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1146 type, rid, res); 1147 if (ret != 0) 1148 return (ret); 1149 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1150 return (0); 1151 } 1152 1153 static int 1154 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1155 int rid, struct resource *res) 1156 { 1157 int ret; 1158 1159 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1160 type, rid, res); 1161 if (ret != 0) 1162 return (ret); 1163 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1164 return (0); 1165 } 1166 1167 static struct resource * 1168 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1169 int *rid, u_long start, u_long end, u_long count, u_int flags) 1170 { 1171 struct cbb_softc *sc = device_get_softc(brdev); 1172 int tmp; 1173 struct resource *res; 1174 u_long align; 1175 1176 switch (type) { 1177 case SYS_RES_IRQ: 1178 tmp = rman_get_start(sc->irq_res); 1179 if (start > tmp || end < tmp || count != 1) { 1180 device_printf(child, "requested interrupt %ld-%ld," 1181 "count = %ld not supported by cbb\n", 1182 start, end, count); 1183 return (NULL); 1184 } 1185 start = end = tmp; 1186 flags |= RF_SHAREABLE; 1187 break; 1188 case SYS_RES_IOPORT: 1189 if (start <= cbb_start_32_io) 1190 start = cbb_start_32_io; 1191 if (end < start) 1192 end = start; 1193 if (count > (1 << RF_ALIGNMENT(flags))) 1194 flags = (flags & ~RF_ALIGNMENT_MASK) | 1195 rman_make_alignment_flags(count); 1196 break; 1197 case SYS_RES_MEMORY: 1198 if (start <= cbb_start_mem) 1199 start = cbb_start_mem; 1200 if (end < start) 1201 end = start; 1202 if (count < CBB_MEMALIGN) 1203 align = CBB_MEMALIGN; 1204 else 1205 align = count; 1206 if (align > (1 << RF_ALIGNMENT(flags))) 1207 flags = (flags & ~RF_ALIGNMENT_MASK) | 1208 rman_make_alignment_flags(align); 1209 break; 1210 } 1211 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1212 start, end, count, flags & ~RF_ACTIVE); 1213 if (res == NULL) { 1214 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1215 return (NULL); 1216 } 1217 cbb_insert_res(sc, res, type, *rid); 1218 if (flags & RF_ACTIVE) 1219 if (bus_activate_resource(child, type, *rid, res) != 0) { 1220 bus_release_resource(child, type, *rid, res); 1221 return (NULL); 1222 } 1223 1224 return (res); 1225 } 1226 1227 static int 1228 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1229 int rid, struct resource *res) 1230 { 1231 struct cbb_softc *sc = device_get_softc(brdev); 1232 int error; 1233 1234 if (rman_get_flags(res) & RF_ACTIVE) { 1235 error = bus_deactivate_resource(child, type, rid, res); 1236 if (error != 0) 1237 return (error); 1238 } 1239 cbb_remove_res(sc, res); 1240 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1241 type, rid, res)); 1242 } 1243 1244 /************************************************************************/ 1245 /* PC Card Power Functions */ 1246 /************************************************************************/ 1247 1248 static int 1249 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1250 { 1251 struct cbb_softc *sc = device_get_softc(brdev); 1252 int err; 1253 1254 DPRINTF(("cbb_pcic_socket_enable:\n")); 1255 1256 /* power down/up the socket to reset */ 1257 err = cbb_do_power(brdev); 1258 if (err) 1259 return (err); 1260 exca_reset(&sc->exca[0], child); 1261 1262 return (0); 1263 } 1264 1265 static void 1266 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1267 { 1268 struct cbb_softc *sc = device_get_softc(brdev); 1269 1270 DPRINTF(("cbb_pcic_socket_disable\n")); 1271 1272 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1273 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1274 pause("cbbP1", hz / 100); 1275 1276 /* power down the socket */ 1277 cbb_power(brdev, CARD_OFF); 1278 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1279 1280 /* wait 300ms until power fails (Tpf). */ 1281 pause("cbbP2", hz * 300 / 1000); 1282 1283 /* enable CSC interrupts */ 1284 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1285 } 1286 1287 /************************************************************************/ 1288 /* POWER methods */ 1289 /************************************************************************/ 1290 1291 int 1292 cbb_power_enable_socket(device_t brdev, device_t child) 1293 { 1294 struct cbb_softc *sc = device_get_softc(brdev); 1295 1296 if (sc->flags & CBB_16BIT_CARD) 1297 return (cbb_pcic_power_enable_socket(brdev, child)); 1298 else 1299 return (cbb_cardbus_power_enable_socket(brdev, child)); 1300 } 1301 1302 void 1303 cbb_power_disable_socket(device_t brdev, device_t child) 1304 { 1305 struct cbb_softc *sc = device_get_softc(brdev); 1306 if (sc->flags & CBB_16BIT_CARD) 1307 cbb_pcic_power_disable_socket(brdev, child); 1308 else 1309 cbb_cardbus_power_disable_socket(brdev, child); 1310 } 1311 1312 static int 1313 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1314 struct resource *res) 1315 { 1316 struct cbb_softc *sc = device_get_softc(brdev); 1317 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1318 } 1319 1320 static int 1321 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1322 int rid, struct resource *res) 1323 { 1324 struct cbb_softc *sc = device_get_softc(brdev); 1325 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1326 } 1327 1328 static struct resource * 1329 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1330 u_long start, u_long end, u_long count, u_int flags) 1331 { 1332 struct resource *res = NULL; 1333 struct cbb_softc *sc = device_get_softc(brdev); 1334 int align; 1335 int tmp; 1336 1337 switch (type) { 1338 case SYS_RES_MEMORY: 1339 if (start < cbb_start_mem) 1340 start = cbb_start_mem; 1341 if (end < start) 1342 end = start; 1343 if (count < CBB_MEMALIGN) 1344 align = CBB_MEMALIGN; 1345 else 1346 align = count; 1347 if (align > (1 << RF_ALIGNMENT(flags))) 1348 flags = (flags & ~RF_ALIGNMENT_MASK) | 1349 rman_make_alignment_flags(align); 1350 break; 1351 case SYS_RES_IOPORT: 1352 if (start < cbb_start_16_io) 1353 start = cbb_start_16_io; 1354 if (end < start) 1355 end = start; 1356 break; 1357 case SYS_RES_IRQ: 1358 tmp = rman_get_start(sc->irq_res); 1359 if (start > tmp || end < tmp || count != 1) { 1360 device_printf(child, "requested interrupt %ld-%ld," 1361 "count = %ld not supported by cbb\n", 1362 start, end, count); 1363 return (NULL); 1364 } 1365 flags |= RF_SHAREABLE; 1366 start = end = rman_get_start(sc->irq_res); 1367 break; 1368 } 1369 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1370 start, end, count, flags & ~RF_ACTIVE); 1371 if (res == NULL) 1372 return (NULL); 1373 cbb_insert_res(sc, res, type, *rid); 1374 if (flags & RF_ACTIVE) { 1375 if (bus_activate_resource(child, type, *rid, res) != 0) { 1376 bus_release_resource(child, type, *rid, res); 1377 return (NULL); 1378 } 1379 } 1380 1381 return (res); 1382 } 1383 1384 static int 1385 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1386 int rid, struct resource *res) 1387 { 1388 struct cbb_softc *sc = device_get_softc(brdev); 1389 int error; 1390 1391 if (rman_get_flags(res) & RF_ACTIVE) { 1392 error = bus_deactivate_resource(child, type, rid, res); 1393 if (error != 0) 1394 return (error); 1395 } 1396 cbb_remove_res(sc, res); 1397 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1398 type, rid, res)); 1399 } 1400 1401 /************************************************************************/ 1402 /* PC Card methods */ 1403 /************************************************************************/ 1404 1405 int 1406 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1407 uint32_t flags) 1408 { 1409 struct cbb_softc *sc = device_get_softc(brdev); 1410 struct resource *res; 1411 1412 if (type != SYS_RES_MEMORY) 1413 return (EINVAL); 1414 res = cbb_find_res(sc, type, rid); 1415 if (res == NULL) { 1416 device_printf(brdev, 1417 "set_res_flags: specified rid not found\n"); 1418 return (ENOENT); 1419 } 1420 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1421 } 1422 1423 int 1424 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1425 uint32_t cardaddr, uint32_t *deltap) 1426 { 1427 struct cbb_softc *sc = device_get_softc(brdev); 1428 struct resource *res; 1429 1430 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1431 if (res == NULL) { 1432 device_printf(brdev, 1433 "set_memory_offset: specified rid not found\n"); 1434 return (ENOENT); 1435 } 1436 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1437 } 1438 1439 /************************************************************************/ 1440 /* BUS Methods */ 1441 /************************************************************************/ 1442 1443 1444 int 1445 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1446 struct resource *r) 1447 { 1448 struct cbb_softc *sc = device_get_softc(brdev); 1449 1450 if (sc->flags & CBB_16BIT_CARD) 1451 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1452 else 1453 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1454 r)); 1455 } 1456 1457 int 1458 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1459 int rid, struct resource *r) 1460 { 1461 struct cbb_softc *sc = device_get_softc(brdev); 1462 1463 if (sc->flags & CBB_16BIT_CARD) 1464 return (cbb_pcic_deactivate_resource(brdev, child, type, 1465 rid, r)); 1466 else 1467 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1468 rid, r)); 1469 } 1470 1471 struct resource * 1472 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1473 u_long start, u_long end, u_long count, u_int flags) 1474 { 1475 struct cbb_softc *sc = device_get_softc(brdev); 1476 1477 if (sc->flags & CBB_16BIT_CARD) 1478 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1479 start, end, count, flags)); 1480 else 1481 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1482 start, end, count, flags)); 1483 } 1484 1485 int 1486 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1487 struct resource *r) 1488 { 1489 struct cbb_softc *sc = device_get_softc(brdev); 1490 1491 if (sc->flags & CBB_16BIT_CARD) 1492 return (cbb_pcic_release_resource(brdev, child, type, 1493 rid, r)); 1494 else 1495 return (cbb_cardbus_release_resource(brdev, child, type, 1496 rid, r)); 1497 } 1498 1499 int 1500 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1501 { 1502 struct cbb_softc *sc = device_get_softc(brdev); 1503 1504 switch (which) { 1505 case PCIB_IVAR_DOMAIN: 1506 *result = sc->domain; 1507 return (0); 1508 case PCIB_IVAR_BUS: 1509 *result = sc->secbus; 1510 return (0); 1511 } 1512 return (ENOENT); 1513 } 1514 1515 int 1516 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1517 { 1518 struct cbb_softc *sc = device_get_softc(brdev); 1519 1520 switch (which) { 1521 case PCIB_IVAR_DOMAIN: 1522 return (EINVAL); 1523 case PCIB_IVAR_BUS: 1524 sc->secbus = value; 1525 return (0); 1526 } 1527 return (ENOENT); 1528 } 1529 1530 int 1531 cbb_suspend(device_t self) 1532 { 1533 int error = 0; 1534 struct cbb_softc *sc = device_get_softc(self); 1535 1536 error = bus_generic_suspend(self); 1537 if (error != 0) 1538 return (error); 1539 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1540 sc->cardok = 0; /* Card is bogus now */ 1541 return (0); 1542 } 1543 1544 int 1545 cbb_resume(device_t self) 1546 { 1547 int error = 0; 1548 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1549 uint32_t tmp; 1550 1551 /* 1552 * Some BIOSes will not save the BARs for the pci chips, so we 1553 * must do it ourselves. If the BAR is reset to 0 for an I/O 1554 * device, it will read back as 0x1, so no explicit test for 1555 * memory devices are needed. 1556 * 1557 * Note: The PCI bus code should do this automatically for us on 1558 * suspend/resume, but until it does, we have to cope. 1559 */ 1560 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1561 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1562 rman_get_start(sc->base_res))); 1563 1564 sc->chipinit(sc); 1565 1566 /* reset interrupt -- Do we really need to do this? */ 1567 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1568 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1569 1570 /* CSC Interrupt: Card detect interrupt on */ 1571 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1572 1573 /* Signal the thread to wakeup. */ 1574 wakeup(&sc->intrhand); 1575 1576 error = bus_generic_resume(self); 1577 1578 return (error); 1579 } 1580 1581 int 1582 cbb_child_present(device_t self) 1583 { 1584 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1585 uint32_t sockstate; 1586 1587 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1588 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1589 } 1590