1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2000-2001 Jonathan Chen All rights reserved. 5 * Copyright (c) 2002-2004 M. Warner Losh <imp@FreeBSD.org> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /*- 31 * Copyright (c) 1998, 1999 and 2000 32 * HAYAKAWA Koichi. All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. All advertising materials mentioning features or use of this software 43 * must display the following acknowledgement: 44 * This product includes software developed by HAYAKAWA Koichi. 45 * 4. The name of the author may not be used to endorse or promote products 46 * derived from this software without specific prior written permission. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 51 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 52 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 53 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 54 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 55 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 56 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 57 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 /* 61 * Driver for PCI to CardBus Bridge chips 62 * 63 * References: 64 * TI Datasheets: 65 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 66 * 67 * Written by Jonathan Chen <jon@freebsd.org> 68 * The author would like to acknowledge: 69 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 70 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 71 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 72 * * David Cross: Author of the initial ugly hack for a specific cardbus card 73 */ 74 75 #include <sys/cdefs.h> 76 __FBSDID("$FreeBSD$"); 77 78 #include <sys/param.h> 79 #include <sys/bus.h> 80 #include <sys/condvar.h> 81 #include <sys/errno.h> 82 #include <sys/kernel.h> 83 #include <sys/module.h> 84 #include <sys/kthread.h> 85 #include <sys/lock.h> 86 #include <sys/malloc.h> 87 #include <sys/mutex.h> 88 #include <sys/proc.h> 89 #include <sys/rman.h> 90 #include <sys/sysctl.h> 91 #include <sys/systm.h> 92 #include <machine/bus.h> 93 #include <machine/resource.h> 94 95 #include <dev/pci/pcireg.h> 96 #include <dev/pci/pcivar.h> 97 #include <dev/pci/pcib_private.h> 98 99 #include <dev/pccard/pccardreg.h> 100 #include <dev/pccard/pccardvar.h> 101 102 #include <dev/exca/excareg.h> 103 #include <dev/exca/excavar.h> 104 105 #include <dev/pccbb/pccbbreg.h> 106 #include <dev/pccbb/pccbbvar.h> 107 108 #include "power_if.h" 109 #include "card_if.h" 110 #include "pcib_if.h" 111 112 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 113 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 114 115 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 116 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 117 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 118 pci_write_config(DEV, REG, ( \ 119 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 120 121 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 122 123 #define CBB_START_MEM 0x88000000 124 #define CBB_START_32_IO 0x1000 125 #define CBB_START_16_IO 0x100 126 127 devclass_t cbb_devclass; 128 129 /* sysctl vars */ 130 static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 131 "CBB parameters"); 132 133 /* There's no way to say TUNEABLE_LONG to get the right types */ 134 u_long cbb_start_mem = CBB_START_MEM; 135 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RWTUN, 136 &cbb_start_mem, CBB_START_MEM, 137 "Starting address for memory allocations"); 138 139 u_long cbb_start_16_io = CBB_START_16_IO; 140 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RWTUN, 141 &cbb_start_16_io, CBB_START_16_IO, 142 "Starting ioport for 16-bit cards"); 143 144 u_long cbb_start_32_io = CBB_START_32_IO; 145 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RWTUN, 146 &cbb_start_32_io, CBB_START_32_IO, 147 "Starting ioport for 32-bit cards"); 148 149 int cbb_debug = 0; 150 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RWTUN, &cbb_debug, 0, 151 "Verbose cardbus bridge debugging"); 152 153 static void cbb_insert(struct cbb_softc *sc); 154 static void cbb_removal(struct cbb_softc *sc); 155 static uint32_t cbb_detect_voltage(device_t brdev); 156 static int cbb_cardbus_reset_power(device_t brdev, device_t child, int on); 157 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 158 uint32_t end); 159 static int cbb_cardbus_mem_open(device_t brdev, int win, 160 uint32_t start, uint32_t end); 161 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 162 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 163 int type, int rid, struct resource *res); 164 static int cbb_cardbus_deactivate_resource(device_t brdev, 165 device_t child, int type, int rid, struct resource *res); 166 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 167 device_t child, int type, int *rid, rman_res_t start, 168 rman_res_t end, rman_res_t count, u_int flags); 169 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 170 int type, int rid, struct resource *res); 171 static int cbb_cardbus_power_enable_socket(device_t brdev, 172 device_t child); 173 static int cbb_cardbus_power_disable_socket(device_t brdev, 174 device_t child); 175 static int cbb_func_filt(void *arg); 176 static void cbb_func_intr(void *arg); 177 178 static void 179 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 180 { 181 struct cbb_reslist *rle; 182 183 SLIST_FOREACH(rle, &sc->rl, link) { 184 if (rle->res == res) { 185 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 186 free(rle, M_DEVBUF); 187 return; 188 } 189 } 190 } 191 192 static struct resource * 193 cbb_find_res(struct cbb_softc *sc, int type, int rid) 194 { 195 struct cbb_reslist *rle; 196 197 SLIST_FOREACH(rle, &sc->rl, link) 198 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 199 return (rle->res); 200 return (NULL); 201 } 202 203 static void 204 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 205 int rid) 206 { 207 struct cbb_reslist *rle; 208 209 /* 210 * Need to record allocated resource so we can iterate through 211 * it later. 212 */ 213 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 214 if (rle == NULL) 215 panic("cbb_cardbus_alloc_resource: can't record entry!"); 216 rle->res = res; 217 rle->type = type; 218 rle->rid = rid; 219 SLIST_INSERT_HEAD(&sc->rl, rle, link); 220 } 221 222 static void 223 cbb_destroy_res(struct cbb_softc *sc) 224 { 225 struct cbb_reslist *rle; 226 227 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 228 device_printf(sc->dev, "Danger Will Robinson: Resource " 229 "left allocated! This is a bug... " 230 "(rid=%x, type=%d, addr=%jx)\n", rle->rid, rle->type, 231 rman_get_start(rle->res)); 232 SLIST_REMOVE_HEAD(&sc->rl, link); 233 free(rle, M_DEVBUF); 234 } 235 } 236 237 /* 238 * Disable function interrupts by telling the bridge to generate IRQ1 239 * interrupts. These interrupts aren't really generated by the chip, since 240 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 241 * initialization, so this helps to work around the problem. 242 * 243 * XXX We can't do this workaround for all chipsets, because this 244 * XXX causes interference with the keyboard because somechipsets will 245 * XXX actually signal IRQ1 over their serial interrupt connections to 246 * XXX the south bridge. Disable it it for now. 247 */ 248 void 249 cbb_disable_func_intr(struct cbb_softc *sc) 250 { 251 #if 0 252 uint8_t reg; 253 254 reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 255 EXCA_INTR_IRQ_RESERVED1; 256 exca_putb(&sc->exca, EXCA_INTR, reg); 257 #endif 258 } 259 260 /* 261 * Enable function interrupts. We turn on function interrupts when the card 262 * requests an interrupt. The PCMCIA standard says that we should set 263 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 264 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 265 * cards. 266 */ 267 static void 268 cbb_enable_func_intr(struct cbb_softc *sc) 269 { 270 uint8_t reg; 271 272 reg = (exca_getb(&sc->exca, EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 273 EXCA_INTR_IRQ_NONE; 274 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 275 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 276 exca_putb(&sc->exca, EXCA_INTR, reg); 277 } 278 279 int 280 cbb_detach(device_t brdev) 281 { 282 struct cbb_softc *sc = device_get_softc(brdev); 283 device_t *devlist; 284 int tmp, tries, error, numdevs; 285 286 /* 287 * Before we delete the children (which we have to do because 288 * attach doesn't check for children busses correctly), we have 289 * to detach the children. Even if we didn't need to delete the 290 * children, we have to detach them. 291 */ 292 error = bus_generic_detach(brdev); 293 if (error != 0) 294 return (error); 295 296 /* 297 * Since the attach routine doesn't search for children before it 298 * attaches them to this device, we must delete them here in order 299 * for the kldload/unload case to work. If we failed to do that, then 300 * we'd get duplicate devices when cbb.ko was reloaded. 301 */ 302 tries = 10; 303 do { 304 error = device_get_children(brdev, &devlist, &numdevs); 305 if (error == 0) 306 break; 307 /* 308 * Try hard to cope with low memory. 309 */ 310 if (error == ENOMEM) { 311 pause("cbbnomem", 1); 312 continue; 313 } 314 } while (tries-- > 0); 315 for (tmp = 0; tmp < numdevs; tmp++) 316 device_delete_child(brdev, devlist[tmp]); 317 free(devlist, M_TEMP); 318 319 /* Turn off the interrupts */ 320 cbb_set(sc, CBB_SOCKET_MASK, 0); 321 322 /* reset 16-bit pcmcia bus */ 323 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 324 325 /* turn off power */ 326 cbb_power(brdev, CARD_OFF); 327 328 /* Ack the interrupt */ 329 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 330 331 /* 332 * Wait for the thread to die. kproc_exit will do a wakeup 333 * on the event thread's struct proc * so that we know it is 334 * safe to proceed. IF the thread is running, set the please 335 * die flag and wait for it to comply. Since the wakeup on 336 * the event thread happens only in kproc_exit, we don't 337 * need to loop here. 338 */ 339 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 340 mtx_lock(&sc->mtx); 341 sc->flags |= CBB_KTHREAD_DONE; 342 while (sc->flags & CBB_KTHREAD_RUNNING) { 343 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 344 wakeup(&sc->intrhand); 345 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 346 } 347 mtx_unlock(&sc->mtx); 348 349 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 350 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 351 sc->base_res); 352 mtx_destroy(&sc->mtx); 353 return (0); 354 } 355 356 int 357 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 358 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 359 void **cookiep) 360 { 361 struct cbb_intrhand *ih; 362 struct cbb_softc *sc = device_get_softc(dev); 363 int err; 364 365 if (filt == NULL && intr == NULL) 366 return (EINVAL); 367 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 368 if (ih == NULL) 369 return (ENOMEM); 370 *cookiep = ih; 371 ih->filt = filt; 372 ih->intr = intr; 373 ih->arg = arg; 374 ih->sc = sc; 375 /* 376 * XXX need to turn on ISA interrupts, if we ever support them, but 377 * XXX for now that's all we need to do. 378 */ 379 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 380 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 381 &ih->cookie); 382 if (err != 0) { 383 free(ih, M_DEVBUF); 384 return (err); 385 } 386 cbb_enable_func_intr(sc); 387 sc->cardok = 1; 388 return 0; 389 } 390 391 int 392 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 393 void *cookie) 394 { 395 struct cbb_intrhand *ih; 396 int err; 397 398 /* XXX Need to do different things for ISA interrupts. */ 399 ih = (struct cbb_intrhand *) cookie; 400 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 401 ih->cookie); 402 if (err != 0) 403 return (err); 404 free(ih, M_DEVBUF); 405 return (0); 406 } 407 408 void 409 cbb_driver_added(device_t brdev, driver_t *driver) 410 { 411 struct cbb_softc *sc = device_get_softc(brdev); 412 device_t *devlist; 413 device_t dev; 414 int tmp; 415 int numdevs; 416 int wake = 0; 417 418 DEVICE_IDENTIFY(driver, brdev); 419 tmp = device_get_children(brdev, &devlist, &numdevs); 420 if (tmp != 0) { 421 device_printf(brdev, "Cannot get children list, no reprobe\n"); 422 return; 423 } 424 for (tmp = 0; tmp < numdevs; tmp++) { 425 dev = devlist[tmp]; 426 if (device_get_state(dev) == DS_NOTPRESENT && 427 device_probe_and_attach(dev) == 0) 428 wake++; 429 } 430 free(devlist, M_TEMP); 431 432 if (wake > 0) 433 wakeup(&sc->intrhand); 434 } 435 436 void 437 cbb_child_detached(device_t brdev, device_t child) 438 { 439 struct cbb_softc *sc = device_get_softc(brdev); 440 441 /* I'm not sure we even need this */ 442 if (child != sc->cbdev && child != sc->exca.pccarddev) 443 device_printf(brdev, "Unknown child detached: %s\n", 444 device_get_nameunit(child)); 445 } 446 447 /************************************************************************/ 448 /* Kthreads */ 449 /************************************************************************/ 450 451 void 452 cbb_event_thread(void *arg) 453 { 454 struct cbb_softc *sc = arg; 455 uint32_t status; 456 int err; 457 int not_a_card = 0; 458 459 /* 460 * We need to act as a power sequencer on startup. Delay 2s/channel 461 * to ensure the other channels have had a chance to come up. We likely 462 * should add a lock that's shared on a per-slot basis so that only 463 * one power event can happen per slot at a time. 464 */ 465 pause("cbbstart", hz * device_get_unit(sc->dev) * 2); 466 mtx_lock(&sc->mtx); 467 sc->flags |= CBB_KTHREAD_RUNNING; 468 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 469 mtx_unlock(&sc->mtx); 470 status = cbb_get(sc, CBB_SOCKET_STATE); 471 DPRINTF(("Status is 0x%x\n", status)); 472 if (!CBB_CARD_PRESENT(status)) { 473 not_a_card = 0; /* We know card type */ 474 cbb_removal(sc); 475 } else if (status & CBB_STATE_NOT_A_CARD) { 476 /* 477 * Up to 10 times, try to rescan the card when we see 478 * NOT_A_CARD. 10 is somehwat arbitrary. When this 479 * pathology hits, there's a ~40% chance each try will 480 * fail. 10 tries takes about 5s and results in a 481 * 99.99% certainty of the results. 482 */ 483 if (not_a_card++ < 10) { 484 DEVPRINTF((sc->dev, 485 "Not a card bit set, rescanning\n")); 486 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 487 } else { 488 device_printf(sc->dev, 489 "Can't determine card type\n"); 490 } 491 } else { 492 not_a_card = 0; /* We know card type */ 493 cbb_insert(sc); 494 } 495 496 /* 497 * First time through we need to tell mountroot that we're 498 * done. 499 */ 500 if (sc->sc_root_token) { 501 root_mount_rel(sc->sc_root_token); 502 sc->sc_root_token = NULL; 503 } 504 505 /* 506 * Wait until it has been 250ms since the last time we 507 * get an interrupt. We handle the rest of the interrupt 508 * at the top of the loop. Although we clear the bit in the 509 * ISR, we signal sc->cv from the detach path after we've 510 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 511 * 250ms sleep here. 512 * 513 * In our ISR, we turn off the card changed interrupt. Turn 514 * them back on here before we wait for them to happen. We 515 * turn them on/off so that we can tolerate a large latency 516 * between the time we signal cbb_event_thread and it gets 517 * a chance to run. 518 */ 519 mtx_lock(&sc->mtx); 520 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 521 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 522 err = 0; 523 while (err != EWOULDBLOCK && 524 (sc->flags & CBB_KTHREAD_DONE) == 0) 525 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 526 } 527 DEVPRINTF((sc->dev, "Thread terminating\n")); 528 sc->flags &= ~CBB_KTHREAD_RUNNING; 529 mtx_unlock(&sc->mtx); 530 kproc_exit(0); 531 } 532 533 /************************************************************************/ 534 /* Insert/removal */ 535 /************************************************************************/ 536 537 static void 538 cbb_insert(struct cbb_softc *sc) 539 { 540 uint32_t sockevent, sockstate; 541 542 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 543 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 544 545 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 546 sockevent, sockstate)); 547 548 if (sockstate & CBB_STATE_R2_CARD) { 549 if (device_is_attached(sc->exca.pccarddev)) { 550 sc->flags |= CBB_16BIT_CARD; 551 exca_insert(&sc->exca); 552 } else { 553 device_printf(sc->dev, 554 "16-bit card inserted, but no pccard bus.\n"); 555 } 556 } else if (sockstate & CBB_STATE_CB_CARD) { 557 if (device_is_attached(sc->cbdev)) { 558 sc->flags &= ~CBB_16BIT_CARD; 559 CARD_ATTACH_CARD(sc->cbdev); 560 } else { 561 device_printf(sc->dev, 562 "CardBus card inserted, but no cardbus bus.\n"); 563 } 564 } else { 565 /* 566 * We should power the card down, and try again a couple of 567 * times if this happens. XXX 568 */ 569 device_printf(sc->dev, "Unsupported card type detected\n"); 570 } 571 } 572 573 static void 574 cbb_removal(struct cbb_softc *sc) 575 { 576 sc->cardok = 0; 577 if (sc->flags & CBB_16BIT_CARD) { 578 exca_removal(&sc->exca); 579 } else { 580 if (device_is_attached(sc->cbdev)) 581 CARD_DETACH_CARD(sc->cbdev); 582 } 583 cbb_destroy_res(sc); 584 } 585 586 /************************************************************************/ 587 /* Interrupt Handler */ 588 /************************************************************************/ 589 590 static int 591 cbb_func_filt(void *arg) 592 { 593 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 594 struct cbb_softc *sc = ih->sc; 595 596 /* 597 * Make sure that the card is really there. 598 */ 599 if (!sc->cardok) 600 return (FILTER_STRAY); 601 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 602 sc->cardok = 0; 603 return (FILTER_HANDLED); 604 } 605 606 /* 607 * nb: don't have to check for giant or not, since that's done in the 608 * ISR dispatch and one can't hold Giant in a filter anyway... 609 */ 610 return ((*ih->filt)(ih->arg)); 611 } 612 613 static void 614 cbb_func_intr(void *arg) 615 { 616 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 617 struct cbb_softc *sc = ih->sc; 618 619 /* 620 * While this check may seem redundant, it helps close a race 621 * condition. If the card is ejected after the filter runs, but 622 * before this ISR can be scheduled, then we need to do the same 623 * filtering to prevent the card's ISR from being called. One could 624 * argue that the card's ISR should be able to cope, but experience 625 * has shown they can't always. This mitigates the problem by making 626 * the race quite a bit smaller. Properly written client ISRs should 627 * cope with the card going away in the middle of the ISR. We assume 628 * that drivers that are sophisticated enough to use filters don't 629 * need our protection. This also allows us to ensure they *ARE* 630 * called if their filter said they needed to be called. 631 */ 632 if (ih->filt == NULL) { 633 if (!sc->cardok) 634 return; 635 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 636 sc->cardok = 0; 637 return; 638 } 639 } 640 641 /* 642 * Call the registered ithread interrupt handler. This entire routine 643 * will be called with Giant if this isn't an MP safe driver, or not 644 * if it is. Either way, we don't have to worry. 645 */ 646 ih->intr(ih->arg); 647 } 648 649 /************************************************************************/ 650 /* Generic Power functions */ 651 /************************************************************************/ 652 653 static uint32_t 654 cbb_detect_voltage(device_t brdev) 655 { 656 struct cbb_softc *sc = device_get_softc(brdev); 657 uint32_t psr; 658 uint32_t vol = CARD_UKN_CARD; 659 660 psr = cbb_get(sc, CBB_SOCKET_STATE); 661 662 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 663 vol |= CARD_5V_CARD; 664 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 665 vol |= CARD_3V_CARD; 666 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 667 vol |= CARD_XV_CARD; 668 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 669 vol |= CARD_YV_CARD; 670 671 return (vol); 672 } 673 674 static uint8_t 675 cbb_o2micro_power_hack(struct cbb_softc *sc) 676 { 677 uint8_t reg; 678 679 /* 680 * Issue #2: INT# not qualified with IRQ Routing Bit. An 681 * unexpected PCI INT# may be generated during PC Card 682 * initialization even with the IRQ Routing Bit Set with some 683 * PC Cards. 684 * 685 * This is a two part issue. The first part is that some of 686 * our older controllers have an issue in which the slot's PCI 687 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 688 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 689 * is selected (ExCA register 03h bits 3:0, of the slot, are 690 * cleared) we will generate INT# if IREQ# is asserted. The 691 * second part is because some PC Cards prematurally assert 692 * IREQ# before the ExCA registers are fully programmed. This 693 * in turn asserts INT# because ExCA register 03h bits 3:0 694 * (ISA IRQ Select) are not yet programmed. 695 * 696 * The fix for this issue, which will work for any controller 697 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 698 * (select IRQ1), of the slot, before turning on slot power. 699 * Selecting IRQ1 will result in INT# NOT being asserted 700 * (because IRQ1 is selected), and IRQ1 won't be asserted 701 * because our controllers don't generate IRQ1. 702 * 703 * Other, non O2Micro controllers will generate irq 1 in some 704 * situations, so we can't do this hack for everybody. Reports of 705 * keyboard controller's interrupts being suppressed occurred when 706 * we did this. 707 */ 708 reg = exca_getb(&sc->exca, EXCA_INTR); 709 exca_putb(&sc->exca, EXCA_INTR, (reg & 0xf0) | 1); 710 return (reg); 711 } 712 713 /* 714 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 715 * we don't have an interrupt storm on power on. This has the effect of 716 * disabling card status change interrupts for the duration of poweron. 717 */ 718 static void 719 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 720 { 721 exca_putb(&sc->exca, EXCA_INTR, reg); 722 } 723 724 int 725 cbb_power(device_t brdev, int volts) 726 { 727 uint32_t status, sock_ctrl, reg_ctrl, mask; 728 struct cbb_softc *sc = device_get_softc(brdev); 729 int cnt, sane; 730 int retval = 0; 731 int on = 0; 732 uint8_t reg = 0; 733 734 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 735 736 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 737 switch (volts & CARD_VCCMASK) { 738 case 5: 739 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 740 on++; 741 break; 742 case 3: 743 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 744 on++; 745 break; 746 case XV: 747 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 748 on++; 749 break; 750 case YV: 751 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 752 on++; 753 break; 754 case 0: 755 break; 756 default: 757 return (0); /* power NEVER changed */ 758 } 759 760 /* VPP == VCC */ 761 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 762 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 763 764 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 765 return (1); /* no change necessary */ 766 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 767 if (volts != 0 && sc->chipset == CB_O2MICRO) 768 reg = cbb_o2micro_power_hack(sc); 769 770 /* 771 * We have to mask the card change detect interrupt while we're 772 * messing with the power. It is allowed to bounce while we're 773 * messing with power as things settle down. In addition, we mask off 774 * the card's function interrupt by routing it via the ISA bus. This 775 * bit generally only affects 16-bit cards. Some bridges allow one to 776 * set another bit to have it also affect 32-bit cards. Since 32-bit 777 * cards are required to be better behaved, we don't bother to get 778 * into those bridge specific features. 779 * 780 * XXX I wonder if we need to enable the READY bit interrupt in the 781 * EXCA CSC register for 16-bit cards, and disable the CD bit? 782 */ 783 mask = cbb_get(sc, CBB_SOCKET_MASK); 784 mask |= CBB_SOCKET_MASK_POWER; 785 mask &= ~CBB_SOCKET_MASK_CD; 786 cbb_set(sc, CBB_SOCKET_MASK, mask); 787 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 788 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 789 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 790 if (on) { 791 mtx_lock(&sc->mtx); 792 cnt = sc->powerintr; 793 /* 794 * We have a shortish timeout of 500ms here. Some bridges do 795 * not generate a POWER_CYCLE event for 16-bit cards. In 796 * those cases, we have to cope the best we can, and having 797 * only a short delay is better than the alternatives. Others 798 * raise the power cycle a smidge before it is really ready. 799 * We deal with those below. 800 */ 801 sane = 10; 802 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 803 cnt == sc->powerintr && sane-- > 0) 804 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 805 mtx_unlock(&sc->mtx); 806 807 /* 808 * Relax for 100ms. Some bridges appear to assert this signal 809 * right away, but before the card has stabilized. Other 810 * cards need need more time to cope up reliabily. 811 * Experiments with troublesome setups show this to be a 812 * "cheap" way to enhance reliabilty. We need not do this for 813 * "off" since we don't touch the card after we turn it off. 814 */ 815 pause("cbbPwr", min(hz / 10, 1)); 816 817 /* 818 * The TOPIC95B requires a little bit extra time to get its 819 * act together, so delay for an additional 100ms. Also as 820 * documented below, it doesn't seem to set the POWER_CYCLE 821 * bit, so don't whine if it never came on. 822 */ 823 if (sc->chipset == CB_TOPIC95) 824 pause("cbb95B", hz / 10); 825 else if (sane <= 0) 826 device_printf(sc->dev, "power timeout, doom?\n"); 827 } 828 829 /* 830 * After the power is good, we can turn off the power interrupt. 831 * However, the PC Card standard says that we must delay turning the 832 * CD bit back on for a bit to allow for bouncyness on power down 833 * (recall that we don't wait above for a power down, since we don't 834 * get an interrupt for that). We're called either from the suspend 835 * code in which case we don't want to turn card change on again, or 836 * we're called from the card insertion code, in which case the cbb 837 * thread will turn it on for us before it waits to be woken by a 838 * change event. 839 * 840 * NB: Topic95B doesn't set the power cycle bit. we assume that 841 * both it and the TOPIC95 behave the same. 842 */ 843 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 844 status = cbb_get(sc, CBB_SOCKET_STATE); 845 if (on && sc->chipset != CB_TOPIC95) { 846 if ((status & CBB_STATE_POWER_CYCLE) == 0) 847 device_printf(sc->dev, "Power not on?\n"); 848 } 849 if (status & CBB_STATE_BAD_VCC_REQ) { 850 device_printf(sc->dev, "Bad Vcc requested\n"); 851 /* 852 * Turn off the power, and try again. Retrigger other 853 * active interrupts via force register. From NetBSD 854 * PR 36652, coded by me to description there. 855 */ 856 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 857 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 858 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 859 status &= ~CBB_STATE_BAD_VCC_REQ; 860 status &= ~CBB_STATE_DATA_LOST; 861 status |= CBB_FORCE_CV_TEST; 862 cbb_set(sc, CBB_SOCKET_FORCE, status); 863 goto done; 864 } 865 if (sc->chipset == CB_TOPIC97) { 866 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 867 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 868 if (on) 869 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 870 else 871 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 872 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 873 } 874 retval = 1; 875 done:; 876 if (volts != 0 && sc->chipset == CB_O2MICRO) 877 cbb_o2micro_power_hack2(sc, reg); 878 return (retval); 879 } 880 881 static int 882 cbb_current_voltage(device_t brdev) 883 { 884 struct cbb_softc *sc = device_get_softc(brdev); 885 uint32_t ctrl; 886 887 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 888 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 889 case CBB_SOCKET_CTRL_VCC_5V: 890 return CARD_5V_CARD; 891 case CBB_SOCKET_CTRL_VCC_3V: 892 return CARD_3V_CARD; 893 case CBB_SOCKET_CTRL_VCC_XV: 894 return CARD_XV_CARD; 895 case CBB_SOCKET_CTRL_VCC_YV: 896 return CARD_YV_CARD; 897 } 898 return 0; 899 } 900 901 /* 902 * detect the voltage for the card, and set it. Since the power 903 * used is the square of the voltage, lower voltages is a big win 904 * and what Windows does (and what Microsoft prefers). The MS paper 905 * also talks about preferring the CIS entry as well, but that has 906 * to be done elsewhere. We also optimize power sequencing here 907 * and don't change things if we're already powered up at a supported 908 * voltage. 909 * 910 * In addition, we power up with OE disabled. We'll set it later 911 * in the power up sequence. 912 */ 913 static int 914 cbb_do_power(device_t brdev) 915 { 916 struct cbb_softc *sc = device_get_softc(brdev); 917 uint32_t voltage, curpwr; 918 uint32_t status; 919 920 /* Don't enable OE (output enable) until power stable */ 921 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE); 922 923 voltage = cbb_detect_voltage(brdev); 924 curpwr = cbb_current_voltage(brdev); 925 status = cbb_get(sc, CBB_SOCKET_STATE); 926 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 927 return 0; 928 /* Prefer lowest voltage supported */ 929 cbb_power(brdev, CARD_OFF); 930 if (voltage & CARD_YV_CARD) 931 cbb_power(brdev, CARD_VCC(YV)); 932 else if (voltage & CARD_XV_CARD) 933 cbb_power(brdev, CARD_VCC(XV)); 934 else if (voltage & CARD_3V_CARD) 935 cbb_power(brdev, CARD_VCC(3)); 936 else if (voltage & CARD_5V_CARD) 937 cbb_power(brdev, CARD_VCC(5)); 938 else { 939 device_printf(brdev, "Unknown card voltage\n"); 940 return (ENXIO); 941 } 942 return (0); 943 } 944 945 /************************************************************************/ 946 /* CardBus power functions */ 947 /************************************************************************/ 948 949 static int 950 cbb_cardbus_reset_power(device_t brdev, device_t child, int on) 951 { 952 struct cbb_softc *sc = device_get_softc(brdev); 953 uint32_t b, h; 954 int delay, count, zero_seen, func; 955 956 /* 957 * Asserting reset for 20ms is necessary for most bridges. For some 958 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 959 * root cause of this is unknown, and NetBSD does the same thing. 960 */ 961 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 962 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 963 pause("cbbP3", hz * delay / 1000); 964 965 /* 966 * If a card exists and we're turning it on, take it out of reset. 967 * After clearing reset, wait up to 1.1s for the first configuration 968 * register (vendor/product) configuration register of device 0.0 to 969 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 970 * says that when powering up the card, the PCI Spec v2.1 must be 971 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 972 * Config Access) is at most 2^25 clocks, or just over 1s. Section 973 * 2.2.1 states any card not ready to participate in bus transactions 974 * must tristate its outputs. Therefore, any access to its 975 * configuration registers must be ignored. In that state, the config 976 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 977 * 0xffff is invalid, so this can never match a real card. Print a 978 * warning if it never returns a real id. The PCMCIA PC Card 979 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 980 * a cardbus bus, so that's the only register we check here. 981 */ 982 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 983 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 984 &~CBBM_BRIDGECTRL_RESET, 2); 985 b = pcib_get_bus(child); 986 count = 1100 / 20; 987 do { 988 pause("cbbP4", hz * 2 / 100); 989 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 990 0xfffffffful && --count >= 0); 991 if (count < 0) 992 device_printf(brdev, "Warning: Bus reset timeout\n"); 993 994 /* 995 * Some cards (so far just an atheros card I have) seem to 996 * come out of reset in a funky state. They report they are 997 * multi-function cards, but have nonsense for some of the 998 * higher functions. So if the card claims to be MFDEV, and 999 * any of the higher functions' ID is 0, then we've hit the 1000 * bug and we'll try again. 1001 */ 1002 h = PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_HDRTYPE, 1); 1003 if ((h & PCIM_MFDEV) == 0) 1004 return 0; 1005 zero_seen = 0; 1006 for (func = 1; func < 8; func++) { 1007 h = PCIB_READ_CONFIG(brdev, b, 0, func, 1008 PCIR_DEVVENDOR, 4); 1009 if (h == 0) 1010 zero_seen++; 1011 } 1012 if (!zero_seen) 1013 return 0; 1014 return (EINVAL); 1015 } 1016 return 0; 1017 } 1018 1019 static int 1020 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1021 { 1022 cbb_power(brdev, CARD_OFF); 1023 cbb_cardbus_reset_power(brdev, child, 0); 1024 return (0); 1025 } 1026 1027 static int 1028 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1029 { 1030 struct cbb_softc *sc = device_get_softc(brdev); 1031 int err, count; 1032 1033 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 1034 return (ENODEV); 1035 1036 count = 10; 1037 do { 1038 err = cbb_do_power(brdev); 1039 if (err) 1040 return (err); 1041 err = cbb_cardbus_reset_power(brdev, child, 1); 1042 if (err) { 1043 device_printf(brdev, "Reset failed, trying again.\n"); 1044 cbb_cardbus_power_disable_socket(brdev, child); 1045 pause("cbbErr1", hz / 10); /* wait 100ms */ 1046 } 1047 } while (err != 0 && count-- > 0); 1048 return (0); 1049 } 1050 1051 /************************************************************************/ 1052 /* CardBus Resource */ 1053 /************************************************************************/ 1054 1055 static void 1056 cbb_activate_window(device_t brdev, int type) 1057 { 1058 1059 PCI_ENABLE_IO(device_get_parent(brdev), brdev, type); 1060 } 1061 1062 static int 1063 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1064 { 1065 int basereg; 1066 int limitreg; 1067 1068 if ((win < 0) || (win > 1)) { 1069 DEVPRINTF((brdev, 1070 "cbb_cardbus_io_open: window out of range %d\n", win)); 1071 return (EINVAL); 1072 } 1073 1074 basereg = win * 8 + CBBR_IOBASE0; 1075 limitreg = win * 8 + CBBR_IOLIMIT0; 1076 1077 pci_write_config(brdev, basereg, start, 4); 1078 pci_write_config(brdev, limitreg, end, 4); 1079 cbb_activate_window(brdev, SYS_RES_IOPORT); 1080 return (0); 1081 } 1082 1083 static int 1084 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1085 { 1086 int basereg; 1087 int limitreg; 1088 1089 if ((win < 0) || (win > 1)) { 1090 DEVPRINTF((brdev, 1091 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1092 return (EINVAL); 1093 } 1094 1095 basereg = win * 8 + CBBR_MEMBASE0; 1096 limitreg = win * 8 + CBBR_MEMLIMIT0; 1097 1098 pci_write_config(brdev, basereg, start, 4); 1099 pci_write_config(brdev, limitreg, end, 4); 1100 cbb_activate_window(brdev, SYS_RES_MEMORY); 1101 return (0); 1102 } 1103 1104 #define START_NONE 0xffffffff 1105 #define END_NONE 0 1106 1107 static void 1108 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1109 { 1110 uint32_t starts[2]; 1111 uint32_t ends[2]; 1112 struct cbb_reslist *rle; 1113 int align, i; 1114 uint32_t reg; 1115 1116 starts[0] = starts[1] = START_NONE; 1117 ends[0] = ends[1] = END_NONE; 1118 1119 if (type == SYS_RES_MEMORY) 1120 align = CBB_MEMALIGN; 1121 else if (type == SYS_RES_IOPORT) 1122 align = CBB_IOALIGN; 1123 else 1124 align = 1; 1125 1126 SLIST_FOREACH(rle, &sc->rl, link) { 1127 if (rle->type != type) 1128 continue; 1129 if (rle->res == NULL) 1130 continue; 1131 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1132 continue; 1133 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1134 i = 1; 1135 else 1136 i = 0; 1137 if (rman_get_start(rle->res) < starts[i]) 1138 starts[i] = rman_get_start(rle->res); 1139 if (rman_get_end(rle->res) > ends[i]) 1140 ends[i] = rman_get_end(rle->res); 1141 } 1142 for (i = 0; i < 2; i++) { 1143 if (starts[i] == START_NONE) 1144 continue; 1145 starts[i] &= ~(align - 1); 1146 ends[i] = roundup2(ends[i], align) - 1; 1147 } 1148 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1149 if (starts[0] < starts[1]) { 1150 if (ends[0] > starts[1]) { 1151 device_printf(sc->dev, "Overlapping ranges" 1152 " for prefetch and non-prefetch memory\n"); 1153 return; 1154 } 1155 } else { 1156 if (ends[1] > starts[0]) { 1157 device_printf(sc->dev, "Overlapping ranges" 1158 " for prefetch and non-prefetch memory\n"); 1159 return; 1160 } 1161 } 1162 } 1163 1164 if (type == SYS_RES_MEMORY) { 1165 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1166 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1167 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1168 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1169 CBBM_BRIDGECTRL_PREFETCH_1); 1170 if (starts[1] != START_NONE) 1171 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1172 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1173 if (bootverbose) { 1174 device_printf(sc->dev, "Opening memory:\n"); 1175 if (starts[0] != START_NONE) 1176 device_printf(sc->dev, "Normal: %#x-%#x\n", 1177 starts[0], ends[0]); 1178 if (starts[1] != START_NONE) 1179 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1180 starts[1], ends[1]); 1181 } 1182 } else if (type == SYS_RES_IOPORT) { 1183 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1184 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1185 if (bootverbose && starts[0] != START_NONE) 1186 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1187 starts[0], ends[0]); 1188 } 1189 } 1190 1191 static int 1192 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1193 int rid, struct resource *res) 1194 { 1195 int ret; 1196 1197 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1198 type, rid, res); 1199 if (ret != 0) 1200 return (ret); 1201 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1202 return (0); 1203 } 1204 1205 static int 1206 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1207 int rid, struct resource *res) 1208 { 1209 int ret; 1210 1211 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1212 type, rid, res); 1213 if (ret != 0) 1214 return (ret); 1215 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1216 return (0); 1217 } 1218 1219 static struct resource * 1220 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1221 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1222 { 1223 struct cbb_softc *sc = device_get_softc(brdev); 1224 int tmp; 1225 struct resource *res; 1226 rman_res_t align; 1227 1228 switch (type) { 1229 case SYS_RES_IRQ: 1230 tmp = rman_get_start(sc->irq_res); 1231 if (start > tmp || end < tmp || count != 1) { 1232 device_printf(child, "requested interrupt %jd-%jd," 1233 "count = %jd not supported by cbb\n", 1234 start, end, count); 1235 return (NULL); 1236 } 1237 start = end = tmp; 1238 flags |= RF_SHAREABLE; 1239 break; 1240 case SYS_RES_IOPORT: 1241 if (start <= cbb_start_32_io) 1242 start = cbb_start_32_io; 1243 if (end < start) 1244 end = start; 1245 if (count > (1 << RF_ALIGNMENT(flags))) 1246 flags = (flags & ~RF_ALIGNMENT_MASK) | 1247 rman_make_alignment_flags(count); 1248 break; 1249 case SYS_RES_MEMORY: 1250 if (start <= cbb_start_mem) 1251 start = cbb_start_mem; 1252 if (end < start) 1253 end = start; 1254 if (count < CBB_MEMALIGN) 1255 align = CBB_MEMALIGN; 1256 else 1257 align = count; 1258 if (align > (1 << RF_ALIGNMENT(flags))) 1259 flags = (flags & ~RF_ALIGNMENT_MASK) | 1260 rman_make_alignment_flags(align); 1261 break; 1262 } 1263 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1264 start, end, count, flags & ~RF_ACTIVE); 1265 if (res == NULL) { 1266 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1267 return (NULL); 1268 } 1269 cbb_insert_res(sc, res, type, *rid); 1270 if (flags & RF_ACTIVE) 1271 if (bus_activate_resource(child, type, *rid, res) != 0) { 1272 bus_release_resource(child, type, *rid, res); 1273 return (NULL); 1274 } 1275 1276 return (res); 1277 } 1278 1279 static int 1280 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1281 int rid, struct resource *res) 1282 { 1283 struct cbb_softc *sc = device_get_softc(brdev); 1284 int error; 1285 1286 if (rman_get_flags(res) & RF_ACTIVE) { 1287 error = bus_deactivate_resource(child, type, rid, res); 1288 if (error != 0) 1289 return (error); 1290 } 1291 cbb_remove_res(sc, res); 1292 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1293 type, rid, res)); 1294 } 1295 1296 /************************************************************************/ 1297 /* PC Card Power Functions */ 1298 /************************************************************************/ 1299 1300 static int 1301 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1302 { 1303 struct cbb_softc *sc = device_get_softc(brdev); 1304 int err; 1305 1306 DPRINTF(("cbb_pcic_socket_enable:\n")); 1307 1308 /* power down/up the socket to reset */ 1309 err = cbb_do_power(brdev); 1310 if (err) 1311 return (err); 1312 exca_reset(&sc->exca, child); 1313 1314 return (0); 1315 } 1316 1317 static int 1318 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1319 { 1320 struct cbb_softc *sc = device_get_softc(brdev); 1321 1322 DPRINTF(("cbb_pcic_socket_disable\n")); 1323 1324 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1325 exca_putb(&sc->exca, EXCA_INTR, 0); 1326 pause("cbbP1", hz / 100); 1327 1328 /* power down the socket */ 1329 cbb_power(brdev, CARD_OFF); 1330 exca_putb(&sc->exca, EXCA_PWRCTL, 0); 1331 1332 /* wait 300ms until power fails (Tpf). */ 1333 pause("cbbP2", hz * 300 / 1000); 1334 1335 /* enable CSC interrupts */ 1336 exca_putb(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE); 1337 return (0); 1338 } 1339 1340 /************************************************************************/ 1341 /* POWER methods */ 1342 /************************************************************************/ 1343 1344 int 1345 cbb_power_enable_socket(device_t brdev, device_t child) 1346 { 1347 struct cbb_softc *sc = device_get_softc(brdev); 1348 1349 if (sc->flags & CBB_16BIT_CARD) 1350 return (cbb_pcic_power_enable_socket(brdev, child)); 1351 return (cbb_cardbus_power_enable_socket(brdev, child)); 1352 } 1353 1354 int 1355 cbb_power_disable_socket(device_t brdev, device_t child) 1356 { 1357 struct cbb_softc *sc = device_get_softc(brdev); 1358 if (sc->flags & CBB_16BIT_CARD) 1359 return (cbb_pcic_power_disable_socket(brdev, child)); 1360 return (cbb_cardbus_power_disable_socket(brdev, child)); 1361 } 1362 1363 static int 1364 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1365 struct resource *res) 1366 { 1367 struct cbb_softc *sc = device_get_softc(brdev); 1368 int error; 1369 1370 error = exca_activate_resource(&sc->exca, child, type, rid, res); 1371 if (error == 0) 1372 cbb_activate_window(brdev, type); 1373 return (error); 1374 } 1375 1376 static int 1377 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1378 int rid, struct resource *res) 1379 { 1380 struct cbb_softc *sc = device_get_softc(brdev); 1381 return (exca_deactivate_resource(&sc->exca, child, type, rid, res)); 1382 } 1383 1384 static struct resource * 1385 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1386 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1387 { 1388 struct resource *res = NULL; 1389 struct cbb_softc *sc = device_get_softc(brdev); 1390 int align; 1391 int tmp; 1392 1393 switch (type) { 1394 case SYS_RES_MEMORY: 1395 if (start < cbb_start_mem) 1396 start = cbb_start_mem; 1397 if (end < start) 1398 end = start; 1399 if (count < CBB_MEMALIGN) 1400 align = CBB_MEMALIGN; 1401 else 1402 align = count; 1403 if (align > (1 << RF_ALIGNMENT(flags))) 1404 flags = (flags & ~RF_ALIGNMENT_MASK) | 1405 rman_make_alignment_flags(align); 1406 break; 1407 case SYS_RES_IOPORT: 1408 if (start < cbb_start_16_io) 1409 start = cbb_start_16_io; 1410 if (end < start) 1411 end = start; 1412 break; 1413 case SYS_RES_IRQ: 1414 tmp = rman_get_start(sc->irq_res); 1415 if (start > tmp || end < tmp || count != 1) { 1416 device_printf(child, "requested interrupt %jd-%jd," 1417 "count = %jd not supported by cbb\n", 1418 start, end, count); 1419 return (NULL); 1420 } 1421 flags |= RF_SHAREABLE; 1422 start = end = rman_get_start(sc->irq_res); 1423 break; 1424 } 1425 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1426 start, end, count, flags & ~RF_ACTIVE); 1427 if (res == NULL) 1428 return (NULL); 1429 cbb_insert_res(sc, res, type, *rid); 1430 if (flags & RF_ACTIVE) { 1431 if (bus_activate_resource(child, type, *rid, res) != 0) { 1432 bus_release_resource(child, type, *rid, res); 1433 return (NULL); 1434 } 1435 } 1436 1437 return (res); 1438 } 1439 1440 static int 1441 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1442 int rid, struct resource *res) 1443 { 1444 struct cbb_softc *sc = device_get_softc(brdev); 1445 int error; 1446 1447 if (rman_get_flags(res) & RF_ACTIVE) { 1448 error = bus_deactivate_resource(child, type, rid, res); 1449 if (error != 0) 1450 return (error); 1451 } 1452 cbb_remove_res(sc, res); 1453 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1454 type, rid, res)); 1455 } 1456 1457 /************************************************************************/ 1458 /* PC Card methods */ 1459 /************************************************************************/ 1460 1461 int 1462 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1463 u_long flags) 1464 { 1465 struct cbb_softc *sc = device_get_softc(brdev); 1466 struct resource *res; 1467 1468 if (type != SYS_RES_MEMORY) 1469 return (EINVAL); 1470 res = cbb_find_res(sc, type, rid); 1471 if (res == NULL) { 1472 device_printf(brdev, 1473 "set_res_flags: specified rid not found\n"); 1474 return (ENOENT); 1475 } 1476 return (exca_mem_set_flags(&sc->exca, res, flags)); 1477 } 1478 1479 int 1480 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1481 uint32_t cardaddr, uint32_t *deltap) 1482 { 1483 struct cbb_softc *sc = device_get_softc(brdev); 1484 struct resource *res; 1485 1486 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1487 if (res == NULL) { 1488 device_printf(brdev, 1489 "set_memory_offset: specified rid not found\n"); 1490 return (ENOENT); 1491 } 1492 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap)); 1493 } 1494 1495 /************************************************************************/ 1496 /* BUS Methods */ 1497 /************************************************************************/ 1498 1499 int 1500 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1501 struct resource *r) 1502 { 1503 struct cbb_softc *sc = device_get_softc(brdev); 1504 1505 if (sc->flags & CBB_16BIT_CARD) 1506 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1507 else 1508 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1509 r)); 1510 } 1511 1512 int 1513 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1514 int rid, struct resource *r) 1515 { 1516 struct cbb_softc *sc = device_get_softc(brdev); 1517 1518 if (sc->flags & CBB_16BIT_CARD) 1519 return (cbb_pcic_deactivate_resource(brdev, child, type, 1520 rid, r)); 1521 else 1522 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1523 rid, r)); 1524 } 1525 1526 struct resource * 1527 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1528 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1529 { 1530 struct cbb_softc *sc = device_get_softc(brdev); 1531 1532 if (sc->flags & CBB_16BIT_CARD) 1533 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1534 start, end, count, flags)); 1535 else 1536 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1537 start, end, count, flags)); 1538 } 1539 1540 int 1541 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1542 struct resource *r) 1543 { 1544 struct cbb_softc *sc = device_get_softc(brdev); 1545 1546 if (sc->flags & CBB_16BIT_CARD) 1547 return (cbb_pcic_release_resource(brdev, child, type, 1548 rid, r)); 1549 else 1550 return (cbb_cardbus_release_resource(brdev, child, type, 1551 rid, r)); 1552 } 1553 1554 int 1555 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1556 { 1557 struct cbb_softc *sc = device_get_softc(brdev); 1558 1559 switch (which) { 1560 case PCIB_IVAR_DOMAIN: 1561 *result = sc->domain; 1562 return (0); 1563 case PCIB_IVAR_BUS: 1564 *result = sc->bus.sec; 1565 return (0); 1566 case EXCA_IVAR_SLOT: 1567 *result = 0; 1568 return (0); 1569 } 1570 return (ENOENT); 1571 } 1572 1573 int 1574 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1575 { 1576 1577 switch (which) { 1578 case PCIB_IVAR_DOMAIN: 1579 return (EINVAL); 1580 case PCIB_IVAR_BUS: 1581 return (EINVAL); 1582 case EXCA_IVAR_SLOT: 1583 return (EINVAL); 1584 } 1585 return (ENOENT); 1586 } 1587 1588 int 1589 cbb_child_present(device_t parent, device_t child) 1590 { 1591 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent); 1592 uint32_t sockstate; 1593 1594 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1595 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1596 } 1597