1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/interrupt.h> 88 #include <sys/lock.h> 89 #include <sys/malloc.h> 90 #include <sys/mutex.h> 91 #include <sys/proc.h> 92 #include <sys/rman.h> 93 #include <sys/sysctl.h> 94 #include <sys/systm.h> 95 #include <machine/bus.h> 96 #include <machine/resource.h> 97 98 #include <dev/pci/pcireg.h> 99 #include <dev/pci/pcivar.h> 100 101 #include <dev/pccard/pccardreg.h> 102 #include <dev/pccard/pccardvar.h> 103 104 #include <dev/exca/excareg.h> 105 #include <dev/exca/excavar.h> 106 107 #include <dev/pccbb/pccbbreg.h> 108 #include <dev/pccbb/pccbbvar.h> 109 110 #include "power_if.h" 111 #include "card_if.h" 112 #include "pcib_if.h" 113 114 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 115 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 116 117 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 118 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 119 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 120 pci_write_config(DEV, REG, ( \ 121 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 122 123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 124 125 #define CBB_START_MEM 0x88000000 126 #define CBB_START_32_IO 0x1000 127 #define CBB_START_16_IO 0x100 128 129 devclass_t cbb_devclass; 130 131 /* sysctl vars */ 132 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 133 134 /* There's no way to say TUNEABLE_LONG to get the right types */ 135 u_long cbb_start_mem = CBB_START_MEM; 136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 138 &cbb_start_mem, CBB_START_MEM, 139 "Starting address for memory allocations"); 140 141 u_long cbb_start_16_io = CBB_START_16_IO; 142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 144 &cbb_start_16_io, CBB_START_16_IO, 145 "Starting ioport for 16-bit cards"); 146 147 u_long cbb_start_32_io = CBB_START_32_IO; 148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 150 &cbb_start_32_io, CBB_START_32_IO, 151 "Starting ioport for 32-bit cards"); 152 153 int cbb_debug = 0; 154 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 155 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 156 "Verbose cardbus bridge debugging"); 157 158 static void cbb_insert(struct cbb_softc *sc); 159 static void cbb_removal(struct cbb_softc *sc); 160 static uint32_t cbb_detect_voltage(device_t brdev); 161 static void cbb_cardbus_reset_power(device_t brdev, device_t child, int on); 162 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 163 uint32_t end); 164 static int cbb_cardbus_mem_open(device_t brdev, int win, 165 uint32_t start, uint32_t end); 166 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 167 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 168 int type, int rid, struct resource *res); 169 static int cbb_cardbus_deactivate_resource(device_t brdev, 170 device_t child, int type, int rid, struct resource *res); 171 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 172 device_t child, int type, int *rid, u_long start, 173 u_long end, u_long count, u_int flags); 174 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 175 int type, int rid, struct resource *res); 176 static int cbb_cardbus_power_enable_socket(device_t brdev, 177 device_t child); 178 static int cbb_cardbus_power_disable_socket(device_t brdev, 179 device_t child); 180 static int cbb_func_filt(void *arg); 181 static void cbb_func_intr(void *arg); 182 183 static void 184 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 185 { 186 struct cbb_reslist *rle; 187 188 SLIST_FOREACH(rle, &sc->rl, link) { 189 if (rle->res == res) { 190 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 191 free(rle, M_DEVBUF); 192 return; 193 } 194 } 195 } 196 197 static struct resource * 198 cbb_find_res(struct cbb_softc *sc, int type, int rid) 199 { 200 struct cbb_reslist *rle; 201 202 SLIST_FOREACH(rle, &sc->rl, link) 203 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 204 return (rle->res); 205 return (NULL); 206 } 207 208 static void 209 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 210 int rid) 211 { 212 struct cbb_reslist *rle; 213 214 /* 215 * Need to record allocated resource so we can iterate through 216 * it later. 217 */ 218 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 219 if (rle == NULL) 220 panic("cbb_cardbus_alloc_resource: can't record entry!"); 221 rle->res = res; 222 rle->type = type; 223 rle->rid = rid; 224 SLIST_INSERT_HEAD(&sc->rl, rle, link); 225 } 226 227 static void 228 cbb_destroy_res(struct cbb_softc *sc) 229 { 230 struct cbb_reslist *rle; 231 232 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 233 device_printf(sc->dev, "Danger Will Robinson: Resource " 234 "left allocated! This is a bug... " 235 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 236 rman_get_start(rle->res)); 237 SLIST_REMOVE_HEAD(&sc->rl, link); 238 free(rle, M_DEVBUF); 239 } 240 } 241 242 /* 243 * Disable function interrupts by telling the bridge to generate IRQ1 244 * interrupts. These interrupts aren't really generated by the chip, since 245 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 246 * initialization, so this helps to work around the problem. 247 * 248 * XXX We can't do this workaround for all chipsets, because this 249 * XXX causes interference with the keyboard because somechipsets will 250 * XXX actually signal IRQ1 over their serial interrupt connections to 251 * XXX the south bridge. Disable it it for now. 252 */ 253 void 254 cbb_disable_func_intr(struct cbb_softc *sc) 255 { 256 #if 0 257 uint8_t reg; 258 259 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 260 EXCA_INTR_IRQ_RESERVED1; 261 exca_putb(&sc->exca[0], EXCA_INTR, reg); 262 #endif 263 } 264 265 /* 266 * Enable function interrupts. We turn on function interrupts when the card 267 * requests an interrupt. The PCMCIA standard says that we should set 268 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 269 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 270 * cards. 271 */ 272 static void 273 cbb_enable_func_intr(struct cbb_softc *sc) 274 { 275 uint8_t reg; 276 277 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 278 EXCA_INTR_IRQ_NONE; 279 exca_putb(&sc->exca[0], EXCA_INTR, reg); 280 } 281 282 int 283 cbb_detach(device_t brdev) 284 { 285 struct cbb_softc *sc = device_get_softc(brdev); 286 device_t *devlist; 287 int tmp, tries, error, numdevs; 288 289 /* 290 * Before we delete the children (which we have to do because 291 * attach doesn't check for children busses correctly), we have 292 * to detach the children. Even if we didn't need to delete the 293 * children, we have to detach them. 294 */ 295 error = bus_generic_detach(brdev); 296 if (error != 0) 297 return (error); 298 299 /* 300 * Since the attach routine doesn't search for children before it 301 * attaches them to this device, we must delete them here in order 302 * for the kldload/unload case to work. If we failed to do that, then 303 * we'd get duplicate devices when cbb.ko was reloaded. 304 */ 305 tries = 10; 306 do { 307 error = device_get_children(brdev, &devlist, &numdevs); 308 if (error == 0) 309 break; 310 /* 311 * Try hard to cope with low memory. 312 */ 313 if (error == ENOMEM) { 314 pause("cbbnomem", 1); 315 continue; 316 } 317 } while (tries-- > 0); 318 for (tmp = 0; tmp < numdevs; tmp++) 319 device_delete_child(brdev, devlist[tmp]); 320 free(devlist, M_TEMP); 321 322 /* Turn off the interrupts */ 323 cbb_set(sc, CBB_SOCKET_MASK, 0); 324 325 /* reset 16-bit pcmcia bus */ 326 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 327 328 /* turn off power */ 329 cbb_power(brdev, CARD_OFF); 330 331 /* Ack the interrupt */ 332 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 333 334 /* 335 * Wait for the thread to die. kproc_exit will do a wakeup 336 * on the event thread's struct thread * so that we know it is 337 * safe to proceed. IF the thread is running, set the please 338 * die flag and wait for it to comply. Since the wakeup on 339 * the event thread happens only in kproc_exit, we don't 340 * need to loop here. 341 */ 342 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 343 mtx_lock(&sc->mtx); 344 sc->flags |= CBB_KTHREAD_DONE; 345 while (sc->flags & CBB_KTHREAD_RUNNING) { 346 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 347 wakeup(&sc->intrhand); 348 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 349 } 350 mtx_unlock(&sc->mtx); 351 352 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 353 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 354 sc->base_res); 355 mtx_destroy(&sc->mtx); 356 return (0); 357 } 358 359 int 360 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 362 void **cookiep) 363 { 364 struct cbb_intrhand *ih; 365 struct cbb_softc *sc = device_get_softc(dev); 366 int err; 367 368 if (filt == NULL && intr == NULL) 369 return (EINVAL); 370 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 371 if (ih == NULL) 372 return (ENOMEM); 373 *cookiep = ih; 374 ih->filt = filt; 375 ih->intr = intr; 376 ih->arg = arg; 377 ih->sc = sc; 378 /* 379 * XXX need to turn on ISA interrupts, if we ever support them, but 380 * XXX for now that's all we need to do. 381 */ 382 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 383 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 384 &ih->cookie); 385 if (err != 0) { 386 free(ih, M_DEVBUF); 387 return (err); 388 } 389 cbb_enable_func_intr(sc); 390 sc->cardok = 1; 391 return 0; 392 } 393 394 int 395 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 396 void *cookie) 397 { 398 struct cbb_intrhand *ih; 399 int err; 400 401 /* XXX Need to do different things for ISA interrupts. */ 402 ih = (struct cbb_intrhand *) cookie; 403 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 404 ih->cookie); 405 if (err != 0) 406 return (err); 407 free(ih, M_DEVBUF); 408 return (0); 409 } 410 411 412 void 413 cbb_driver_added(device_t brdev, driver_t *driver) 414 { 415 struct cbb_softc *sc = device_get_softc(brdev); 416 device_t *devlist; 417 device_t dev; 418 int tmp; 419 int numdevs; 420 int wake = 0; 421 422 DEVICE_IDENTIFY(driver, brdev); 423 tmp = device_get_children(brdev, &devlist, &numdevs); 424 if (tmp != 0) { 425 device_printf(brdev, "Cannot get children list, no reprobe\n"); 426 return; 427 } 428 for (tmp = 0; tmp < numdevs; tmp++) { 429 dev = devlist[tmp]; 430 if (device_get_state(dev) == DS_NOTPRESENT && 431 device_probe_and_attach(dev) == 0) 432 wake++; 433 } 434 free(devlist, M_TEMP); 435 436 if (wake > 0) 437 wakeup(&sc->intrhand); 438 } 439 440 void 441 cbb_child_detached(device_t brdev, device_t child) 442 { 443 struct cbb_softc *sc = device_get_softc(brdev); 444 445 /* I'm not sure we even need this */ 446 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 447 device_printf(brdev, "Unknown child detached: %s\n", 448 device_get_nameunit(child)); 449 } 450 451 /************************************************************************/ 452 /* Kthreads */ 453 /************************************************************************/ 454 455 void 456 cbb_event_thread(void *arg) 457 { 458 struct cbb_softc *sc = arg; 459 uint32_t status; 460 int err; 461 int not_a_card = 0; 462 463 mtx_lock(&sc->mtx); 464 sc->flags |= CBB_KTHREAD_RUNNING; 465 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 466 mtx_unlock(&sc->mtx); 467 /* 468 * We take out Giant here because we need it deep, 469 * down in the bowels of the vm system for mapping the 470 * memory we need to read the CIS. In addition, since 471 * we are adding/deleting devices from the dev tree, 472 * and that code isn't MP safe, we have to hold Giant. 473 */ 474 mtx_lock(&Giant); 475 status = cbb_get(sc, CBB_SOCKET_STATE); 476 DPRINTF(("Status is 0x%x\n", status)); 477 if (!CBB_CARD_PRESENT(status)) { 478 not_a_card = 0; /* We know card type */ 479 cbb_removal(sc); 480 } else if (status & CBB_STATE_NOT_A_CARD) { 481 /* 482 * Up to 10 times, try to rescan the card when we see 483 * NOT_A_CARD. 10 is somehwat arbitrary. When this 484 * pathology hits, there's a ~40% chance each try will 485 * fail. 10 tries takes about 5s and results in a 486 * 99.99% certainty of the results. 487 */ 488 if (not_a_card++ < 10) { 489 DEVPRINTF((sc->dev, 490 "Not a card bit set, rescanning\n")); 491 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 492 } else { 493 device_printf(sc->dev, 494 "Can't determine card type\n"); 495 } 496 } else { 497 not_a_card = 0; /* We know card type */ 498 cbb_insert(sc); 499 } 500 mtx_unlock(&Giant); 501 502 /* 503 * First time through we need to tell mountroot that we're 504 * done. 505 */ 506 if (sc->sc_root_token) { 507 root_mount_rel(sc->sc_root_token); 508 sc->sc_root_token = NULL; 509 } 510 511 /* 512 * Wait until it has been 250ms since the last time we 513 * get an interrupt. We handle the rest of the interrupt 514 * at the top of the loop. Although we clear the bit in the 515 * ISR, we signal sc->cv from the detach path after we've 516 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 517 * 250ms sleep here. 518 * 519 * In our ISR, we turn off the card changed interrupt. Turn 520 * them back on here before we wait for them to happen. We 521 * turn them on/off so that we can tolerate a large latency 522 * between the time we signal cbb_event_thread and it gets 523 * a chance to run. 524 */ 525 mtx_lock(&sc->mtx); 526 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 527 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 528 err = 0; 529 while (err != EWOULDBLOCK && 530 (sc->flags & CBB_KTHREAD_DONE) == 0) 531 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 532 } 533 DEVPRINTF((sc->dev, "Thread terminating\n")); 534 sc->flags &= ~CBB_KTHREAD_RUNNING; 535 mtx_unlock(&sc->mtx); 536 kproc_exit(0); 537 } 538 539 /************************************************************************/ 540 /* Insert/removal */ 541 /************************************************************************/ 542 543 static void 544 cbb_insert(struct cbb_softc *sc) 545 { 546 uint32_t sockevent, sockstate; 547 548 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 549 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 550 551 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 552 sockevent, sockstate)); 553 554 if (sockstate & CBB_STATE_R2_CARD) { 555 if (device_is_attached(sc->exca[0].pccarddev)) { 556 sc->flags |= CBB_16BIT_CARD; 557 exca_insert(&sc->exca[0]); 558 } else { 559 device_printf(sc->dev, 560 "16-bit card inserted, but no pccard bus.\n"); 561 } 562 } else if (sockstate & CBB_STATE_CB_CARD) { 563 if (device_is_attached(sc->cbdev)) { 564 sc->flags &= ~CBB_16BIT_CARD; 565 CARD_ATTACH_CARD(sc->cbdev); 566 } else { 567 device_printf(sc->dev, 568 "CardBus card inserted, but no cardbus bus.\n"); 569 } 570 } else { 571 /* 572 * We should power the card down, and try again a couple of 573 * times if this happens. XXX 574 */ 575 device_printf(sc->dev, "Unsupported card type detected\n"); 576 } 577 } 578 579 static void 580 cbb_removal(struct cbb_softc *sc) 581 { 582 sc->cardok = 0; 583 if (sc->flags & CBB_16BIT_CARD) { 584 exca_removal(&sc->exca[0]); 585 } else { 586 if (device_is_attached(sc->cbdev)) 587 CARD_DETACH_CARD(sc->cbdev); 588 } 589 cbb_destroy_res(sc); 590 } 591 592 /************************************************************************/ 593 /* Interrupt Handler */ 594 /************************************************************************/ 595 596 static int 597 cbb_func_filt(void *arg) 598 { 599 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 600 struct cbb_softc *sc = ih->sc; 601 602 /* 603 * Make sure that the card is really there. 604 */ 605 if (!sc->cardok) 606 return (FILTER_STRAY); 607 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 608 sc->cardok = 0; 609 return (FILTER_HANDLED); 610 } 611 612 /* 613 * nb: don't have to check for giant or not, since that's done in the 614 * ISR dispatch and one can't hold Giant in a filter anyway... 615 */ 616 return ((*ih->filt)(ih->arg)); 617 } 618 619 static void 620 cbb_func_intr(void *arg) 621 { 622 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 623 struct cbb_softc *sc = ih->sc; 624 625 /* 626 * While this check may seem redundant, it helps close a race 627 * condition. If the card is ejected after the filter runs, but 628 * before this ISR can be scheduled, then we need to do the same 629 * filtering to prevent the card's ISR from being called. One could 630 * argue that the card's ISR should be able to cope, but experience 631 * has shown they can't always. This mitigates the problem by making 632 * the race quite a bit smaller. Properly written client ISRs should 633 * cope with the card going away in the middle of the ISR. We assume 634 * that drivers that are sophisticated enough to use filters don't 635 * need our protection. This also allows us to ensure they *ARE* 636 * called if their filter said they needed to be called. 637 */ 638 if (ih->filt == NULL) { 639 if (!sc->cardok) 640 return; 641 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 642 sc->cardok = 0; 643 return; 644 } 645 } 646 647 /* 648 * Call the registered ithread interrupt handler. This entire routine 649 * will be called with Giant if this isn't an MP safe driver, or not 650 * if it is. Either way, we don't have to worry. 651 */ 652 ih->intr(ih->arg); 653 } 654 655 /************************************************************************/ 656 /* Generic Power functions */ 657 /************************************************************************/ 658 659 static uint32_t 660 cbb_detect_voltage(device_t brdev) 661 { 662 struct cbb_softc *sc = device_get_softc(brdev); 663 uint32_t psr; 664 uint32_t vol = CARD_UKN_CARD; 665 666 psr = cbb_get(sc, CBB_SOCKET_STATE); 667 668 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 669 vol |= CARD_5V_CARD; 670 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 671 vol |= CARD_3V_CARD; 672 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 673 vol |= CARD_XV_CARD; 674 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 675 vol |= CARD_YV_CARD; 676 677 return (vol); 678 } 679 680 static uint8_t 681 cbb_o2micro_power_hack(struct cbb_softc *sc) 682 { 683 uint8_t reg; 684 685 /* 686 * Issue #2: INT# not qualified with IRQ Routing Bit. An 687 * unexpected PCI INT# may be generated during PC Card 688 * initialization even with the IRQ Routing Bit Set with some 689 * PC Cards. 690 * 691 * This is a two part issue. The first part is that some of 692 * our older controllers have an issue in which the slot's PCI 693 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 694 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 695 * is selected (ExCA register 03h bits 3:0, of the slot, are 696 * cleared) we will generate INT# if IREQ# is asserted. The 697 * second part is because some PC Cards prematurally assert 698 * IREQ# before the ExCA registers are fully programmed. This 699 * in turn asserts INT# because ExCA register 03h bits 3:0 700 * (ISA IRQ Select) are not yet programmed. 701 * 702 * The fix for this issue, which will work for any controller 703 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 704 * (select IRQ1), of the slot, before turning on slot power. 705 * Selecting IRQ1 will result in INT# NOT being asserted 706 * (because IRQ1 is selected), and IRQ1 won't be asserted 707 * because our controllers don't generate IRQ1. 708 * 709 * Other, non O2Micro controllers will generate irq 1 in some 710 * situations, so we can't do this hack for everybody. Reports of 711 * keyboard controller's interrupts being suppressed occurred when 712 * we did this. 713 */ 714 reg = exca_getb(&sc->exca[0], EXCA_INTR); 715 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 716 return (reg); 717 } 718 719 /* 720 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 721 * we don't have an interrupt storm on power on. This has the efect of 722 * disabling card status change interrupts for the duration of poweron. 723 */ 724 static void 725 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 726 { 727 exca_putb(&sc->exca[0], EXCA_INTR, reg); 728 } 729 730 int 731 cbb_power(device_t brdev, int volts) 732 { 733 uint32_t status, sock_ctrl, reg_ctrl, mask; 734 struct cbb_softc *sc = device_get_softc(brdev); 735 int cnt, sane; 736 int retval = 0; 737 int on = 0; 738 uint8_t reg = 0; 739 740 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 741 742 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 743 switch (volts & CARD_VCCMASK) { 744 case 5: 745 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 746 on++; 747 break; 748 case 3: 749 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 750 on++; 751 break; 752 case XV: 753 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 754 on++; 755 break; 756 case YV: 757 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 758 on++; 759 break; 760 case 0: 761 break; 762 default: 763 return (0); /* power NEVER changed */ 764 } 765 766 /* VPP == VCC */ 767 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 768 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 769 770 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 771 return (1); /* no change necessary */ 772 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 773 if (volts != 0 && sc->chipset == CB_O2MICRO) 774 reg = cbb_o2micro_power_hack(sc); 775 776 /* 777 * We have to mask the card change detect interrupt while we're 778 * messing with the power. It is allowed to bounce while we're 779 * messing with power as things settle down. In addition, we mask off 780 * the card's function interrupt by routing it via the ISA bus. This 781 * bit generally only affects 16-bit cards. Some bridges allow one to 782 * set another bit to have it also affect 32-bit cards. Since 32-bit 783 * cards are required to be better behaved, we don't bother to get 784 * into those bridge specific features. 785 * 786 * XXX I wonder if we need to enable the READY bit interrupt in the 787 * EXCA CSC register for 16-bit cards, and disable the CD bit? 788 */ 789 mask = cbb_get(sc, CBB_SOCKET_MASK); 790 mask |= CBB_SOCKET_MASK_POWER; 791 mask &= ~CBB_SOCKET_MASK_CD; 792 cbb_set(sc, CBB_SOCKET_MASK, mask); 793 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 794 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 795 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 796 if (on) { 797 mtx_lock(&sc->mtx); 798 cnt = sc->powerintr; 799 /* 800 * We have a shortish timeout of 500ms here. Some bridges do 801 * not generate a POWER_CYCLE event for 16-bit cards. In 802 * those cases, we have to cope the best we can, and having 803 * only a short delay is better than the alternatives. Others 804 * raise the power cycle a smidge before it is really ready. 805 * We deal with those below. 806 */ 807 sane = 10; 808 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 809 cnt == sc->powerintr && sane-- > 0) 810 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 811 mtx_unlock(&sc->mtx); 812 813 /* 814 * Relax for 100ms. Some bridges appear to assert this signal 815 * right away, but before the card has stabilized. Other 816 * cards need need more time to cope up reliabily. 817 * Experiments with troublesome setups show this to be a 818 * "cheap" way to enhance reliabilty. We need not do this for 819 * "off" since we don't touch the card after we turn it off. 820 */ 821 pause("cbbPwr", min(hz / 10, 1)); 822 823 /* 824 * The TOPIC95B requires a little bit extra time to get its 825 * act together, so delay for an additional 100ms. Also as 826 * documented below, it doesn't seem to set the POWER_CYCLE 827 * bit, so don't whine if it never came on. 828 */ 829 if (sc->chipset == CB_TOPIC95) 830 pause("cbb95B", hz / 10); 831 else if (sane <= 0) 832 device_printf(sc->dev, "power timeout, doom?\n"); 833 } 834 835 /* 836 * After the power is good, we can turn off the power interrupt. 837 * However, the PC Card standard says that we must delay turning the 838 * CD bit back on for a bit to allow for bouncyness on power down 839 * (recall that we don't wait above for a power down, since we don't 840 * get an interrupt for that). We're called either from the suspend 841 * code in which case we don't want to turn card change on again, or 842 * we're called from the card insertion code, in which case the cbb 843 * thread will turn it on for us before it waits to be woken by a 844 * change event. 845 * 846 * NB: Topic95B doesn't set the power cycle bit. we assume that 847 * both it and the TOPIC95 behave the same. 848 */ 849 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 850 status = cbb_get(sc, CBB_SOCKET_STATE); 851 if (on && sc->chipset != CB_TOPIC95) { 852 if ((status & CBB_STATE_POWER_CYCLE) == 0) 853 device_printf(sc->dev, "Power not on?\n"); 854 } 855 if (status & CBB_STATE_BAD_VCC_REQ) { 856 device_printf(sc->dev, "Bad Vcc requested\n"); 857 /* 858 * Turn off the power, and try again. Retrigger other 859 * active interrupts via force register. From NetBSD 860 * PR 36652, coded by me to description there. 861 */ 862 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 863 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 864 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 865 status &= ~CBB_STATE_BAD_VCC_REQ; 866 status &= ~CBB_STATE_DATA_LOST; 867 status |= CBB_FORCE_CV_TEST; 868 cbb_set(sc, CBB_SOCKET_FORCE, status); 869 goto done; 870 } 871 if (sc->chipset == CB_TOPIC97) { 872 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 873 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 874 if (on) 875 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 876 else 877 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 878 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 879 } 880 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 881 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 882 retval = 1; 883 done:; 884 if (volts != 0 && sc->chipset == CB_O2MICRO) 885 cbb_o2micro_power_hack2(sc, reg); 886 return (retval); 887 } 888 889 static int 890 cbb_current_voltage(device_t brdev) 891 { 892 struct cbb_softc *sc = device_get_softc(brdev); 893 uint32_t ctrl; 894 895 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 896 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 897 case CBB_SOCKET_CTRL_VCC_5V: 898 return CARD_5V_CARD; 899 case CBB_SOCKET_CTRL_VCC_3V: 900 return CARD_3V_CARD; 901 case CBB_SOCKET_CTRL_VCC_XV: 902 return CARD_XV_CARD; 903 case CBB_SOCKET_CTRL_VCC_YV: 904 return CARD_YV_CARD; 905 } 906 return 0; 907 } 908 909 /* 910 * detect the voltage for the card, and set it. Since the power 911 * used is the square of the voltage, lower voltages is a big win 912 * and what Windows does (and what Microsoft prefers). The MS paper 913 * also talks about preferring the CIS entry as well, but that has 914 * to be done elsewhere. We also optimize power sequencing here 915 * and don't change things if we're already powered up at a supported 916 * voltage. 917 * 918 * In addition, we power up with OE disabled. We'll set it later 919 * in the power up sequence. 920 */ 921 static int 922 cbb_do_power(device_t brdev) 923 { 924 struct cbb_softc *sc = device_get_softc(brdev); 925 uint32_t voltage, curpwr; 926 uint32_t status; 927 928 /* Don't enable OE (output enable) until power stable */ 929 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 930 931 voltage = cbb_detect_voltage(brdev); 932 curpwr = cbb_current_voltage(brdev); 933 status = cbb_get(sc, CBB_SOCKET_STATE); 934 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 935 return 0; 936 /* Prefer lowest voltage supported */ 937 cbb_power(brdev, CARD_OFF); 938 if (voltage & CARD_YV_CARD) 939 cbb_power(brdev, CARD_VCC(YV)); 940 else if (voltage & CARD_XV_CARD) 941 cbb_power(brdev, CARD_VCC(XV)); 942 else if (voltage & CARD_3V_CARD) 943 cbb_power(brdev, CARD_VCC(3)); 944 else if (voltage & CARD_5V_CARD) 945 cbb_power(brdev, CARD_VCC(5)); 946 else { 947 device_printf(brdev, "Unknown card voltage\n"); 948 return (ENXIO); 949 } 950 return (0); 951 } 952 953 /************************************************************************/ 954 /* CardBus power functions */ 955 /************************************************************************/ 956 957 static void 958 cbb_cardbus_reset_power(device_t brdev, device_t child, int on) 959 { 960 struct cbb_softc *sc = device_get_softc(brdev); 961 uint32_t b; 962 int delay, count; 963 964 /* 965 * Asserting reset for 20ms is necessary for most bridges. For some 966 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 967 * root cause of this is unknown, and NetBSD does the same thing. 968 */ 969 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 970 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 971 pause("cbbP3", hz * delay / 1000); 972 973 /* 974 * If a card exists and we're turning it on, take it out of reset. 975 * After clearing reset, wait up to 1.1s for the first configuration 976 * register (vendor/product) configuration register of device 0.0 to 977 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 978 * says that when powering up the card, the PCI Spec v2.1 must be 979 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 980 * Config Access) is at most 2^25 clocks, or just over 1s. Section 981 * 2.2.1 states any card not ready to participate in bus transactions 982 * must tristate its outputs. Therefore, any access to its 983 * configuration registers must be ignored. In that state, the config 984 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 985 * 0xffff is invalid, so this can never match a real card. Print a 986 * warning if it never returns a real id. The PCMCIA PC Card 987 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 988 * a cardbus bus, so that's the only register we check here. 989 */ 990 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 991 /* 992 */ 993 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 994 &~CBBM_BRIDGECTRL_RESET, 2); 995 b = pcib_get_bus(child); 996 count = 1100 / 20; 997 do { 998 pause("cbbP4", hz * 2 / 100); 999 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 1000 0xfffffffful && --count >= 0); 1001 if (count < 0) 1002 device_printf(brdev, "Warning: Bus reset timeout\n"); 1003 } 1004 } 1005 1006 static int 1007 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1008 { 1009 struct cbb_softc *sc = device_get_softc(brdev); 1010 int err; 1011 1012 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 1013 return (ENODEV); 1014 1015 err = cbb_do_power(brdev); 1016 if (err) 1017 return (err); 1018 cbb_cardbus_reset_power(brdev, child, 1); 1019 return (0); 1020 } 1021 1022 static int 1023 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1024 { 1025 cbb_power(brdev, CARD_OFF); 1026 cbb_cardbus_reset_power(brdev, child, 0); 1027 return (0); 1028 } 1029 1030 /************************************************************************/ 1031 /* CardBus Resource */ 1032 /************************************************************************/ 1033 1034 static int 1035 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1036 { 1037 int basereg; 1038 int limitreg; 1039 1040 if ((win < 0) || (win > 1)) { 1041 DEVPRINTF((brdev, 1042 "cbb_cardbus_io_open: window out of range %d\n", win)); 1043 return (EINVAL); 1044 } 1045 1046 basereg = win * 8 + CBBR_IOBASE0; 1047 limitreg = win * 8 + CBBR_IOLIMIT0; 1048 1049 pci_write_config(brdev, basereg, start, 4); 1050 pci_write_config(brdev, limitreg, end, 4); 1051 return (0); 1052 } 1053 1054 static int 1055 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1056 { 1057 int basereg; 1058 int limitreg; 1059 1060 if ((win < 0) || (win > 1)) { 1061 DEVPRINTF((brdev, 1062 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1063 return (EINVAL); 1064 } 1065 1066 basereg = win * 8 + CBBR_MEMBASE0; 1067 limitreg = win * 8 + CBBR_MEMLIMIT0; 1068 1069 pci_write_config(brdev, basereg, start, 4); 1070 pci_write_config(brdev, limitreg, end, 4); 1071 return (0); 1072 } 1073 1074 #define START_NONE 0xffffffff 1075 #define END_NONE 0 1076 1077 static void 1078 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1079 { 1080 uint32_t starts[2]; 1081 uint32_t ends[2]; 1082 struct cbb_reslist *rle; 1083 int align, i; 1084 uint32_t reg; 1085 1086 starts[0] = starts[1] = START_NONE; 1087 ends[0] = ends[1] = END_NONE; 1088 1089 if (type == SYS_RES_MEMORY) 1090 align = CBB_MEMALIGN; 1091 else if (type == SYS_RES_IOPORT) 1092 align = CBB_IOALIGN; 1093 else 1094 align = 1; 1095 1096 SLIST_FOREACH(rle, &sc->rl, link) { 1097 if (rle->type != type) 1098 continue; 1099 if (rle->res == NULL) 1100 continue; 1101 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1102 continue; 1103 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1104 i = 1; 1105 else 1106 i = 0; 1107 if (rman_get_start(rle->res) < starts[i]) 1108 starts[i] = rman_get_start(rle->res); 1109 if (rman_get_end(rle->res) > ends[i]) 1110 ends[i] = rman_get_end(rle->res); 1111 } 1112 for (i = 0; i < 2; i++) { 1113 if (starts[i] == START_NONE) 1114 continue; 1115 starts[i] &= ~(align - 1); 1116 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1117 } 1118 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1119 if (starts[0] < starts[1]) { 1120 if (ends[0] > starts[1]) { 1121 device_printf(sc->dev, "Overlapping ranges" 1122 " for prefetch and non-prefetch memory\n"); 1123 return; 1124 } 1125 } else { 1126 if (ends[1] > starts[0]) { 1127 device_printf(sc->dev, "Overlapping ranges" 1128 " for prefetch and non-prefetch memory\n"); 1129 return; 1130 } 1131 } 1132 } 1133 1134 if (type == SYS_RES_MEMORY) { 1135 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1136 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1137 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1138 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1139 CBBM_BRIDGECTRL_PREFETCH_1); 1140 if (starts[1] != START_NONE) 1141 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1142 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1143 if (bootverbose) { 1144 device_printf(sc->dev, "Opening memory:\n"); 1145 if (starts[0] != START_NONE) 1146 device_printf(sc->dev, "Normal: %#x-%#x\n", 1147 starts[0], ends[0]); 1148 if (starts[1] != START_NONE) 1149 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1150 starts[1], ends[1]); 1151 } 1152 } else if (type == SYS_RES_IOPORT) { 1153 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1154 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1155 if (bootverbose && starts[0] != START_NONE) 1156 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1157 starts[0], ends[0]); 1158 } 1159 } 1160 1161 static int 1162 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1163 int rid, struct resource *res) 1164 { 1165 int ret; 1166 1167 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1168 type, rid, res); 1169 if (ret != 0) 1170 return (ret); 1171 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1172 return (0); 1173 } 1174 1175 static int 1176 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1177 int rid, struct resource *res) 1178 { 1179 int ret; 1180 1181 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1182 type, rid, res); 1183 if (ret != 0) 1184 return (ret); 1185 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1186 return (0); 1187 } 1188 1189 static struct resource * 1190 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1191 int *rid, u_long start, u_long end, u_long count, u_int flags) 1192 { 1193 struct cbb_softc *sc = device_get_softc(brdev); 1194 int tmp; 1195 struct resource *res; 1196 u_long align; 1197 1198 switch (type) { 1199 case SYS_RES_IRQ: 1200 tmp = rman_get_start(sc->irq_res); 1201 if (start > tmp || end < tmp || count != 1) { 1202 device_printf(child, "requested interrupt %ld-%ld," 1203 "count = %ld not supported by cbb\n", 1204 start, end, count); 1205 return (NULL); 1206 } 1207 start = end = tmp; 1208 flags |= RF_SHAREABLE; 1209 break; 1210 case SYS_RES_IOPORT: 1211 if (start <= cbb_start_32_io) 1212 start = cbb_start_32_io; 1213 if (end < start) 1214 end = start; 1215 if (count > (1 << RF_ALIGNMENT(flags))) 1216 flags = (flags & ~RF_ALIGNMENT_MASK) | 1217 rman_make_alignment_flags(count); 1218 break; 1219 case SYS_RES_MEMORY: 1220 if (start <= cbb_start_mem) 1221 start = cbb_start_mem; 1222 if (end < start) 1223 end = start; 1224 if (count < CBB_MEMALIGN) 1225 align = CBB_MEMALIGN; 1226 else 1227 align = count; 1228 if (align > (1 << RF_ALIGNMENT(flags))) 1229 flags = (flags & ~RF_ALIGNMENT_MASK) | 1230 rman_make_alignment_flags(align); 1231 break; 1232 } 1233 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1234 start, end, count, flags & ~RF_ACTIVE); 1235 if (res == NULL) { 1236 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1237 return (NULL); 1238 } 1239 cbb_insert_res(sc, res, type, *rid); 1240 if (flags & RF_ACTIVE) 1241 if (bus_activate_resource(child, type, *rid, res) != 0) { 1242 bus_release_resource(child, type, *rid, res); 1243 return (NULL); 1244 } 1245 1246 return (res); 1247 } 1248 1249 static int 1250 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1251 int rid, struct resource *res) 1252 { 1253 struct cbb_softc *sc = device_get_softc(brdev); 1254 int error; 1255 1256 if (rman_get_flags(res) & RF_ACTIVE) { 1257 error = bus_deactivate_resource(child, type, rid, res); 1258 if (error != 0) 1259 return (error); 1260 } 1261 cbb_remove_res(sc, res); 1262 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1263 type, rid, res)); 1264 } 1265 1266 /************************************************************************/ 1267 /* PC Card Power Functions */ 1268 /************************************************************************/ 1269 1270 static int 1271 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1272 { 1273 struct cbb_softc *sc = device_get_softc(brdev); 1274 int err; 1275 1276 DPRINTF(("cbb_pcic_socket_enable:\n")); 1277 1278 /* power down/up the socket to reset */ 1279 err = cbb_do_power(brdev); 1280 if (err) 1281 return (err); 1282 exca_reset(&sc->exca[0], child); 1283 1284 return (0); 1285 } 1286 1287 static int 1288 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1289 { 1290 struct cbb_softc *sc = device_get_softc(brdev); 1291 1292 DPRINTF(("cbb_pcic_socket_disable\n")); 1293 1294 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1295 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1296 pause("cbbP1", hz / 100); 1297 1298 /* power down the socket */ 1299 cbb_power(brdev, CARD_OFF); 1300 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1301 1302 /* wait 300ms until power fails (Tpf). */ 1303 pause("cbbP2", hz * 300 / 1000); 1304 1305 /* enable CSC interrupts */ 1306 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1307 return (0); 1308 } 1309 1310 /************************************************************************/ 1311 /* POWER methods */ 1312 /************************************************************************/ 1313 1314 int 1315 cbb_power_enable_socket(device_t brdev, device_t child) 1316 { 1317 struct cbb_softc *sc = device_get_softc(brdev); 1318 1319 if (sc->flags & CBB_16BIT_CARD) 1320 return (cbb_pcic_power_enable_socket(brdev, child)); 1321 return (cbb_cardbus_power_enable_socket(brdev, child)); 1322 } 1323 1324 int 1325 cbb_power_disable_socket(device_t brdev, device_t child) 1326 { 1327 struct cbb_softc *sc = device_get_softc(brdev); 1328 if (sc->flags & CBB_16BIT_CARD) 1329 return (cbb_pcic_power_disable_socket(brdev, child)); 1330 return (cbb_cardbus_power_disable_socket(brdev, child)); 1331 } 1332 1333 static int 1334 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1335 struct resource *res) 1336 { 1337 struct cbb_softc *sc = device_get_softc(brdev); 1338 return (exca_activate_resource(&sc->exca[0], child, type, rid, res)); 1339 } 1340 1341 static int 1342 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1343 int rid, struct resource *res) 1344 { 1345 struct cbb_softc *sc = device_get_softc(brdev); 1346 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1347 } 1348 1349 static struct resource * 1350 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1351 u_long start, u_long end, u_long count, u_int flags) 1352 { 1353 struct resource *res = NULL; 1354 struct cbb_softc *sc = device_get_softc(brdev); 1355 int align; 1356 int tmp; 1357 1358 switch (type) { 1359 case SYS_RES_MEMORY: 1360 if (start < cbb_start_mem) 1361 start = cbb_start_mem; 1362 if (end < start) 1363 end = start; 1364 if (count < CBB_MEMALIGN) 1365 align = CBB_MEMALIGN; 1366 else 1367 align = count; 1368 if (align > (1 << RF_ALIGNMENT(flags))) 1369 flags = (flags & ~RF_ALIGNMENT_MASK) | 1370 rman_make_alignment_flags(align); 1371 break; 1372 case SYS_RES_IOPORT: 1373 if (start < cbb_start_16_io) 1374 start = cbb_start_16_io; 1375 if (end < start) 1376 end = start; 1377 break; 1378 case SYS_RES_IRQ: 1379 tmp = rman_get_start(sc->irq_res); 1380 if (start > tmp || end < tmp || count != 1) { 1381 device_printf(child, "requested interrupt %ld-%ld," 1382 "count = %ld not supported by cbb\n", 1383 start, end, count); 1384 return (NULL); 1385 } 1386 flags |= RF_SHAREABLE; 1387 start = end = rman_get_start(sc->irq_res); 1388 break; 1389 } 1390 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1391 start, end, count, flags & ~RF_ACTIVE); 1392 if (res == NULL) 1393 return (NULL); 1394 cbb_insert_res(sc, res, type, *rid); 1395 if (flags & RF_ACTIVE) { 1396 if (bus_activate_resource(child, type, *rid, res) != 0) { 1397 bus_release_resource(child, type, *rid, res); 1398 return (NULL); 1399 } 1400 } 1401 1402 return (res); 1403 } 1404 1405 static int 1406 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1407 int rid, struct resource *res) 1408 { 1409 struct cbb_softc *sc = device_get_softc(brdev); 1410 int error; 1411 1412 if (rman_get_flags(res) & RF_ACTIVE) { 1413 error = bus_deactivate_resource(child, type, rid, res); 1414 if (error != 0) 1415 return (error); 1416 } 1417 cbb_remove_res(sc, res); 1418 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1419 type, rid, res)); 1420 } 1421 1422 /************************************************************************/ 1423 /* PC Card methods */ 1424 /************************************************************************/ 1425 1426 int 1427 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1428 u_long flags) 1429 { 1430 struct cbb_softc *sc = device_get_softc(brdev); 1431 struct resource *res; 1432 1433 if (type != SYS_RES_MEMORY) 1434 return (EINVAL); 1435 res = cbb_find_res(sc, type, rid); 1436 if (res == NULL) { 1437 device_printf(brdev, 1438 "set_res_flags: specified rid not found\n"); 1439 return (ENOENT); 1440 } 1441 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1442 } 1443 1444 int 1445 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1446 uint32_t cardaddr, uint32_t *deltap) 1447 { 1448 struct cbb_softc *sc = device_get_softc(brdev); 1449 struct resource *res; 1450 1451 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1452 if (res == NULL) { 1453 device_printf(brdev, 1454 "set_memory_offset: specified rid not found\n"); 1455 return (ENOENT); 1456 } 1457 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1458 } 1459 1460 /************************************************************************/ 1461 /* BUS Methods */ 1462 /************************************************************************/ 1463 1464 1465 int 1466 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1467 struct resource *r) 1468 { 1469 struct cbb_softc *sc = device_get_softc(brdev); 1470 1471 if (sc->flags & CBB_16BIT_CARD) 1472 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1473 else 1474 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1475 r)); 1476 } 1477 1478 int 1479 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1480 int rid, struct resource *r) 1481 { 1482 struct cbb_softc *sc = device_get_softc(brdev); 1483 1484 if (sc->flags & CBB_16BIT_CARD) 1485 return (cbb_pcic_deactivate_resource(brdev, child, type, 1486 rid, r)); 1487 else 1488 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1489 rid, r)); 1490 } 1491 1492 struct resource * 1493 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1494 u_long start, u_long end, u_long count, u_int flags) 1495 { 1496 struct cbb_softc *sc = device_get_softc(brdev); 1497 1498 if (sc->flags & CBB_16BIT_CARD) 1499 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1500 start, end, count, flags)); 1501 else 1502 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1503 start, end, count, flags)); 1504 } 1505 1506 int 1507 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1508 struct resource *r) 1509 { 1510 struct cbb_softc *sc = device_get_softc(brdev); 1511 1512 if (sc->flags & CBB_16BIT_CARD) 1513 return (cbb_pcic_release_resource(brdev, child, type, 1514 rid, r)); 1515 else 1516 return (cbb_cardbus_release_resource(brdev, child, type, 1517 rid, r)); 1518 } 1519 1520 int 1521 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1522 { 1523 struct cbb_softc *sc = device_get_softc(brdev); 1524 1525 switch (which) { 1526 case PCIB_IVAR_DOMAIN: 1527 *result = sc->domain; 1528 return (0); 1529 case PCIB_IVAR_BUS: 1530 *result = sc->secbus; 1531 return (0); 1532 } 1533 return (ENOENT); 1534 } 1535 1536 int 1537 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1538 { 1539 struct cbb_softc *sc = device_get_softc(brdev); 1540 1541 switch (which) { 1542 case PCIB_IVAR_DOMAIN: 1543 return (EINVAL); 1544 case PCIB_IVAR_BUS: 1545 sc->secbus = value; 1546 return (0); 1547 } 1548 return (ENOENT); 1549 } 1550 1551 int 1552 cbb_suspend(device_t self) 1553 { 1554 int error = 0; 1555 struct cbb_softc *sc = device_get_softc(self); 1556 1557 error = bus_generic_suspend(self); 1558 if (error != 0) 1559 return (error); 1560 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1561 sc->cardok = 0; /* Card is bogus now */ 1562 return (0); 1563 } 1564 1565 int 1566 cbb_resume(device_t self) 1567 { 1568 int error = 0; 1569 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1570 uint32_t tmp; 1571 1572 /* 1573 * Some BIOSes will not save the BARs for the pci chips, so we 1574 * must do it ourselves. If the BAR is reset to 0 for an I/O 1575 * device, it will read back as 0x1, so no explicit test for 1576 * memory devices are needed. 1577 * 1578 * Note: The PCI bus code should do this automatically for us on 1579 * suspend/resume, but until it does, we have to cope. 1580 */ 1581 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1582 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1583 rman_get_start(sc->base_res))); 1584 1585 sc->chipinit(sc); 1586 1587 /* reset interrupt -- Do we really need to do this? */ 1588 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1589 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1590 1591 /* CSC Interrupt: Card detect interrupt on */ 1592 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1593 1594 /* Signal the thread to wakeup. */ 1595 wakeup(&sc->intrhand); 1596 1597 error = bus_generic_resume(self); 1598 1599 return (error); 1600 } 1601 1602 int 1603 cbb_child_present(device_t parent, device_t child) 1604 { 1605 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent); 1606 uint32_t sockstate; 1607 1608 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1609 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1610 } 1611