xref: /freebsd/sys/dev/pccbb/pccbb.c (revision 2616144e4345e4cdab56fd7c673fbb69074a9ce2)
1 /*-
2  * Copyright (c) 2002-2004 M. Warner Losh.
3  * Copyright (c) 2000-2001 Jonathan Chen.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  */
28 
29 /*-
30  * Copyright (c) 1998, 1999 and 2000
31  *      HAYAKAWA Koichi.  All rights reserved.
32  *
33  * Redistribution and use in source and binary forms, with or without
34  * modification, are permitted provided that the following conditions
35  * are met:
36  * 1. Redistributions of source code must retain the above copyright
37  *    notice, this list of conditions and the following disclaimer.
38  * 2. Redistributions in binary form must reproduce the above copyright
39  *    notice, this list of conditions and the following disclaimer in the
40  *    documentation and/or other materials provided with the distribution.
41  * 3. All advertising materials mentioning features or use of this software
42  *    must display the following acknowledgement:
43  *	This product includes software developed by HAYAKAWA Koichi.
44  * 4. The name of the author may not be used to endorse or promote products
45  *    derived from this software without specific prior written permission.
46  *
47  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57  */
58 
59 /*
60  * Driver for PCI to CardBus Bridge chips
61  * and PCI to PCMCIA Bridge chips
62  * and ISA to PCMCIA host adapters
63  * and C Bus to PCMCIA host adapters
64  *
65  * References:
66  *  TI Datasheets:
67  *   http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
68  *
69  * Written by Jonathan Chen <jon@freebsd.org>
70  * The author would like to acknowledge:
71  *  * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
72  *  * Warner Losh: Newbus/newcard guru and author of the pccard side of things
73  *  * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
74  *  * David Cross: Author of the initial ugly hack for a specific cardbus card
75  */
76 
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
79 
80 #include <sys/param.h>
81 #include <sys/bus.h>
82 #include <sys/condvar.h>
83 #include <sys/errno.h>
84 #include <sys/kernel.h>
85 #include <sys/module.h>
86 #include <sys/kthread.h>
87 #include <sys/interrupt.h>
88 #include <sys/lock.h>
89 #include <sys/malloc.h>
90 #include <sys/mutex.h>
91 #include <sys/proc.h>
92 #include <sys/rman.h>
93 #include <sys/sysctl.h>
94 #include <sys/systm.h>
95 #include <machine/bus.h>
96 #include <machine/resource.h>
97 
98 #include <dev/pci/pcireg.h>
99 #include <dev/pci/pcivar.h>
100 
101 #include <dev/pccard/pccardreg.h>
102 #include <dev/pccard/pccardvar.h>
103 
104 #include <dev/exca/excareg.h>
105 #include <dev/exca/excavar.h>
106 
107 #include <dev/pccbb/pccbbreg.h>
108 #include <dev/pccbb/pccbbvar.h>
109 
110 #include "power_if.h"
111 #include "card_if.h"
112 #include "pcib_if.h"
113 
114 #define	DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
115 #define	DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
116 
117 #define	PCI_MASK_CONFIG(DEV,REG,MASK,SIZE)				\
118 	pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
119 #define	PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE)			\
120 	pci_write_config(DEV, REG, (					\
121 		pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
122 
123 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0)
124 
125 #define CBB_START_MEM	0x88000000
126 #define CBB_START_32_IO 0x1000
127 #define CBB_START_16_IO 0x100
128 
129 devclass_t cbb_devclass;
130 
131 /* sysctl vars */
132 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
133 
134 /* There's no way to say TUNEABLE_LONG to get the right types */
135 u_long cbb_start_mem = CBB_START_MEM;
136 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem);
137 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
138     &cbb_start_mem, CBB_START_MEM,
139     "Starting address for memory allocations");
140 
141 u_long cbb_start_16_io = CBB_START_16_IO;
142 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io);
143 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
144     &cbb_start_16_io, CBB_START_16_IO,
145     "Starting ioport for 16-bit cards");
146 
147 u_long cbb_start_32_io = CBB_START_32_IO;
148 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io);
149 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
150     &cbb_start_32_io, CBB_START_32_IO,
151     "Starting ioport for 32-bit cards");
152 
153 int cbb_debug = 0;
154 TUNABLE_INT("hw.cbb.debug", &cbb_debug);
155 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0,
156     "Verbose cardbus bridge debugging");
157 
158 static void	cbb_insert(struct cbb_softc *sc);
159 static void	cbb_removal(struct cbb_softc *sc);
160 static uint32_t	cbb_detect_voltage(device_t brdev);
161 static void	cbb_cardbus_reset(device_t brdev, int on);
162 static int	cbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
163 		    uint32_t end);
164 static int	cbb_cardbus_mem_open(device_t brdev, int win,
165 		    uint32_t start, uint32_t end);
166 static void	cbb_cardbus_auto_open(struct cbb_softc *sc, int type);
167 static int	cbb_cardbus_activate_resource(device_t brdev, device_t child,
168 		    int type, int rid, struct resource *res);
169 static int	cbb_cardbus_deactivate_resource(device_t brdev,
170 		    device_t child, int type, int rid, struct resource *res);
171 static struct resource	*cbb_cardbus_alloc_resource(device_t brdev,
172 		    device_t child, int type, int *rid, u_long start,
173 		    u_long end, u_long count, u_int flags);
174 static int	cbb_cardbus_release_resource(device_t brdev, device_t child,
175 		    int type, int rid, struct resource *res);
176 static int	cbb_cardbus_power_enable_socket(device_t brdev,
177 		    device_t child);
178 static void	cbb_cardbus_power_disable_socket(device_t brdev,
179 		    device_t child);
180 static int	cbb_func_filt(void *arg);
181 static void	cbb_func_intr(void *arg);
182 
183 static void
184 cbb_remove_res(struct cbb_softc *sc, struct resource *res)
185 {
186 	struct cbb_reslist *rle;
187 
188 	SLIST_FOREACH(rle, &sc->rl, link) {
189 		if (rle->res == res) {
190 			SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link);
191 			free(rle, M_DEVBUF);
192 			return;
193 		}
194 	}
195 }
196 
197 static struct resource *
198 cbb_find_res(struct cbb_softc *sc, int type, int rid)
199 {
200 	struct cbb_reslist *rle;
201 
202 	SLIST_FOREACH(rle, &sc->rl, link)
203 		if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
204 			return (rle->res);
205 	return (NULL);
206 }
207 
208 static void
209 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type,
210     int rid)
211 {
212 	struct cbb_reslist *rle;
213 
214 	/*
215 	 * Need to record allocated resource so we can iterate through
216 	 * it later.
217 	 */
218 	rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT);
219 	if (rle == NULL)
220 		panic("cbb_cardbus_alloc_resource: can't record entry!");
221 	rle->res = res;
222 	rle->type = type;
223 	rle->rid = rid;
224 	SLIST_INSERT_HEAD(&sc->rl, rle, link);
225 }
226 
227 static void
228 cbb_destroy_res(struct cbb_softc *sc)
229 {
230 	struct cbb_reslist *rle;
231 
232 	while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
233 		device_printf(sc->dev, "Danger Will Robinson: Resource "
234 		    "left allocated!  This is a bug... "
235 		    "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type,
236 		    rman_get_start(rle->res));
237 		SLIST_REMOVE_HEAD(&sc->rl, link);
238 		free(rle, M_DEVBUF);
239 	}
240 }
241 
242 /*
243  * Disable function interrupts by telling the bridge to generate IRQ1
244  * interrupts.  These interrupts aren't really generated by the chip, since
245  * IRQ1 is reserved.  Some chipsets assert INTA# inappropriately during
246  * initialization, so this helps to work around the problem.
247  *
248  * XXX We can't do this workaround for all chipsets, because this
249  * XXX causes interference with the keyboard because somechipsets will
250  * XXX actually signal IRQ1 over their serial interrupt connections to
251  * XXX the south bridge.  Disable it it for now.
252  */
253 void
254 cbb_disable_func_intr(struct cbb_softc *sc)
255 {
256 #if 0
257 	uint8_t reg;
258 
259 	reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) |
260 	    EXCA_INTR_IRQ_RESERVED1;
261 	exca_putb(&sc->exca[0], EXCA_INTR, reg);
262 #endif
263 }
264 
265 /*
266  * Enable function interrupts.  We turn on function interrupts when the card
267  * requests an interrupt.  The PCMCIA standard says that we should set
268  * the lower 4 bits to 0 to route via PCI.  Note: we call this for both
269  * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus
270  * cards.
271  */
272 static void
273 cbb_enable_func_intr(struct cbb_softc *sc)
274 {
275 	uint8_t reg;
276 
277 	reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) |
278 	    EXCA_INTR_IRQ_NONE;
279 	exca_putb(&sc->exca[0], EXCA_INTR, reg);
280 }
281 
282 int
283 cbb_detach(device_t brdev)
284 {
285 	struct cbb_softc *sc = device_get_softc(brdev);
286 	device_t *devlist;
287 	int tmp, tries, error, numdevs;
288 
289 	/*
290 	 * Before we delete the children (which we have to do because
291 	 * attach doesn't check for children busses correctly), we have
292 	 * to detach the children.  Even if we didn't need to delete the
293 	 * children, we have to detach them.
294 	 */
295 	error = bus_generic_detach(brdev);
296 	if (error != 0)
297 		return (error);
298 
299 	/*
300 	 * Since the attach routine doesn't search for children before it
301 	 * attaches them to this device, we must delete them here in order
302 	 * for the kldload/unload case to work.  If we failed to do that, then
303 	 * we'd get duplicate devices when cbb.ko was reloaded.
304 	 */
305 	tries = 10;
306 	do {
307 		error = device_get_children(brdev, &devlist, &numdevs);
308 		if (error == 0)
309 			break;
310 		/*
311 		 * Try hard to cope with low memory.
312 		 */
313 		if (error == ENOMEM) {
314 			pause("cbbnomem", 1);
315 			continue;
316 		}
317 	} while (tries-- > 0);
318 	for (tmp = 0; tmp < numdevs; tmp++)
319 		device_delete_child(brdev, devlist[tmp]);
320 	free(devlist, M_TEMP);
321 
322 	/* Turn off the interrupts */
323 	cbb_set(sc, CBB_SOCKET_MASK, 0);
324 
325 	/* reset 16-bit pcmcia bus */
326 	exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET);
327 
328 	/* turn off power */
329 	cbb_power(brdev, CARD_OFF);
330 
331 	/* Ack the interrupt */
332 	cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff);
333 
334 	/*
335 	 * Wait for the thread to die.  kproc_exit will do a wakeup
336 	 * on the event thread's struct thread * so that we know it is
337 	 * safe to proceed.  IF the thread is running, set the please
338 	 * die flag and wait for it to comply.  Since the wakeup on
339 	 * the event thread happens only in kproc_exit, we don't
340 	 * need to loop here.
341 	 */
342 	bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
343 	mtx_lock(&sc->mtx);
344 	sc->flags |= CBB_KTHREAD_DONE;
345 	while (sc->flags & CBB_KTHREAD_RUNNING) {
346 		DEVPRINTF((sc->dev, "Waiting for thread to die\n"));
347 		cv_broadcast(&sc->cv);
348 		msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0);
349 	}
350 	mtx_unlock(&sc->mtx);
351 
352 	bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
353 	bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
354 	    sc->base_res);
355 	mtx_destroy(&sc->mtx);
356 	cv_destroy(&sc->cv);
357 	cv_destroy(&sc->powercv);
358 	return (0);
359 }
360 
361 int
362 cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
363   int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg,
364    void **cookiep)
365 {
366 	struct cbb_intrhand *ih;
367 	struct cbb_softc *sc = device_get_softc(dev);
368 	int err;
369 
370 	if (filt == NULL && intr == NULL)
371 		return (EINVAL);
372 	ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT);
373 	if (ih == NULL)
374 		return (ENOMEM);
375 	*cookiep = ih;
376 	ih->filt = filt;
377 	ih->intr = intr;
378 	ih->arg = arg;
379 	ih->sc = sc;
380 	/*
381 	 * XXX need to turn on ISA interrupts, if we ever support them, but
382 	 * XXX for now that's all we need to do.
383 	 */
384 	err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags,
385 	    filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih,
386 	    &ih->cookie);
387 	if (err != 0) {
388 		free(ih, M_DEVBUF);
389 		return (err);
390 	}
391 	cbb_enable_func_intr(sc);
392 	sc->cardok = 1;
393 	return 0;
394 }
395 
396 int
397 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
398     void *cookie)
399 {
400 	struct cbb_intrhand *ih;
401 	int err;
402 
403 	/* XXX Need to do different things for ISA interrupts. */
404 	ih = (struct cbb_intrhand *) cookie;
405 	err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq,
406 	    ih->cookie);
407 	if (err != 0)
408 		return (err);
409 	free(ih, M_DEVBUF);
410 	return (0);
411 }
412 
413 
414 void
415 cbb_driver_added(device_t brdev, driver_t *driver)
416 {
417 	struct cbb_softc *sc = device_get_softc(brdev);
418 	device_t *devlist;
419 	device_t dev;
420 	int tmp;
421 	int numdevs;
422 	int wake = 0;
423 
424 	DEVICE_IDENTIFY(driver, brdev);
425 	tmp = device_get_children(brdev, &devlist, &numdevs);
426 	if (tmp != 0) {
427 		device_printf(brdev, "Cannot get children list, no reprobe\n");
428 		return;
429 	}
430 	for (tmp = 0; tmp < numdevs; tmp++) {
431 		dev = devlist[tmp];
432 		if (device_get_state(dev) == DS_NOTPRESENT &&
433 		    device_probe_and_attach(dev) == 0)
434 			wake++;
435 	}
436 	free(devlist, M_TEMP);
437 
438 	if (wake > 0) {
439 		mtx_lock(&sc->mtx);
440 		cv_signal(&sc->cv);
441 		mtx_unlock(&sc->mtx);
442 	}
443 }
444 
445 void
446 cbb_child_detached(device_t brdev, device_t child)
447 {
448 	struct cbb_softc *sc = device_get_softc(brdev);
449 
450 	/* I'm not sure we even need this */
451 	if (child != sc->cbdev && child != sc->exca[0].pccarddev)
452 		device_printf(brdev, "Unknown child detached: %s\n",
453 		    device_get_nameunit(child));
454 }
455 
456 /************************************************************************/
457 /* Kthreads								*/
458 /************************************************************************/
459 
460 void
461 cbb_event_thread(void *arg)
462 {
463 	struct cbb_softc *sc = arg;
464 	uint32_t status;
465 	int err;
466 	int not_a_card = 0;
467 
468 	mtx_lock(&sc->mtx);
469 	sc->flags |= CBB_KTHREAD_RUNNING;
470 	while ((sc->flags & CBB_KTHREAD_DONE) == 0) {
471 		mtx_unlock(&sc->mtx);
472 		/*
473 		 * We take out Giant here because we need it deep,
474 		 * down in the bowels of the vm system for mapping the
475 		 * memory we need to read the CIS.  In addition, since
476 		 * we are adding/deleting devices from the dev tree,
477 		 * and that code isn't MP safe, we have to hold Giant.
478 		 */
479 		mtx_lock(&Giant);
480 		status = cbb_get(sc, CBB_SOCKET_STATE);
481 		DPRINTF(("Status is 0x%x\n", status));
482 		if (!CBB_CARD_PRESENT(status)) {
483 			not_a_card = 0;		/* We know card type */
484 			cbb_removal(sc);
485 		} else if (status & CBB_STATE_NOT_A_CARD) {
486 			/*
487 			 * Up to 10 times, try to rescan the card when we see
488 			 * NOT_A_CARD.  10 is somehwat arbitrary.  When this
489 			 * pathology hits, there's a ~40% chance each try will
490 			 * fail.  10 tries takes about 5s and results in a
491 			 * 99.99% certainty of the results.
492 			 */
493 			if (not_a_card++ < 10) {
494 				DEVPRINTF((sc->dev,
495 				    "Not a card bit set, rescanning\n"));
496 				cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST);
497 			} else {
498 				device_printf(sc->dev,
499 				    "Can't determine card type\n");
500 			}
501 		} else {
502 			not_a_card = 0;		/* We know card type */
503 			cbb_insert(sc);
504 		}
505 		mtx_unlock(&Giant);
506 
507 		/*
508 		 * Wait until it has been 250ms since the last time we
509 		 * get an interrupt.  We handle the rest of the interrupt
510 		 * at the top of the loop.  Although we clear the bit in the
511 		 * ISR, we signal sc->cv from the detach path after we've
512 		 * set the CBB_KTHREAD_DONE bit, so we can't do a simple
513 		 * 250ms sleep here.
514 		 *
515 		 * In our ISR, we turn off the card changed interrupt.  Turn
516 		 * them back on here before we wait for them to happen.  We
517 		 * turn them on/off so that we can tolerate a large latency
518 		 * between the time we signal cbb_event_thread and it gets
519 		 * a chance to run.
520 		 */
521 		mtx_lock(&sc->mtx);
522 		cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
523 		cv_wait(&sc->cv, &sc->mtx);
524 		err = 0;
525 		while (err != EWOULDBLOCK &&
526 		    (sc->flags & CBB_KTHREAD_DONE) == 0)
527 			err = cv_timedwait(&sc->cv, &sc->mtx, hz / 4);
528 	}
529 	DEVPRINTF((sc->dev, "Thread terminating\n"));
530 	sc->flags &= ~CBB_KTHREAD_RUNNING;
531 	mtx_unlock(&sc->mtx);
532 	kproc_exit(0);
533 }
534 
535 /************************************************************************/
536 /* Insert/removal							*/
537 /************************************************************************/
538 
539 static void
540 cbb_insert(struct cbb_softc *sc)
541 {
542 	uint32_t sockevent, sockstate;
543 
544 	sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
545 	sockstate = cbb_get(sc, CBB_SOCKET_STATE);
546 
547 	DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
548 	    sockevent, sockstate));
549 
550 	if (sockstate & CBB_STATE_R2_CARD) {
551 		if (device_is_attached(sc->exca[0].pccarddev)) {
552 			sc->flags |= CBB_16BIT_CARD;
553 			exca_insert(&sc->exca[0]);
554 		} else {
555 			device_printf(sc->dev,
556 			    "16-bit card inserted, but no pccard bus.\n");
557 		}
558 	} else if (sockstate & CBB_STATE_CB_CARD) {
559 		if (device_is_attached(sc->cbdev)) {
560 			sc->flags &= ~CBB_16BIT_CARD;
561 			CARD_ATTACH_CARD(sc->cbdev);
562 		} else {
563 			device_printf(sc->dev,
564 			    "CardBus card inserted, but no cardbus bus.\n");
565 		}
566 	} else {
567 		/*
568 		 * We should power the card down, and try again a couple of
569 		 * times if this happens. XXX
570 		 */
571 		device_printf(sc->dev, "Unsupported card type detected\n");
572 	}
573 }
574 
575 static void
576 cbb_removal(struct cbb_softc *sc)
577 {
578 	sc->cardok = 0;
579 	if (sc->flags & CBB_16BIT_CARD) {
580 		exca_removal(&sc->exca[0]);
581 	} else {
582 		if (device_is_attached(sc->cbdev))
583 			CARD_DETACH_CARD(sc->cbdev);
584 	}
585 	cbb_destroy_res(sc);
586 }
587 
588 /************************************************************************/
589 /* Interrupt Handler							*/
590 /************************************************************************/
591 
592 static int
593 cbb_func_filt(void *arg)
594 {
595 	struct cbb_intrhand *ih = (struct cbb_intrhand *)arg;
596 	struct cbb_softc *sc = ih->sc;
597 
598 	/*
599 	 * Make sure that the card is really there.
600 	 */
601 	if (!sc->cardok)
602 		return (FILTER_STRAY);
603 	if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
604 		sc->cardok = 0;
605 		return (FILTER_HANDLED);
606 	}
607 
608 	/*
609 	 * nb: don't have to check for giant or not, since that's done in the
610 	 * ISR dispatch and one can't hold Giant in a filter anyway...
611 	 */
612 	return ((*ih->filt)(ih->arg));
613 }
614 
615 static void
616 cbb_func_intr(void *arg)
617 {
618 	struct cbb_intrhand *ih = (struct cbb_intrhand *)arg;
619 	struct cbb_softc *sc = ih->sc;
620 
621 	/*
622 	 * While this check may seem redundant, it helps close a race
623 	 * condition.  If the card is ejected after the filter runs, but
624 	 * before this ISR can be scheduled, then we need to do the same
625 	 * filtering to prevent the card's ISR from being called.  One could
626 	 * argue that the card's ISR should be able to cope, but experience
627 	 * has shown they can't always.  This mitigates the problem by making
628 	 * the race quite a bit smaller.  Properly written client ISRs should
629 	 * cope with the card going away in the middle of the ISR.  We assume
630 	 * that drivers that are sophisticated enough to use filters don't
631 	 * need our protection.  This also allows us to ensure they *ARE*
632 	 * called if their filter said they needed to be called.
633 	 */
634 	if (ih->filt == NULL) {
635 		if (!sc->cardok)
636 			return;
637 		if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
638 			sc->cardok = 0;
639 			return;
640 		}
641 	}
642 
643 	/*
644 	 * Call the registered ithread interrupt handler.  This entire routine
645 	 * will be called with Giant if this isn't an MP safe driver, or not
646 	 * if it is.  Either way, we don't have to worry.
647 	 */
648 	ih->intr(ih->arg);
649 }
650 
651 /************************************************************************/
652 /* Generic Power functions						*/
653 /************************************************************************/
654 
655 static uint32_t
656 cbb_detect_voltage(device_t brdev)
657 {
658 	struct cbb_softc *sc = device_get_softc(brdev);
659 	uint32_t psr;
660 	uint32_t vol = CARD_UKN_CARD;
661 
662 	psr = cbb_get(sc, CBB_SOCKET_STATE);
663 
664 	if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK)
665 		vol |= CARD_5V_CARD;
666 	if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK)
667 		vol |= CARD_3V_CARD;
668 	if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK)
669 		vol |= CARD_XV_CARD;
670 	if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK)
671 		vol |= CARD_YV_CARD;
672 
673 	return (vol);
674 }
675 
676 static uint8_t
677 cbb_o2micro_power_hack(struct cbb_softc *sc)
678 {
679 	uint8_t reg;
680 
681 	/*
682 	 * Issue #2: INT# not qualified with IRQ Routing Bit.  An
683 	 * unexpected PCI INT# may be generated during PC Card
684 	 * initialization even with the IRQ Routing Bit Set with some
685 	 * PC Cards.
686 	 *
687 	 * This is a two part issue.  The first part is that some of
688 	 * our older controllers have an issue in which the slot's PCI
689 	 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh
690 	 * bit 7).  Regardless of the IRQ routing bit, if NO ISA IRQ
691 	 * is selected (ExCA register 03h bits 3:0, of the slot, are
692 	 * cleared) we will generate INT# if IREQ# is asserted.  The
693 	 * second part is because some PC Cards prematurally assert
694 	 * IREQ# before the ExCA registers are fully programmed.  This
695 	 * in turn asserts INT# because ExCA register 03h bits 3:0
696 	 * (ISA IRQ Select) are not yet programmed.
697 	 *
698 	 * The fix for this issue, which will work for any controller
699 	 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b
700 	 * (select IRQ1), of the slot, before turning on slot power.
701 	 * Selecting IRQ1 will result in INT# NOT being asserted
702 	 * (because IRQ1 is selected), and IRQ1 won't be asserted
703 	 * because our controllers don't generate IRQ1.
704 	 *
705 	 * Other, non O2Micro controllers will generate irq 1 in some
706 	 * situations, so we can't do this hack for everybody.  Reports of
707 	 * keyboard controller's interrupts being suppressed occurred when
708 	 * we did this.
709 	 */
710 	reg = exca_getb(&sc->exca[0], EXCA_INTR);
711 	exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1);
712 	return (reg);
713 }
714 
715 /*
716  * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so
717  * we don't have an interrupt storm on power on.  This has the efect of
718  * disabling card status change interrupts for the duration of poweron.
719  */
720 static void
721 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg)
722 {
723 	exca_putb(&sc->exca[0], EXCA_INTR, reg);
724 }
725 
726 int
727 cbb_power(device_t brdev, int volts)
728 {
729 	uint32_t status, sock_ctrl, reg_ctrl, mask;
730 	struct cbb_softc *sc = device_get_softc(brdev);
731 	int cnt, sane;
732 	int retval = 0;
733 	int on = 0;
734 	uint8_t reg = 0;
735 
736 	sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
737 
738 	sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
739 	switch (volts & CARD_VCCMASK) {
740 	case 5:
741 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
742 		on++;
743 		break;
744 	case 3:
745 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
746 		on++;
747 		break;
748 	case XV:
749 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV;
750 		on++;
751 		break;
752 	case YV:
753 		sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV;
754 		on++;
755 		break;
756 	case 0:
757 		break;
758 	default:
759 		return (0);			/* power NEVER changed */
760 	}
761 
762 	/* VPP == VCC */
763 	sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
764 	sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
765 
766 	if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
767 		return (1); /* no change necessary */
768 	DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts));
769 	if (volts != 0 && sc->chipset == CB_O2MICRO)
770 		reg = cbb_o2micro_power_hack(sc);
771 
772 	/*
773 	 * We have to mask the card change detect interrupt while
774 	 * we're messing with the power.  It is allowed to bounce
775 	 * while we're messing with power as things settle down.  In
776 	 * addition, we mask off the card's function interrupt by
777 	 * routing it via the ISA bus.  This bit generally only
778 	 * affects 16-bit cards.  Some bridges allow one to set
779 	 * another bit to have it also affect 32-bit cards.  Since
780 	 * 32-bit cards are required to be better behaved, we don't
781 	 * bother to get into those bridge specific features.
782 	 */
783 	mask = cbb_get(sc, CBB_SOCKET_MASK);
784 	mask |= CBB_SOCKET_MASK_POWER;
785 	mask &= ~CBB_SOCKET_MASK_CD;
786 	cbb_set(sc, CBB_SOCKET_MASK, mask);
787 	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
788 	    |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2);
789 	cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
790 	if (on) {
791 		mtx_lock(&sc->mtx);
792 		cnt = sc->powerintr;
793 		/*
794 		 * We have a shortish timeout of 500ms here.  Some
795 		 * bridges do not generate a POWER_CYCLE event for
796 		 * 16-bit cards.  In those cases, we have to cope the
797 		 * best we can, and having only a short delay is
798 		 * better than the alternatives.
799 		 */
800 		sane = 10;
801 		while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) &&
802 		    cnt == sc->powerintr && sane-- > 0)
803 			cv_timedwait(&sc->powercv, &sc->mtx, hz / 20);
804 		mtx_unlock(&sc->mtx);
805 		/*
806 		 * The TOPIC95B requires a little bit extra time to get
807 		 * its act together, so delay for an additional 100ms.  Also
808 		 * as documented below, it doesn't seem to set the POWER_CYCLE
809 		 * bit, so don't whine if it never came on.
810 		 */
811 		if (sc->chipset == CB_TOPIC95) {
812 			pause("cbb95B", hz / 10);
813 		} else if (sane <= 0) {
814 			device_printf(sc->dev, "power timeout, doom?\n");
815 		}
816 	}
817 
818 	/*
819 	 * After the power is good, we can turn off the power interrupt.
820 	 * However, the PC Card standard says that we must delay turning the
821 	 * CD bit back on for a bit to allow for bouncyness on power down
822 	 * (recall that we don't wait above for a power down, since we don't
823 	 * get an interrupt for that).  We're called either from the suspend
824 	 * code in which case we don't want to turn card change on again, or
825 	 * we're called from the card insertion code, in which case the cbb
826 	 * thread will turn it on for us before it waits to be woken by a
827 	 * change event.
828 	 *
829 	 * NB: Topic95B doesn't set the power cycle bit.  we assume that
830 	 * both it and the TOPIC95 behave the same.
831 	 */
832 	cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER);
833 	status = cbb_get(sc, CBB_SOCKET_STATE);
834 	if (on && sc->chipset != CB_TOPIC95) {
835 		if ((status & CBB_STATE_POWER_CYCLE) == 0)
836 			device_printf(sc->dev, "Power not on?\n");
837 	}
838 	if (status & CBB_STATE_BAD_VCC_REQ) {
839 		device_printf(sc->dev, "Bad Vcc requested\n");
840 		/* XXX Do we want to do something to mitigate things here? */
841 		goto done;
842 	}
843 	if (sc->chipset == CB_TOPIC97) {
844 		reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4);
845 		reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE;
846 		if (on)
847 			reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA;
848 		else
849 			reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA;
850 		pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4);
851 	}
852 	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
853 	    & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2);
854 	retval = 1;
855 done:;
856 	if (volts != 0 && sc->chipset == CB_O2MICRO)
857 		cbb_o2micro_power_hack2(sc, reg);
858 	return (retval);
859 }
860 
861 static int
862 cbb_current_voltage(device_t brdev)
863 {
864 	struct cbb_softc *sc = device_get_softc(brdev);
865 	uint32_t ctrl;
866 
867 	ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
868 	switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) {
869 	case CBB_SOCKET_CTRL_VCC_5V:
870 		return CARD_5V_CARD;
871 	case CBB_SOCKET_CTRL_VCC_3V:
872 		return CARD_3V_CARD;
873 	case CBB_SOCKET_CTRL_VCC_XV:
874 		return CARD_XV_CARD;
875 	case CBB_SOCKET_CTRL_VCC_YV:
876 		return CARD_YV_CARD;
877 	}
878 	return 0;
879 }
880 
881 /*
882  * detect the voltage for the card, and set it.  Since the power
883  * used is the square of the voltage, lower voltages is a big win
884  * and what Windows does (and what Microsoft prefers).  The MS paper
885  * also talks about preferring the CIS entry as well, but that has
886  * to be done elsewhere.  We also optimize power sequencing here
887  * and don't change things if we're already powered up at a supported
888  * voltage.
889  *
890  * In addition, we power up with OE disabled.  We'll set it later
891  * in the power up sequence.
892  */
893 static int
894 cbb_do_power(device_t brdev)
895 {
896 	struct cbb_softc *sc = device_get_softc(brdev);
897 	uint32_t voltage, curpwr;
898 	uint32_t status;
899 
900 	/* Don't enable OE (output enable) until power stable */
901 	exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE);
902 
903 	voltage = cbb_detect_voltage(brdev);
904 	curpwr = cbb_current_voltage(brdev);
905 	status = cbb_get(sc, CBB_SOCKET_STATE);
906 	if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr))
907 		return 0;
908 	/* Prefer lowest voltage supported */
909 	cbb_power(brdev, CARD_OFF);
910 	if (voltage & CARD_YV_CARD)
911 		cbb_power(brdev, CARD_VCC(YV));
912 	else if (voltage & CARD_XV_CARD)
913 		cbb_power(brdev, CARD_VCC(XV));
914 	else if (voltage & CARD_3V_CARD)
915 		cbb_power(brdev, CARD_VCC(3));
916 	else if (voltage & CARD_5V_CARD)
917 		cbb_power(brdev, CARD_VCC(5));
918 	else {
919 		device_printf(brdev, "Unknown card voltage\n");
920 		return (ENXIO);
921 	}
922 	return (0);
923 }
924 
925 /************************************************************************/
926 /* CardBus power functions						*/
927 /************************************************************************/
928 
929 static void
930 cbb_cardbus_reset(device_t brdev, int on)
931 {
932 	struct cbb_softc *sc = device_get_softc(brdev);
933 	uint32_t b;
934 	int delay, count;
935 
936 	/*
937 	 * Asserting reset for 20ms is necessary for most bridges.  For some
938 	 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms.
939 	 */
940 	delay = sc->chipset == CB_RF5C47X ? 400 : 20;
941 	PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
942 	pause("cbbP3", hz * delay / 1000);
943 
944 	/*
945 	 *  If a card exists and we're turning it on, take it out of reset.
946 	 */
947 	if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
948 		/*
949 		 * After clearing reset, wait up to 1.1s for the vendor of
950 		 * device 0.0 to become != 0xffff.  The PCMCIA PC Card Host
951 		 * System Specification says that when powering up the card,
952 		 * the PCI Spec v2.1 must be followed.  In PCI spec v2.2 Table
953 		 * 4-6, Trhfa (Reset High to first Config Access) is at most
954 		 * 2^25 clocks, or just over 1s.  Secont 2.2.1 states any card
955 		 * not ready to participate in bus transactions must tristate
956 		 * its outputs.  Therefore, any access to its configuration
957 		 * registers must be ignored.  In that state, the vendor will
958 		 * read 0xffff.  Section 6.2.1 states a vendor id of 0xffff is
959 		 * invalid, so this can never match a real card.  Print a
960 		 * warning if it never returns a real id.  The PCMCIA PC Card
961 		 * Electrical Spec Section 5.2.7.1 implies only device 0.
962 		 */
963 		PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
964 		    &~CBBM_BRIDGECTRL_RESET, 2);
965 		b = pcib_get_bus(brdev);
966 		count = 1100 / 20;
967 		do {
968 			pause("cbbP4", hz * 2 / 100);
969 		} while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 2) ==
970 		    0xfffful && --count >= 0);
971 		if (count < 0)
972 			device_printf(brdev, "Warning: Bus reset timeout\n");
973 	}
974 }
975 
976 static int
977 cbb_cardbus_power_enable_socket(device_t brdev, device_t child)
978 {
979 	struct cbb_softc *sc = device_get_softc(brdev);
980 	int err;
981 
982 	if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE)))
983 		return (ENODEV);
984 
985 	err = cbb_do_power(brdev);
986 	if (err)
987 		return (err);
988 	cbb_cardbus_reset(brdev, 1);
989 	return (0);
990 }
991 
992 static void
993 cbb_cardbus_power_disable_socket(device_t brdev, device_t child)
994 {
995 	cbb_power(brdev, CARD_OFF);
996 	cbb_cardbus_reset(brdev, 0);
997 }
998 
999 /************************************************************************/
1000 /* CardBus Resource							*/
1001 /************************************************************************/
1002 
1003 static int
1004 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1005 {
1006 	int basereg;
1007 	int limitreg;
1008 
1009 	if ((win < 0) || (win > 1)) {
1010 		DEVPRINTF((brdev,
1011 		    "cbb_cardbus_io_open: window out of range %d\n", win));
1012 		return (EINVAL);
1013 	}
1014 
1015 	basereg = win * 8 + CBBR_IOBASE0;
1016 	limitreg = win * 8 + CBBR_IOLIMIT0;
1017 
1018 	pci_write_config(brdev, basereg, start, 4);
1019 	pci_write_config(brdev, limitreg, end, 4);
1020 	return (0);
1021 }
1022 
1023 static int
1024 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1025 {
1026 	int basereg;
1027 	int limitreg;
1028 
1029 	if ((win < 0) || (win > 1)) {
1030 		DEVPRINTF((brdev,
1031 		    "cbb_cardbus_mem_open: window out of range %d\n", win));
1032 		return (EINVAL);
1033 	}
1034 
1035 	basereg = win*8 + CBBR_MEMBASE0;
1036 	limitreg = win*8 + CBBR_MEMLIMIT0;
1037 
1038 	pci_write_config(brdev, basereg, start, 4);
1039 	pci_write_config(brdev, limitreg, end, 4);
1040 	return (0);
1041 }
1042 
1043 #define START_NONE 0xffffffff
1044 #define END_NONE 0
1045 
1046 static void
1047 cbb_cardbus_auto_open(struct cbb_softc *sc, int type)
1048 {
1049 	uint32_t starts[2];
1050 	uint32_t ends[2];
1051 	struct cbb_reslist *rle;
1052 	int align, i;
1053 	uint32_t reg;
1054 
1055 	starts[0] = starts[1] = START_NONE;
1056 	ends[0] = ends[1] = END_NONE;
1057 
1058 	if (type == SYS_RES_MEMORY)
1059 		align = CBB_MEMALIGN;
1060 	else if (type == SYS_RES_IOPORT)
1061 		align = CBB_IOALIGN;
1062 	else
1063 		align = 1;
1064 
1065 	SLIST_FOREACH(rle, &sc->rl, link) {
1066 		if (rle->type != type)
1067 			continue;
1068 		if (rle->res == NULL)
1069 			continue;
1070 		if (!(rman_get_flags(rle->res) & RF_ACTIVE))
1071 			continue;
1072 		if (rman_get_flags(rle->res) & RF_PREFETCHABLE)
1073 			i = 1;
1074 		else
1075 			i = 0;
1076 		if (rman_get_start(rle->res) < starts[i])
1077 			starts[i] = rman_get_start(rle->res);
1078 		if (rman_get_end(rle->res) > ends[i])
1079 			ends[i] = rman_get_end(rle->res);
1080 	}
1081 	for (i = 0; i < 2; i++) {
1082 		if (starts[i] == START_NONE)
1083 			continue;
1084 		starts[i] &= ~(align - 1);
1085 		ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1;
1086 	}
1087 	if (starts[0] != START_NONE && starts[1] != START_NONE) {
1088 		if (starts[0] < starts[1]) {
1089 			if (ends[0] > starts[1]) {
1090 				device_printf(sc->dev, "Overlapping ranges"
1091 				    " for prefetch and non-prefetch memory\n");
1092 				return;
1093 			}
1094 		} else {
1095 			if (ends[1] > starts[0]) {
1096 				device_printf(sc->dev, "Overlapping ranges"
1097 				    " for prefetch and non-prefetch memory\n");
1098 				return;
1099 			}
1100 		}
1101 	}
1102 
1103 	if (type == SYS_RES_MEMORY) {
1104 		cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1105 		cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1106 		reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1107 		reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 |
1108 		    CBBM_BRIDGECTRL_PREFETCH_1);
1109 		if (starts[1] != START_NONE)
1110 			reg |= CBBM_BRIDGECTRL_PREFETCH_1;
1111 		pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1112 		if (bootverbose) {
1113 			device_printf(sc->dev, "Opening memory:\n");
1114 			if (starts[0] != START_NONE)
1115 				device_printf(sc->dev, "Normal: %#x-%#x\n",
1116 				    starts[0], ends[0]);
1117 			if (starts[1] != START_NONE)
1118 				device_printf(sc->dev, "Prefetch: %#x-%#x\n",
1119 				    starts[1], ends[1]);
1120 		}
1121 	} else if (type == SYS_RES_IOPORT) {
1122 		cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1123 		cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1124 		if (bootverbose && starts[0] != START_NONE)
1125 			device_printf(sc->dev, "Opening I/O: %#x-%#x\n",
1126 			    starts[0], ends[0]);
1127 	}
1128 }
1129 
1130 static int
1131 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1132     int rid, struct resource *res)
1133 {
1134 	int ret;
1135 
1136 	ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1137 	    type, rid, res);
1138 	if (ret != 0)
1139 		return (ret);
1140 	cbb_cardbus_auto_open(device_get_softc(brdev), type);
1141 	return (0);
1142 }
1143 
1144 static int
1145 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1146     int rid, struct resource *res)
1147 {
1148 	int ret;
1149 
1150 	ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1151 	    type, rid, res);
1152 	if (ret != 0)
1153 		return (ret);
1154 	cbb_cardbus_auto_open(device_get_softc(brdev), type);
1155 	return (0);
1156 }
1157 
1158 static struct resource *
1159 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1160     int *rid, u_long start, u_long end, u_long count, u_int flags)
1161 {
1162 	struct cbb_softc *sc = device_get_softc(brdev);
1163 	int tmp;
1164 	struct resource *res;
1165 	u_long align;
1166 
1167 	switch (type) {
1168 	case SYS_RES_IRQ:
1169 		tmp = rman_get_start(sc->irq_res);
1170 		if (start > tmp || end < tmp || count != 1) {
1171 			device_printf(child, "requested interrupt %ld-%ld,"
1172 			    "count = %ld not supported by cbb\n",
1173 			    start, end, count);
1174 			return (NULL);
1175 		}
1176 		start = end = tmp;
1177 		flags |= RF_SHAREABLE;
1178 		break;
1179 	case SYS_RES_IOPORT:
1180 		if (start <= cbb_start_32_io)
1181 			start = cbb_start_32_io;
1182 		if (end < start)
1183 			end = start;
1184 		if (count > (1 << RF_ALIGNMENT(flags)))
1185 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1186 			    rman_make_alignment_flags(count);
1187 		break;
1188 	case SYS_RES_MEMORY:
1189 		if (start <= cbb_start_mem)
1190 			start = cbb_start_mem;
1191 		if (end < start)
1192 			end = start;
1193 		if (count < CBB_MEMALIGN)
1194 			align = CBB_MEMALIGN;
1195 		else
1196 			align = count;
1197 		if (align > (1 << RF_ALIGNMENT(flags)))
1198 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1199 			    rman_make_alignment_flags(align);
1200 		break;
1201 	}
1202 	res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1203 	    start, end, count, flags & ~RF_ACTIVE);
1204 	if (res == NULL) {
1205 		printf("cbb alloc res fail type %d rid %x\n", type, *rid);
1206 		return (NULL);
1207 	}
1208 	cbb_insert_res(sc, res, type, *rid);
1209 	if (flags & RF_ACTIVE)
1210 		if (bus_activate_resource(child, type, *rid, res) != 0) {
1211 			bus_release_resource(child, type, *rid, res);
1212 			return (NULL);
1213 		}
1214 
1215 	return (res);
1216 }
1217 
1218 static int
1219 cbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1220     int rid, struct resource *res)
1221 {
1222 	struct cbb_softc *sc = device_get_softc(brdev);
1223 	int error;
1224 
1225 	if (rman_get_flags(res) & RF_ACTIVE) {
1226 		error = bus_deactivate_resource(child, type, rid, res);
1227 		if (error != 0)
1228 			return (error);
1229 	}
1230 	cbb_remove_res(sc, res);
1231 	return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1232 	    type, rid, res));
1233 }
1234 
1235 /************************************************************************/
1236 /* PC Card Power Functions						*/
1237 /************************************************************************/
1238 
1239 static int
1240 cbb_pcic_power_enable_socket(device_t brdev, device_t child)
1241 {
1242 	struct cbb_softc *sc = device_get_softc(brdev);
1243 	int err;
1244 
1245 	DPRINTF(("cbb_pcic_socket_enable:\n"));
1246 
1247 	/* power down/up the socket to reset */
1248 	err = cbb_do_power(brdev);
1249 	if (err)
1250 		return (err);
1251 	exca_reset(&sc->exca[0], child);
1252 
1253 	return (0);
1254 }
1255 
1256 static void
1257 cbb_pcic_power_disable_socket(device_t brdev, device_t child)
1258 {
1259 	struct cbb_softc *sc = device_get_softc(brdev);
1260 
1261 	DPRINTF(("cbb_pcic_socket_disable\n"));
1262 
1263 	/* Turn off the card's interrupt and leave it in reset, wait 10ms */
1264 	exca_putb(&sc->exca[0], EXCA_INTR, 0);
1265 	pause("cbbP1", hz / 100);
1266 
1267 	/* power down the socket */
1268 	cbb_power(brdev, CARD_OFF);
1269 	exca_putb(&sc->exca[0], EXCA_PWRCTL, 0);
1270 
1271 	/* wait 300ms until power fails (Tpf). */
1272 	pause("cbbP2", hz * 300 / 1000);
1273 
1274 	/* enable CSC interrupts */
1275 	exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE);
1276 }
1277 
1278 /************************************************************************/
1279 /* POWER methods							*/
1280 /************************************************************************/
1281 
1282 int
1283 cbb_power_enable_socket(device_t brdev, device_t child)
1284 {
1285 	struct cbb_softc *sc = device_get_softc(brdev);
1286 
1287 	if (sc->flags & CBB_16BIT_CARD)
1288 		return (cbb_pcic_power_enable_socket(brdev, child));
1289 	else
1290 		return (cbb_cardbus_power_enable_socket(brdev, child));
1291 }
1292 
1293 void
1294 cbb_power_disable_socket(device_t brdev, device_t child)
1295 {
1296 	struct cbb_softc *sc = device_get_softc(brdev);
1297 	if (sc->flags & CBB_16BIT_CARD)
1298 		cbb_pcic_power_disable_socket(brdev, child);
1299 	else
1300 		cbb_cardbus_power_disable_socket(brdev, child);
1301 }
1302 
1303 static int
1304 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1305     struct resource *res)
1306 {
1307 	struct cbb_softc *sc = device_get_softc(brdev);
1308 	return (exca_activate_resource(&sc->exca[0], child, type, rid, res));
1309 }
1310 
1311 static int
1312 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1313     int rid, struct resource *res)
1314 {
1315 	struct cbb_softc *sc = device_get_softc(brdev);
1316 	return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res));
1317 }
1318 
1319 static struct resource *
1320 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1321     u_long start, u_long end, u_long count, u_int flags)
1322 {
1323 	struct resource *res = NULL;
1324 	struct cbb_softc *sc = device_get_softc(brdev);
1325 	int align;
1326 	int tmp;
1327 
1328 	switch (type) {
1329 	case SYS_RES_MEMORY:
1330 		if (start < cbb_start_mem)
1331 			start = cbb_start_mem;
1332 		if (end < start)
1333 			end = start;
1334 		if (count < CBB_MEMALIGN)
1335 			align = CBB_MEMALIGN;
1336 		else
1337 			align = count;
1338 		if (align > (1 << RF_ALIGNMENT(flags)))
1339 			flags = (flags & ~RF_ALIGNMENT_MASK) |
1340 			    rman_make_alignment_flags(align);
1341 		break;
1342 	case SYS_RES_IOPORT:
1343 		if (start < cbb_start_16_io)
1344 			start = cbb_start_16_io;
1345 		if (end < start)
1346 			end = start;
1347 		break;
1348 	case SYS_RES_IRQ:
1349 		tmp = rman_get_start(sc->irq_res);
1350 		if (start > tmp || end < tmp || count != 1) {
1351 			device_printf(child, "requested interrupt %ld-%ld,"
1352 			    "count = %ld not supported by cbb\n",
1353 			    start, end, count);
1354 			return (NULL);
1355 		}
1356 		flags |= RF_SHAREABLE;
1357 		start = end = rman_get_start(sc->irq_res);
1358 		break;
1359 	}
1360 	res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1361 	    start, end, count, flags & ~RF_ACTIVE);
1362 	if (res == NULL)
1363 		return (NULL);
1364 	cbb_insert_res(sc, res, type, *rid);
1365 	if (flags & RF_ACTIVE) {
1366 		if (bus_activate_resource(child, type, *rid, res) != 0) {
1367 			bus_release_resource(child, type, *rid, res);
1368 			return (NULL);
1369 		}
1370 	}
1371 
1372 	return (res);
1373 }
1374 
1375 static int
1376 cbb_pcic_release_resource(device_t brdev, device_t child, int type,
1377     int rid, struct resource *res)
1378 {
1379 	struct cbb_softc *sc = device_get_softc(brdev);
1380 	int error;
1381 
1382 	if (rman_get_flags(res) & RF_ACTIVE) {
1383 		error = bus_deactivate_resource(child, type, rid, res);
1384 		if (error != 0)
1385 			return (error);
1386 	}
1387 	cbb_remove_res(sc, res);
1388 	return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1389 	    type, rid, res));
1390 }
1391 
1392 /************************************************************************/
1393 /* PC Card methods							*/
1394 /************************************************************************/
1395 
1396 int
1397 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1398     uint32_t flags)
1399 {
1400 	struct cbb_softc *sc = device_get_softc(brdev);
1401 	struct resource *res;
1402 
1403 	if (type != SYS_RES_MEMORY)
1404 		return (EINVAL);
1405 	res = cbb_find_res(sc, type, rid);
1406 	if (res == NULL) {
1407 		device_printf(brdev,
1408 		    "set_res_flags: specified rid not found\n");
1409 		return (ENOENT);
1410 	}
1411 	return (exca_mem_set_flags(&sc->exca[0], res, flags));
1412 }
1413 
1414 int
1415 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1416     uint32_t cardaddr, uint32_t *deltap)
1417 {
1418 	struct cbb_softc *sc = device_get_softc(brdev);
1419 	struct resource *res;
1420 
1421 	res = cbb_find_res(sc, SYS_RES_MEMORY, rid);
1422 	if (res == NULL) {
1423 		device_printf(brdev,
1424 		    "set_memory_offset: specified rid not found\n");
1425 		return (ENOENT);
1426 	}
1427 	return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap));
1428 }
1429 
1430 /************************************************************************/
1431 /* BUS Methods								*/
1432 /************************************************************************/
1433 
1434 
1435 int
1436 cbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1437     struct resource *r)
1438 {
1439 	struct cbb_softc *sc = device_get_softc(brdev);
1440 
1441 	if (sc->flags & CBB_16BIT_CARD)
1442 		return (cbb_pcic_activate_resource(brdev, child, type, rid, r));
1443 	else
1444 		return (cbb_cardbus_activate_resource(brdev, child, type, rid,
1445 		    r));
1446 }
1447 
1448 int
1449 cbb_deactivate_resource(device_t brdev, device_t child, int type,
1450     int rid, struct resource *r)
1451 {
1452 	struct cbb_softc *sc = device_get_softc(brdev);
1453 
1454 	if (sc->flags & CBB_16BIT_CARD)
1455 		return (cbb_pcic_deactivate_resource(brdev, child, type,
1456 		    rid, r));
1457 	else
1458 		return (cbb_cardbus_deactivate_resource(brdev, child, type,
1459 		    rid, r));
1460 }
1461 
1462 struct resource *
1463 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1464     u_long start, u_long end, u_long count, u_int flags)
1465 {
1466 	struct cbb_softc *sc = device_get_softc(brdev);
1467 
1468 	if (sc->flags & CBB_16BIT_CARD)
1469 		return (cbb_pcic_alloc_resource(brdev, child, type, rid,
1470 		    start, end, count, flags));
1471 	else
1472 		return (cbb_cardbus_alloc_resource(brdev, child, type, rid,
1473 		    start, end, count, flags));
1474 }
1475 
1476 int
1477 cbb_release_resource(device_t brdev, device_t child, int type, int rid,
1478     struct resource *r)
1479 {
1480 	struct cbb_softc *sc = device_get_softc(brdev);
1481 
1482 	if (sc->flags & CBB_16BIT_CARD)
1483 		return (cbb_pcic_release_resource(brdev, child, type,
1484 		    rid, r));
1485 	else
1486 		return (cbb_cardbus_release_resource(brdev, child, type,
1487 		    rid, r));
1488 }
1489 
1490 int
1491 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1492 {
1493 	struct cbb_softc *sc = device_get_softc(brdev);
1494 
1495 	switch (which) {
1496 	case PCIB_IVAR_DOMAIN:
1497 		*result = sc->domain;
1498 		return (0);
1499 	case PCIB_IVAR_BUS:
1500 		*result = sc->secbus;
1501 		return (0);
1502 	}
1503 	return (ENOENT);
1504 }
1505 
1506 int
1507 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1508 {
1509 	struct cbb_softc *sc = device_get_softc(brdev);
1510 
1511 	switch (which) {
1512 	case PCIB_IVAR_DOMAIN:
1513 		return (EINVAL);
1514 	case PCIB_IVAR_BUS:
1515 		sc->secbus = value;
1516 		return (0);
1517 	}
1518 	return (ENOENT);
1519 }
1520 
1521 int
1522 cbb_suspend(device_t self)
1523 {
1524 	int			error = 0;
1525 	struct cbb_softc	*sc = device_get_softc(self);
1526 
1527 	error = bus_generic_suspend(self);
1528 	if (error != 0)
1529 		return (error);
1530 	cbb_set(sc, CBB_SOCKET_MASK, 0);	/* Quiet hardware */
1531 	sc->cardok = 0;				/* Card is bogus now */
1532 	return (0);
1533 }
1534 
1535 int
1536 cbb_resume(device_t self)
1537 {
1538 	int	error = 0;
1539 	struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1540 	uint32_t tmp;
1541 
1542 	/*
1543 	 * Some BIOSes will not save the BARs for the pci chips, so we
1544 	 * must do it ourselves.  If the BAR is reset to 0 for an I/O
1545 	 * device, it will read back as 0x1, so no explicit test for
1546 	 * memory devices are needed.
1547 	 *
1548 	 * Note: The PCI bus code should do this automatically for us on
1549 	 * suspend/resume, but until it does, we have to cope.
1550 	 */
1551 	pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4);
1552 	DEVPRINTF((self, "PCI Memory allocated: %08lx\n",
1553 	    rman_get_start(sc->base_res)));
1554 
1555 	sc->chipinit(sc);
1556 
1557 	/* reset interrupt -- Do we really need to do this? */
1558 	tmp = cbb_get(sc, CBB_SOCKET_EVENT);
1559 	cbb_set(sc, CBB_SOCKET_EVENT, tmp);
1560 
1561 	/* CSC Interrupt: Card detect interrupt on */
1562 	cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
1563 
1564 	/* Signal the thread to wakeup. */
1565 	mtx_lock(&sc->mtx);
1566 	cv_signal(&sc->cv);
1567 	mtx_unlock(&sc->mtx);
1568 
1569 	error = bus_generic_resume(self);
1570 
1571 	return (error);
1572 }
1573 
1574 int
1575 cbb_child_present(device_t self)
1576 {
1577 	struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1578 	uint32_t sockstate;
1579 
1580 	sockstate = cbb_get(sc, CBB_SOCKET_STATE);
1581 	return (CBB_CARD_PRESENT(sockstate) && sc->cardok);
1582 }
1583