1 /*- 2 * Copyright (c) 2002-2004 M. Warner Losh. 3 * Copyright (c) 2000-2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 and 2000 31 * HAYAKAWA Koichi. All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by HAYAKAWA Koichi. 44 * 4. The name of the author may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Driver for PCI to CardBus Bridge chips 61 * and PCI to PCMCIA Bridge chips 62 * and ISA to PCMCIA host adapters 63 * and C Bus to PCMCIA host adapters 64 * 65 * References: 66 * TI Datasheets: 67 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 68 * 69 * Written by Jonathan Chen <jon@freebsd.org> 70 * The author would like to acknowledge: 71 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 72 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 73 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 74 * * David Cross: Author of the initial ugly hack for a specific cardbus card 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD$"); 79 80 #include <sys/param.h> 81 #include <sys/bus.h> 82 #include <sys/condvar.h> 83 #include <sys/errno.h> 84 #include <sys/kernel.h> 85 #include <sys/module.h> 86 #include <sys/kthread.h> 87 #include <sys/interrupt.h> 88 #include <sys/lock.h> 89 #include <sys/malloc.h> 90 #include <sys/mutex.h> 91 #include <sys/proc.h> 92 #include <sys/rman.h> 93 #include <sys/sysctl.h> 94 #include <sys/systm.h> 95 #include <machine/bus.h> 96 #include <machine/resource.h> 97 98 #include <dev/pci/pcireg.h> 99 #include <dev/pci/pcivar.h> 100 #include <dev/pci/pcib_private.h> 101 102 #include <dev/pccard/pccardreg.h> 103 #include <dev/pccard/pccardvar.h> 104 105 #include <dev/exca/excareg.h> 106 #include <dev/exca/excavar.h> 107 108 #include <dev/pccbb/pccbbreg.h> 109 #include <dev/pccbb/pccbbvar.h> 110 111 #include "power_if.h" 112 #include "card_if.h" 113 #include "pcib_if.h" 114 115 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 116 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 117 118 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 119 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 120 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 121 pci_write_config(DEV, REG, ( \ 122 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 123 124 #define CBB_CARD_PRESENT(s) ((s & CBB_STATE_CD) == 0) 125 126 #define CBB_START_MEM 0x88000000 127 #define CBB_START_32_IO 0x1000 128 #define CBB_START_16_IO 0x100 129 130 devclass_t cbb_devclass; 131 132 /* sysctl vars */ 133 static SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 134 135 /* There's no way to say TUNEABLE_LONG to get the right types */ 136 u_long cbb_start_mem = CBB_START_MEM; 137 TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem); 138 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 139 &cbb_start_mem, CBB_START_MEM, 140 "Starting address for memory allocations"); 141 142 u_long cbb_start_16_io = CBB_START_16_IO; 143 TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io); 144 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 145 &cbb_start_16_io, CBB_START_16_IO, 146 "Starting ioport for 16-bit cards"); 147 148 u_long cbb_start_32_io = CBB_START_32_IO; 149 TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io); 150 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 151 &cbb_start_32_io, CBB_START_32_IO, 152 "Starting ioport for 32-bit cards"); 153 154 int cbb_debug = 0; 155 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 156 SYSCTL_INT(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 157 "Verbose cardbus bridge debugging"); 158 159 static void cbb_insert(struct cbb_softc *sc); 160 static void cbb_removal(struct cbb_softc *sc); 161 static uint32_t cbb_detect_voltage(device_t brdev); 162 static void cbb_cardbus_reset_power(device_t brdev, device_t child, int on); 163 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 164 uint32_t end); 165 static int cbb_cardbus_mem_open(device_t brdev, int win, 166 uint32_t start, uint32_t end); 167 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 168 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 169 int type, int rid, struct resource *res); 170 static int cbb_cardbus_deactivate_resource(device_t brdev, 171 device_t child, int type, int rid, struct resource *res); 172 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 173 device_t child, int type, int *rid, u_long start, 174 u_long end, u_long count, u_int flags); 175 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 176 int type, int rid, struct resource *res); 177 static int cbb_cardbus_power_enable_socket(device_t brdev, 178 device_t child); 179 static int cbb_cardbus_power_disable_socket(device_t brdev, 180 device_t child); 181 static int cbb_func_filt(void *arg); 182 static void cbb_func_intr(void *arg); 183 184 static void 185 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 186 { 187 struct cbb_reslist *rle; 188 189 SLIST_FOREACH(rle, &sc->rl, link) { 190 if (rle->res == res) { 191 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 192 free(rle, M_DEVBUF); 193 return; 194 } 195 } 196 } 197 198 static struct resource * 199 cbb_find_res(struct cbb_softc *sc, int type, int rid) 200 { 201 struct cbb_reslist *rle; 202 203 SLIST_FOREACH(rle, &sc->rl, link) 204 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 205 return (rle->res); 206 return (NULL); 207 } 208 209 static void 210 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 211 int rid) 212 { 213 struct cbb_reslist *rle; 214 215 /* 216 * Need to record allocated resource so we can iterate through 217 * it later. 218 */ 219 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 220 if (rle == NULL) 221 panic("cbb_cardbus_alloc_resource: can't record entry!"); 222 rle->res = res; 223 rle->type = type; 224 rle->rid = rid; 225 SLIST_INSERT_HEAD(&sc->rl, rle, link); 226 } 227 228 static void 229 cbb_destroy_res(struct cbb_softc *sc) 230 { 231 struct cbb_reslist *rle; 232 233 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 234 device_printf(sc->dev, "Danger Will Robinson: Resource " 235 "left allocated! This is a bug... " 236 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 237 rman_get_start(rle->res)); 238 SLIST_REMOVE_HEAD(&sc->rl, link); 239 free(rle, M_DEVBUF); 240 } 241 } 242 243 /* 244 * Disable function interrupts by telling the bridge to generate IRQ1 245 * interrupts. These interrupts aren't really generated by the chip, since 246 * IRQ1 is reserved. Some chipsets assert INTA# inappropriately during 247 * initialization, so this helps to work around the problem. 248 * 249 * XXX We can't do this workaround for all chipsets, because this 250 * XXX causes interference with the keyboard because somechipsets will 251 * XXX actually signal IRQ1 over their serial interrupt connections to 252 * XXX the south bridge. Disable it it for now. 253 */ 254 void 255 cbb_disable_func_intr(struct cbb_softc *sc) 256 { 257 #if 0 258 uint8_t reg; 259 260 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 261 EXCA_INTR_IRQ_RESERVED1; 262 exca_putb(&sc->exca[0], EXCA_INTR, reg); 263 #endif 264 } 265 266 /* 267 * Enable function interrupts. We turn on function interrupts when the card 268 * requests an interrupt. The PCMCIA standard says that we should set 269 * the lower 4 bits to 0 to route via PCI. Note: we call this for both 270 * CardBus and R2 (PC Card) cases, but it should have no effect on CardBus 271 * cards. 272 */ 273 static void 274 cbb_enable_func_intr(struct cbb_softc *sc) 275 { 276 uint8_t reg; 277 278 reg = (exca_getb(&sc->exca[0], EXCA_INTR) & ~EXCA_INTR_IRQ_MASK) | 279 EXCA_INTR_IRQ_NONE; 280 exca_putb(&sc->exca[0], EXCA_INTR, reg); 281 } 282 283 int 284 cbb_detach(device_t brdev) 285 { 286 struct cbb_softc *sc = device_get_softc(brdev); 287 device_t *devlist; 288 int tmp, tries, error, numdevs; 289 290 /* 291 * Before we delete the children (which we have to do because 292 * attach doesn't check for children busses correctly), we have 293 * to detach the children. Even if we didn't need to delete the 294 * children, we have to detach them. 295 */ 296 error = bus_generic_detach(brdev); 297 if (error != 0) 298 return (error); 299 300 /* 301 * Since the attach routine doesn't search for children before it 302 * attaches them to this device, we must delete them here in order 303 * for the kldload/unload case to work. If we failed to do that, then 304 * we'd get duplicate devices when cbb.ko was reloaded. 305 */ 306 tries = 10; 307 do { 308 error = device_get_children(brdev, &devlist, &numdevs); 309 if (error == 0) 310 break; 311 /* 312 * Try hard to cope with low memory. 313 */ 314 if (error == ENOMEM) { 315 pause("cbbnomem", 1); 316 continue; 317 } 318 } while (tries-- > 0); 319 for (tmp = 0; tmp < numdevs; tmp++) 320 device_delete_child(brdev, devlist[tmp]); 321 free(devlist, M_TEMP); 322 323 /* Turn off the interrupts */ 324 cbb_set(sc, CBB_SOCKET_MASK, 0); 325 326 /* reset 16-bit pcmcia bus */ 327 exca_clrb(&sc->exca[0], EXCA_INTR, EXCA_INTR_RESET); 328 329 /* turn off power */ 330 cbb_power(brdev, CARD_OFF); 331 332 /* Ack the interrupt */ 333 cbb_set(sc, CBB_SOCKET_EVENT, 0xffffffff); 334 335 /* 336 * Wait for the thread to die. kproc_exit will do a wakeup 337 * on the event thread's struct thread * so that we know it is 338 * safe to proceed. IF the thread is running, set the please 339 * die flag and wait for it to comply. Since the wakeup on 340 * the event thread happens only in kproc_exit, we don't 341 * need to loop here. 342 */ 343 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 344 mtx_lock(&sc->mtx); 345 sc->flags |= CBB_KTHREAD_DONE; 346 while (sc->flags & CBB_KTHREAD_RUNNING) { 347 DEVPRINTF((sc->dev, "Waiting for thread to die\n")); 348 wakeup(&sc->intrhand); 349 msleep(sc->event_thread, &sc->mtx, PWAIT, "cbbun", 0); 350 } 351 mtx_unlock(&sc->mtx); 352 353 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 354 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 355 sc->base_res); 356 mtx_destroy(&sc->mtx); 357 return (0); 358 } 359 360 int 361 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 362 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 363 void **cookiep) 364 { 365 struct cbb_intrhand *ih; 366 struct cbb_softc *sc = device_get_softc(dev); 367 int err; 368 369 if (filt == NULL && intr == NULL) 370 return (EINVAL); 371 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 372 if (ih == NULL) 373 return (ENOMEM); 374 *cookiep = ih; 375 ih->filt = filt; 376 ih->intr = intr; 377 ih->arg = arg; 378 ih->sc = sc; 379 /* 380 * XXX need to turn on ISA interrupts, if we ever support them, but 381 * XXX for now that's all we need to do. 382 */ 383 err = BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, 384 filt ? cbb_func_filt : NULL, intr ? cbb_func_intr : NULL, ih, 385 &ih->cookie); 386 if (err != 0) { 387 free(ih, M_DEVBUF); 388 return (err); 389 } 390 cbb_enable_func_intr(sc); 391 sc->cardok = 1; 392 return 0; 393 } 394 395 int 396 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 397 void *cookie) 398 { 399 struct cbb_intrhand *ih; 400 int err; 401 402 /* XXX Need to do different things for ISA interrupts. */ 403 ih = (struct cbb_intrhand *) cookie; 404 err = BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, 405 ih->cookie); 406 if (err != 0) 407 return (err); 408 free(ih, M_DEVBUF); 409 return (0); 410 } 411 412 413 void 414 cbb_driver_added(device_t brdev, driver_t *driver) 415 { 416 struct cbb_softc *sc = device_get_softc(brdev); 417 device_t *devlist; 418 device_t dev; 419 int tmp; 420 int numdevs; 421 int wake = 0; 422 423 DEVICE_IDENTIFY(driver, brdev); 424 tmp = device_get_children(brdev, &devlist, &numdevs); 425 if (tmp != 0) { 426 device_printf(brdev, "Cannot get children list, no reprobe\n"); 427 return; 428 } 429 for (tmp = 0; tmp < numdevs; tmp++) { 430 dev = devlist[tmp]; 431 if (device_get_state(dev) == DS_NOTPRESENT && 432 device_probe_and_attach(dev) == 0) 433 wake++; 434 } 435 free(devlist, M_TEMP); 436 437 if (wake > 0) 438 wakeup(&sc->intrhand); 439 } 440 441 void 442 cbb_child_detached(device_t brdev, device_t child) 443 { 444 struct cbb_softc *sc = device_get_softc(brdev); 445 446 /* I'm not sure we even need this */ 447 if (child != sc->cbdev && child != sc->exca[0].pccarddev) 448 device_printf(brdev, "Unknown child detached: %s\n", 449 device_get_nameunit(child)); 450 } 451 452 /************************************************************************/ 453 /* Kthreads */ 454 /************************************************************************/ 455 456 void 457 cbb_event_thread(void *arg) 458 { 459 struct cbb_softc *sc = arg; 460 uint32_t status; 461 int err; 462 int not_a_card = 0; 463 464 /* 465 * We need to act as a power sequencer on startup. Delay 2s/channel 466 * to ensure the other channels have had a chance to come up. We likely 467 * should add a lock that's shared on a per-slot basis so that only 468 * one power event can happen per slot at a time. 469 */ 470 pause("cbbstart", hz * device_get_unit(sc->dev) * 2); 471 mtx_lock(&sc->mtx); 472 sc->flags |= CBB_KTHREAD_RUNNING; 473 while ((sc->flags & CBB_KTHREAD_DONE) == 0) { 474 mtx_unlock(&sc->mtx); 475 /* 476 * We take out Giant here because we need it deep, 477 * down in the bowels of the vm system for mapping the 478 * memory we need to read the CIS. In addition, since 479 * we are adding/deleting devices from the dev tree, 480 * and that code isn't MP safe, we have to hold Giant. 481 */ 482 mtx_lock(&Giant); 483 status = cbb_get(sc, CBB_SOCKET_STATE); 484 DPRINTF(("Status is 0x%x\n", status)); 485 if (!CBB_CARD_PRESENT(status)) { 486 not_a_card = 0; /* We know card type */ 487 cbb_removal(sc); 488 } else if (status & CBB_STATE_NOT_A_CARD) { 489 /* 490 * Up to 10 times, try to rescan the card when we see 491 * NOT_A_CARD. 10 is somehwat arbitrary. When this 492 * pathology hits, there's a ~40% chance each try will 493 * fail. 10 tries takes about 5s and results in a 494 * 99.99% certainty of the results. 495 */ 496 if (not_a_card++ < 10) { 497 DEVPRINTF((sc->dev, 498 "Not a card bit set, rescanning\n")); 499 cbb_setb(sc, CBB_SOCKET_FORCE, CBB_FORCE_CV_TEST); 500 } else { 501 device_printf(sc->dev, 502 "Can't determine card type\n"); 503 } 504 } else { 505 not_a_card = 0; /* We know card type */ 506 cbb_insert(sc); 507 } 508 mtx_unlock(&Giant); 509 510 /* 511 * First time through we need to tell mountroot that we're 512 * done. 513 */ 514 if (sc->sc_root_token) { 515 root_mount_rel(sc->sc_root_token); 516 sc->sc_root_token = NULL; 517 } 518 519 /* 520 * Wait until it has been 250ms since the last time we 521 * get an interrupt. We handle the rest of the interrupt 522 * at the top of the loop. Although we clear the bit in the 523 * ISR, we signal sc->cv from the detach path after we've 524 * set the CBB_KTHREAD_DONE bit, so we can't do a simple 525 * 250ms sleep here. 526 * 527 * In our ISR, we turn off the card changed interrupt. Turn 528 * them back on here before we wait for them to happen. We 529 * turn them on/off so that we can tolerate a large latency 530 * between the time we signal cbb_event_thread and it gets 531 * a chance to run. 532 */ 533 mtx_lock(&sc->mtx); 534 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD | CBB_SOCKET_MASK_CSTS); 535 msleep(&sc->intrhand, &sc->mtx, 0, "-", 0); 536 err = 0; 537 while (err != EWOULDBLOCK && 538 (sc->flags & CBB_KTHREAD_DONE) == 0) 539 err = msleep(&sc->intrhand, &sc->mtx, 0, "-", hz / 5); 540 } 541 DEVPRINTF((sc->dev, "Thread terminating\n")); 542 sc->flags &= ~CBB_KTHREAD_RUNNING; 543 mtx_unlock(&sc->mtx); 544 kproc_exit(0); 545 } 546 547 /************************************************************************/ 548 /* Insert/removal */ 549 /************************************************************************/ 550 551 static void 552 cbb_insert(struct cbb_softc *sc) 553 { 554 uint32_t sockevent, sockstate; 555 556 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 557 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 558 559 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 560 sockevent, sockstate)); 561 562 if (sockstate & CBB_STATE_R2_CARD) { 563 if (device_is_attached(sc->exca[0].pccarddev)) { 564 sc->flags |= CBB_16BIT_CARD; 565 exca_insert(&sc->exca[0]); 566 } else { 567 device_printf(sc->dev, 568 "16-bit card inserted, but no pccard bus.\n"); 569 } 570 } else if (sockstate & CBB_STATE_CB_CARD) { 571 if (device_is_attached(sc->cbdev)) { 572 sc->flags &= ~CBB_16BIT_CARD; 573 CARD_ATTACH_CARD(sc->cbdev); 574 } else { 575 device_printf(sc->dev, 576 "CardBus card inserted, but no cardbus bus.\n"); 577 } 578 } else { 579 /* 580 * We should power the card down, and try again a couple of 581 * times if this happens. XXX 582 */ 583 device_printf(sc->dev, "Unsupported card type detected\n"); 584 } 585 } 586 587 static void 588 cbb_removal(struct cbb_softc *sc) 589 { 590 sc->cardok = 0; 591 if (sc->flags & CBB_16BIT_CARD) { 592 exca_removal(&sc->exca[0]); 593 } else { 594 if (device_is_attached(sc->cbdev)) 595 CARD_DETACH_CARD(sc->cbdev); 596 } 597 cbb_destroy_res(sc); 598 } 599 600 /************************************************************************/ 601 /* Interrupt Handler */ 602 /************************************************************************/ 603 604 static int 605 cbb_func_filt(void *arg) 606 { 607 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 608 struct cbb_softc *sc = ih->sc; 609 610 /* 611 * Make sure that the card is really there. 612 */ 613 if (!sc->cardok) 614 return (FILTER_STRAY); 615 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 616 sc->cardok = 0; 617 return (FILTER_HANDLED); 618 } 619 620 /* 621 * nb: don't have to check for giant or not, since that's done in the 622 * ISR dispatch and one can't hold Giant in a filter anyway... 623 */ 624 return ((*ih->filt)(ih->arg)); 625 } 626 627 static void 628 cbb_func_intr(void *arg) 629 { 630 struct cbb_intrhand *ih = (struct cbb_intrhand *)arg; 631 struct cbb_softc *sc = ih->sc; 632 633 /* 634 * While this check may seem redundant, it helps close a race 635 * condition. If the card is ejected after the filter runs, but 636 * before this ISR can be scheduled, then we need to do the same 637 * filtering to prevent the card's ISR from being called. One could 638 * argue that the card's ISR should be able to cope, but experience 639 * has shown they can't always. This mitigates the problem by making 640 * the race quite a bit smaller. Properly written client ISRs should 641 * cope with the card going away in the middle of the ISR. We assume 642 * that drivers that are sophisticated enough to use filters don't 643 * need our protection. This also allows us to ensure they *ARE* 644 * called if their filter said they needed to be called. 645 */ 646 if (ih->filt == NULL) { 647 if (!sc->cardok) 648 return; 649 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 650 sc->cardok = 0; 651 return; 652 } 653 } 654 655 /* 656 * Call the registered ithread interrupt handler. This entire routine 657 * will be called with Giant if this isn't an MP safe driver, or not 658 * if it is. Either way, we don't have to worry. 659 */ 660 ih->intr(ih->arg); 661 } 662 663 /************************************************************************/ 664 /* Generic Power functions */ 665 /************************************************************************/ 666 667 static uint32_t 668 cbb_detect_voltage(device_t brdev) 669 { 670 struct cbb_softc *sc = device_get_softc(brdev); 671 uint32_t psr; 672 uint32_t vol = CARD_UKN_CARD; 673 674 psr = cbb_get(sc, CBB_SOCKET_STATE); 675 676 if (psr & CBB_STATE_5VCARD && psr & CBB_STATE_5VSOCK) 677 vol |= CARD_5V_CARD; 678 if (psr & CBB_STATE_3VCARD && psr & CBB_STATE_3VSOCK) 679 vol |= CARD_3V_CARD; 680 if (psr & CBB_STATE_XVCARD && psr & CBB_STATE_XVSOCK) 681 vol |= CARD_XV_CARD; 682 if (psr & CBB_STATE_YVCARD && psr & CBB_STATE_YVSOCK) 683 vol |= CARD_YV_CARD; 684 685 return (vol); 686 } 687 688 static uint8_t 689 cbb_o2micro_power_hack(struct cbb_softc *sc) 690 { 691 uint8_t reg; 692 693 /* 694 * Issue #2: INT# not qualified with IRQ Routing Bit. An 695 * unexpected PCI INT# may be generated during PC Card 696 * initialization even with the IRQ Routing Bit Set with some 697 * PC Cards. 698 * 699 * This is a two part issue. The first part is that some of 700 * our older controllers have an issue in which the slot's PCI 701 * INT# is NOT qualified by the IRQ routing bit (PCI reg. 3Eh 702 * bit 7). Regardless of the IRQ routing bit, if NO ISA IRQ 703 * is selected (ExCA register 03h bits 3:0, of the slot, are 704 * cleared) we will generate INT# if IREQ# is asserted. The 705 * second part is because some PC Cards prematurally assert 706 * IREQ# before the ExCA registers are fully programmed. This 707 * in turn asserts INT# because ExCA register 03h bits 3:0 708 * (ISA IRQ Select) are not yet programmed. 709 * 710 * The fix for this issue, which will work for any controller 711 * (old or new), is to set ExCA register 03h bits 3:0 = 0001b 712 * (select IRQ1), of the slot, before turning on slot power. 713 * Selecting IRQ1 will result in INT# NOT being asserted 714 * (because IRQ1 is selected), and IRQ1 won't be asserted 715 * because our controllers don't generate IRQ1. 716 * 717 * Other, non O2Micro controllers will generate irq 1 in some 718 * situations, so we can't do this hack for everybody. Reports of 719 * keyboard controller's interrupts being suppressed occurred when 720 * we did this. 721 */ 722 reg = exca_getb(&sc->exca[0], EXCA_INTR); 723 exca_putb(&sc->exca[0], EXCA_INTR, (reg & 0xf0) | 1); 724 return (reg); 725 } 726 727 /* 728 * Restore the damage that cbb_o2micro_power_hack does to EXCA_INTR so 729 * we don't have an interrupt storm on power on. This has the efect of 730 * disabling card status change interrupts for the duration of poweron. 731 */ 732 static void 733 cbb_o2micro_power_hack2(struct cbb_softc *sc, uint8_t reg) 734 { 735 exca_putb(&sc->exca[0], EXCA_INTR, reg); 736 } 737 738 int 739 cbb_power(device_t brdev, int volts) 740 { 741 uint32_t status, sock_ctrl, reg_ctrl, mask; 742 struct cbb_softc *sc = device_get_softc(brdev); 743 int cnt, sane; 744 int retval = 0; 745 int on = 0; 746 uint8_t reg = 0; 747 748 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 749 750 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 751 switch (volts & CARD_VCCMASK) { 752 case 5: 753 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 754 on++; 755 break; 756 case 3: 757 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 758 on++; 759 break; 760 case XV: 761 sock_ctrl |= CBB_SOCKET_CTRL_VCC_XV; 762 on++; 763 break; 764 case YV: 765 sock_ctrl |= CBB_SOCKET_CTRL_VCC_YV; 766 on++; 767 break; 768 case 0: 769 break; 770 default: 771 return (0); /* power NEVER changed */ 772 } 773 774 /* VPP == VCC */ 775 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 776 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 777 778 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 779 return (1); /* no change necessary */ 780 DEVPRINTF((sc->dev, "cbb_power: %dV\n", volts)); 781 if (volts != 0 && sc->chipset == CB_O2MICRO) 782 reg = cbb_o2micro_power_hack(sc); 783 784 /* 785 * We have to mask the card change detect interrupt while we're 786 * messing with the power. It is allowed to bounce while we're 787 * messing with power as things settle down. In addition, we mask off 788 * the card's function interrupt by routing it via the ISA bus. This 789 * bit generally only affects 16-bit cards. Some bridges allow one to 790 * set another bit to have it also affect 32-bit cards. Since 32-bit 791 * cards are required to be better behaved, we don't bother to get 792 * into those bridge specific features. 793 * 794 * XXX I wonder if we need to enable the READY bit interrupt in the 795 * EXCA CSC register for 16-bit cards, and disable the CD bit? 796 */ 797 mask = cbb_get(sc, CBB_SOCKET_MASK); 798 mask |= CBB_SOCKET_MASK_POWER; 799 mask &= ~CBB_SOCKET_MASK_CD; 800 cbb_set(sc, CBB_SOCKET_MASK, mask); 801 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 802 |CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 803 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 804 if (on) { 805 mtx_lock(&sc->mtx); 806 cnt = sc->powerintr; 807 /* 808 * We have a shortish timeout of 500ms here. Some bridges do 809 * not generate a POWER_CYCLE event for 16-bit cards. In 810 * those cases, we have to cope the best we can, and having 811 * only a short delay is better than the alternatives. Others 812 * raise the power cycle a smidge before it is really ready. 813 * We deal with those below. 814 */ 815 sane = 10; 816 while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && 817 cnt == sc->powerintr && sane-- > 0) 818 msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); 819 mtx_unlock(&sc->mtx); 820 821 /* 822 * Relax for 100ms. Some bridges appear to assert this signal 823 * right away, but before the card has stabilized. Other 824 * cards need need more time to cope up reliabily. 825 * Experiments with troublesome setups show this to be a 826 * "cheap" way to enhance reliabilty. We need not do this for 827 * "off" since we don't touch the card after we turn it off. 828 */ 829 pause("cbbPwr", min(hz / 10, 1)); 830 831 /* 832 * The TOPIC95B requires a little bit extra time to get its 833 * act together, so delay for an additional 100ms. Also as 834 * documented below, it doesn't seem to set the POWER_CYCLE 835 * bit, so don't whine if it never came on. 836 */ 837 if (sc->chipset == CB_TOPIC95) 838 pause("cbb95B", hz / 10); 839 else if (sane <= 0) 840 device_printf(sc->dev, "power timeout, doom?\n"); 841 } 842 843 /* 844 * After the power is good, we can turn off the power interrupt. 845 * However, the PC Card standard says that we must delay turning the 846 * CD bit back on for a bit to allow for bouncyness on power down 847 * (recall that we don't wait above for a power down, since we don't 848 * get an interrupt for that). We're called either from the suspend 849 * code in which case we don't want to turn card change on again, or 850 * we're called from the card insertion code, in which case the cbb 851 * thread will turn it on for us before it waits to be woken by a 852 * change event. 853 * 854 * NB: Topic95B doesn't set the power cycle bit. we assume that 855 * both it and the TOPIC95 behave the same. 856 */ 857 cbb_clrb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_POWER); 858 status = cbb_get(sc, CBB_SOCKET_STATE); 859 if (on && sc->chipset != CB_TOPIC95) { 860 if ((status & CBB_STATE_POWER_CYCLE) == 0) 861 device_printf(sc->dev, "Power not on?\n"); 862 } 863 if (status & CBB_STATE_BAD_VCC_REQ) { 864 device_printf(sc->dev, "Bad Vcc requested\n"); 865 /* 866 * Turn off the power, and try again. Retrigger other 867 * active interrupts via force register. From NetBSD 868 * PR 36652, coded by me to description there. 869 */ 870 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 871 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 872 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 873 status &= ~CBB_STATE_BAD_VCC_REQ; 874 status &= ~CBB_STATE_DATA_LOST; 875 status |= CBB_FORCE_CV_TEST; 876 cbb_set(sc, CBB_SOCKET_FORCE, status); 877 goto done; 878 } 879 if (sc->chipset == CB_TOPIC97) { 880 reg_ctrl = pci_read_config(sc->dev, TOPIC_REG_CTRL, 4); 881 reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE; 882 if (on) 883 reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA; 884 else 885 reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA; 886 pci_write_config(sc->dev, TOPIC_REG_CTRL, reg_ctrl, 4); 887 } 888 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 889 & ~CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN, 2); 890 retval = 1; 891 done:; 892 if (volts != 0 && sc->chipset == CB_O2MICRO) 893 cbb_o2micro_power_hack2(sc, reg); 894 return (retval); 895 } 896 897 static int 898 cbb_current_voltage(device_t brdev) 899 { 900 struct cbb_softc *sc = device_get_softc(brdev); 901 uint32_t ctrl; 902 903 ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 904 switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) { 905 case CBB_SOCKET_CTRL_VCC_5V: 906 return CARD_5V_CARD; 907 case CBB_SOCKET_CTRL_VCC_3V: 908 return CARD_3V_CARD; 909 case CBB_SOCKET_CTRL_VCC_XV: 910 return CARD_XV_CARD; 911 case CBB_SOCKET_CTRL_VCC_YV: 912 return CARD_YV_CARD; 913 } 914 return 0; 915 } 916 917 /* 918 * detect the voltage for the card, and set it. Since the power 919 * used is the square of the voltage, lower voltages is a big win 920 * and what Windows does (and what Microsoft prefers). The MS paper 921 * also talks about preferring the CIS entry as well, but that has 922 * to be done elsewhere. We also optimize power sequencing here 923 * and don't change things if we're already powered up at a supported 924 * voltage. 925 * 926 * In addition, we power up with OE disabled. We'll set it later 927 * in the power up sequence. 928 */ 929 static int 930 cbb_do_power(device_t brdev) 931 { 932 struct cbb_softc *sc = device_get_softc(brdev); 933 uint32_t voltage, curpwr; 934 uint32_t status; 935 936 /* Don't enable OE (output enable) until power stable */ 937 exca_clrb(&sc->exca[0], EXCA_PWRCTL, EXCA_PWRCTL_OE); 938 939 voltage = cbb_detect_voltage(brdev); 940 curpwr = cbb_current_voltage(brdev); 941 status = cbb_get(sc, CBB_SOCKET_STATE); 942 if ((status & CBB_STATE_POWER_CYCLE) && (voltage & curpwr)) 943 return 0; 944 /* Prefer lowest voltage supported */ 945 cbb_power(brdev, CARD_OFF); 946 if (voltage & CARD_YV_CARD) 947 cbb_power(brdev, CARD_VCC(YV)); 948 else if (voltage & CARD_XV_CARD) 949 cbb_power(brdev, CARD_VCC(XV)); 950 else if (voltage & CARD_3V_CARD) 951 cbb_power(brdev, CARD_VCC(3)); 952 else if (voltage & CARD_5V_CARD) 953 cbb_power(brdev, CARD_VCC(5)); 954 else { 955 device_printf(brdev, "Unknown card voltage\n"); 956 return (ENXIO); 957 } 958 return (0); 959 } 960 961 /************************************************************************/ 962 /* CardBus power functions */ 963 /************************************************************************/ 964 965 static void 966 cbb_cardbus_reset_power(device_t brdev, device_t child, int on) 967 { 968 struct cbb_softc *sc = device_get_softc(brdev); 969 uint32_t b; 970 int delay, count; 971 972 /* 973 * Asserting reset for 20ms is necessary for most bridges. For some 974 * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The 975 * root cause of this is unknown, and NetBSD does the same thing. 976 */ 977 delay = sc->chipset == CB_RF5C47X ? 400 : 20; 978 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 979 pause("cbbP3", hz * delay / 1000); 980 981 /* 982 * If a card exists and we're turning it on, take it out of reset. 983 * After clearing reset, wait up to 1.1s for the first configuration 984 * register (vendor/product) configuration register of device 0.0 to 985 * become != 0xffffffff. The PCMCIA PC Card Host System Specification 986 * says that when powering up the card, the PCI Spec v2.1 must be 987 * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first 988 * Config Access) is at most 2^25 clocks, or just over 1s. Section 989 * 2.2.1 states any card not ready to participate in bus transactions 990 * must tristate its outputs. Therefore, any access to its 991 * configuration registers must be ignored. In that state, the config 992 * reg will read 0xffffffff. Section 6.2.1 states a vendor id of 993 * 0xffff is invalid, so this can never match a real card. Print a 994 * warning if it never returns a real id. The PCMCIA PC Card 995 * Electrical Spec Section 5.2.7.1 implies only device 0 is present on 996 * a cardbus bus, so that's the only register we check here. 997 */ 998 if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) { 999 /* 1000 */ 1001 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 1002 &~CBBM_BRIDGECTRL_RESET, 2); 1003 b = pcib_get_bus(child); 1004 count = 1100 / 20; 1005 do { 1006 pause("cbbP4", hz * 2 / 100); 1007 } while (PCIB_READ_CONFIG(brdev, b, 0, 0, PCIR_DEVVENDOR, 4) == 1008 0xfffffffful && --count >= 0); 1009 if (count < 0) 1010 device_printf(brdev, "Warning: Bus reset timeout\n"); 1011 } 1012 } 1013 1014 static int 1015 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1016 { 1017 struct cbb_softc *sc = device_get_softc(brdev); 1018 int err; 1019 1020 if (!CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) 1021 return (ENODEV); 1022 1023 err = cbb_do_power(brdev); 1024 if (err) 1025 return (err); 1026 cbb_cardbus_reset_power(brdev, child, 1); 1027 return (0); 1028 } 1029 1030 static int 1031 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1032 { 1033 cbb_power(brdev, CARD_OFF); 1034 cbb_cardbus_reset_power(brdev, child, 0); 1035 return (0); 1036 } 1037 1038 /************************************************************************/ 1039 /* CardBus Resource */ 1040 /************************************************************************/ 1041 1042 static void 1043 cbb_activate_window(device_t brdev, int type) 1044 { 1045 1046 PCI_ENABLE_IO(device_get_parent(brdev), brdev, type); 1047 } 1048 1049 static int 1050 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1051 { 1052 int basereg; 1053 int limitreg; 1054 1055 if ((win < 0) || (win > 1)) { 1056 DEVPRINTF((brdev, 1057 "cbb_cardbus_io_open: window out of range %d\n", win)); 1058 return (EINVAL); 1059 } 1060 1061 basereg = win * 8 + CBBR_IOBASE0; 1062 limitreg = win * 8 + CBBR_IOLIMIT0; 1063 1064 pci_write_config(brdev, basereg, start, 4); 1065 pci_write_config(brdev, limitreg, end, 4); 1066 cbb_activate_window(brdev, SYS_RES_IOPORT); 1067 return (0); 1068 } 1069 1070 static int 1071 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1072 { 1073 int basereg; 1074 int limitreg; 1075 1076 if ((win < 0) || (win > 1)) { 1077 DEVPRINTF((brdev, 1078 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1079 return (EINVAL); 1080 } 1081 1082 basereg = win * 8 + CBBR_MEMBASE0; 1083 limitreg = win * 8 + CBBR_MEMLIMIT0; 1084 1085 pci_write_config(brdev, basereg, start, 4); 1086 pci_write_config(brdev, limitreg, end, 4); 1087 cbb_activate_window(brdev, SYS_RES_MEMORY); 1088 return (0); 1089 } 1090 1091 #define START_NONE 0xffffffff 1092 #define END_NONE 0 1093 1094 static void 1095 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1096 { 1097 uint32_t starts[2]; 1098 uint32_t ends[2]; 1099 struct cbb_reslist *rle; 1100 int align, i; 1101 uint32_t reg; 1102 1103 starts[0] = starts[1] = START_NONE; 1104 ends[0] = ends[1] = END_NONE; 1105 1106 if (type == SYS_RES_MEMORY) 1107 align = CBB_MEMALIGN; 1108 else if (type == SYS_RES_IOPORT) 1109 align = CBB_IOALIGN; 1110 else 1111 align = 1; 1112 1113 SLIST_FOREACH(rle, &sc->rl, link) { 1114 if (rle->type != type) 1115 continue; 1116 if (rle->res == NULL) 1117 continue; 1118 if (!(rman_get_flags(rle->res) & RF_ACTIVE)) 1119 continue; 1120 if (rman_get_flags(rle->res) & RF_PREFETCHABLE) 1121 i = 1; 1122 else 1123 i = 0; 1124 if (rman_get_start(rle->res) < starts[i]) 1125 starts[i] = rman_get_start(rle->res); 1126 if (rman_get_end(rle->res) > ends[i]) 1127 ends[i] = rman_get_end(rle->res); 1128 } 1129 for (i = 0; i < 2; i++) { 1130 if (starts[i] == START_NONE) 1131 continue; 1132 starts[i] &= ~(align - 1); 1133 ends[i] = ((ends[i] + align - 1) & ~(align - 1)) - 1; 1134 } 1135 if (starts[0] != START_NONE && starts[1] != START_NONE) { 1136 if (starts[0] < starts[1]) { 1137 if (ends[0] > starts[1]) { 1138 device_printf(sc->dev, "Overlapping ranges" 1139 " for prefetch and non-prefetch memory\n"); 1140 return; 1141 } 1142 } else { 1143 if (ends[1] > starts[0]) { 1144 device_printf(sc->dev, "Overlapping ranges" 1145 " for prefetch and non-prefetch memory\n"); 1146 return; 1147 } 1148 } 1149 } 1150 1151 if (type == SYS_RES_MEMORY) { 1152 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1153 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1154 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1155 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0 | 1156 CBBM_BRIDGECTRL_PREFETCH_1); 1157 if (starts[1] != START_NONE) 1158 reg |= CBBM_BRIDGECTRL_PREFETCH_1; 1159 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1160 if (bootverbose) { 1161 device_printf(sc->dev, "Opening memory:\n"); 1162 if (starts[0] != START_NONE) 1163 device_printf(sc->dev, "Normal: %#x-%#x\n", 1164 starts[0], ends[0]); 1165 if (starts[1] != START_NONE) 1166 device_printf(sc->dev, "Prefetch: %#x-%#x\n", 1167 starts[1], ends[1]); 1168 } 1169 } else if (type == SYS_RES_IOPORT) { 1170 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1171 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1172 if (bootverbose && starts[0] != START_NONE) 1173 device_printf(sc->dev, "Opening I/O: %#x-%#x\n", 1174 starts[0], ends[0]); 1175 } 1176 } 1177 1178 static int 1179 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1180 int rid, struct resource *res) 1181 { 1182 int ret; 1183 1184 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1185 type, rid, res); 1186 if (ret != 0) 1187 return (ret); 1188 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1189 return (0); 1190 } 1191 1192 static int 1193 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1194 int rid, struct resource *res) 1195 { 1196 int ret; 1197 1198 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1199 type, rid, res); 1200 if (ret != 0) 1201 return (ret); 1202 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1203 return (0); 1204 } 1205 1206 static struct resource * 1207 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1208 int *rid, u_long start, u_long end, u_long count, u_int flags) 1209 { 1210 struct cbb_softc *sc = device_get_softc(brdev); 1211 int tmp; 1212 struct resource *res; 1213 u_long align; 1214 1215 switch (type) { 1216 case SYS_RES_IRQ: 1217 tmp = rman_get_start(sc->irq_res); 1218 if (start > tmp || end < tmp || count != 1) { 1219 device_printf(child, "requested interrupt %ld-%ld," 1220 "count = %ld not supported by cbb\n", 1221 start, end, count); 1222 return (NULL); 1223 } 1224 start = end = tmp; 1225 flags |= RF_SHAREABLE; 1226 break; 1227 case SYS_RES_IOPORT: 1228 if (start <= cbb_start_32_io) 1229 start = cbb_start_32_io; 1230 if (end < start) 1231 end = start; 1232 if (count > (1 << RF_ALIGNMENT(flags))) 1233 flags = (flags & ~RF_ALIGNMENT_MASK) | 1234 rman_make_alignment_flags(count); 1235 break; 1236 case SYS_RES_MEMORY: 1237 if (start <= cbb_start_mem) 1238 start = cbb_start_mem; 1239 if (end < start) 1240 end = start; 1241 if (count < CBB_MEMALIGN) 1242 align = CBB_MEMALIGN; 1243 else 1244 align = count; 1245 if (align > (1 << RF_ALIGNMENT(flags))) 1246 flags = (flags & ~RF_ALIGNMENT_MASK) | 1247 rman_make_alignment_flags(align); 1248 break; 1249 } 1250 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1251 start, end, count, flags & ~RF_ACTIVE); 1252 if (res == NULL) { 1253 printf("cbb alloc res fail type %d rid %x\n", type, *rid); 1254 return (NULL); 1255 } 1256 cbb_insert_res(sc, res, type, *rid); 1257 if (flags & RF_ACTIVE) 1258 if (bus_activate_resource(child, type, *rid, res) != 0) { 1259 bus_release_resource(child, type, *rid, res); 1260 return (NULL); 1261 } 1262 1263 return (res); 1264 } 1265 1266 static int 1267 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1268 int rid, struct resource *res) 1269 { 1270 struct cbb_softc *sc = device_get_softc(brdev); 1271 int error; 1272 1273 if (rman_get_flags(res) & RF_ACTIVE) { 1274 error = bus_deactivate_resource(child, type, rid, res); 1275 if (error != 0) 1276 return (error); 1277 } 1278 cbb_remove_res(sc, res); 1279 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1280 type, rid, res)); 1281 } 1282 1283 /************************************************************************/ 1284 /* PC Card Power Functions */ 1285 /************************************************************************/ 1286 1287 static int 1288 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1289 { 1290 struct cbb_softc *sc = device_get_softc(brdev); 1291 int err; 1292 1293 DPRINTF(("cbb_pcic_socket_enable:\n")); 1294 1295 /* power down/up the socket to reset */ 1296 err = cbb_do_power(brdev); 1297 if (err) 1298 return (err); 1299 exca_reset(&sc->exca[0], child); 1300 1301 return (0); 1302 } 1303 1304 static int 1305 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1306 { 1307 struct cbb_softc *sc = device_get_softc(brdev); 1308 1309 DPRINTF(("cbb_pcic_socket_disable\n")); 1310 1311 /* Turn off the card's interrupt and leave it in reset, wait 10ms */ 1312 exca_putb(&sc->exca[0], EXCA_INTR, 0); 1313 pause("cbbP1", hz / 100); 1314 1315 /* power down the socket */ 1316 cbb_power(brdev, CARD_OFF); 1317 exca_putb(&sc->exca[0], EXCA_PWRCTL, 0); 1318 1319 /* wait 300ms until power fails (Tpf). */ 1320 pause("cbbP2", hz * 300 / 1000); 1321 1322 /* enable CSC interrupts */ 1323 exca_putb(&sc->exca[0], EXCA_INTR, EXCA_INTR_ENABLE); 1324 return (0); 1325 } 1326 1327 /************************************************************************/ 1328 /* POWER methods */ 1329 /************************************************************************/ 1330 1331 int 1332 cbb_power_enable_socket(device_t brdev, device_t child) 1333 { 1334 struct cbb_softc *sc = device_get_softc(brdev); 1335 1336 if (sc->flags & CBB_16BIT_CARD) 1337 return (cbb_pcic_power_enable_socket(brdev, child)); 1338 return (cbb_cardbus_power_enable_socket(brdev, child)); 1339 } 1340 1341 int 1342 cbb_power_disable_socket(device_t brdev, device_t child) 1343 { 1344 struct cbb_softc *sc = device_get_softc(brdev); 1345 if (sc->flags & CBB_16BIT_CARD) 1346 return (cbb_pcic_power_disable_socket(brdev, child)); 1347 return (cbb_cardbus_power_disable_socket(brdev, child)); 1348 } 1349 1350 static int 1351 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1352 struct resource *res) 1353 { 1354 struct cbb_softc *sc = device_get_softc(brdev); 1355 int error; 1356 1357 error = exca_activate_resource(&sc->exca[0], child, type, rid, res); 1358 if (error == 0) 1359 cbb_activate_window(brdev, type); 1360 return (error); 1361 } 1362 1363 static int 1364 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1365 int rid, struct resource *res) 1366 { 1367 struct cbb_softc *sc = device_get_softc(brdev); 1368 return (exca_deactivate_resource(&sc->exca[0], child, type, rid, res)); 1369 } 1370 1371 static struct resource * 1372 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1373 u_long start, u_long end, u_long count, u_int flags) 1374 { 1375 struct resource *res = NULL; 1376 struct cbb_softc *sc = device_get_softc(brdev); 1377 int align; 1378 int tmp; 1379 1380 switch (type) { 1381 case SYS_RES_MEMORY: 1382 if (start < cbb_start_mem) 1383 start = cbb_start_mem; 1384 if (end < start) 1385 end = start; 1386 if (count < CBB_MEMALIGN) 1387 align = CBB_MEMALIGN; 1388 else 1389 align = count; 1390 if (align > (1 << RF_ALIGNMENT(flags))) 1391 flags = (flags & ~RF_ALIGNMENT_MASK) | 1392 rman_make_alignment_flags(align); 1393 break; 1394 case SYS_RES_IOPORT: 1395 if (start < cbb_start_16_io) 1396 start = cbb_start_16_io; 1397 if (end < start) 1398 end = start; 1399 break; 1400 case SYS_RES_IRQ: 1401 tmp = rman_get_start(sc->irq_res); 1402 if (start > tmp || end < tmp || count != 1) { 1403 device_printf(child, "requested interrupt %ld-%ld," 1404 "count = %ld not supported by cbb\n", 1405 start, end, count); 1406 return (NULL); 1407 } 1408 flags |= RF_SHAREABLE; 1409 start = end = rman_get_start(sc->irq_res); 1410 break; 1411 } 1412 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1413 start, end, count, flags & ~RF_ACTIVE); 1414 if (res == NULL) 1415 return (NULL); 1416 cbb_insert_res(sc, res, type, *rid); 1417 if (flags & RF_ACTIVE) { 1418 if (bus_activate_resource(child, type, *rid, res) != 0) { 1419 bus_release_resource(child, type, *rid, res); 1420 return (NULL); 1421 } 1422 } 1423 1424 return (res); 1425 } 1426 1427 static int 1428 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1429 int rid, struct resource *res) 1430 { 1431 struct cbb_softc *sc = device_get_softc(brdev); 1432 int error; 1433 1434 if (rman_get_flags(res) & RF_ACTIVE) { 1435 error = bus_deactivate_resource(child, type, rid, res); 1436 if (error != 0) 1437 return (error); 1438 } 1439 cbb_remove_res(sc, res); 1440 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1441 type, rid, res)); 1442 } 1443 1444 /************************************************************************/ 1445 /* PC Card methods */ 1446 /************************************************************************/ 1447 1448 int 1449 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1450 u_long flags) 1451 { 1452 struct cbb_softc *sc = device_get_softc(brdev); 1453 struct resource *res; 1454 1455 if (type != SYS_RES_MEMORY) 1456 return (EINVAL); 1457 res = cbb_find_res(sc, type, rid); 1458 if (res == NULL) { 1459 device_printf(brdev, 1460 "set_res_flags: specified rid not found\n"); 1461 return (ENOENT); 1462 } 1463 return (exca_mem_set_flags(&sc->exca[0], res, flags)); 1464 } 1465 1466 int 1467 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1468 uint32_t cardaddr, uint32_t *deltap) 1469 { 1470 struct cbb_softc *sc = device_get_softc(brdev); 1471 struct resource *res; 1472 1473 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1474 if (res == NULL) { 1475 device_printf(brdev, 1476 "set_memory_offset: specified rid not found\n"); 1477 return (ENOENT); 1478 } 1479 return (exca_mem_set_offset(&sc->exca[0], res, cardaddr, deltap)); 1480 } 1481 1482 /************************************************************************/ 1483 /* BUS Methods */ 1484 /************************************************************************/ 1485 1486 1487 int 1488 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1489 struct resource *r) 1490 { 1491 struct cbb_softc *sc = device_get_softc(brdev); 1492 1493 if (sc->flags & CBB_16BIT_CARD) 1494 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1495 else 1496 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1497 r)); 1498 } 1499 1500 int 1501 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1502 int rid, struct resource *r) 1503 { 1504 struct cbb_softc *sc = device_get_softc(brdev); 1505 1506 if (sc->flags & CBB_16BIT_CARD) 1507 return (cbb_pcic_deactivate_resource(brdev, child, type, 1508 rid, r)); 1509 else 1510 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1511 rid, r)); 1512 } 1513 1514 struct resource * 1515 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1516 u_long start, u_long end, u_long count, u_int flags) 1517 { 1518 struct cbb_softc *sc = device_get_softc(brdev); 1519 1520 if (sc->flags & CBB_16BIT_CARD) 1521 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1522 start, end, count, flags)); 1523 else 1524 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1525 start, end, count, flags)); 1526 } 1527 1528 int 1529 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1530 struct resource *r) 1531 { 1532 struct cbb_softc *sc = device_get_softc(brdev); 1533 1534 if (sc->flags & CBB_16BIT_CARD) 1535 return (cbb_pcic_release_resource(brdev, child, type, 1536 rid, r)); 1537 else 1538 return (cbb_cardbus_release_resource(brdev, child, type, 1539 rid, r)); 1540 } 1541 1542 int 1543 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1544 { 1545 struct cbb_softc *sc = device_get_softc(brdev); 1546 1547 switch (which) { 1548 case PCIB_IVAR_DOMAIN: 1549 *result = sc->domain; 1550 return (0); 1551 case PCIB_IVAR_BUS: 1552 *result = sc->bus.sec; 1553 return (0); 1554 } 1555 return (ENOENT); 1556 } 1557 1558 int 1559 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1560 { 1561 1562 switch (which) { 1563 case PCIB_IVAR_DOMAIN: 1564 return (EINVAL); 1565 case PCIB_IVAR_BUS: 1566 return (EINVAL); 1567 } 1568 return (ENOENT); 1569 } 1570 1571 int 1572 cbb_suspend(device_t self) 1573 { 1574 int error = 0; 1575 struct cbb_softc *sc = device_get_softc(self); 1576 1577 error = bus_generic_suspend(self); 1578 if (error != 0) 1579 return (error); 1580 cbb_set(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 1581 sc->cardok = 0; /* Card is bogus now */ 1582 return (0); 1583 } 1584 1585 int 1586 cbb_resume(device_t self) 1587 { 1588 int error = 0; 1589 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1590 uint32_t tmp; 1591 1592 /* 1593 * Some BIOSes will not save the BARs for the pci chips, so we 1594 * must do it ourselves. If the BAR is reset to 0 for an I/O 1595 * device, it will read back as 0x1, so no explicit test for 1596 * memory devices are needed. 1597 * 1598 * Note: The PCI bus code should do this automatically for us on 1599 * suspend/resume, but until it does, we have to cope. 1600 */ 1601 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1602 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1603 rman_get_start(sc->base_res))); 1604 1605 sc->chipinit(sc); 1606 1607 /* reset interrupt -- Do we really need to do this? */ 1608 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1609 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1610 1611 /* CSC Interrupt: Card detect interrupt on */ 1612 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1613 1614 /* Signal the thread to wakeup. */ 1615 wakeup(&sc->intrhand); 1616 1617 error = bus_generic_resume(self); 1618 1619 return (error); 1620 } 1621 1622 int 1623 cbb_child_present(device_t parent, device_t child) 1624 { 1625 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(parent); 1626 uint32_t sockstate; 1627 1628 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1629 return (CBB_CARD_PRESENT(sockstate) && sc->cardok); 1630 } 1631