1 /*- 2 * Copyright (c) 2015 M. Warner Losh <imp@FreeBSD.org> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 #include "opt_platform.h" 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/bus.h> 32 #include <sys/gpio.h> 33 #include <sys/kernel.h> 34 #include <sys/lock.h> 35 #include <sys/malloc.h> 36 #include <sys/module.h> 37 #include <sys/mutex.h> 38 39 #include <dev/gpio/gpiobusvar.h> 40 #include <dev/ow/owll.h> 41 42 #ifdef FDT 43 #include <dev/ofw/ofw_bus.h> 44 #include <dev/ofw/ofw_bus_subr.h> 45 46 static struct ofw_compat_data compat_data[] = { 47 {"w1-gpio", true}, 48 {NULL, false} 49 }; 50 OFWBUS_PNP_INFO(compat_data); 51 SIMPLEBUS_PNP_INFO(compat_data); 52 #endif /* FDT */ 53 54 #define OW_PIN 0 55 56 #define OWC_GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 57 #define OWC_GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 58 #define OWC_GPIOBUS_LOCK_INIT(_sc) \ 59 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 60 "owc_gpiobus", MTX_DEF) 61 #define OWC_GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 62 63 struct owc_gpiobus_softc 64 { 65 device_t sc_dev; 66 gpio_pin_t sc_pin; 67 struct mtx sc_mtx; 68 }; 69 70 static int owc_gpiobus_probe(device_t); 71 static int owc_gpiobus_attach(device_t); 72 static int owc_gpiobus_detach(device_t); 73 74 static int 75 owc_gpiobus_probe(device_t dev) 76 { 77 int rv; 78 79 /* 80 * By default we only bid to attach if specifically added by our parent 81 * (usually via hint.owc_gpiobus.#.at=busname). On FDT systems we bid 82 * as the default driver based on being configured in the FDT data. 83 */ 84 rv = BUS_PROBE_NOWILDCARD; 85 86 #ifdef FDT 87 if (ofw_bus_status_okay(dev) && 88 ofw_bus_search_compatible(dev, compat_data)->ocd_data) 89 rv = BUS_PROBE_DEFAULT; 90 #endif 91 92 device_set_desc(dev, "GPIO one-wire bus"); 93 94 return (rv); 95 } 96 97 static int 98 owc_gpiobus_attach(device_t dev) 99 { 100 struct owc_gpiobus_softc *sc; 101 int err; 102 103 sc = device_get_softc(dev); 104 sc->sc_dev = dev; 105 106 #ifdef FDT 107 /* Try to configure our pin from fdt data on fdt-based systems. */ 108 err = gpio_pin_get_by_ofw_idx(dev, ofw_bus_get_node(dev), OW_PIN, 109 &sc->sc_pin); 110 #else 111 err = ENOENT; 112 #endif 113 /* 114 * If we didn't get configured by fdt data and our parent is gpiobus, 115 * see if we can be configured by the bus (allows hinted attachment even 116 * on fdt-based systems). 117 */ 118 if (err != 0 && 119 strcmp("gpiobus", device_get_name(device_get_parent(dev))) == 0) 120 err = gpio_pin_get_by_child_index(dev, OW_PIN, &sc->sc_pin); 121 122 /* If we didn't get configured by either method, whine and punt. */ 123 if (err != 0) { 124 device_printf(sc->sc_dev, 125 "cannot acquire gpio pin (config error)\n"); 126 return (err); 127 } 128 129 OWC_GPIOBUS_LOCK_INIT(sc); 130 131 /* 132 * Add the ow bus as a child, but defer probing and attaching it until 133 * interrupts work, because we can't do IO for them until we can read 134 * the system timecounter (which initializes after device attachments). 135 */ 136 device_add_child(sc->sc_dev, "ow", DEVICE_UNIT_ANY); 137 bus_delayed_attach_children(dev); 138 return (0); 139 } 140 141 static int 142 owc_gpiobus_detach(device_t dev) 143 { 144 struct owc_gpiobus_softc *sc; 145 int err; 146 147 sc = device_get_softc(dev); 148 149 if ((err = device_delete_children(dev)) != 0) 150 return (err); 151 152 gpio_pin_release(sc->sc_pin); 153 OWC_GPIOBUS_LOCK_DESTROY(sc); 154 155 return (0); 156 } 157 158 /* 159 * In the diagrams below, R is driven by the resistor pullup, M is driven by the 160 * master, and S is driven by the slave / target. 161 */ 162 163 /* 164 * These macros let what why we're doing stuff shine in the code 165 * below, and let the how be confined to here. 166 */ 167 #define OUTPIN(sc) gpio_pin_setflags((sc)->sc_pin, GPIO_PIN_OUTPUT) 168 #define INPIN(sc) gpio_pin_setflags((sc)->sc_pin, GPIO_PIN_INPUT) 169 #define GETPIN(sc, bp) gpio_pin_is_active((sc)->sc_pin, (bp)) 170 #define LOW(sc) gpio_pin_set_active((sc)->sc_pin, false) 171 172 /* 173 * WRITE-ONE (see owll_if.m for timings) From Figure 4-1 AN-937 174 * 175 * |<---------tSLOT---->|<-tREC->| 176 * High RRRRM | RRRRRRRRRRRR|RRRRRRRRM 177 * M | R | | | M 178 * M| R | | | M 179 * Low MMMMMMM | | | MMMMMM... 180 * |<-tLOW1->| | | 181 * |<------15us--->| | 182 * |<--------60us---->| 183 */ 184 static int 185 owc_gpiobus_write_one(device_t dev, struct ow_timing *t) 186 { 187 struct owc_gpiobus_softc *sc; 188 189 sc = device_get_softc(dev); 190 191 critical_enter(); 192 193 /* Force low */ 194 OUTPIN(sc); 195 LOW(sc); 196 DELAY(t->t_low1); 197 198 /* Allow resistor to float line high */ 199 INPIN(sc); 200 DELAY(t->t_slot - t->t_low1 + t->t_rec); 201 202 critical_exit(); 203 204 return (0); 205 } 206 207 /* 208 * WRITE-ZERO (see owll_if.m for timings) From Figure 4-2 AN-937 209 * 210 * |<---------tSLOT------>|<-tREC->| 211 * High RRRRM | | |RRRRRRRM 212 * M | | R M 213 * M| | | |R M 214 * Low MMMMMMMMMMMMMMMMMMMMMR MMMMMM... 215 * |<--15us->| | | 216 * |<------60us--->| | 217 * |<-------tLOW0------>| 218 */ 219 static int 220 owc_gpiobus_write_zero(device_t dev, struct ow_timing *t) 221 { 222 struct owc_gpiobus_softc *sc; 223 224 sc = device_get_softc(dev); 225 226 critical_enter(); 227 228 /* Force low */ 229 OUTPIN(sc); 230 LOW(sc); 231 DELAY(t->t_low0); 232 233 /* Allow resistor to float line high */ 234 INPIN(sc); 235 DELAY(t->t_slot - t->t_low0 + t->t_rec); 236 237 critical_exit(); 238 239 return (0); 240 } 241 242 /* 243 * READ-DATA (see owll_if.m for timings) From Figure 4-3 AN-937 244 * 245 * |<---------tSLOT------>|<-tREC->| 246 * High RRRRM | rrrrrrrrrrrrrrrRRRRRRRM 247 * M | r | R M 248 * M| r | |R M 249 * Low MMMMMMMSSSSSSSSSSSSSSR MMMMMM... 250 * |<tLOWR>< sample > | 251 * |<------tRDV---->| | 252 * ->| |<-tRELEASE 253 * 254 * r -- allowed to pull high via the resitor when slave writes a 1-bit 255 * 256 */ 257 static int 258 owc_gpiobus_read_data(device_t dev, struct ow_timing *t, int *bit) 259 { 260 struct owc_gpiobus_softc *sc; 261 bool sample; 262 sbintime_t then, now; 263 264 sc = device_get_softc(dev); 265 266 critical_enter(); 267 268 /* Force low for t_lowr microseconds */ 269 then = sbinuptime(); 270 OUTPIN(sc); 271 LOW(sc); 272 DELAY(t->t_lowr); 273 274 /* 275 * Slave is supposed to hold the line low for t_rdv microseconds for 0 276 * and immediately float it high for a 1. This is measured from the 277 * master's pushing the line low. 278 */ 279 INPIN(sc); 280 do { 281 now = sbinuptime(); 282 GETPIN(sc, &sample); 283 } while (now - then < (t->t_rdv + 2) * SBT_1US && sample == false); 284 critical_exit(); 285 286 if (now - then < t->t_rdv * SBT_1US) 287 *bit = 1; 288 else 289 *bit = 0; 290 291 /* Wait out the rest of t_slot */ 292 do { 293 now = sbinuptime(); 294 } while (now - then < (t->t_slot + t->t_rec) * SBT_1US); 295 296 return (0); 297 } 298 299 /* 300 * RESET AND PRESENCE PULSE (see owll_if.m for timings) From Figure 4-4 AN-937 301 * 302 * |<---------tRSTH------------>| 303 * High RRRM | | RRRRRRRS | RRRR RRM 304 * M | |R| |S | R M 305 * M| R | | S |R M 306 * Low MMMMMMMM MMMMMM| | | SSSSSSSSSS MMMMMM 307 * |<----tRSTL--->| | |<-tPDL---->| 308 * | ->| |<-tR | | 309 * |<tPDH>| 310 * 311 * Note: for Regular Speed operations, tRSTL + tR should be less than 960us to 312 * avoid interfering with other devices on the bus. 313 * 314 * Return values in *bit: 315 * -1 = Bus wiring error (stuck low). 316 * 0 = no presence pulse 317 * 1 = presence pulse detected 318 */ 319 static int 320 owc_gpiobus_reset_and_presence(device_t dev, struct ow_timing *t, int *bit) 321 { 322 struct owc_gpiobus_softc *sc; 323 bool sample; 324 325 sc = device_get_softc(dev); 326 327 /* 328 * Read the current state of the bus. The steady state of an idle bus is 329 * high. Badly wired buses that are missing the required pull up, or 330 * that have a short circuit to ground cause all kinds of mischief when 331 * we try to read them later. Return EIO if the bus is currently low. 332 */ 333 INPIN(sc); 334 GETPIN(sc, &sample); 335 if (sample == false) { 336 *bit = -1; 337 return (EIO); 338 } 339 340 critical_enter(); 341 342 /* Force low */ 343 OUTPIN(sc); 344 LOW(sc); 345 DELAY(t->t_rstl); 346 347 /* Allow resistor to float line high and then wait for reset pulse */ 348 INPIN(sc); 349 DELAY(t->t_pdh + t->t_pdl / 2); 350 351 /* Read presence pulse */ 352 GETPIN(sc, &sample); 353 *bit = sample; 354 355 critical_exit(); 356 357 DELAY(t->t_rsth - (t->t_pdh + t->t_pdl / 2)); /* Timing not critical for this one */ 358 359 /* 360 * Read the state of the bus after we've waited past the end of the rest 361 * window. It should return to high. If it is low, then we have some 362 * problem and should abort the reset. 363 */ 364 GETPIN(sc, &sample); 365 if (sample == false) { 366 *bit = -1; 367 return (EIO); 368 } 369 370 return (0); 371 } 372 373 static device_method_t owc_gpiobus_methods[] = { 374 /* Device interface */ 375 DEVMETHOD(device_probe, owc_gpiobus_probe), 376 DEVMETHOD(device_attach, owc_gpiobus_attach), 377 DEVMETHOD(device_detach, owc_gpiobus_detach), 378 379 DEVMETHOD(owll_write_one, owc_gpiobus_write_one), 380 DEVMETHOD(owll_write_zero, owc_gpiobus_write_zero), 381 DEVMETHOD(owll_read_data, owc_gpiobus_read_data), 382 DEVMETHOD(owll_reset_and_presence, owc_gpiobus_reset_and_presence), 383 { 0, 0 } 384 }; 385 386 static driver_t owc_gpiobus_driver = { 387 "owc", 388 owc_gpiobus_methods, 389 sizeof(struct owc_gpiobus_softc), 390 }; 391 392 #ifdef FDT 393 DRIVER_MODULE(owc_gpiobus, simplebus, owc_gpiobus_driver, 0, 0); 394 #endif 395 396 DRIVER_MODULE(owc_gpiobus, gpiobus, owc_gpiobus_driver, 0, 0); 397 MODULE_DEPEND(owc_gpiobus, ow, 1, 1, 1); 398 MODULE_DEPEND(owc_gpiobus, gpiobus, 1, 1, 1); 399 MODULE_VERSION(owc_gpiobus, 1); 400