1 /*- 2 * Copyright (c) 2015 M. Warner Losh <imp@FreeBSD.org> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include "opt_platform.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bus.h> 34 #include <sys/gpio.h> 35 #include <sys/kernel.h> 36 #include <sys/lock.h> 37 #include <sys/malloc.h> 38 #include <sys/module.h> 39 #include <sys/mutex.h> 40 41 #ifdef FDT 42 #include <dev/fdt/fdt_common.h> 43 #include <dev/ofw/ofw_bus.h> 44 #include <dev/ofw/ofw_bus_subr.h> 45 #endif 46 47 #include <dev/gpio/gpiobusvar.h> 48 #include "gpiobus_if.h" 49 50 #include <dev/ow/owll.h> 51 52 #define OW_PIN 0 53 54 #define OWC_GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 55 #define OWC_GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 56 #define OWC_GPIOBUS_LOCK_INIT(_sc) \ 57 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 58 "owc_gpiobus", MTX_DEF) 59 #define OWC_GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 60 61 struct owc_gpiobus_softc 62 { 63 device_t sc_dev; 64 device_t sc_busdev; 65 struct mtx sc_mtx; 66 }; 67 68 static int owc_gpiobus_probe(device_t); 69 static int owc_gpiobus_attach(device_t); 70 static int owc_gpiobus_detach(device_t); 71 72 #ifdef FDT 73 static void 74 owc_gpiobus_identify(driver_t *driver, device_t bus) 75 { 76 phandle_t w1, root; 77 78 /* 79 * Find all the 1-wire bus pseudo-nodes that are 80 * at the top level of the FDT. Would be nice to 81 * somehow preserve the node name of these busses, 82 * but there's no good place to put it. The driver's 83 * name is used for the device name, and the 1-wire 84 * bus overwrites the description. 85 */ 86 root = OF_finddevice("/"); 87 if (root == -1) 88 return; 89 for (w1 = OF_child(root); w1 != 0; w1 = OF_peer(w1)) { 90 if (!fdt_is_compatible_strict(w1, "w1-gpio")) 91 continue; 92 if (!OF_hasprop(w1, "gpios")) 93 continue; 94 ofw_gpiobus_add_fdt_child(bus, driver->name, w1); 95 } 96 } 97 #endif 98 99 static int 100 owc_gpiobus_probe(device_t dev) 101 { 102 #ifdef FDT 103 if (!ofw_bus_status_okay(dev)) 104 return (ENXIO); 105 106 if (ofw_bus_is_compatible(dev, "w1-gpio")) { 107 device_set_desc(dev, "FDT GPIO attached one-wire bus"); 108 return (BUS_PROBE_DEFAULT); 109 } 110 111 return (ENXIO); 112 #else 113 device_set_desc(dev, "GPIO attached one-wire bus"); 114 return 0; 115 #endif 116 } 117 118 static int 119 owc_gpiobus_attach(device_t dev) 120 { 121 struct owc_gpiobus_softc *sc; 122 device_t *kids; 123 int nkid; 124 125 sc = device_get_softc(dev); 126 sc->sc_dev = dev; 127 sc->sc_busdev = device_get_parent(dev); 128 OWC_GPIOBUS_LOCK_INIT(sc); 129 nkid = 0; 130 if (device_get_children(dev, &kids, &nkid) == 0) 131 free(kids, M_TEMP); 132 if (nkid == 0) 133 device_add_child(dev, "ow", -1); 134 config_intrhook_oneshot((ich_func_t)bus_generic_attach, dev); 135 136 return (0); 137 } 138 139 static int 140 owc_gpiobus_detach(device_t dev) 141 { 142 struct owc_gpiobus_softc *sc; 143 144 sc = device_get_softc(dev); 145 OWC_GPIOBUS_LOCK_DESTROY(sc); 146 bus_generic_detach(dev); 147 return (0); 148 } 149 150 /* 151 * In the diagrams below, R is driven by the resistor pullup, M is driven by the 152 * master, and S is driven by the slave / target. 153 */ 154 155 /* 156 * These macros let what why we're doing stuff shine in the code 157 * below, and let the how be confined to here. 158 */ 159 #define GETBUS(sc) GPIOBUS_ACQUIRE_BUS((sc)->sc_busdev, \ 160 (sc)->sc_dev, GPIOBUS_WAIT) 161 #define RELBUS(sc) GPIOBUS_RELEASE_BUS((sc)->sc_busdev, \ 162 (sc)->sc_dev) 163 #define OUTPIN(sc) GPIOBUS_PIN_SETFLAGS((sc)->sc_busdev, \ 164 (sc)->sc_dev, OW_PIN, GPIO_PIN_OUTPUT) 165 #define INPIN(sc) GPIOBUS_PIN_SETFLAGS((sc)->sc_busdev, \ 166 (sc)->sc_dev, OW_PIN, GPIO_PIN_INPUT) 167 #define GETPIN(sc, bit) GPIOBUS_PIN_GET((sc)->sc_busdev, \ 168 (sc)->sc_dev, OW_PIN, bit) 169 #define LOW(sc) GPIOBUS_PIN_SET((sc)->sc_busdev, \ 170 (sc)->sc_dev, OW_PIN, GPIO_PIN_LOW) 171 172 /* 173 * WRITE-ONE (see owll_if.m for timings) From Figure 4-1 AN-937 174 * 175 * |<---------tSLOT---->|<-tREC->| 176 * High RRRRM | RRRRRRRRRRRR|RRRRRRRRM 177 * M | R | | | M 178 * M| R | | | M 179 * Low MMMMMMM | | | MMMMMM... 180 * |<-tLOW1->| | | 181 * |<------15us--->| | 182 * |<--------60us---->| 183 */ 184 static int 185 owc_gpiobus_write_one(device_t dev, struct ow_timing *t) 186 { 187 struct owc_gpiobus_softc *sc; 188 int error; 189 190 sc = device_get_softc(dev); 191 error = GETBUS(sc); 192 if (error != 0) 193 return (error); 194 195 critical_enter(); 196 197 /* Force low */ 198 OUTPIN(sc); 199 LOW(sc); 200 DELAY(t->t_low1); 201 202 /* Allow resistor to float line high */ 203 INPIN(sc); 204 DELAY(t->t_slot - t->t_low1 + t->t_rec); 205 206 critical_exit(); 207 208 RELBUS(sc); 209 210 return (0); 211 } 212 213 /* 214 * WRITE-ZERO (see owll_if.m for timings) From Figure 4-2 AN-937 215 * 216 * |<---------tSLOT------>|<-tREC->| 217 * High RRRRM | | |RRRRRRRM 218 * M | | R M 219 * M| | | |R M 220 * Low MMMMMMMMMMMMMMMMMMMMMR MMMMMM... 221 * |<--15us->| | | 222 * |<------60us--->| | 223 * |<-------tLOW0------>| 224 */ 225 static int 226 owc_gpiobus_write_zero(device_t dev, struct ow_timing *t) 227 { 228 struct owc_gpiobus_softc *sc; 229 int error; 230 231 sc = device_get_softc(dev); 232 error = GETBUS(sc); 233 if (error != 0) 234 return (error); 235 236 critical_enter(); 237 238 /* Force low */ 239 OUTPIN(sc); 240 LOW(sc); 241 DELAY(t->t_low0); 242 243 /* Allow resistor to float line high */ 244 INPIN(sc); 245 DELAY(t->t_slot - t->t_low0 + t->t_rec); 246 247 critical_exit(); 248 249 RELBUS(sc); 250 251 return (0); 252 } 253 254 /* 255 * READ-DATA (see owll_if.m for timings) From Figure 4-3 AN-937 256 * 257 * |<---------tSLOT------>|<-tREC->| 258 * High RRRRM | rrrrrrrrrrrrrrrRRRRRRRM 259 * M | r | R M 260 * M| r | |R M 261 * Low MMMMMMMSSSSSSSSSSSSSSR MMMMMM... 262 * |<tLOWR>< sample > | 263 * |<------tRDV---->| | 264 * ->| |<-tRELEASE 265 * 266 * r -- allowed to pull high via the resitor when slave writes a 1-bit 267 * 268 */ 269 static int 270 owc_gpiobus_read_data(device_t dev, struct ow_timing *t, int *bit) 271 { 272 struct owc_gpiobus_softc *sc; 273 int error, sample; 274 sbintime_t then, now; 275 276 sc = device_get_softc(dev); 277 error = GETBUS(sc); 278 if (error != 0) 279 return (error); 280 281 critical_enter(); 282 283 /* Force low for t_lowr microseconds */ 284 then = sbinuptime(); 285 OUTPIN(sc); 286 LOW(sc); 287 DELAY(t->t_lowr); 288 289 /* 290 * Slave is supposed to hold the line low for t_rdv microseconds for 0 291 * and immediately float it high for a 1. This is measured from the 292 * master's pushing the line low. 293 */ 294 INPIN(sc); 295 do { 296 now = sbinuptime(); 297 GETPIN(sc, &sample); 298 } while (now - then < (t->t_rdv + 2) * SBT_1US && sample == 0); 299 critical_exit(); 300 301 if (now - then < t->t_rdv * SBT_1US) 302 *bit = 1; 303 else 304 *bit = 0; 305 306 /* Wait out the rest of t_slot */ 307 do { 308 now = sbinuptime(); 309 } while (now - then < (t->t_slot + t->t_rec) * SBT_1US); 310 311 RELBUS(sc); 312 313 return (error); 314 } 315 316 /* 317 * RESET AND PRESENCE PULSE (see owll_if.m for timings) From Figure 4-4 AN-937 318 * 319 * |<---------tRSTH------------>| 320 * High RRRM | | RRRRRRRS | RRRR RRM 321 * M | |R| |S | R M 322 * M| R | | S |R M 323 * Low MMMMMMMM MMMMMM| | | SSSSSSSSSS MMMMMM 324 * |<----tRSTL--->| | |<-tPDL---->| 325 * | ->| |<-tR | | 326 * |<tPDH>| 327 * 328 * Note: for Regular Speed operations, tRSTL + tR should be less than 960us to 329 * avoid interferring with other devices on the bus 330 */ 331 static int 332 owc_gpiobus_reset_and_presence(device_t dev, struct ow_timing *t, int *bit) 333 { 334 struct owc_gpiobus_softc *sc; 335 int error; 336 int buf = -1; 337 338 sc = device_get_softc(dev); 339 error = GETBUS(sc); 340 if (error != 0) 341 return (error); 342 343 /* 344 * Read the current state of the bus. The steady state of an idle bus is 345 * high. Badly wired buses that are missing the required pull up, or 346 * that have a short circuit to ground cause all kinds of mischief when 347 * we try to read them later. Return EIO and release the bus if the bus 348 * is currently low. 349 */ 350 INPIN(sc); 351 GETPIN(sc, &buf); 352 if (buf == 0) { 353 *bit = -1; 354 RELBUS(sc); 355 return (EIO); 356 } 357 358 critical_enter(); 359 360 /* Force low */ 361 OUTPIN(sc); 362 LOW(sc); 363 DELAY(t->t_rstl); 364 365 /* Allow resistor to float line high and then wait for reset pulse */ 366 INPIN(sc); 367 DELAY(t->t_pdh + t->t_pdl / 2); 368 369 /* Read presence pulse */ 370 GETPIN(sc, &buf); 371 *bit = !!buf; 372 373 critical_exit(); 374 375 DELAY(t->t_rsth - (t->t_pdh + t->t_pdl / 2)); /* Timing not critical for this one */ 376 377 /* 378 * Read the state of the bus after we've waited past the end of the rest 379 * window. It should return to high. If it is low, then we have some 380 * problem and should abort the reset. 381 */ 382 GETPIN(sc, &buf); 383 if (buf == 0) { 384 *bit = -1; 385 RELBUS(sc); 386 return (EIO); 387 } 388 389 RELBUS(sc); 390 391 return (0); 392 } 393 394 static devclass_t owc_gpiobus_devclass; 395 396 static device_method_t owc_gpiobus_methods[] = { 397 /* Device interface */ 398 #ifdef FDT 399 DEVMETHOD(device_identify, owc_gpiobus_identify), 400 #endif 401 DEVMETHOD(device_probe, owc_gpiobus_probe), 402 DEVMETHOD(device_attach, owc_gpiobus_attach), 403 DEVMETHOD(device_detach, owc_gpiobus_detach), 404 405 DEVMETHOD(owll_write_one, owc_gpiobus_write_one), 406 DEVMETHOD(owll_write_zero, owc_gpiobus_write_zero), 407 DEVMETHOD(owll_read_data, owc_gpiobus_read_data), 408 DEVMETHOD(owll_reset_and_presence, owc_gpiobus_reset_and_presence), 409 { 0, 0 } 410 }; 411 412 static driver_t owc_gpiobus_driver = { 413 "owc", 414 owc_gpiobus_methods, 415 sizeof(struct owc_gpiobus_softc), 416 }; 417 418 DRIVER_MODULE(owc_gpiobus, gpiobus, owc_gpiobus_driver, owc_gpiobus_devclass, 0, 0); 419 MODULE_DEPEND(owc_gpiobus, ow, 1, 1, 1); 420 MODULE_DEPEND(owc_gpiobus, gpiobus, 1, 1, 1); 421 MODULE_VERSION(owc_gpiobus, 1); 422