xref: /freebsd/sys/dev/ow/ow.c (revision 5e3190f700637fcfc1a52daeaa4a031fdd2557c7)
1 /*-
2  * Copyright (c) 2015 M. Warner Losh <imp@FreeBSD.org>
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice unmodified, this list of conditions, and the following
9  *    disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 #include <sys/param.h>
28 #include <sys/systm.h>
29 #include <sys/kernel.h>
30 
31 #include <sys/bus.h>
32 #include <sys/errno.h>
33 #include <sys/libkern.h>
34 #include <sys/lock.h>
35 #include <sys/malloc.h>
36 #include <sys/module.h>
37 #include <sys/mutex.h>
38 #include <sys/sbuf.h>
39 #include <sys/sysctl.h>
40 
41 #include <dev/ow/ow.h>
42 #include <dev/ow/owll.h>
43 #include <dev/ow/own.h>
44 
45 /*
46  * lldev - link level device
47  * ndev - network / transport device (this module)
48  * pdev - presentation device (children of this module)
49  */
50 
51 typedef int ow_enum_fn(device_t, device_t);
52 typedef int ow_found_fn(device_t, romid_t);
53 
54 struct ow_softc
55 {
56 	device_t	dev;		/* Newbus driver back pointer */
57 	struct mtx	mtx;		/* bus mutex */
58 	device_t	owner;		/* bus owner, if != NULL */
59 };
60 
61 struct ow_devinfo
62 {
63 	romid_t	romid;
64 };
65 
66 static int ow_acquire_bus(device_t ndev, device_t pdev, int how);
67 static void ow_release_bus(device_t ndev, device_t pdev);
68 
69 #define	OW_LOCK(_sc) mtx_lock(&(_sc)->mtx)
70 #define	OW_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
71 #define	OW_LOCK_DESTROY(_sc) mtx_destroy(&_sc->mtx)
72 #define	OW_ASSERT_LOCKED(_sc) mtx_assert(&_sc->mtx, MA_OWNED)
73 #define	OW_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->mtx, MA_NOTOWNED)
74 
75 static MALLOC_DEFINE(M_OW, "ow", "House keeping data for 1wire bus");
76 
77 static const struct ow_timing timing_regular_min = {
78 	.t_slot = 60,
79 	.t_low0 = 60,
80 	.t_low1 = 1,
81 	.t_release = 0,
82 	.t_rec = 1,
83 	.t_rdv = 15,		/* fixed */
84 	.t_rstl = 480,
85 	.t_rsth = 480,
86 	.t_pdl = 60,
87 	.t_pdh = 15,
88 	.t_lowr = 1,
89 };
90 
91 static const struct ow_timing timing_regular_max = {
92 	.t_slot = 120,
93 	.t_low0 = 120,
94 	.t_low1 = 15,
95 	.t_release = 45,
96 	.t_rec = 960,		/* infinity */
97 	.t_rdv = 15,		/* fixed */
98 	.t_rstl = 960,		/* infinity */
99 	.t_rsth = 960,		/* infinity */
100 	.t_pdl = 240,		/* 60us to 240us */
101 	.t_pdh = 60,		/* 15us to 60us */
102 	.t_lowr = 15,		/* 1us */
103 };
104 
105 static struct ow_timing timing_regular = {
106 	.t_slot = 60,		/*  60 <= t < 120 */
107 	.t_low0 = 60,		/*  60 <= t < t_slot < 120 */
108 	.t_low1 = 1,		/*   1 <= t < 15 */
109 	.t_release = 45,	/*   0 <= t < 45 */
110 	.t_rec = 15,		/*   1 <= t < inf */
111 	.t_rdv = 15,		/* t == 15 */
112 	.t_rstl = 480,		/* 480 <= t < inf */
113 	.t_rsth = 480,		/* 480 <= t < inf */
114 	.t_pdl = 60,		/*  60 <= t < 240 */
115 	.t_pdh = 60,		/*  15 <= t < 60 */
116 	.t_lowr = 1,		/*   1 <= t < 15 */
117 };
118 
119 /* NB: Untested */
120 static const struct ow_timing timing_overdrive_min = {
121 	.t_slot = 6,
122 	.t_low0 = 6,
123 	.t_low1 = 1,
124 	.t_release = 0,
125 	.t_rec = 1,
126 	.t_rdv = 2,		/* fixed */
127 	.t_rstl = 48,
128 	.t_rsth = 48,
129 	.t_pdl = 8,
130 	.t_pdh = 2,
131 	.t_lowr = 1,
132 };
133 
134 static const struct ow_timing timing_overdrive_max = {
135 	.t_slot = 16,
136 	.t_low0 = 16,
137 	.t_low1 = 2,
138 	.t_release = 4,
139 	.t_rec = 960,		/* infinity */
140 	.t_rdv = 2,		/* fixed */
141 	.t_rstl = 80,
142 	.t_rsth = 960,		/* infinity */
143 	.t_pdl = 24,
144 	.t_pdh = 6,
145 	.t_lowr = 2,
146 };
147 
148 static struct ow_timing timing_overdrive = {
149 	.t_slot = 11,		/* 6 <= t < 16 */
150 	.t_low0 = 6,		/* 6 <= t < t_slot < 16 */
151 	.t_low1 = 1,		/* 1 <= t < 2 */
152 	.t_release = 4,		/* 0 <= t < 4 */
153 	.t_rec = 1,		/* 1 <= t < inf */
154 	.t_rdv = 2,		/* t == 2 */
155 	.t_rstl = 48,		/* 48 <= t < 80 */
156 	.t_rsth = 48,		/* 48 <= t < inf */
157 	.t_pdl = 8,		/* 8 <= t < 24 */
158 	.t_pdh = 2,		/* 2 <= t < 6 */
159 	.t_lowr = 1,		/* 1 <= t < 2 */
160 };
161 
162 SYSCTL_NODE(_hw, OID_AUTO, ow, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
163     "1-Wire protocol");
164 SYSCTL_NODE(_hw_ow, OID_AUTO, regular, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
165     "Regular mode timings");
166 SYSCTL_NODE(_hw_ow, OID_AUTO, overdrive, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
167     "Overdrive mode timings");
168 
169 #define	_OW_TIMING_SYSCTL(mode, param)		\
170     static int \
171     sysctl_ow_timing_ ## mode ## _ ## param(SYSCTL_HANDLER_ARGS) \
172     { \
173 	    int val = timing_ ## mode.param; \
174 	    int err; \
175 	    err = sysctl_handle_int(oidp, &val, 0, req); \
176 	    if (err != 0 || req->newptr == NULL) \
177 		return (err); \
178 	    if (val < timing_ ## mode ## _min.param) \
179 		return (EINVAL); \
180 	    else if (val >= timing_ ## mode ## _max.param) \
181 		return (EINVAL); \
182 	    timing_ ## mode.param = val; \
183 	    return (0); \
184     } \
185 SYSCTL_PROC(_hw_ow_ ## mode, OID_AUTO, param, \
186     CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_NEEDGIANT, 0, sizeof(int), \
187     sysctl_ow_timing_ ## mode ## _ ## param, "I", \
188     "1-Wire timing parameter in microseconds (-1 resets to default)")
189 
190 #define	OW_TIMING_SYSCTL(param)	\
191     _OW_TIMING_SYSCTL(regular, param); \
192     _OW_TIMING_SYSCTL(overdrive, param)
193 
194 OW_TIMING_SYSCTL(t_slot);
195 OW_TIMING_SYSCTL(t_low0);
196 OW_TIMING_SYSCTL(t_low1);
197 OW_TIMING_SYSCTL(t_release);
198 OW_TIMING_SYSCTL(t_rec);
199 OW_TIMING_SYSCTL(t_rdv);
200 OW_TIMING_SYSCTL(t_rstl);
201 OW_TIMING_SYSCTL(t_rsth);
202 OW_TIMING_SYSCTL(t_pdl);
203 OW_TIMING_SYSCTL(t_pdh);
204 OW_TIMING_SYSCTL(t_lowr);
205 
206 #undef _OW_TIMING_SYSCTL
207 #undef OW_TIMING_SYSCTL
208 
209 static void
210 ow_send_byte(device_t lldev, struct ow_timing *t, uint8_t byte)
211 {
212 	int i;
213 
214 	for (i = 0; i < 8; i++)
215 		if (byte & (1 << i))
216 			OWLL_WRITE_ONE(lldev, t);
217 		else
218 			OWLL_WRITE_ZERO(lldev, t);
219 }
220 
221 static void
222 ow_read_byte(device_t lldev, struct ow_timing *t, uint8_t *bytep)
223 {
224 	int i;
225 	uint8_t byte = 0;
226 	int bit;
227 
228 	for (i = 0; i < 8; i++) {
229 		OWLL_READ_DATA(lldev, t, &bit);
230 		byte |= bit << i;
231 	}
232 	*bytep = byte;
233 }
234 
235 static int
236 ow_send_command(device_t ndev, device_t pdev, struct ow_cmd *cmd)
237 {
238 	int present, i, bit, tries;
239 	device_t lldev;
240 	struct ow_timing *t;
241 
242 	lldev = device_get_parent(ndev);
243 
244 	/*
245 	 * Retry the reset a couple of times before giving up.
246 	 */
247 	tries = 4;
248 	do {
249 		OWLL_RESET_AND_PRESENCE(lldev, &timing_regular, &present);
250 		if (present == 1)
251 			device_printf(ndev, "Reset said no device on bus?.\n");
252 	} while (present == 1 && tries-- > 0);
253 	if (present == 1) {
254 		device_printf(ndev, "Reset said the device wasn't there.\n");
255 		return ENOENT;		/* No devices acked the RESET */
256 	}
257 	if (present == -1) {
258 		device_printf(ndev, "Reset discovered bus wired wrong.\n");
259 		return ENOENT;
260 	}
261 
262 	for (i = 0; i < cmd->rom_len; i++)
263 		ow_send_byte(lldev, &timing_regular, cmd->rom_cmd[i]);
264 	for (i = 0; i < cmd->rom_read_len; i++)
265 		ow_read_byte(lldev, &timing_regular, cmd->rom_read + i);
266 	if (cmd->xpt_len) {
267 		/*
268 		 * Per AN937, the reset pulse and ROM level are always
269 		 * done with the regular timings. Certain ROM commands
270 		 * put the device into overdrive mode for the remainder
271 		 * of the data transfer, which is why we have to pass the
272 		 * timings here. Commands that need to be handled like this
273 		 * are expected to be flagged by the client.
274 		 */
275 		t = (cmd->flags & OW_FLAG_OVERDRIVE) ?
276 		    &timing_overdrive : &timing_regular;
277 		for (i = 0; i < cmd->xpt_len; i++)
278 			ow_send_byte(lldev, t, cmd->xpt_cmd[i]);
279 		if (cmd->flags & OW_FLAG_READ_BIT) {
280 			memset(cmd->xpt_read, 0, (cmd->xpt_read_len + 7) / 8);
281 			for (i = 0; i < cmd->xpt_read_len; i++) {
282 				OWLL_READ_DATA(lldev, t, &bit);
283 				cmd->xpt_read[i / 8] |= bit << (i % 8);
284 			}
285 		} else {
286 			for (i = 0; i < cmd->xpt_read_len; i++)
287 				ow_read_byte(lldev, t, cmd->xpt_read + i);
288 		}
289 	}
290 	return 0;
291 }
292 
293 static int
294 ow_search_rom(device_t lldev, device_t dev)
295 {
296 	struct ow_cmd cmd;
297 
298 	memset(&cmd, 0, sizeof(cmd));
299 	cmd.rom_cmd[0] = SEARCH_ROM;
300 	cmd.rom_len = 1;
301 	return ow_send_command(lldev, dev, &cmd);
302 }
303 
304 #if 0
305 static int
306 ow_alarm_search(device_t lldev, device_t dev)
307 {
308 	struct ow_cmd cmd;
309 
310 	memset(&cmd, 0, sizeof(cmd));
311 	cmd.rom_cmd[0] = ALARM_SEARCH;
312 	cmd.rom_len = 1;
313 	return ow_send_command(lldev, dev, &cmd);
314 }
315 #endif
316 
317 static int
318 ow_add_child(device_t dev, romid_t romid)
319 {
320 	struct ow_devinfo *di;
321 	device_t child;
322 
323 	di = malloc(sizeof(*di), M_OW, M_WAITOK);
324 	di->romid = romid;
325 	child = device_add_child(dev, NULL, -1);
326 	if (child == NULL) {
327 		free(di, M_OW);
328 		return ENOMEM;
329 	}
330 	device_set_ivars(child, di);
331 	return (0);
332 }
333 
334 static device_t
335 ow_child_by_romid(device_t dev, romid_t romid)
336 {
337 	device_t *children, retval, child;
338 	int nkid, i;
339 	struct ow_devinfo *di;
340 
341 	if (device_get_children(dev, &children, &nkid) != 0)
342 		return (NULL);
343 	retval = NULL;
344 	for (i = 0; i < nkid; i++) {
345 		child = children[i];
346 		di = device_get_ivars(child);
347 		if (di->romid == romid) {
348 			retval = child;
349 			break;
350 		}
351 	}
352 	free(children, M_TEMP);
353 
354 	return (retval);
355 }
356 
357 /*
358  * CRC generator table -- taken from AN937 DOW CRC LOOKUP FUNCTION Table 2
359  */
360 const uint8_t ow_crc_table[] = {
361 	0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
362 	157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
363 	35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
364 	190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
365 	70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
366 	219, 133,103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
367 	101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
368 	248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
369 	140,210, 48, 110, 237, 179, 81, 15, 78, 16, 242,  172, 47, 113,147, 205,
370 	17, 79, 173, 243, 112, 46, 204, 146, 211,141, 111, 49, 178, 236, 14, 80,
371 	175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82,176, 238,
372 	50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115,
373 	202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139,
374 	87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22,
375 	233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168,
376 	116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
377 };
378 
379 /*
380  * Converted from DO_CRC page 131 ANN937
381  */
382 static uint8_t
383 ow_crc(device_t ndev, device_t pdev, uint8_t *buffer, size_t len)
384 {
385 	uint8_t crc = 0;
386 	int i;
387 
388 	for (i = 0; i < len; i++)
389 		crc = ow_crc_table[crc ^ buffer[i]];
390 	return crc;
391 }
392 
393 static int
394 ow_check_crc(romid_t romid)
395 {
396 	return ow_crc(NULL, NULL, (uint8_t *)&romid, sizeof(romid)) == 0;
397 }
398 
399 static int
400 ow_device_found(device_t dev, romid_t romid)
401 {
402 
403 	/* XXX Move this up into enumerate? */
404 	/*
405 	 * All valid ROM IDs have a valid CRC. Check that first.
406 	 */
407 	if (!ow_check_crc(romid)) {
408 		device_printf(dev, "Device romid %8D failed CRC.\n",
409 		    &romid, ":");
410 		return EINVAL;
411 	}
412 
413 	/*
414 	 * If we've seen this child before, don't add a new one for it.
415 	 */
416 	if (ow_child_by_romid(dev, romid) != NULL)
417 		return 0;
418 
419 	return ow_add_child(dev, romid);
420 }
421 
422 static int
423 ow_enumerate(device_t dev, ow_enum_fn *enumfp, ow_found_fn *foundfp)
424 {
425 	device_t lldev = device_get_parent(dev);
426 	int first, second, i, dir, prior, last, err, retries;
427 	uint64_t probed, last_mask;
428 	int sanity = 10;
429 
430 	prior = -1;
431 	last_mask = 0;
432 	retries = 0;
433 	last = -2;
434 	err = ow_acquire_bus(dev, dev, OWN_DONTWAIT);
435 	if (err != 0)
436 		return err;
437 	while (last != -1) {
438 		if (sanity-- < 0) {
439 			printf("Reached the sanity limit\n");
440 			return EIO;
441 		}
442 again:
443 		probed = 0;
444 		last = -1;
445 
446 		/*
447 		 * See AN397 section 5.II.C.3 for the algorithm (though a bit
448 		 * poorly stated). The search command forces each device to
449 		 * send ROM ID bits one at a time (first the bit, then the
450 		 * complement) the master (us) sends back a bit. If the
451 		 * device's bit doesn't match what we send back, that device
452 		 * stops sending bits back. So each time through we remember
453 		 * where we made the last decision (always 0). If there's a
454 		 * conflict there this time (and there will be in the absence
455 		 * of a hardware failure) we go with 1. This way, we prune the
456 		 * devices on the bus and wind up with a unique ROM. We know
457 		 * we're done when we detect no new conflicts. The same
458 		 * algorithm is used for devices in alarm state as well.
459 		 *
460 		 * In addition, experience has shown that sometimes devices
461 		 * stop responding in the middle of enumeration, so try this
462 		 * step again a few times when that happens. It is unclear if
463 		 * this is due to a nosiy electrical environment or some odd
464 		 * timing issue.
465 		 */
466 
467 		/*
468 		 * The enumeration command should be successfully sent, if not,
469 		 * we have big issues on the bus so punt. Lower layers report
470 		 * any unusual errors, so we don't need to here.
471 		 */
472 		err = enumfp(dev, dev);
473 		if (err != 0)
474 			return (err);
475 
476 		for (i = 0; i < 64; i++) {
477 			OWLL_READ_DATA(lldev, &timing_regular, &first);
478 			OWLL_READ_DATA(lldev, &timing_regular, &second);
479 			switch (first | second << 1) {
480 			case 0: /* Conflict */
481 				if (i < prior)
482 					dir = (last_mask >> i) & 1;
483 				else
484 					dir = i == prior;
485 
486 				if (dir == 0)
487 					last = i;
488 				break;
489 			case 1: /* 1 then 0 -> 1 for all */
490 				dir = 1;
491 				break;
492 			case 2: /* 0 then 1 -> 0 for all */
493 				dir = 0;
494 				break;
495 			case 3:
496 				/*
497 				 * No device responded. This is unexpected, but
498 				 * experience has shown that on some platforms
499 				 * we miss a timing window, or otherwise have
500 				 * an issue. Start this step over. Since we've
501 				 * not updated prior yet, we can just jump to
502 				 * the top of the loop for a re-do of this step.
503 				 */
504 				printf("oops, starting over\n");
505 				if (++retries > 5)
506 					return (EIO);
507 				goto again;
508 			default: /* NOTREACHED */
509 				__assert_unreachable();
510 			}
511 			if (dir) {
512 				OWLL_WRITE_ONE(lldev, &timing_regular);
513 				probed |= 1ull << i;
514 			} else {
515 				OWLL_WRITE_ZERO(lldev, &timing_regular);
516 			}
517 		}
518 		retries = 0;
519 		foundfp(dev, probed);
520 		last_mask = probed;
521 		prior = last;
522 	}
523 	ow_release_bus(dev, dev);
524 
525 	return (0);
526 }
527 
528 static int
529 ow_probe(device_t dev)
530 {
531 
532 	device_set_desc(dev, "1 Wire Bus");
533 	return (BUS_PROBE_GENERIC);
534 }
535 
536 static int
537 ow_attach(device_t ndev)
538 {
539 	struct ow_softc *sc;
540 
541 	/*
542 	 * Find all the devices on the bus. We don't probe / attach them in the
543 	 * enumeration phase. We do this because we want to allow the probe /
544 	 * attach routines of the child drivers to have as full an access to the
545 	 * bus as possible. While we reset things before the next step of the
546 	 * search (so it would likely be OK to allow access by the clients to
547 	 * the bus), it is more conservative to find them all, then to do the
548 	 * attach of the devices. This also allows the child devices to have
549 	 * more knowledge of the bus. We also ignore errors from the enumeration
550 	 * because they might happen after we've found a few devices.
551 	 */
552 	sc = device_get_softc(ndev);
553 	sc->dev = ndev;
554 	mtx_init(&sc->mtx, device_get_nameunit(sc->dev), "ow", MTX_DEF);
555 	ow_enumerate(ndev, ow_search_rom, ow_device_found);
556 	return bus_generic_attach(ndev);
557 }
558 
559 static int
560 ow_detach(device_t ndev)
561 {
562 	device_t *children, child;
563 	int nkid, i;
564 	struct ow_devinfo *di;
565 	struct ow_softc *sc;
566 
567 	sc = device_get_softc(ndev);
568 	/*
569 	 * detach all the children first. This is blocking until any threads
570 	 * have stopped, etc.
571 	 */
572 	bus_generic_detach(ndev);
573 
574 	/*
575 	 * We delete all the children, and free up the ivars
576 	 */
577 	if (device_get_children(ndev, &children, &nkid) != 0)
578 		return ENOMEM;
579 	for (i = 0; i < nkid; i++) {
580 		child = children[i];
581 		di = device_get_ivars(child);
582 		free(di, M_OW);
583 		device_delete_child(ndev, child);
584 	}
585 	free(children, M_TEMP);
586 
587 	OW_LOCK_DESTROY(sc);
588 	return 0;
589 }
590 
591 static int
592 ow_child_pnpinfo(device_t dev, device_t child, struct sbuf *sb)
593 {
594 	struct ow_devinfo *di;
595 
596 	di = device_get_ivars(child);
597 	sbuf_printf(sb, "romid=%8D", &di->romid, ":");
598 	return (0);
599 }
600 
601 static int
602 ow_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
603 {
604 	struct ow_devinfo *di;
605 	romid_t **ptr;
606 
607 	di = device_get_ivars(child);
608 	switch (which) {
609 	case OW_IVAR_FAMILY:
610 		*result = di->romid & 0xff;
611 		break;
612 	case OW_IVAR_ROMID:
613 		ptr = (romid_t **)result;
614 		*ptr = &di->romid;
615 		break;
616 	default:
617 		return EINVAL;
618 	}
619 
620 	return 0;
621 }
622 
623 static int
624 ow_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
625 {
626 
627 	return EINVAL;
628 }
629 
630 static int
631 ow_print_child(device_t ndev, device_t pdev)
632 {
633 	int retval = 0;
634 	struct ow_devinfo *di;
635 
636 	di = device_get_ivars(pdev);
637 
638 	retval += bus_print_child_header(ndev, pdev);
639 	retval += printf(" romid %8D", &di->romid, ":");
640 	retval += bus_print_child_footer(ndev, pdev);
641 
642 	return retval;
643 }
644 
645 static void
646 ow_probe_nomatch(device_t ndev, device_t pdev)
647 {
648 	struct ow_devinfo *di;
649 
650 	di = device_get_ivars(pdev);
651 	device_printf(ndev, "romid %8D: no driver\n", &di->romid, ":");
652 }
653 
654 static int
655 ow_acquire_bus(device_t ndev, device_t pdev, int how)
656 {
657 	struct ow_softc *sc;
658 
659 	sc = device_get_softc(ndev);
660 	OW_ASSERT_UNLOCKED(sc);
661 	OW_LOCK(sc);
662 	if (sc->owner != NULL) {
663 		if (sc->owner == pdev)
664 			panic("%s: %s recursively acquiring the bus.\n",
665 			    device_get_nameunit(ndev),
666 			    device_get_nameunit(pdev));
667 		if (how == OWN_DONTWAIT) {
668 			OW_UNLOCK(sc);
669 			return EWOULDBLOCK;
670 		}
671 		while (sc->owner != NULL)
672 			mtx_sleep(sc, &sc->mtx, 0, "owbuswait", 0);
673 	}
674 	sc->owner = pdev;
675 	OW_UNLOCK(sc);
676 
677 	return 0;
678 }
679 
680 static void
681 ow_release_bus(device_t ndev, device_t pdev)
682 {
683 	struct ow_softc *sc;
684 
685 	sc = device_get_softc(ndev);
686 	OW_ASSERT_UNLOCKED(sc);
687 	OW_LOCK(sc);
688 	if (sc->owner == NULL)
689 		panic("%s: %s releasing unowned bus.", device_get_nameunit(ndev),
690 		    device_get_nameunit(pdev));
691 	if (sc->owner != pdev)
692 		panic("%s: %s don't own the bus. %s does. game over.",
693 		    device_get_nameunit(ndev), device_get_nameunit(pdev),
694 		    device_get_nameunit(sc->owner));
695 	sc->owner = NULL;
696 	wakeup(sc);
697 	OW_UNLOCK(sc);
698 }
699 
700 static device_method_t ow_methods[] = {
701 	/* Device interface */
702 	DEVMETHOD(device_probe,		ow_probe),
703 	DEVMETHOD(device_attach,	ow_attach),
704 	DEVMETHOD(device_detach,	ow_detach),
705 
706 	/* Bus interface */
707 	DEVMETHOD(bus_child_pnpinfo,	ow_child_pnpinfo),
708 	DEVMETHOD(bus_read_ivar,	ow_read_ivar),
709 	DEVMETHOD(bus_write_ivar,	ow_write_ivar),
710 	DEVMETHOD(bus_print_child,	ow_print_child),
711 	DEVMETHOD(bus_probe_nomatch,	ow_probe_nomatch),
712 
713 	/* One Wire Network/Transport layer interface */
714 	DEVMETHOD(own_send_command,	ow_send_command),
715 	DEVMETHOD(own_acquire_bus,	ow_acquire_bus),
716 	DEVMETHOD(own_release_bus,	ow_release_bus),
717 	DEVMETHOD(own_crc,		ow_crc),
718 	{ 0, 0 }
719 };
720 
721 static driver_t ow_driver = {
722 	"ow",
723 	ow_methods,
724 	sizeof(struct ow_softc),
725 };
726 
727 DRIVER_MODULE(ow, owc, ow_driver, 0, 0);
728 MODULE_VERSION(ow, 1);
729