1 /*- 2 * Copyright (C) 2009 Nathan Whitehorn 3 * Copyright (C) 2015 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Portions of this software were developed by Andrew Turner 7 * under sponsorship from the FreeBSD Foundation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/module.h> 36 #include <sys/malloc.h> 37 #include <sys/bus.h> 38 #include <sys/cpu.h> 39 #include <machine/bus.h> 40 41 #include <dev/ofw/openfirm.h> 42 #include <dev/ofw/ofw_bus.h> 43 #include <dev/ofw/ofw_bus_subr.h> 44 #include <dev/ofw/ofw_cpu.h> 45 46 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__) 47 #include <dev/extres/clk/clk.h> 48 #endif 49 50 static int ofw_cpulist_probe(device_t); 51 static int ofw_cpulist_attach(device_t); 52 static const struct ofw_bus_devinfo *ofw_cpulist_get_devinfo(device_t dev, 53 device_t child); 54 55 static MALLOC_DEFINE(M_OFWCPU, "ofwcpu", "OFW CPU device information"); 56 57 struct ofw_cpulist_softc { 58 pcell_t sc_addr_cells; 59 }; 60 61 static device_method_t ofw_cpulist_methods[] = { 62 /* Device interface */ 63 DEVMETHOD(device_probe, ofw_cpulist_probe), 64 DEVMETHOD(device_attach, ofw_cpulist_attach), 65 66 /* Bus interface */ 67 DEVMETHOD(bus_add_child, bus_generic_add_child), 68 DEVMETHOD(bus_child_pnpinfo, ofw_bus_gen_child_pnpinfo), 69 DEVMETHOD(bus_get_device_path, ofw_bus_gen_get_device_path), 70 71 /* ofw_bus interface */ 72 DEVMETHOD(ofw_bus_get_devinfo, ofw_cpulist_get_devinfo), 73 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 74 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 75 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 76 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 77 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 78 79 DEVMETHOD_END 80 }; 81 82 static driver_t ofw_cpulist_driver = { 83 "cpulist", 84 ofw_cpulist_methods, 85 sizeof(struct ofw_cpulist_softc) 86 }; 87 88 DRIVER_MODULE(ofw_cpulist, ofwbus, ofw_cpulist_driver, 0, 0); 89 90 static int 91 ofw_cpulist_probe(device_t dev) 92 { 93 const char *name; 94 95 name = ofw_bus_get_name(dev); 96 97 if (name == NULL || strcmp(name, "cpus") != 0) 98 return (ENXIO); 99 100 device_set_desc(dev, "Open Firmware CPU Group"); 101 102 return (0); 103 } 104 105 static int 106 ofw_cpulist_attach(device_t dev) 107 { 108 struct ofw_cpulist_softc *sc; 109 phandle_t root, child; 110 device_t cdev; 111 struct ofw_bus_devinfo *dinfo; 112 113 sc = device_get_softc(dev); 114 root = ofw_bus_get_node(dev); 115 116 sc->sc_addr_cells = 1; 117 OF_getencprop(root, "#address-cells", &sc->sc_addr_cells, 118 sizeof(sc->sc_addr_cells)); 119 120 for (child = OF_child(root); child != 0; child = OF_peer(child)) { 121 dinfo = malloc(sizeof(*dinfo), M_OFWCPU, M_WAITOK | M_ZERO); 122 123 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { 124 free(dinfo, M_OFWCPU); 125 continue; 126 } 127 cdev = device_add_child(dev, NULL, -1); 128 if (cdev == NULL) { 129 device_printf(dev, "<%s>: device_add_child failed\n", 130 dinfo->obd_name); 131 ofw_bus_gen_destroy_devinfo(dinfo); 132 free(dinfo, M_OFWCPU); 133 continue; 134 } 135 device_set_ivars(cdev, dinfo); 136 } 137 138 return (bus_generic_attach(dev)); 139 } 140 141 static const struct ofw_bus_devinfo * 142 ofw_cpulist_get_devinfo(device_t dev, device_t child) 143 { 144 return (device_get_ivars(child)); 145 } 146 147 static int ofw_cpu_probe(device_t); 148 static int ofw_cpu_attach(device_t); 149 static int ofw_cpu_read_ivar(device_t dev, device_t child, int index, 150 uintptr_t *result); 151 152 struct ofw_cpu_softc { 153 struct pcpu *sc_cpu_pcpu; 154 uint32_t sc_nominal_mhz; 155 boolean_t sc_reg_valid; 156 pcell_t sc_reg[2]; 157 }; 158 159 static device_method_t ofw_cpu_methods[] = { 160 /* Device interface */ 161 DEVMETHOD(device_probe, ofw_cpu_probe), 162 DEVMETHOD(device_attach, ofw_cpu_attach), 163 164 /* Bus interface */ 165 DEVMETHOD(bus_add_child, bus_generic_add_child), 166 DEVMETHOD(bus_read_ivar, ofw_cpu_read_ivar), 167 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 168 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 169 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 170 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 171 DEVMETHOD(bus_activate_resource,bus_generic_activate_resource), 172 173 DEVMETHOD_END 174 }; 175 176 static driver_t ofw_cpu_driver = { 177 "cpu", 178 ofw_cpu_methods, 179 sizeof(struct ofw_cpu_softc) 180 }; 181 182 DRIVER_MODULE(ofw_cpu, cpulist, ofw_cpu_driver, 0, 0); 183 184 static int 185 ofw_cpu_probe(device_t dev) 186 { 187 const char *type = ofw_bus_get_type(dev); 188 189 if (type == NULL || strcmp(type, "cpu") != 0) 190 return (ENXIO); 191 192 device_set_desc(dev, "Open Firmware CPU"); 193 if (!bootverbose && device_get_unit(dev) != 0) { 194 device_quiet(dev); 195 device_quiet_children(dev); 196 } 197 198 return (0); 199 } 200 201 static int 202 ofw_cpu_attach(device_t dev) 203 { 204 struct ofw_cpulist_softc *psc; 205 struct ofw_cpu_softc *sc; 206 phandle_t node; 207 pcell_t cell; 208 int rv; 209 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__) 210 clk_t cpuclk; 211 uint64_t freq; 212 #endif 213 214 sc = device_get_softc(dev); 215 psc = device_get_softc(device_get_parent(dev)); 216 217 if (nitems(sc->sc_reg) < psc->sc_addr_cells) { 218 if (bootverbose) 219 device_printf(dev, "Too many address cells\n"); 220 return (EINVAL); 221 } 222 223 node = ofw_bus_get_node(dev); 224 225 /* Read and validate the reg property for use later */ 226 sc->sc_reg_valid = false; 227 rv = OF_getencprop(node, "reg", sc->sc_reg, sizeof(sc->sc_reg)); 228 if (rv < 0) 229 device_printf(dev, "missing 'reg' property\n"); 230 else if ((rv % 4) != 0) { 231 if (bootverbose) 232 device_printf(dev, "Malformed reg property\n"); 233 } else if ((rv / 4) != psc->sc_addr_cells) { 234 if (bootverbose) 235 device_printf(dev, "Invalid reg size %u\n", rv); 236 } else 237 sc->sc_reg_valid = true; 238 239 #ifdef __powerpc__ 240 /* 241 * On powerpc, "interrupt-servers" denotes a SMT CPU. Look for any 242 * thread on this CPU, and assign that. 243 */ 244 if (OF_hasprop(node, "ibm,ppc-interrupt-server#s")) { 245 struct cpuref cpuref; 246 cell_t *servers; 247 int i, nservers, rv; 248 249 if ((nservers = OF_getencprop_alloc(node, 250 "ibm,ppc-interrupt-server#s", (void **)&servers)) < 0) 251 return (ENXIO); 252 nservers /= sizeof(cell_t); 253 for (i = 0; i < nservers; i++) { 254 for (rv = platform_smp_first_cpu(&cpuref); rv == 0; 255 rv = platform_smp_next_cpu(&cpuref)) { 256 if (cpuref.cr_hwref == servers[i]) { 257 sc->sc_cpu_pcpu = 258 pcpu_find(cpuref.cr_cpuid); 259 if (sc->sc_cpu_pcpu == NULL) { 260 OF_prop_free(servers); 261 return (ENXIO); 262 } 263 break; 264 } 265 } 266 if (rv != ENOENT) 267 break; 268 } 269 OF_prop_free(servers); 270 if (sc->sc_cpu_pcpu == NULL) { 271 device_printf(dev, "No CPU found for this device.\n"); 272 return (ENXIO); 273 } 274 } else 275 #endif 276 sc->sc_cpu_pcpu = pcpu_find(device_get_unit(dev)); 277 278 if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) < 0) { 279 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__) 280 rv = clk_get_by_ofw_index(dev, 0, 0, &cpuclk); 281 if (rv == 0) { 282 rv = clk_get_freq(cpuclk, &freq); 283 if (rv != 0 && bootverbose) 284 device_printf(dev, 285 "Cannot get freq of property clocks\n"); 286 else 287 sc->sc_nominal_mhz = freq / 1000000; 288 } else 289 #endif 290 { 291 if (bootverbose) 292 device_printf(dev, 293 "missing 'clock-frequency' property\n"); 294 } 295 } else 296 sc->sc_nominal_mhz = cell / 1000000; /* convert to MHz */ 297 298 if (sc->sc_nominal_mhz != 0 && bootverbose) 299 device_printf(dev, "Nominal frequency %dMhz\n", 300 sc->sc_nominal_mhz); 301 bus_generic_probe(dev); 302 return (bus_generic_attach(dev)); 303 } 304 305 static int 306 ofw_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 307 { 308 struct ofw_cpulist_softc *psc; 309 struct ofw_cpu_softc *sc; 310 311 sc = device_get_softc(dev); 312 313 switch (index) { 314 case CPU_IVAR_PCPU: 315 *result = (uintptr_t)sc->sc_cpu_pcpu; 316 return (0); 317 case CPU_IVAR_NOMINAL_MHZ: 318 if (sc->sc_nominal_mhz > 0) { 319 *result = (uintptr_t)sc->sc_nominal_mhz; 320 return (0); 321 } 322 break; 323 case CPU_IVAR_CPUID_SIZE: 324 psc = device_get_softc(device_get_parent(dev)); 325 *result = psc->sc_addr_cells; 326 return (0); 327 case CPU_IVAR_CPUID: 328 if (sc->sc_reg_valid) { 329 *result = (uintptr_t)sc->sc_reg; 330 return (0); 331 } 332 break; 333 } 334 335 return (ENOENT); 336 } 337 338 int 339 ofw_cpu_early_foreach(ofw_cpu_foreach_cb callback, boolean_t only_runnable) 340 { 341 phandle_t node, child; 342 pcell_t addr_cells, reg[2]; 343 char status[16]; 344 char device_type[16]; 345 u_int id, next_id; 346 int count, rv; 347 348 count = 0; 349 id = 0; 350 next_id = 0; 351 352 node = OF_finddevice("/cpus"); 353 if (node == -1) 354 return (-1); 355 356 /* Find the number of cells in the cpu register */ 357 if (OF_getencprop(node, "#address-cells", &addr_cells, 358 sizeof(addr_cells)) < 0) 359 return (-1); 360 361 for (child = OF_child(node); child != 0; child = OF_peer(child), 362 id = next_id) { 363 /* Check if child is a CPU */ 364 memset(device_type, 0, sizeof(device_type)); 365 rv = OF_getprop(child, "device_type", device_type, 366 sizeof(device_type) - 1); 367 if (rv < 0) 368 continue; 369 if (strcmp(device_type, "cpu") != 0) 370 continue; 371 372 /* We're processing CPU, update next_id used in the next iteration */ 373 next_id++; 374 375 /* 376 * If we are filtering by runnable then limit to only 377 * those that have been enabled, or do provide a method 378 * to enable them. 379 */ 380 if (only_runnable) { 381 status[0] = '\0'; 382 OF_getprop(child, "status", status, sizeof(status)); 383 if (status[0] != '\0' && strcmp(status, "okay") != 0 && 384 strcmp(status, "ok") != 0 && 385 !OF_hasprop(child, "enable-method")) 386 continue; 387 } 388 389 /* 390 * Check we have a register to identify the cpu 391 */ 392 rv = OF_getencprop(child, "reg", reg, 393 addr_cells * sizeof(cell_t)); 394 if (rv != addr_cells * sizeof(cell_t)) 395 continue; 396 397 if (callback == NULL || callback(id, child, addr_cells, reg)) 398 count++; 399 } 400 401 return (only_runnable ? count : id); 402 } 403