1 /*- 2 * Copyright (c) 2016 Netflix, Inc. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer, 9 * without modification, immediately at the beginning of the file. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 #include <sys/param.h> 27 #include <sys/systm.h> 28 #include <sys/buf.h> 29 #include <sys/bus.h> 30 #include <sys/conf.h> 31 #include <sys/ioccom.h> 32 #include <sys/malloc.h> 33 #include <sys/proc.h> 34 #include <sys/smp.h> 35 36 #include <cam/cam.h> 37 #include <cam/cam_ccb.h> 38 #include <cam/cam_sim.h> 39 #include <cam/cam_xpt_sim.h> 40 #include <cam/cam_debug.h> 41 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcireg.h> 44 45 #include "nvme_private.h" 46 47 #include "nvme_if.h" 48 49 #define ccb_accb_ptr spriv_ptr0 50 #define ccb_ctrlr_ptr spriv_ptr1 51 static void nvme_sim_action(struct cam_sim *sim, union ccb *ccb); 52 static void nvme_sim_poll(struct cam_sim *sim); 53 static int nvme_sim_ns_added(device_t dev, struct nvme_namespace *ns); 54 static int nvme_sim_ns_changed(device_t dev, uint32_t nsid); 55 static int nvme_sim_ns_removed(device_t dev, struct nvme_namespace *ns); 56 57 #define sim2softc(sim) ((struct nvme_sim_softc *)cam_sim_softc(sim)) 58 #define sim2ctrlr(sim) (sim2softc(sim)->s_ctrlr) 59 60 struct nvme_sim_softc 61 { 62 struct nvme_controller *s_ctrlr; 63 struct cam_sim *s_sim; 64 struct cam_path *s_path; 65 }; 66 67 static void 68 nvme_sim_nvmeio_done(void *ccb_arg, const struct nvme_completion *cpl) 69 { 70 union ccb *ccb = (union ccb *)ccb_arg; 71 72 /* 73 * Let the periph know the completion, and let it sort out what 74 * it means. Report an error or success based on SC and SCT. 75 * We do not try to fetch additional data from the error log, 76 * though maybe we should in the future. 77 */ 78 memcpy(&ccb->nvmeio.cpl, cpl, sizeof(*cpl)); 79 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 80 if (nvme_completion_is_error(cpl)) { 81 ccb->ccb_h.status = CAM_NVME_STATUS_ERROR; 82 xpt_done(ccb); 83 } else { 84 ccb->ccb_h.status = CAM_REQ_CMP; 85 xpt_done_direct(ccb); 86 } 87 } 88 89 static void 90 nvme_sim_nvmeio(struct cam_sim *sim, union ccb *ccb) 91 { 92 struct ccb_nvmeio *nvmeio = &ccb->nvmeio; 93 struct nvme_request *req; 94 void *payload; 95 uint32_t size; 96 struct nvme_controller *ctrlr; 97 98 ctrlr = sim2ctrlr(sim); 99 payload = nvmeio->data_ptr; 100 size = nvmeio->dxfer_len; 101 /* SG LIST ??? */ 102 if ((nvmeio->ccb_h.flags & CAM_DATA_MASK) == CAM_DATA_BIO) 103 req = nvme_allocate_request_bio((struct bio *)payload, 104 M_NOWAIT, nvme_sim_nvmeio_done, ccb); 105 else if ((nvmeio->ccb_h.flags & CAM_DATA_SG) == CAM_DATA_SG) 106 req = nvme_allocate_request_ccb(ccb, M_NOWAIT, 107 nvme_sim_nvmeio_done, ccb); 108 else if (payload == NULL) 109 req = nvme_allocate_request_null(M_NOWAIT, nvme_sim_nvmeio_done, 110 ccb); 111 else 112 req = nvme_allocate_request_vaddr(payload, size, M_NOWAIT, 113 nvme_sim_nvmeio_done, ccb); 114 if (req == NULL) { 115 nvmeio->ccb_h.status = CAM_RESRC_UNAVAIL; 116 xpt_done(ccb); 117 return; 118 } 119 ccb->ccb_h.status |= CAM_SIM_QUEUED; 120 121 memcpy(&req->cmd, &ccb->nvmeio.cmd, sizeof(ccb->nvmeio.cmd)); 122 123 if (ccb->ccb_h.func_code == XPT_NVME_IO) 124 nvme_ctrlr_submit_io_request(ctrlr, req); 125 else 126 nvme_ctrlr_submit_admin_request(ctrlr, req); 127 } 128 129 static uint32_t 130 nvme_link_kBps(struct nvme_controller *ctrlr) 131 { 132 uint32_t speed, lanes, link[] = { 1, 250000, 500000, 985000, 1970000 }; 133 uint32_t status; 134 135 status = pcie_read_config(ctrlr->dev, PCIER_LINK_STA, 2); 136 speed = status & PCIEM_LINK_STA_SPEED; 137 lanes = (status & PCIEM_LINK_STA_WIDTH) >> 4; 138 /* 139 * Failsafe on link speed indicator. If it is insane report the number of 140 * lanes as the speed. Not 100% accurate, but may be diagnostic. 141 */ 142 if (speed >= nitems(link)) 143 speed = 0; 144 return link[speed] * lanes; 145 } 146 147 static void 148 nvme_sim_action(struct cam_sim *sim, union ccb *ccb) 149 { 150 struct nvme_controller *ctrlr; 151 152 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, 153 ("nvme_sim_action: func= %#x\n", 154 ccb->ccb_h.func_code)); 155 156 ctrlr = sim2ctrlr(sim); 157 158 switch (ccb->ccb_h.func_code) { 159 case XPT_CALC_GEOMETRY: /* Calculate Geometry Totally nuts ? XXX */ 160 /* 161 * Only meaningful for old-school SCSI disks since only the SCSI 162 * da driver generates them. Reject all these that slip through. 163 */ 164 /*FALLTHROUGH*/ 165 case XPT_ABORT: /* Abort the specified CCB */ 166 ccb->ccb_h.status = CAM_REQ_INVALID; 167 break; 168 case XPT_SET_TRAN_SETTINGS: 169 /* 170 * NVMe doesn't really have different transfer settings, but 171 * other parts of CAM think failure here is a big deal. 172 */ 173 ccb->ccb_h.status = CAM_REQ_CMP; 174 break; 175 case XPT_PATH_INQ: /* Path routing inquiry */ 176 { 177 struct ccb_pathinq *cpi = &ccb->cpi; 178 device_t dev = ctrlr->dev; 179 180 /* 181 * For devices that are reported as children of the AHCI 182 * controller, which has no access to the config space for this 183 * controller, report the AHCI controller's data. 184 */ 185 if (ctrlr->quirks & QUIRK_AHCI) 186 dev = device_get_parent(dev); 187 cpi->version_num = 1; 188 cpi->hba_inquiry = 0; 189 cpi->target_sprt = 0; 190 cpi->hba_misc = PIM_UNMAPPED | PIM_NOSCAN; 191 cpi->hba_eng_cnt = 0; 192 cpi->max_target = 0; 193 cpi->max_lun = ctrlr->cdata.nn; 194 cpi->maxio = ctrlr->max_xfer_size; 195 cpi->initiator_id = 0; 196 cpi->bus_id = cam_sim_bus(sim); 197 cpi->base_transfer_speed = nvme_link_kBps(ctrlr); 198 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 199 strlcpy(cpi->hba_vid, "NVMe", HBA_IDLEN); 200 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 201 cpi->unit_number = cam_sim_unit(sim); 202 cpi->transport = XPORT_NVME; /* XXX XPORT_PCIE ? */ 203 cpi->transport_version = nvme_mmio_read_4(ctrlr, vs); 204 cpi->protocol = PROTO_NVME; 205 cpi->protocol_version = nvme_mmio_read_4(ctrlr, vs); 206 cpi->xport_specific.nvme.nsid = xpt_path_lun_id(ccb->ccb_h.path); 207 cpi->xport_specific.nvme.domain = pci_get_domain(dev); 208 cpi->xport_specific.nvme.bus = pci_get_bus(dev); 209 cpi->xport_specific.nvme.slot = pci_get_slot(dev); 210 cpi->xport_specific.nvme.function = pci_get_function(dev); 211 cpi->xport_specific.nvme.progif = pci_get_progif(dev); 212 strlcpy(cpi->xport_specific.nvme.dev_name, device_get_nameunit(dev), 213 sizeof(cpi->xport_specific.nvme.dev_name)); 214 cpi->hba_vendor = pci_get_vendor(dev); 215 cpi->hba_device = pci_get_device(dev); 216 cpi->hba_subvendor = pci_get_subvendor(dev); 217 cpi->hba_subdevice = pci_get_subdevice(dev); 218 cpi->ccb_h.status = CAM_REQ_CMP; 219 break; 220 } 221 case XPT_GET_TRAN_SETTINGS: /* Get transport settings */ 222 { 223 struct ccb_trans_settings *cts; 224 struct ccb_trans_settings_nvme *nvmep; 225 struct ccb_trans_settings_nvme *nvmex; 226 device_t dev; 227 uint32_t status, caps, flags; 228 229 dev = ctrlr->dev; 230 cts = &ccb->cts; 231 nvmex = &cts->xport_specific.nvme; 232 nvmep = &cts->proto_specific.nvme; 233 234 nvmex->spec = nvme_mmio_read_4(ctrlr, vs); 235 nvmex->valid = CTS_NVME_VALID_SPEC; 236 if ((ctrlr->quirks & QUIRK_AHCI) == 0) { 237 /* AHCI redirect makes it impossible to query */ 238 status = pcie_read_config(dev, PCIER_LINK_STA, 2); 239 caps = pcie_read_config(dev, PCIER_LINK_CAP, 2); 240 flags = pcie_read_config(dev, PCIER_FLAGS, 2); 241 if ((flags & PCIEM_FLAGS_TYPE) == PCIEM_TYPE_ENDPOINT) { 242 nvmex->valid |= CTS_NVME_VALID_LINK; 243 nvmex->speed = status & PCIEM_LINK_STA_SPEED; 244 nvmex->lanes = (status & PCIEM_LINK_STA_WIDTH) >> 4; 245 nvmex->max_speed = caps & PCIEM_LINK_CAP_MAX_SPEED; 246 nvmex->max_lanes = (caps & PCIEM_LINK_CAP_MAX_WIDTH) >> 4; 247 } 248 } 249 250 /* XXX these should be something else maybe ? */ 251 nvmep->valid = CTS_NVME_VALID_SPEC; 252 nvmep->spec = nvmex->spec; 253 254 cts->transport = XPORT_NVME; 255 cts->transport_version = nvmex->spec; 256 cts->protocol = PROTO_NVME; 257 cts->protocol_version = nvmex->spec; 258 cts->ccb_h.status = CAM_REQ_CMP; 259 break; 260 } 261 case XPT_TERM_IO: /* Terminate the I/O process */ 262 /* 263 * every driver handles this, but nothing generates it. Assume 264 * it's OK to just say 'that worked'. 265 */ 266 /*FALLTHROUGH*/ 267 case XPT_RESET_DEV: /* Bus Device Reset the specified device */ 268 case XPT_RESET_BUS: /* Reset the specified bus */ 269 /* 270 * NVMe doesn't really support physically resetting the bus. It's part 271 * of the bus scanning dance, so return sucess to tell the process to 272 * proceed. 273 */ 274 ccb->ccb_h.status = CAM_REQ_CMP; 275 break; 276 case XPT_NVME_IO: /* Execute the requested I/O operation */ 277 if (ctrlr->is_failed) { 278 /* 279 * I/O came in while we were failing the drive, so drop 280 * it. Once falure is complete, we'll be destroyed. 281 */ 282 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 283 break; 284 } 285 nvme_sim_nvmeio(sim, ccb); 286 return; /* no done */ 287 case XPT_NVME_ADMIN: /* or Admin operation */ 288 if (ctrlr->is_failed_admin) { 289 /* 290 * Admin request came in when we can't send admin 291 * commands, so drop it. Once falure is complete, we'll 292 * be destroyed. 293 */ 294 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 295 break; 296 } 297 nvme_sim_nvmeio(sim, ccb); 298 return; /* no done */ 299 default: 300 ccb->ccb_h.status = CAM_REQ_INVALID; 301 break; 302 } 303 xpt_done(ccb); 304 } 305 306 static void 307 nvme_sim_poll(struct cam_sim *sim) 308 { 309 nvme_ctrlr_poll(sim2ctrlr(sim)); 310 } 311 312 static int 313 nvme_sim_probe(device_t dev) 314 { 315 if (nvme_use_nvd) 316 return (ENXIO); 317 /* 318 * Only do storage devices with CAM. NVMHCI 1.0 interfaces are the only 319 * ones that have namespaces with LBA ranges on them. 320 */ 321 if (pci_get_progif(device_get_parent(dev)) != 322 PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) 323 return (ENXIO); 324 325 device_set_desc(dev, "nvme cam"); 326 return (BUS_PROBE_DEFAULT); 327 } 328 329 static int 330 nvme_sim_attach(device_t dev) 331 { 332 struct cam_devq *devq; 333 int max_trans; 334 int err = ENXIO; 335 struct nvme_sim_softc *sc = device_get_softc(dev); 336 struct nvme_controller *ctrlr = device_get_ivars(dev); 337 338 max_trans = ctrlr->max_hw_pend_io; 339 devq = cam_simq_alloc(max_trans); 340 if (devq == NULL) 341 return (ENOMEM); 342 343 sc->s_ctrlr = ctrlr; 344 345 sc->s_sim = cam_sim_alloc(nvme_sim_action, nvme_sim_poll, 346 "nvme", sc, device_get_unit(dev), 347 NULL, max_trans, max_trans, devq); 348 if (sc->s_sim == NULL) { 349 device_printf(dev, "Failed to allocate a sim\n"); 350 cam_simq_free(devq); 351 return (ENOMEM); 352 } 353 if (xpt_bus_register(sc->s_sim, dev, 0) != CAM_SUCCESS) { 354 device_printf(dev, "Failed to create a bus\n"); 355 goto err2; 356 } 357 if (xpt_create_path(&sc->s_path, /*periph*/NULL, cam_sim_path(sc->s_sim), 358 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 359 device_printf(dev, "Failed to create a path\n"); 360 goto err3; 361 } 362 363 for (int i = 0; i < min(ctrlr->cdata.nn, NVME_MAX_NAMESPACES); i++) { 364 struct nvme_namespace *ns = &ctrlr->ns[i]; 365 366 if (ns->data.nsze == 0) 367 continue; 368 nvme_sim_ns_added(dev, ns); 369 } 370 371 return (0); 372 err3: 373 xpt_bus_deregister(cam_sim_path(sc->s_sim)); 374 err2: 375 cam_sim_free(sc->s_sim, /*free_devq*/TRUE); 376 return (err); 377 } 378 379 380 static int 381 nvme_sim_fail_all_ns(device_t dev) 382 { 383 struct nvme_sim_softc *sc = device_get_softc(dev); 384 struct nvme_controller *ctrlr = sc->s_ctrlr; 385 386 for (int i = 0; i < min(ctrlr->cdata.nn, NVME_MAX_NAMESPACES); i++) { 387 struct nvme_namespace *ns = &ctrlr->ns[i]; 388 389 if (ns->data.nsze == 0) 390 continue; 391 nvme_sim_ns_removed(dev, ns); 392 } 393 return (0); 394 } 395 396 static int 397 nvme_sim_detach(device_t dev) 398 { 399 return (nvme_sim_fail_all_ns(dev)); 400 } 401 402 static int 403 nvme_sim_ns_added(device_t dev, struct nvme_namespace *ns) 404 { 405 struct nvme_sim_softc *sc = device_get_softc(dev); 406 union ccb *ccb; 407 408 /* 409 * We map the NVMe namespace idea onto the CAM unit LUN. For each new 410 * namespace, scan or rescan the path to enumerate it. 411 */ 412 ccb = xpt_alloc_ccb(); 413 if (xpt_create_path(&ccb->ccb_h.path, /*periph*/NULL, 414 cam_sim_path(sc->s_sim), 0, ns->id) != CAM_REQ_CMP) { 415 printf("unable to create path for rescan\n"); 416 return (ENOMEM); 417 } 418 xpt_rescan(ccb); 419 420 return (0); 421 } 422 423 static int 424 nvme_sim_ns_removed(device_t dev, struct nvme_namespace *ns) 425 { 426 struct nvme_sim_softc *sc = device_get_softc(dev); 427 struct cam_path *tmppath; 428 429 if (xpt_create_path(&tmppath, /*periph*/NULL, 430 cam_sim_path(sc->s_sim), 0, ns->id) != CAM_REQ_CMP) { 431 printf("unable to create path for rescan\n"); 432 return (ENOMEM); 433 } 434 xpt_async(AC_LOST_DEVICE, tmppath, NULL); 435 xpt_free_path(tmppath); 436 437 return (0); 438 } 439 440 static int 441 nvme_sim_ns_changed(device_t dev, uint32_t nsid) 442 { 443 struct nvme_sim_softc *sc = device_get_softc(dev); 444 struct nvme_namespace *ns = &sc->s_ctrlr->ns[nsid - 1]; 445 446 /* 447 * These wind up being the same. For a configured cam_ed, we generate 448 * AC_GETDEV_CHANGED, but for new one we do AC_FOUND_DEVICE, but the 449 * scan is the same. 450 */ 451 return (nvme_sim_ns_added(dev, ns)); 452 } 453 454 static int 455 nvme_sim_controller_failed(device_t dev) 456 { 457 return (nvme_sim_fail_all_ns(dev)); 458 } 459 460 static int 461 nvme_sim_handle_aen(device_t dev, const struct nvme_completion *cpl, 462 uint32_t pg_nr, void *page, uint32_t page_len) 463 { 464 /* Do nothing */ 465 return (0); 466 } 467 468 static device_method_t nvme_sim_methods[] = { 469 /* Device interface */ 470 DEVMETHOD(device_probe, nvme_sim_probe), 471 DEVMETHOD(device_attach, nvme_sim_attach), 472 DEVMETHOD(device_detach, nvme_sim_detach), 473 /* Nvme controller messages */ 474 DEVMETHOD(nvme_ns_added, nvme_sim_ns_added), 475 DEVMETHOD(nvme_ns_removed, nvme_sim_ns_removed), 476 DEVMETHOD(nvme_ns_changed, nvme_sim_ns_changed), 477 DEVMETHOD(nvme_controller_failed, nvme_sim_controller_failed), 478 DEVMETHOD(nvme_handle_aen, nvme_sim_handle_aen), 479 { 0, 0 } 480 }; 481 482 static driver_t nvme_sim_driver = { 483 "nvme_sim", 484 nvme_sim_methods, 485 sizeof(struct nvme_sim_softc), 486 }; 487 488 DRIVER_MODULE(nvme_sim, nvme, nvme_sim_driver, NULL, NULL); 489 MODULE_VERSION(nvme_shim, 1); 490