1 /*- 2 * Copyright (c) 2016 Netflix, Inc 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/buf.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/ioccom.h> 36 #include <sys/malloc.h> 37 #include <sys/proc.h> 38 #include <sys/smp.h> 39 40 #include <cam/cam.h> 41 #include <cam/cam_ccb.h> 42 #include <cam/cam_sim.h> 43 #include <cam/cam_xpt_sim.h> 44 #include <cam/cam_xpt_internal.h> // Yes, this is wrong. 45 #include <cam/cam_debug.h> 46 47 #include "nvme_private.h" 48 49 #define ccb_accb_ptr spriv_ptr0 50 #define ccb_ctrlr_ptr spriv_ptr1 51 static void nvme_sim_action(struct cam_sim *sim, union ccb *ccb); 52 static void nvme_sim_poll(struct cam_sim *sim); 53 54 #define sim2softc(sim) ((struct nvme_sim_softc *)cam_sim_softc(sim)) 55 #define sim2ns(sim) (sim2softc(sim)->s_ns) 56 #define sim2ctrlr(sim) (sim2softc(sim)->s_ctrlr) 57 58 struct nvme_sim_softc 59 { 60 struct nvme_controller *s_ctrlr; 61 struct nvme_namespace *s_ns; 62 struct cam_sim *s_sim; 63 struct cam_path *s_path; 64 }; 65 66 static void 67 nvme_sim_nvmeio_done(void *ccb_arg, const struct nvme_completion *cpl) 68 { 69 union ccb *ccb = (union ccb *)ccb_arg; 70 71 /* 72 * Let the periph know the completion, and let it sort out what 73 * it means. Make our best guess, though for the status code. 74 */ 75 memcpy(&ccb->nvmeio.cpl, cpl, sizeof(*cpl)); 76 if (nvme_completion_is_error(cpl)) 77 ccb->ccb_h.status = CAM_REQ_CMP_ERR; 78 else 79 ccb->ccb_h.status = CAM_REQ_CMP; 80 xpt_done(ccb); 81 } 82 83 static void 84 nvme_sim_nvmeio(struct cam_sim *sim, union ccb *ccb) 85 { 86 struct ccb_nvmeio *nvmeio = &ccb->nvmeio; 87 struct nvme_request *req; 88 void *payload; 89 uint32_t size; 90 struct nvme_controller *ctrlr; 91 92 ctrlr = sim2ctrlr(sim); 93 payload = nvmeio->data_ptr; 94 size = nvmeio->dxfer_len; 95 /* SG LIST ??? */ 96 if ((nvmeio->ccb_h.flags & CAM_DATA_MASK) == CAM_DATA_BIO) 97 req = nvme_allocate_request_bio((struct bio *)payload, 98 nvme_sim_nvmeio_done, ccb); 99 else if ((nvmeio->ccb_h.flags & CAM_DATA_SG) == CAM_DATA_SG) 100 req = nvme_allocate_request_ccb(ccb, nvme_sim_nvmeio_done, ccb); 101 else if (payload == NULL) 102 req = nvme_allocate_request_null(nvme_sim_nvmeio_done, ccb); 103 else 104 req = nvme_allocate_request_vaddr(payload, size, 105 nvme_sim_nvmeio_done, ccb); 106 107 if (req == NULL) { 108 nvmeio->ccb_h.status = CAM_RESRC_UNAVAIL; 109 xpt_done(ccb); 110 return; 111 } 112 113 memcpy(&req->cmd, &ccb->nvmeio.cmd, sizeof(ccb->nvmeio.cmd)); 114 115 if (ccb->ccb_h.func_code == XPT_NVME_IO) 116 nvme_ctrlr_submit_io_request(ctrlr, req); 117 else 118 nvme_ctrlr_submit_admin_request(ctrlr, req); 119 120 ccb->ccb_h.status |= CAM_SIM_QUEUED; 121 } 122 123 static void 124 nvme_sim_action(struct cam_sim *sim, union ccb *ccb) 125 { 126 struct nvme_controller *ctrlr; 127 struct nvme_namespace *ns; 128 129 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, 130 ("nvme_sim_action: func= %#x\n", 131 ccb->ccb_h.func_code)); 132 133 /* 134 * XXX when we support multiple namespaces in the base driver we'll need 135 * to revisit how all this gets stored and saved in the periph driver's 136 * reserved areas. Right now we store all three in the softc of the sim. 137 */ 138 ns = sim2ns(sim); 139 ctrlr = sim2ctrlr(sim); 140 141 mtx_assert(&ctrlr->lock, MA_OWNED); 142 143 switch (ccb->ccb_h.func_code) { 144 case XPT_CALC_GEOMETRY: /* Calculate Geometry Totally nuts ? XXX */ 145 /* 146 * Only meaningful for old-school SCSI disks since only the SCSI 147 * da driver generates them. Reject all these that slip through. 148 */ 149 /*FALLTHROUGH*/ 150 case XPT_ABORT: /* Abort the specified CCB */ 151 ccb->ccb_h.status = CAM_REQ_INVALID; 152 break; 153 case XPT_SET_TRAN_SETTINGS: 154 /* 155 * NVMe doesn't really have different transfer settings, but 156 * other parts of CAM think failure here is a big deal. 157 */ 158 ccb->ccb_h.status = CAM_REQ_CMP; 159 break; 160 case XPT_PATH_INQ: /* Path routing inquiry */ 161 { 162 struct ccb_pathinq *cpi = &ccb->cpi; 163 164 /* 165 * NVMe may have multiple LUNs on the same path. Current generation 166 * of NVMe devives support only a single name space. Multiple name 167 * space drives are coming, but it's unclear how we should report 168 * them up the stack. 169 */ 170 cpi->version_num = 1; 171 cpi->hba_inquiry = 0; 172 cpi->target_sprt = 0; 173 cpi->hba_misc = PIM_UNMAPPED /* | PIM_NOSCAN */; 174 cpi->hba_eng_cnt = 0; 175 cpi->max_target = 0; 176 cpi->max_lun = ctrlr->cdata.nn; 177 cpi->maxio = nvme_ns_get_max_io_xfer_size(ns); 178 cpi->initiator_id = 0; 179 cpi->bus_id = cam_sim_bus(sim); 180 cpi->base_transfer_speed = 4000000; /* 4 GB/s 4 lanes pcie 3 */ 181 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 182 strlcpy(cpi->hba_vid, "NVMe", HBA_IDLEN); 183 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 184 cpi->unit_number = cam_sim_unit(sim); 185 cpi->transport = XPORT_NVME; /* XXX XPORT_PCIE ? */ 186 cpi->transport_version = 1; /* XXX Get PCIe spec ? */ 187 cpi->protocol = PROTO_NVME; 188 cpi->protocol_version = NVME_REV_1; /* Groks all 1.x NVMe cards */ 189 cpi->xport_specific.nvme.nsid = ns->id; 190 cpi->ccb_h.status = CAM_REQ_CMP; 191 break; 192 } 193 case XPT_GET_TRAN_SETTINGS: /* Get transport settings */ 194 { 195 struct ccb_trans_settings *cts; 196 struct ccb_trans_settings_nvme *nvmep; 197 struct ccb_trans_settings_nvme *nvmex; 198 199 cts = &ccb->cts; 200 nvmex = &cts->xport_specific.nvme; 201 nvmep = &cts->proto_specific.nvme; 202 203 nvmex->valid = CTS_NVME_VALID_SPEC; 204 nvmex->spec_major = 1; /* XXX read from card */ 205 nvmex->spec_minor = 2; 206 nvmex->spec_tiny = 0; 207 208 nvmep->valid = CTS_NVME_VALID_SPEC; 209 nvmep->spec_major = 1; /* XXX read from card */ 210 nvmep->spec_minor = 2; 211 nvmep->spec_tiny = 0; 212 cts->transport = XPORT_NVME; 213 cts->protocol = PROTO_NVME; 214 cts->ccb_h.status = CAM_REQ_CMP; 215 break; 216 } 217 case XPT_TERM_IO: /* Terminate the I/O process */ 218 /* 219 * every driver handles this, but nothing generates it. Assume 220 * it's OK to just say 'that worked'. 221 */ 222 /*FALLTHROUGH*/ 223 case XPT_RESET_DEV: /* Bus Device Reset the specified device */ 224 case XPT_RESET_BUS: /* Reset the specified bus */ 225 /* 226 * NVMe doesn't really support physically resetting the bus. It's part 227 * of the bus scanning dance, so return sucess to tell the process to 228 * proceed. 229 */ 230 ccb->ccb_h.status = CAM_REQ_CMP; 231 break; 232 case XPT_NVME_IO: /* Execute the requested I/O operation */ 233 case XPT_NVME_ADMIN: /* or Admin operation */ 234 nvme_sim_nvmeio(sim, ccb); 235 return; /* no done */ 236 default: 237 ccb->ccb_h.status = CAM_REQ_INVALID; 238 break; 239 } 240 xpt_done(ccb); 241 } 242 243 static void 244 nvme_sim_poll(struct cam_sim *sim) 245 { 246 247 nvme_ctrlr_intx_handler(sim2ctrlr(sim)); 248 } 249 250 static void * 251 nvme_sim_new_controller(struct nvme_controller *ctrlr) 252 { 253 struct cam_devq *devq; 254 int max_trans; 255 int unit; 256 struct nvme_sim_softc *sc = NULL; 257 258 max_trans = ctrlr->max_hw_pend_io; 259 unit = device_get_unit(ctrlr->dev); 260 devq = cam_simq_alloc(max_trans); 261 if (devq == NULL) 262 return NULL; 263 264 sc = malloc(sizeof(*sc), M_NVME, M_ZERO | M_WAITOK); 265 266 sc->s_ctrlr = ctrlr; 267 268 sc->s_sim = cam_sim_alloc(nvme_sim_action, nvme_sim_poll, 269 "nvme", sc, unit, &ctrlr->lock, max_trans, max_trans, devq); 270 if (sc->s_sim == NULL) { 271 printf("Failed to allocate a sim\n"); 272 cam_simq_free(devq); 273 free(sc, M_NVME); 274 return NULL; 275 } 276 277 return sc; 278 } 279 280 static void 281 nvme_sim_rescan_target(struct nvme_controller *ctrlr, struct cam_path *path) 282 { 283 union ccb *ccb; 284 285 ccb = xpt_alloc_ccb_nowait(); 286 if (ccb == NULL) { 287 printf("unable to alloc CCB for rescan\n"); 288 return; 289 } 290 291 if (xpt_clone_path(&ccb->ccb_h.path, path) != CAM_REQ_CMP) { 292 printf("unable to copy path for rescan\n"); 293 xpt_free_ccb(ccb); 294 return; 295 } 296 297 xpt_rescan(ccb); 298 } 299 300 static void * 301 nvme_sim_new_ns(struct nvme_namespace *ns, void *sc_arg) 302 { 303 struct nvme_sim_softc *sc = sc_arg; 304 struct nvme_controller *ctrlr = sc->s_ctrlr; 305 int i; 306 307 sc->s_ns = ns; 308 309 /* 310 * XXX this is creating one bus per ns, but it should be one 311 * XXX target per controller, and one LUN per namespace. 312 * XXX Current drives only support one NS, so there's time 313 * XXX to fix it later when new drives arrive. 314 * 315 * XXX I'm pretty sure the xpt_bus_register() call below is 316 * XXX like super lame and it really belongs in the sim_new_ctrlr 317 * XXX callback. Then the create_path below would be pretty close 318 * XXX to being right. Except we should be per-ns not per-ctrlr 319 * XXX data. 320 */ 321 322 mtx_lock(&ctrlr->lock); 323 /* Create bus */ 324 325 /* 326 * XXX do I need to lock ctrlr->lock ? 327 * XXX do I need to lock the path? 328 * ata and scsi seem to in their code, but their discovery is 329 * somewhat more asynchronous. We're only every called one at a 330 * time, and nothing is in parallel. 331 */ 332 333 i = 0; 334 if (xpt_bus_register(sc->s_sim, ctrlr->dev, 0) != CAM_SUCCESS) 335 goto error; 336 i++; 337 if (xpt_create_path(&sc->s_path, /*periph*/NULL, cam_sim_path(sc->s_sim), 338 1, ns->id) != CAM_REQ_CMP) 339 goto error; 340 i++; 341 342 sc->s_path->device->nvme_data = nvme_ns_get_data(ns); 343 sc->s_path->device->nvme_cdata = nvme_ctrlr_get_data(ns->ctrlr); 344 345 /* Scan bus */ 346 nvme_sim_rescan_target(ctrlr, sc->s_path); 347 348 mtx_unlock(&ctrlr->lock); 349 350 return ns; 351 352 error: 353 switch (i) { 354 case 2: 355 xpt_free_path(sc->s_path); 356 case 1: 357 xpt_bus_deregister(cam_sim_path(sc->s_sim)); 358 case 0: 359 cam_sim_free(sc->s_sim, /*free_devq*/TRUE); 360 } 361 mtx_unlock(&ctrlr->lock); 362 return NULL; 363 } 364 365 static void 366 nvme_sim_controller_fail(void *ctrlr_arg) 367 { 368 /* XXX cleanup XXX */ 369 } 370 371 struct nvme_consumer *consumer_cookie; 372 373 static void 374 nvme_sim_init(void) 375 { 376 if (nvme_use_nvd) 377 return; 378 379 consumer_cookie = nvme_register_consumer(nvme_sim_new_ns, 380 nvme_sim_new_controller, NULL, nvme_sim_controller_fail); 381 } 382 383 SYSINIT(nvme_sim_register, SI_SUB_DRIVERS, SI_ORDER_ANY, 384 nvme_sim_init, NULL); 385 386 static void 387 nvme_sim_uninit(void) 388 { 389 if (nvme_use_nvd) 390 return; 391 /* XXX Cleanup */ 392 393 nvme_unregister_consumer(consumer_cookie); 394 } 395 396 SYSUNINIT(nvme_sim_unregister, SI_SUB_DRIVERS, SI_ORDER_ANY, 397 nvme_sim_uninit, NULL); 398