1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012-2014 Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 35 #include <dev/pci/pcivar.h> 36 37 #include "nvme_private.h" 38 39 static void _nvme_qpair_submit_request(struct nvme_qpair *qpair, 40 struct nvme_request *req); 41 static void nvme_qpair_destroy(struct nvme_qpair *qpair); 42 43 struct nvme_opcode_string { 44 45 uint16_t opc; 46 const char * str; 47 }; 48 49 static struct nvme_opcode_string admin_opcode[] = { 50 { NVME_OPC_DELETE_IO_SQ, "DELETE IO SQ" }, 51 { NVME_OPC_CREATE_IO_SQ, "CREATE IO SQ" }, 52 { NVME_OPC_GET_LOG_PAGE, "GET LOG PAGE" }, 53 { NVME_OPC_DELETE_IO_CQ, "DELETE IO CQ" }, 54 { NVME_OPC_CREATE_IO_CQ, "CREATE IO CQ" }, 55 { NVME_OPC_IDENTIFY, "IDENTIFY" }, 56 { NVME_OPC_ABORT, "ABORT" }, 57 { NVME_OPC_SET_FEATURES, "SET FEATURES" }, 58 { NVME_OPC_GET_FEATURES, "GET FEATURES" }, 59 { NVME_OPC_ASYNC_EVENT_REQUEST, "ASYNC EVENT REQUEST" }, 60 { NVME_OPC_FIRMWARE_ACTIVATE, "FIRMWARE ACTIVATE" }, 61 { NVME_OPC_FIRMWARE_IMAGE_DOWNLOAD, "FIRMWARE IMAGE DOWNLOAD" }, 62 { NVME_OPC_DEVICE_SELF_TEST, "DEVICE SELF-TEST" }, 63 { NVME_OPC_NAMESPACE_ATTACHMENT, "NAMESPACE ATTACHMENT" }, 64 { NVME_OPC_KEEP_ALIVE, "KEEP ALIVE" }, 65 { NVME_OPC_DIRECTIVE_SEND, "DIRECTIVE SEND" }, 66 { NVME_OPC_DIRECTIVE_RECEIVE, "DIRECTIVE RECEIVE" }, 67 { NVME_OPC_VIRTUALIZATION_MANAGEMENT, "VIRTUALIZATION MANAGEMENT" }, 68 { NVME_OPC_NVME_MI_SEND, "NVME-MI SEND" }, 69 { NVME_OPC_NVME_MI_RECEIVE, "NVME-MI RECEIVE" }, 70 { NVME_OPC_DOORBELL_BUFFER_CONFIG, "DOORBELL BUFFER CONFIG" }, 71 { NVME_OPC_FORMAT_NVM, "FORMAT NVM" }, 72 { NVME_OPC_SECURITY_SEND, "SECURITY SEND" }, 73 { NVME_OPC_SECURITY_RECEIVE, "SECURITY RECEIVE" }, 74 { NVME_OPC_SANITIZE, "SANITIZE" }, 75 { 0xFFFF, "ADMIN COMMAND" } 76 }; 77 78 static struct nvme_opcode_string io_opcode[] = { 79 { NVME_OPC_FLUSH, "FLUSH" }, 80 { NVME_OPC_WRITE, "WRITE" }, 81 { NVME_OPC_READ, "READ" }, 82 { NVME_OPC_WRITE_UNCORRECTABLE, "WRITE UNCORRECTABLE" }, 83 { NVME_OPC_COMPARE, "COMPARE" }, 84 { NVME_OPC_WRITE_ZEROES, "WRITE ZEROES" }, 85 { NVME_OPC_DATASET_MANAGEMENT, "DATASET MANAGEMENT" }, 86 { NVME_OPC_RESERVATION_REGISTER, "RESERVATION REGISTER" }, 87 { NVME_OPC_RESERVATION_REPORT, "RESERVATION REPORT" }, 88 { NVME_OPC_RESERVATION_ACQUIRE, "RESERVATION ACQUIRE" }, 89 { NVME_OPC_RESERVATION_RELEASE, "RESERVATION RELEASE" }, 90 { 0xFFFF, "IO COMMAND" } 91 }; 92 93 static const char * 94 get_admin_opcode_string(uint16_t opc) 95 { 96 struct nvme_opcode_string *entry; 97 98 entry = admin_opcode; 99 100 while (entry->opc != 0xFFFF) { 101 if (entry->opc == opc) 102 return (entry->str); 103 entry++; 104 } 105 return (entry->str); 106 } 107 108 static const char * 109 get_io_opcode_string(uint16_t opc) 110 { 111 struct nvme_opcode_string *entry; 112 113 entry = io_opcode; 114 115 while (entry->opc != 0xFFFF) { 116 if (entry->opc == opc) 117 return (entry->str); 118 entry++; 119 } 120 return (entry->str); 121 } 122 123 124 static void 125 nvme_admin_qpair_print_command(struct nvme_qpair *qpair, 126 struct nvme_command *cmd) 127 { 128 129 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%x " 130 "cdw10:%08x cdw11:%08x\n", 131 get_admin_opcode_string(cmd->opc), cmd->opc, qpair->id, cmd->cid, 132 le32toh(cmd->nsid), le32toh(cmd->cdw10), le32toh(cmd->cdw11)); 133 } 134 135 static void 136 nvme_io_qpair_print_command(struct nvme_qpair *qpair, 137 struct nvme_command *cmd) 138 { 139 140 switch (cmd->opc) { 141 case NVME_OPC_WRITE: 142 case NVME_OPC_READ: 143 case NVME_OPC_WRITE_UNCORRECTABLE: 144 case NVME_OPC_COMPARE: 145 case NVME_OPC_WRITE_ZEROES: 146 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d " 147 "lba:%llu len:%d\n", 148 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid), 149 ((unsigned long long)le32toh(cmd->cdw11) << 32) + le32toh(cmd->cdw10), 150 (le32toh(cmd->cdw12) & 0xFFFF) + 1); 151 break; 152 case NVME_OPC_FLUSH: 153 case NVME_OPC_DATASET_MANAGEMENT: 154 case NVME_OPC_RESERVATION_REGISTER: 155 case NVME_OPC_RESERVATION_REPORT: 156 case NVME_OPC_RESERVATION_ACQUIRE: 157 case NVME_OPC_RESERVATION_RELEASE: 158 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d\n", 159 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid)); 160 break; 161 default: 162 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%d\n", 163 get_io_opcode_string(cmd->opc), cmd->opc, qpair->id, 164 cmd->cid, le32toh(cmd->nsid)); 165 break; 166 } 167 } 168 169 static void 170 nvme_qpair_print_command(struct nvme_qpair *qpair, struct nvme_command *cmd) 171 { 172 if (qpair->id == 0) 173 nvme_admin_qpair_print_command(qpair, cmd); 174 else 175 nvme_io_qpair_print_command(qpair, cmd); 176 } 177 178 struct nvme_status_string { 179 180 uint16_t sc; 181 const char * str; 182 }; 183 184 static struct nvme_status_string generic_status[] = { 185 { NVME_SC_SUCCESS, "SUCCESS" }, 186 { NVME_SC_INVALID_OPCODE, "INVALID OPCODE" }, 187 { NVME_SC_INVALID_FIELD, "INVALID_FIELD" }, 188 { NVME_SC_COMMAND_ID_CONFLICT, "COMMAND ID CONFLICT" }, 189 { NVME_SC_DATA_TRANSFER_ERROR, "DATA TRANSFER ERROR" }, 190 { NVME_SC_ABORTED_POWER_LOSS, "ABORTED - POWER LOSS" }, 191 { NVME_SC_INTERNAL_DEVICE_ERROR, "INTERNAL DEVICE ERROR" }, 192 { NVME_SC_ABORTED_BY_REQUEST, "ABORTED - BY REQUEST" }, 193 { NVME_SC_ABORTED_SQ_DELETION, "ABORTED - SQ DELETION" }, 194 { NVME_SC_ABORTED_FAILED_FUSED, "ABORTED - FAILED FUSED" }, 195 { NVME_SC_ABORTED_MISSING_FUSED, "ABORTED - MISSING FUSED" }, 196 { NVME_SC_INVALID_NAMESPACE_OR_FORMAT, "INVALID NAMESPACE OR FORMAT" }, 197 { NVME_SC_COMMAND_SEQUENCE_ERROR, "COMMAND SEQUENCE ERROR" }, 198 { NVME_SC_INVALID_SGL_SEGMENT_DESCR, "INVALID SGL SEGMENT DESCRIPTOR" }, 199 { NVME_SC_INVALID_NUMBER_OF_SGL_DESCR, "INVALID NUMBER OF SGL DESCRIPTORS" }, 200 { NVME_SC_DATA_SGL_LENGTH_INVALID, "DATA SGL LENGTH INVALID" }, 201 { NVME_SC_METADATA_SGL_LENGTH_INVALID, "METADATA SGL LENGTH INVALID" }, 202 { NVME_SC_SGL_DESCRIPTOR_TYPE_INVALID, "SGL DESCRIPTOR TYPE INVALID" }, 203 { NVME_SC_INVALID_USE_OF_CMB, "INVALID USE OF CONTROLLER MEMORY BUFFER" }, 204 { NVME_SC_PRP_OFFET_INVALID, "PRP OFFET INVALID" }, 205 { NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED, "ATOMIC WRITE UNIT EXCEEDED" }, 206 { NVME_SC_OPERATION_DENIED, "OPERATION DENIED" }, 207 { NVME_SC_SGL_OFFSET_INVALID, "SGL OFFSET INVALID" }, 208 { NVME_SC_HOST_ID_INCONSISTENT_FORMAT, "HOST IDENTIFIER INCONSISTENT FORMAT" }, 209 { NVME_SC_KEEP_ALIVE_TIMEOUT_EXPIRED, "KEEP ALIVE TIMEOUT EXPIRED" }, 210 { NVME_SC_KEEP_ALIVE_TIMEOUT_INVALID, "KEEP ALIVE TIMEOUT INVALID" }, 211 { NVME_SC_ABORTED_DUE_TO_PREEMPT, "COMMAND ABORTED DUE TO PREEMPT AND ABORT" }, 212 { NVME_SC_SANITIZE_FAILED, "SANITIZE FAILED" }, 213 { NVME_SC_SANITIZE_IN_PROGRESS, "SANITIZE IN PROGRESS" }, 214 { NVME_SC_SGL_DATA_BLOCK_GRAN_INVALID, "SGL_DATA_BLOCK_GRANULARITY_INVALID" }, 215 { NVME_SC_NOT_SUPPORTED_IN_CMB, "COMMAND NOT SUPPORTED FOR QUEUE IN CMB" }, 216 217 { NVME_SC_LBA_OUT_OF_RANGE, "LBA OUT OF RANGE" }, 218 { NVME_SC_CAPACITY_EXCEEDED, "CAPACITY EXCEEDED" }, 219 { NVME_SC_NAMESPACE_NOT_READY, "NAMESPACE NOT READY" }, 220 { NVME_SC_RESERVATION_CONFLICT, "RESERVATION CONFLICT" }, 221 { NVME_SC_FORMAT_IN_PROGRESS, "FORMAT IN PROGRESS" }, 222 { 0xFFFF, "GENERIC" } 223 }; 224 225 static struct nvme_status_string command_specific_status[] = { 226 { NVME_SC_COMPLETION_QUEUE_INVALID, "INVALID COMPLETION QUEUE" }, 227 { NVME_SC_INVALID_QUEUE_IDENTIFIER, "INVALID QUEUE IDENTIFIER" }, 228 { NVME_SC_MAXIMUM_QUEUE_SIZE_EXCEEDED, "MAX QUEUE SIZE EXCEEDED" }, 229 { NVME_SC_ABORT_COMMAND_LIMIT_EXCEEDED, "ABORT CMD LIMIT EXCEEDED" }, 230 { NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED, "ASYNC LIMIT EXCEEDED" }, 231 { NVME_SC_INVALID_FIRMWARE_SLOT, "INVALID FIRMWARE SLOT" }, 232 { NVME_SC_INVALID_FIRMWARE_IMAGE, "INVALID FIRMWARE IMAGE" }, 233 { NVME_SC_INVALID_INTERRUPT_VECTOR, "INVALID INTERRUPT VECTOR" }, 234 { NVME_SC_INVALID_LOG_PAGE, "INVALID LOG PAGE" }, 235 { NVME_SC_INVALID_FORMAT, "INVALID FORMAT" }, 236 { NVME_SC_FIRMWARE_REQUIRES_RESET, "FIRMWARE REQUIRES RESET" }, 237 { NVME_SC_INVALID_QUEUE_DELETION, "INVALID QUEUE DELETION" }, 238 { NVME_SC_FEATURE_NOT_SAVEABLE, "FEATURE IDENTIFIER NOT SAVEABLE" }, 239 { NVME_SC_FEATURE_NOT_CHANGEABLE, "FEATURE NOT CHANGEABLE" }, 240 { NVME_SC_FEATURE_NOT_NS_SPECIFIC, "FEATURE NOT NAMESPACE SPECIFIC" }, 241 { NVME_SC_FW_ACT_REQUIRES_NVMS_RESET, "FIRMWARE ACTIVATION REQUIRES NVM SUBSYSTEM RESET" }, 242 { NVME_SC_FW_ACT_REQUIRES_RESET, "FIRMWARE ACTIVATION REQUIRES RESET" }, 243 { NVME_SC_FW_ACT_REQUIRES_TIME, "FIRMWARE ACTIVATION REQUIRES MAXIMUM TIME VIOLATION" }, 244 { NVME_SC_FW_ACT_PROHIBITED, "FIRMWARE ACTIVATION PROHIBITED" }, 245 { NVME_SC_OVERLAPPING_RANGE, "OVERLAPPING RANGE" }, 246 { NVME_SC_NS_INSUFFICIENT_CAPACITY, "NAMESPACE INSUFFICIENT CAPACITY" }, 247 { NVME_SC_NS_ID_UNAVAILABLE, "NAMESPACE IDENTIFIER UNAVAILABLE" }, 248 { NVME_SC_NS_ALREADY_ATTACHED, "NAMESPACE ALREADY ATTACHED" }, 249 { NVME_SC_NS_IS_PRIVATE, "NAMESPACE IS PRIVATE" }, 250 { NVME_SC_NS_NOT_ATTACHED, "NS NOT ATTACHED" }, 251 { NVME_SC_THIN_PROV_NOT_SUPPORTED, "THIN PROVISIONING NOT SUPPORTED" }, 252 { NVME_SC_CTRLR_LIST_INVALID, "CONTROLLER LIST INVALID" }, 253 { NVME_SC_SELT_TEST_IN_PROGRESS, "DEVICE SELT-TEST IN PROGRESS" }, 254 { NVME_SC_BOOT_PART_WRITE_PROHIB, "BOOT PARTITION WRITE PROHIBITED" }, 255 { NVME_SC_INVALID_CTRLR_ID, "INVALID CONTROLLER IDENTIFIER" }, 256 { NVME_SC_INVALID_SEC_CTRLR_STATE, "INVALID SECONDARY CONTROLLER STATE" }, 257 { NVME_SC_INVALID_NUM_OF_CTRLR_RESRC, "INVALID NUMBER OF CONTROLLER RESOURCES" }, 258 { NVME_SC_INVALID_RESOURCE_ID, "INVALID RESOURCE IDENTIFIER" }, 259 260 { NVME_SC_CONFLICTING_ATTRIBUTES, "CONFLICTING ATTRIBUTES" }, 261 { NVME_SC_INVALID_PROTECTION_INFO, "INVALID PROTECTION INFO" }, 262 { NVME_SC_ATTEMPTED_WRITE_TO_RO_PAGE, "WRITE TO RO PAGE" }, 263 { 0xFFFF, "COMMAND SPECIFIC" } 264 }; 265 266 static struct nvme_status_string media_error_status[] = { 267 { NVME_SC_WRITE_FAULTS, "WRITE FAULTS" }, 268 { NVME_SC_UNRECOVERED_READ_ERROR, "UNRECOVERED READ ERROR" }, 269 { NVME_SC_GUARD_CHECK_ERROR, "GUARD CHECK ERROR" }, 270 { NVME_SC_APPLICATION_TAG_CHECK_ERROR, "APPLICATION TAG CHECK ERROR" }, 271 { NVME_SC_REFERENCE_TAG_CHECK_ERROR, "REFERENCE TAG CHECK ERROR" }, 272 { NVME_SC_COMPARE_FAILURE, "COMPARE FAILURE" }, 273 { NVME_SC_ACCESS_DENIED, "ACCESS DENIED" }, 274 { NVME_SC_DEALLOCATED_OR_UNWRITTEN, "DEALLOCATED OR UNWRITTEN LOGICAL BLOCK" }, 275 { 0xFFFF, "MEDIA ERROR" } 276 }; 277 278 static const char * 279 get_status_string(uint16_t sct, uint16_t sc) 280 { 281 struct nvme_status_string *entry; 282 283 switch (sct) { 284 case NVME_SCT_GENERIC: 285 entry = generic_status; 286 break; 287 case NVME_SCT_COMMAND_SPECIFIC: 288 entry = command_specific_status; 289 break; 290 case NVME_SCT_MEDIA_ERROR: 291 entry = media_error_status; 292 break; 293 case NVME_SCT_VENDOR_SPECIFIC: 294 return ("VENDOR SPECIFIC"); 295 default: 296 return ("RESERVED"); 297 } 298 299 while (entry->sc != 0xFFFF) { 300 if (entry->sc == sc) 301 return (entry->str); 302 entry++; 303 } 304 return (entry->str); 305 } 306 307 static void 308 nvme_qpair_print_completion(struct nvme_qpair *qpair, 309 struct nvme_completion *cpl) 310 { 311 uint16_t sct, sc; 312 313 sct = NVME_STATUS_GET_SCT(cpl->status); 314 sc = NVME_STATUS_GET_SC(cpl->status); 315 316 nvme_printf(qpair->ctrlr, "%s (%02x/%02x) sqid:%d cid:%d cdw0:%x\n", 317 get_status_string(sct, sc), sct, sc, cpl->sqid, cpl->cid, 318 cpl->cdw0); 319 } 320 321 static boolean_t 322 nvme_completion_is_retry(const struct nvme_completion *cpl) 323 { 324 uint8_t sct, sc, dnr; 325 326 sct = NVME_STATUS_GET_SCT(cpl->status); 327 sc = NVME_STATUS_GET_SC(cpl->status); 328 dnr = NVME_STATUS_GET_DNR(cpl->status); 329 330 /* 331 * TODO: spec is not clear how commands that are aborted due 332 * to TLER will be marked. So for now, it seems 333 * NAMESPACE_NOT_READY is the only case where we should 334 * look at the DNR bit. 335 */ 336 switch (sct) { 337 case NVME_SCT_GENERIC: 338 switch (sc) { 339 case NVME_SC_ABORTED_BY_REQUEST: 340 case NVME_SC_NAMESPACE_NOT_READY: 341 if (dnr) 342 return (0); 343 else 344 return (1); 345 case NVME_SC_INVALID_OPCODE: 346 case NVME_SC_INVALID_FIELD: 347 case NVME_SC_COMMAND_ID_CONFLICT: 348 case NVME_SC_DATA_TRANSFER_ERROR: 349 case NVME_SC_ABORTED_POWER_LOSS: 350 case NVME_SC_INTERNAL_DEVICE_ERROR: 351 case NVME_SC_ABORTED_SQ_DELETION: 352 case NVME_SC_ABORTED_FAILED_FUSED: 353 case NVME_SC_ABORTED_MISSING_FUSED: 354 case NVME_SC_INVALID_NAMESPACE_OR_FORMAT: 355 case NVME_SC_COMMAND_SEQUENCE_ERROR: 356 case NVME_SC_LBA_OUT_OF_RANGE: 357 case NVME_SC_CAPACITY_EXCEEDED: 358 default: 359 return (0); 360 } 361 case NVME_SCT_COMMAND_SPECIFIC: 362 case NVME_SCT_MEDIA_ERROR: 363 case NVME_SCT_VENDOR_SPECIFIC: 364 default: 365 return (0); 366 } 367 } 368 369 static void 370 nvme_qpair_complete_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr, 371 struct nvme_completion *cpl, boolean_t print_on_error) 372 { 373 struct nvme_request *req; 374 boolean_t retry, error; 375 376 req = tr->req; 377 error = nvme_completion_is_error(cpl); 378 retry = error && nvme_completion_is_retry(cpl) && 379 req->retries < nvme_retry_count; 380 381 if (error && print_on_error) { 382 nvme_qpair_print_command(qpair, &req->cmd); 383 nvme_qpair_print_completion(qpair, cpl); 384 } 385 386 qpair->act_tr[cpl->cid] = NULL; 387 388 KASSERT(cpl->cid == req->cmd.cid, ("cpl cid does not match cmd cid\n")); 389 390 if (req->cb_fn && !retry) 391 req->cb_fn(req->cb_arg, cpl); 392 393 mtx_lock(&qpair->lock); 394 callout_stop(&tr->timer); 395 396 if (retry) { 397 req->retries++; 398 nvme_qpair_submit_tracker(qpair, tr); 399 } else { 400 if (req->type != NVME_REQUEST_NULL) { 401 bus_dmamap_sync(qpair->dma_tag_payload, 402 tr->payload_dma_map, 403 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 404 bus_dmamap_unload(qpair->dma_tag_payload, 405 tr->payload_dma_map); 406 } 407 408 nvme_free_request(req); 409 tr->req = NULL; 410 411 TAILQ_REMOVE(&qpair->outstanding_tr, tr, tailq); 412 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 413 414 /* 415 * If the controller is in the middle of resetting, don't 416 * try to submit queued requests here - let the reset logic 417 * handle that instead. 418 */ 419 if (!STAILQ_EMPTY(&qpair->queued_req) && 420 !qpair->ctrlr->is_resetting) { 421 req = STAILQ_FIRST(&qpair->queued_req); 422 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 423 _nvme_qpair_submit_request(qpair, req); 424 } 425 } 426 427 mtx_unlock(&qpair->lock); 428 } 429 430 static void 431 nvme_qpair_manual_complete_tracker(struct nvme_qpair *qpair, 432 struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr, 433 boolean_t print_on_error) 434 { 435 struct nvme_completion cpl; 436 437 memset(&cpl, 0, sizeof(cpl)); 438 cpl.sqid = qpair->id; 439 cpl.cid = tr->cid; 440 cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT; 441 cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT; 442 cpl.status |= (dnr & NVME_STATUS_DNR_MASK) << NVME_STATUS_DNR_SHIFT; 443 nvme_qpair_complete_tracker(qpair, tr, &cpl, print_on_error); 444 } 445 446 void 447 nvme_qpair_manual_complete_request(struct nvme_qpair *qpair, 448 struct nvme_request *req, uint32_t sct, uint32_t sc, 449 boolean_t print_on_error) 450 { 451 struct nvme_completion cpl; 452 boolean_t error; 453 454 memset(&cpl, 0, sizeof(cpl)); 455 cpl.sqid = qpair->id; 456 cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT; 457 cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT; 458 459 error = nvme_completion_is_error(&cpl); 460 461 if (error && print_on_error) { 462 nvme_qpair_print_command(qpair, &req->cmd); 463 nvme_qpair_print_completion(qpair, &cpl); 464 } 465 466 if (req->cb_fn) 467 req->cb_fn(req->cb_arg, &cpl); 468 469 nvme_free_request(req); 470 } 471 472 bool 473 nvme_qpair_process_completions(struct nvme_qpair *qpair) 474 { 475 struct nvme_tracker *tr; 476 struct nvme_completion cpl; 477 int done = 0; 478 479 qpair->num_intr_handler_calls++; 480 481 if (!qpair->is_enabled) 482 /* 483 * qpair is not enabled, likely because a controller reset is 484 * is in progress. Ignore the interrupt - any I/O that was 485 * associated with this interrupt will get retried when the 486 * reset is complete. 487 */ 488 return (false); 489 490 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 491 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 492 while (1) { 493 cpl = qpair->cpl[qpair->cq_head]; 494 495 /* Convert to host endian */ 496 nvme_completion_swapbytes(&cpl); 497 498 if (NVME_STATUS_GET_P(cpl.status) != qpair->phase) 499 break; 500 501 tr = qpair->act_tr[cpl.cid]; 502 503 if (tr != NULL) { 504 nvme_qpair_complete_tracker(qpair, tr, &cpl, TRUE); 505 qpair->sq_head = cpl.sqhd; 506 done++; 507 } else { 508 nvme_printf(qpair->ctrlr, 509 "cpl does not map to outstanding cmd\n"); 510 /* nvme_dump_completion expects device endianess */ 511 nvme_dump_completion(&qpair->cpl[qpair->cq_head]); 512 KASSERT(0, ("received completion for unknown cmd\n")); 513 } 514 515 if (++qpair->cq_head == qpair->num_entries) { 516 qpair->cq_head = 0; 517 qpair->phase = !qpair->phase; 518 } 519 520 nvme_mmio_write_4(qpair->ctrlr, doorbell[qpair->id].cq_hdbl, 521 qpair->cq_head); 522 } 523 return (done != 0); 524 } 525 526 static void 527 nvme_qpair_msix_handler(void *arg) 528 { 529 struct nvme_qpair *qpair = arg; 530 531 nvme_qpair_process_completions(qpair); 532 } 533 534 int 535 nvme_qpair_construct(struct nvme_qpair *qpair, uint32_t id, 536 uint16_t vector, uint32_t num_entries, uint32_t num_trackers, 537 struct nvme_controller *ctrlr) 538 { 539 struct nvme_tracker *tr; 540 size_t cmdsz, cplsz, prpsz, allocsz, prpmemsz; 541 uint64_t queuemem_phys, prpmem_phys, list_phys; 542 uint8_t *queuemem, *prpmem, *prp_list; 543 int i, err; 544 545 qpair->id = id; 546 qpair->vector = vector; 547 qpair->num_entries = num_entries; 548 qpair->num_trackers = num_trackers; 549 qpair->ctrlr = ctrlr; 550 551 if (ctrlr->msix_enabled) { 552 553 /* 554 * MSI-X vector resource IDs start at 1, so we add one to 555 * the queue's vector to get the corresponding rid to use. 556 */ 557 qpair->rid = vector + 1; 558 559 qpair->res = bus_alloc_resource_any(ctrlr->dev, SYS_RES_IRQ, 560 &qpair->rid, RF_ACTIVE); 561 bus_setup_intr(ctrlr->dev, qpair->res, 562 INTR_TYPE_MISC | INTR_MPSAFE, NULL, 563 nvme_qpair_msix_handler, qpair, &qpair->tag); 564 if (id == 0) { 565 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 566 "admin"); 567 } else { 568 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 569 "io%d", id - 1); 570 } 571 } 572 573 mtx_init(&qpair->lock, "nvme qpair lock", NULL, MTX_DEF); 574 575 /* Note: NVMe PRP format is restricted to 4-byte alignment. */ 576 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 577 4, PAGE_SIZE, BUS_SPACE_MAXADDR, 578 BUS_SPACE_MAXADDR, NULL, NULL, NVME_MAX_XFER_SIZE, 579 (NVME_MAX_XFER_SIZE/PAGE_SIZE)+1, PAGE_SIZE, 0, 580 NULL, NULL, &qpair->dma_tag_payload); 581 if (err != 0) { 582 nvme_printf(ctrlr, "payload tag create failed %d\n", err); 583 goto out; 584 } 585 586 /* 587 * Each component must be page aligned, and individual PRP lists 588 * cannot cross a page boundary. 589 */ 590 cmdsz = qpair->num_entries * sizeof(struct nvme_command); 591 cmdsz = roundup2(cmdsz, PAGE_SIZE); 592 cplsz = qpair->num_entries * sizeof(struct nvme_completion); 593 cplsz = roundup2(cplsz, PAGE_SIZE); 594 prpsz = sizeof(uint64_t) * NVME_MAX_PRP_LIST_ENTRIES;; 595 prpmemsz = qpair->num_trackers * prpsz; 596 allocsz = cmdsz + cplsz + prpmemsz; 597 598 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 599 PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 600 allocsz, 1, allocsz, 0, NULL, NULL, &qpair->dma_tag); 601 if (err != 0) { 602 nvme_printf(ctrlr, "tag create failed %d\n", err); 603 goto out; 604 } 605 606 if (bus_dmamem_alloc(qpair->dma_tag, (void **)&queuemem, 607 BUS_DMA_NOWAIT, &qpair->queuemem_map)) { 608 nvme_printf(ctrlr, "failed to alloc qpair memory\n"); 609 goto out; 610 } 611 612 if (bus_dmamap_load(qpair->dma_tag, qpair->queuemem_map, 613 queuemem, allocsz, nvme_single_map, &queuemem_phys, 0) != 0) { 614 nvme_printf(ctrlr, "failed to load qpair memory\n"); 615 goto out; 616 } 617 618 qpair->num_cmds = 0; 619 qpair->num_intr_handler_calls = 0; 620 qpair->cmd = (struct nvme_command *)queuemem; 621 qpair->cpl = (struct nvme_completion *)(queuemem + cmdsz); 622 prpmem = (uint8_t *)(queuemem + cmdsz + cplsz); 623 qpair->cmd_bus_addr = queuemem_phys; 624 qpair->cpl_bus_addr = queuemem_phys + cmdsz; 625 prpmem_phys = queuemem_phys + cmdsz + cplsz; 626 627 qpair->sq_tdbl_off = nvme_mmio_offsetof(doorbell[id].sq_tdbl); 628 qpair->cq_hdbl_off = nvme_mmio_offsetof(doorbell[id].cq_hdbl); 629 630 TAILQ_INIT(&qpair->free_tr); 631 TAILQ_INIT(&qpair->outstanding_tr); 632 STAILQ_INIT(&qpair->queued_req); 633 634 list_phys = prpmem_phys; 635 prp_list = prpmem; 636 for (i = 0; i < qpair->num_trackers; i++) { 637 638 if (list_phys + prpsz > prpmem_phys + prpmemsz) { 639 qpair->num_trackers = i; 640 break; 641 } 642 643 /* 644 * Make sure that the PRP list for this tracker doesn't 645 * overflow to another page. 646 */ 647 if (trunc_page(list_phys) != 648 trunc_page(list_phys + prpsz - 1)) { 649 list_phys = roundup2(list_phys, PAGE_SIZE); 650 prp_list = 651 (uint8_t *)roundup2((uintptr_t)prp_list, PAGE_SIZE); 652 } 653 654 tr = malloc(sizeof(*tr), M_NVME, M_ZERO | M_WAITOK); 655 bus_dmamap_create(qpair->dma_tag_payload, 0, 656 &tr->payload_dma_map); 657 callout_init(&tr->timer, 1); 658 tr->cid = i; 659 tr->qpair = qpair; 660 tr->prp = (uint64_t *)prp_list; 661 tr->prp_bus_addr = list_phys; 662 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 663 list_phys += prpsz; 664 prp_list += prpsz; 665 } 666 667 if (qpair->num_trackers == 0) { 668 nvme_printf(ctrlr, "failed to allocate enough trackers\n"); 669 goto out; 670 } 671 672 qpair->act_tr = malloc(sizeof(struct nvme_tracker *) * 673 qpair->num_entries, M_NVME, M_ZERO | M_WAITOK); 674 return (0); 675 676 out: 677 nvme_qpair_destroy(qpair); 678 return (ENOMEM); 679 } 680 681 static void 682 nvme_qpair_destroy(struct nvme_qpair *qpair) 683 { 684 struct nvme_tracker *tr; 685 686 if (qpair->tag) 687 bus_teardown_intr(qpair->ctrlr->dev, qpair->res, qpair->tag); 688 689 if (mtx_initialized(&qpair->lock)) 690 mtx_destroy(&qpair->lock); 691 692 if (qpair->res) 693 bus_release_resource(qpair->ctrlr->dev, SYS_RES_IRQ, 694 rman_get_rid(qpair->res), qpair->res); 695 696 if (qpair->cmd != NULL) { 697 bus_dmamap_unload(qpair->dma_tag, qpair->queuemem_map); 698 bus_dmamem_free(qpair->dma_tag, qpair->cmd, 699 qpair->queuemem_map); 700 } 701 702 if (qpair->act_tr) 703 free(qpair->act_tr, M_NVME); 704 705 while (!TAILQ_EMPTY(&qpair->free_tr)) { 706 tr = TAILQ_FIRST(&qpair->free_tr); 707 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 708 bus_dmamap_destroy(qpair->dma_tag_payload, 709 tr->payload_dma_map); 710 free(tr, M_NVME); 711 } 712 713 if (qpair->dma_tag) 714 bus_dma_tag_destroy(qpair->dma_tag); 715 716 if (qpair->dma_tag_payload) 717 bus_dma_tag_destroy(qpair->dma_tag_payload); 718 } 719 720 static void 721 nvme_admin_qpair_abort_aers(struct nvme_qpair *qpair) 722 { 723 struct nvme_tracker *tr; 724 725 tr = TAILQ_FIRST(&qpair->outstanding_tr); 726 while (tr != NULL) { 727 if (tr->req->cmd.opc == NVME_OPC_ASYNC_EVENT_REQUEST) { 728 nvme_qpair_manual_complete_tracker(qpair, tr, 729 NVME_SCT_GENERIC, NVME_SC_ABORTED_SQ_DELETION, 0, 730 FALSE); 731 tr = TAILQ_FIRST(&qpair->outstanding_tr); 732 } else { 733 tr = TAILQ_NEXT(tr, tailq); 734 } 735 } 736 } 737 738 void 739 nvme_admin_qpair_destroy(struct nvme_qpair *qpair) 740 { 741 742 nvme_admin_qpair_abort_aers(qpair); 743 nvme_qpair_destroy(qpair); 744 } 745 746 void 747 nvme_io_qpair_destroy(struct nvme_qpair *qpair) 748 { 749 750 nvme_qpair_destroy(qpair); 751 } 752 753 static void 754 nvme_abort_complete(void *arg, const struct nvme_completion *status) 755 { 756 struct nvme_tracker *tr = arg; 757 758 /* 759 * If cdw0 == 1, the controller was not able to abort the command 760 * we requested. We still need to check the active tracker array, 761 * to cover race where I/O timed out at same time controller was 762 * completing the I/O. 763 */ 764 if (status->cdw0 == 1 && tr->qpair->act_tr[tr->cid] != NULL) { 765 /* 766 * An I/O has timed out, and the controller was unable to 767 * abort it for some reason. Construct a fake completion 768 * status, and then complete the I/O's tracker manually. 769 */ 770 nvme_printf(tr->qpair->ctrlr, 771 "abort command failed, aborting command manually\n"); 772 nvme_qpair_manual_complete_tracker(tr->qpair, tr, 773 NVME_SCT_GENERIC, NVME_SC_ABORTED_BY_REQUEST, 0, TRUE); 774 } 775 } 776 777 static void 778 nvme_timeout(void *arg) 779 { 780 struct nvme_tracker *tr = arg; 781 struct nvme_qpair *qpair = tr->qpair; 782 struct nvme_controller *ctrlr = qpair->ctrlr; 783 uint32_t csts; 784 uint8_t cfs; 785 786 /* 787 * Read csts to get value of cfs - controller fatal status. 788 * If no fatal status, try to call the completion routine, and 789 * if completes transactions, report a missed interrupt and 790 * return (this may need to be rate limited). Otherwise, if 791 * aborts are enabled and the controller is not reporting 792 * fatal status, abort the command. Otherwise, just reset the 793 * controller and hope for the best. 794 */ 795 csts = nvme_mmio_read_4(ctrlr, csts); 796 cfs = (csts >> NVME_CSTS_REG_CFS_SHIFT) & NVME_CSTS_REG_CFS_MASK; 797 if (cfs == 0 && nvme_qpair_process_completions(qpair)) { 798 nvme_printf(ctrlr, "Missing interrupt\n"); 799 return; 800 } 801 if (ctrlr->enable_aborts && cfs == 0) { 802 nvme_printf(ctrlr, "Aborting command due to a timeout.\n"); 803 nvme_ctrlr_cmd_abort(ctrlr, tr->cid, qpair->id, 804 nvme_abort_complete, tr); 805 } else { 806 nvme_printf(ctrlr, "Resetting controller due to a timeout%s.\n", 807 cfs ? " and fatal error status" : ""); 808 nvme_ctrlr_reset(ctrlr); 809 } 810 } 811 812 void 813 nvme_qpair_submit_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr) 814 { 815 struct nvme_request *req; 816 struct nvme_controller *ctrlr; 817 818 mtx_assert(&qpair->lock, MA_OWNED); 819 820 req = tr->req; 821 req->cmd.cid = tr->cid; 822 qpair->act_tr[tr->cid] = tr; 823 ctrlr = qpair->ctrlr; 824 825 if (req->timeout) 826 #if __FreeBSD_version >= 800030 827 callout_reset_curcpu(&tr->timer, ctrlr->timeout_period * hz, 828 nvme_timeout, tr); 829 #else 830 callout_reset(&tr->timer, ctrlr->timeout_period * hz, 831 nvme_timeout, tr); 832 #endif 833 834 /* Copy the command from the tracker to the submission queue. */ 835 memcpy(&qpair->cmd[qpair->sq_tail], &req->cmd, sizeof(req->cmd)); 836 837 if (++qpair->sq_tail == qpair->num_entries) 838 qpair->sq_tail = 0; 839 840 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 841 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 842 #ifndef __powerpc__ 843 /* 844 * powerpc's bus_dmamap_sync() already includes a heavyweight sync, but 845 * no other archs do. 846 */ 847 wmb(); 848 #endif 849 850 nvme_mmio_write_4(qpair->ctrlr, doorbell[qpair->id].sq_tdbl, 851 qpair->sq_tail); 852 853 qpair->num_cmds++; 854 } 855 856 static void 857 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error) 858 { 859 struct nvme_tracker *tr = arg; 860 uint32_t cur_nseg; 861 862 /* 863 * If the mapping operation failed, return immediately. The caller 864 * is responsible for detecting the error status and failing the 865 * tracker manually. 866 */ 867 if (error != 0) { 868 nvme_printf(tr->qpair->ctrlr, 869 "nvme_payload_map err %d\n", error); 870 return; 871 } 872 873 /* 874 * Note that we specified PAGE_SIZE for alignment and max 875 * segment size when creating the bus dma tags. So here 876 * we can safely just transfer each segment to its 877 * associated PRP entry. 878 */ 879 tr->req->cmd.prp1 = htole64(seg[0].ds_addr); 880 881 if (nseg == 2) { 882 tr->req->cmd.prp2 = htole64(seg[1].ds_addr); 883 } else if (nseg > 2) { 884 cur_nseg = 1; 885 tr->req->cmd.prp2 = htole64((uint64_t)tr->prp_bus_addr); 886 while (cur_nseg < nseg) { 887 tr->prp[cur_nseg-1] = 888 htole64((uint64_t)seg[cur_nseg].ds_addr); 889 cur_nseg++; 890 } 891 } else { 892 /* 893 * prp2 should not be used by the controller 894 * since there is only one segment, but set 895 * to 0 just to be safe. 896 */ 897 tr->req->cmd.prp2 = 0; 898 } 899 900 bus_dmamap_sync(tr->qpair->dma_tag_payload, tr->payload_dma_map, 901 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 902 nvme_qpair_submit_tracker(tr->qpair, tr); 903 } 904 905 static void 906 _nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 907 { 908 struct nvme_tracker *tr; 909 int err = 0; 910 911 mtx_assert(&qpair->lock, MA_OWNED); 912 913 tr = TAILQ_FIRST(&qpair->free_tr); 914 req->qpair = qpair; 915 916 if (tr == NULL || !qpair->is_enabled) { 917 /* 918 * No tracker is available, or the qpair is disabled due to 919 * an in-progress controller-level reset or controller 920 * failure. 921 */ 922 923 if (qpair->ctrlr->is_failed) { 924 /* 925 * The controller has failed. Post the request to a 926 * task where it will be aborted, so that we do not 927 * invoke the request's callback in the context 928 * of the submission. 929 */ 930 nvme_ctrlr_post_failed_request(qpair->ctrlr, req); 931 } else { 932 /* 933 * Put the request on the qpair's request queue to be 934 * processed when a tracker frees up via a command 935 * completion or when the controller reset is 936 * completed. 937 */ 938 STAILQ_INSERT_TAIL(&qpair->queued_req, req, stailq); 939 } 940 return; 941 } 942 943 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 944 TAILQ_INSERT_TAIL(&qpair->outstanding_tr, tr, tailq); 945 tr->req = req; 946 947 switch (req->type) { 948 case NVME_REQUEST_VADDR: 949 KASSERT(req->payload_size <= qpair->ctrlr->max_xfer_size, 950 ("payload_size (%d) exceeds max_xfer_size (%d)\n", 951 req->payload_size, qpair->ctrlr->max_xfer_size)); 952 err = bus_dmamap_load(tr->qpair->dma_tag_payload, 953 tr->payload_dma_map, req->u.payload, req->payload_size, 954 nvme_payload_map, tr, 0); 955 if (err != 0) 956 nvme_printf(qpair->ctrlr, 957 "bus_dmamap_load returned 0x%x!\n", err); 958 break; 959 case NVME_REQUEST_NULL: 960 nvme_qpair_submit_tracker(tr->qpair, tr); 961 break; 962 #ifdef NVME_UNMAPPED_BIO_SUPPORT 963 case NVME_REQUEST_BIO: 964 KASSERT(req->u.bio->bio_bcount <= qpair->ctrlr->max_xfer_size, 965 ("bio->bio_bcount (%jd) exceeds max_xfer_size (%d)\n", 966 (intmax_t)req->u.bio->bio_bcount, 967 qpair->ctrlr->max_xfer_size)); 968 err = bus_dmamap_load_bio(tr->qpair->dma_tag_payload, 969 tr->payload_dma_map, req->u.bio, nvme_payload_map, tr, 0); 970 if (err != 0) 971 nvme_printf(qpair->ctrlr, 972 "bus_dmamap_load_bio returned 0x%x!\n", err); 973 break; 974 #endif 975 case NVME_REQUEST_CCB: 976 err = bus_dmamap_load_ccb(tr->qpair->dma_tag_payload, 977 tr->payload_dma_map, req->u.payload, 978 nvme_payload_map, tr, 0); 979 if (err != 0) 980 nvme_printf(qpair->ctrlr, 981 "bus_dmamap_load_ccb returned 0x%x!\n", err); 982 break; 983 default: 984 panic("unknown nvme request type 0x%x\n", req->type); 985 break; 986 } 987 988 if (err != 0) { 989 /* 990 * The dmamap operation failed, so we manually fail the 991 * tracker here with DATA_TRANSFER_ERROR status. 992 * 993 * nvme_qpair_manual_complete_tracker must not be called 994 * with the qpair lock held. 995 */ 996 mtx_unlock(&qpair->lock); 997 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 998 NVME_SC_DATA_TRANSFER_ERROR, 1 /* do not retry */, TRUE); 999 mtx_lock(&qpair->lock); 1000 } 1001 } 1002 1003 void 1004 nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 1005 { 1006 1007 mtx_lock(&qpair->lock); 1008 _nvme_qpair_submit_request(qpair, req); 1009 mtx_unlock(&qpair->lock); 1010 } 1011 1012 static void 1013 nvme_qpair_enable(struct nvme_qpair *qpair) 1014 { 1015 1016 qpair->is_enabled = TRUE; 1017 } 1018 1019 void 1020 nvme_qpair_reset(struct nvme_qpair *qpair) 1021 { 1022 1023 qpair->sq_head = qpair->sq_tail = qpair->cq_head = 0; 1024 1025 /* 1026 * First time through the completion queue, HW will set phase 1027 * bit on completions to 1. So set this to 1 here, indicating 1028 * we're looking for a 1 to know which entries have completed. 1029 * we'll toggle the bit each time when the completion queue 1030 * rolls over. 1031 */ 1032 qpair->phase = 1; 1033 1034 memset(qpair->cmd, 0, 1035 qpair->num_entries * sizeof(struct nvme_command)); 1036 memset(qpair->cpl, 0, 1037 qpair->num_entries * sizeof(struct nvme_completion)); 1038 } 1039 1040 void 1041 nvme_admin_qpair_enable(struct nvme_qpair *qpair) 1042 { 1043 struct nvme_tracker *tr; 1044 struct nvme_tracker *tr_temp; 1045 1046 /* 1047 * Manually abort each outstanding admin command. Do not retry 1048 * admin commands found here, since they will be left over from 1049 * a controller reset and its likely the context in which the 1050 * command was issued no longer applies. 1051 */ 1052 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1053 nvme_printf(qpair->ctrlr, 1054 "aborting outstanding admin command\n"); 1055 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1056 NVME_SC_ABORTED_BY_REQUEST, 1 /* do not retry */, TRUE); 1057 } 1058 1059 nvme_qpair_enable(qpair); 1060 } 1061 1062 void 1063 nvme_io_qpair_enable(struct nvme_qpair *qpair) 1064 { 1065 STAILQ_HEAD(, nvme_request) temp; 1066 struct nvme_tracker *tr; 1067 struct nvme_tracker *tr_temp; 1068 struct nvme_request *req; 1069 1070 /* 1071 * Manually abort each outstanding I/O. This normally results in a 1072 * retry, unless the retry count on the associated request has 1073 * reached its limit. 1074 */ 1075 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1076 nvme_printf(qpair->ctrlr, "aborting outstanding i/o\n"); 1077 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1078 NVME_SC_ABORTED_BY_REQUEST, 0, TRUE); 1079 } 1080 1081 mtx_lock(&qpair->lock); 1082 1083 nvme_qpair_enable(qpair); 1084 1085 STAILQ_INIT(&temp); 1086 STAILQ_SWAP(&qpair->queued_req, &temp, nvme_request); 1087 1088 while (!STAILQ_EMPTY(&temp)) { 1089 req = STAILQ_FIRST(&temp); 1090 STAILQ_REMOVE_HEAD(&temp, stailq); 1091 nvme_printf(qpair->ctrlr, "resubmitting queued i/o\n"); 1092 nvme_qpair_print_command(qpair, &req->cmd); 1093 _nvme_qpair_submit_request(qpair, req); 1094 } 1095 1096 mtx_unlock(&qpair->lock); 1097 } 1098 1099 static void 1100 nvme_qpair_disable(struct nvme_qpair *qpair) 1101 { 1102 struct nvme_tracker *tr; 1103 1104 qpair->is_enabled = FALSE; 1105 mtx_lock(&qpair->lock); 1106 TAILQ_FOREACH(tr, &qpair->outstanding_tr, tailq) 1107 callout_stop(&tr->timer); 1108 mtx_unlock(&qpair->lock); 1109 } 1110 1111 void 1112 nvme_admin_qpair_disable(struct nvme_qpair *qpair) 1113 { 1114 1115 nvme_qpair_disable(qpair); 1116 nvme_admin_qpair_abort_aers(qpair); 1117 } 1118 1119 void 1120 nvme_io_qpair_disable(struct nvme_qpair *qpair) 1121 { 1122 1123 nvme_qpair_disable(qpair); 1124 } 1125 1126 void 1127 nvme_qpair_fail(struct nvme_qpair *qpair) 1128 { 1129 struct nvme_tracker *tr; 1130 struct nvme_request *req; 1131 1132 if (!mtx_initialized(&qpair->lock)) 1133 return; 1134 1135 mtx_lock(&qpair->lock); 1136 1137 while (!STAILQ_EMPTY(&qpair->queued_req)) { 1138 req = STAILQ_FIRST(&qpair->queued_req); 1139 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 1140 nvme_printf(qpair->ctrlr, "failing queued i/o\n"); 1141 mtx_unlock(&qpair->lock); 1142 nvme_qpair_manual_complete_request(qpair, req, NVME_SCT_GENERIC, 1143 NVME_SC_ABORTED_BY_REQUEST, TRUE); 1144 mtx_lock(&qpair->lock); 1145 } 1146 1147 /* Manually abort each outstanding I/O. */ 1148 while (!TAILQ_EMPTY(&qpair->outstanding_tr)) { 1149 tr = TAILQ_FIRST(&qpair->outstanding_tr); 1150 /* 1151 * Do not remove the tracker. The abort_tracker path will 1152 * do that for us. 1153 */ 1154 nvme_printf(qpair->ctrlr, "failing outstanding i/o\n"); 1155 mtx_unlock(&qpair->lock); 1156 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1157 NVME_SC_ABORTED_BY_REQUEST, 1 /* do not retry */, TRUE); 1158 mtx_lock(&qpair->lock); 1159 } 1160 1161 mtx_unlock(&qpair->lock); 1162 } 1163 1164