1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012-2014 Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 35 #include <dev/pci/pcivar.h> 36 37 #include "nvme_private.h" 38 39 typedef enum error_print { ERROR_PRINT_NONE, ERROR_PRINT_NO_RETRY, ERROR_PRINT_ALL } error_print_t; 40 #define DO_NOT_RETRY 1 41 42 static void _nvme_qpair_submit_request(struct nvme_qpair *qpair, 43 struct nvme_request *req); 44 static void nvme_qpair_destroy(struct nvme_qpair *qpair); 45 46 struct nvme_opcode_string { 47 48 uint16_t opc; 49 const char * str; 50 }; 51 52 static struct nvme_opcode_string admin_opcode[] = { 53 { NVME_OPC_DELETE_IO_SQ, "DELETE IO SQ" }, 54 { NVME_OPC_CREATE_IO_SQ, "CREATE IO SQ" }, 55 { NVME_OPC_GET_LOG_PAGE, "GET LOG PAGE" }, 56 { NVME_OPC_DELETE_IO_CQ, "DELETE IO CQ" }, 57 { NVME_OPC_CREATE_IO_CQ, "CREATE IO CQ" }, 58 { NVME_OPC_IDENTIFY, "IDENTIFY" }, 59 { NVME_OPC_ABORT, "ABORT" }, 60 { NVME_OPC_SET_FEATURES, "SET FEATURES" }, 61 { NVME_OPC_GET_FEATURES, "GET FEATURES" }, 62 { NVME_OPC_ASYNC_EVENT_REQUEST, "ASYNC EVENT REQUEST" }, 63 { NVME_OPC_FIRMWARE_ACTIVATE, "FIRMWARE ACTIVATE" }, 64 { NVME_OPC_FIRMWARE_IMAGE_DOWNLOAD, "FIRMWARE IMAGE DOWNLOAD" }, 65 { NVME_OPC_DEVICE_SELF_TEST, "DEVICE SELF-TEST" }, 66 { NVME_OPC_NAMESPACE_ATTACHMENT, "NAMESPACE ATTACHMENT" }, 67 { NVME_OPC_KEEP_ALIVE, "KEEP ALIVE" }, 68 { NVME_OPC_DIRECTIVE_SEND, "DIRECTIVE SEND" }, 69 { NVME_OPC_DIRECTIVE_RECEIVE, "DIRECTIVE RECEIVE" }, 70 { NVME_OPC_VIRTUALIZATION_MANAGEMENT, "VIRTUALIZATION MANAGEMENT" }, 71 { NVME_OPC_NVME_MI_SEND, "NVME-MI SEND" }, 72 { NVME_OPC_NVME_MI_RECEIVE, "NVME-MI RECEIVE" }, 73 { NVME_OPC_DOORBELL_BUFFER_CONFIG, "DOORBELL BUFFER CONFIG" }, 74 { NVME_OPC_FORMAT_NVM, "FORMAT NVM" }, 75 { NVME_OPC_SECURITY_SEND, "SECURITY SEND" }, 76 { NVME_OPC_SECURITY_RECEIVE, "SECURITY RECEIVE" }, 77 { NVME_OPC_SANITIZE, "SANITIZE" }, 78 { 0xFFFF, "ADMIN COMMAND" } 79 }; 80 81 static struct nvme_opcode_string io_opcode[] = { 82 { NVME_OPC_FLUSH, "FLUSH" }, 83 { NVME_OPC_WRITE, "WRITE" }, 84 { NVME_OPC_READ, "READ" }, 85 { NVME_OPC_WRITE_UNCORRECTABLE, "WRITE UNCORRECTABLE" }, 86 { NVME_OPC_COMPARE, "COMPARE" }, 87 { NVME_OPC_WRITE_ZEROES, "WRITE ZEROES" }, 88 { NVME_OPC_DATASET_MANAGEMENT, "DATASET MANAGEMENT" }, 89 { NVME_OPC_RESERVATION_REGISTER, "RESERVATION REGISTER" }, 90 { NVME_OPC_RESERVATION_REPORT, "RESERVATION REPORT" }, 91 { NVME_OPC_RESERVATION_ACQUIRE, "RESERVATION ACQUIRE" }, 92 { NVME_OPC_RESERVATION_RELEASE, "RESERVATION RELEASE" }, 93 { 0xFFFF, "IO COMMAND" } 94 }; 95 96 static const char * 97 get_admin_opcode_string(uint16_t opc) 98 { 99 struct nvme_opcode_string *entry; 100 101 entry = admin_opcode; 102 103 while (entry->opc != 0xFFFF) { 104 if (entry->opc == opc) 105 return (entry->str); 106 entry++; 107 } 108 return (entry->str); 109 } 110 111 static const char * 112 get_io_opcode_string(uint16_t opc) 113 { 114 struct nvme_opcode_string *entry; 115 116 entry = io_opcode; 117 118 while (entry->opc != 0xFFFF) { 119 if (entry->opc == opc) 120 return (entry->str); 121 entry++; 122 } 123 return (entry->str); 124 } 125 126 127 static void 128 nvme_admin_qpair_print_command(struct nvme_qpair *qpair, 129 struct nvme_command *cmd) 130 { 131 132 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%x " 133 "cdw10:%08x cdw11:%08x\n", 134 get_admin_opcode_string(cmd->opc), cmd->opc, qpair->id, cmd->cid, 135 le32toh(cmd->nsid), le32toh(cmd->cdw10), le32toh(cmd->cdw11)); 136 } 137 138 static void 139 nvme_io_qpair_print_command(struct nvme_qpair *qpair, 140 struct nvme_command *cmd) 141 { 142 143 switch (cmd->opc) { 144 case NVME_OPC_WRITE: 145 case NVME_OPC_READ: 146 case NVME_OPC_WRITE_UNCORRECTABLE: 147 case NVME_OPC_COMPARE: 148 case NVME_OPC_WRITE_ZEROES: 149 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d " 150 "lba:%llu len:%d\n", 151 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid), 152 ((unsigned long long)le32toh(cmd->cdw11) << 32) + le32toh(cmd->cdw10), 153 (le32toh(cmd->cdw12) & 0xFFFF) + 1); 154 break; 155 case NVME_OPC_FLUSH: 156 case NVME_OPC_DATASET_MANAGEMENT: 157 case NVME_OPC_RESERVATION_REGISTER: 158 case NVME_OPC_RESERVATION_REPORT: 159 case NVME_OPC_RESERVATION_ACQUIRE: 160 case NVME_OPC_RESERVATION_RELEASE: 161 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d\n", 162 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid)); 163 break; 164 default: 165 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%d\n", 166 get_io_opcode_string(cmd->opc), cmd->opc, qpair->id, 167 cmd->cid, le32toh(cmd->nsid)); 168 break; 169 } 170 } 171 172 static void 173 nvme_qpair_print_command(struct nvme_qpair *qpair, struct nvme_command *cmd) 174 { 175 if (qpair->id == 0) 176 nvme_admin_qpair_print_command(qpair, cmd); 177 else 178 nvme_io_qpair_print_command(qpair, cmd); 179 } 180 181 struct nvme_status_string { 182 183 uint16_t sc; 184 const char * str; 185 }; 186 187 static struct nvme_status_string generic_status[] = { 188 { NVME_SC_SUCCESS, "SUCCESS" }, 189 { NVME_SC_INVALID_OPCODE, "INVALID OPCODE" }, 190 { NVME_SC_INVALID_FIELD, "INVALID_FIELD" }, 191 { NVME_SC_COMMAND_ID_CONFLICT, "COMMAND ID CONFLICT" }, 192 { NVME_SC_DATA_TRANSFER_ERROR, "DATA TRANSFER ERROR" }, 193 { NVME_SC_ABORTED_POWER_LOSS, "ABORTED - POWER LOSS" }, 194 { NVME_SC_INTERNAL_DEVICE_ERROR, "INTERNAL DEVICE ERROR" }, 195 { NVME_SC_ABORTED_BY_REQUEST, "ABORTED - BY REQUEST" }, 196 { NVME_SC_ABORTED_SQ_DELETION, "ABORTED - SQ DELETION" }, 197 { NVME_SC_ABORTED_FAILED_FUSED, "ABORTED - FAILED FUSED" }, 198 { NVME_SC_ABORTED_MISSING_FUSED, "ABORTED - MISSING FUSED" }, 199 { NVME_SC_INVALID_NAMESPACE_OR_FORMAT, "INVALID NAMESPACE OR FORMAT" }, 200 { NVME_SC_COMMAND_SEQUENCE_ERROR, "COMMAND SEQUENCE ERROR" }, 201 { NVME_SC_INVALID_SGL_SEGMENT_DESCR, "INVALID SGL SEGMENT DESCRIPTOR" }, 202 { NVME_SC_INVALID_NUMBER_OF_SGL_DESCR, "INVALID NUMBER OF SGL DESCRIPTORS" }, 203 { NVME_SC_DATA_SGL_LENGTH_INVALID, "DATA SGL LENGTH INVALID" }, 204 { NVME_SC_METADATA_SGL_LENGTH_INVALID, "METADATA SGL LENGTH INVALID" }, 205 { NVME_SC_SGL_DESCRIPTOR_TYPE_INVALID, "SGL DESCRIPTOR TYPE INVALID" }, 206 { NVME_SC_INVALID_USE_OF_CMB, "INVALID USE OF CONTROLLER MEMORY BUFFER" }, 207 { NVME_SC_PRP_OFFET_INVALID, "PRP OFFET INVALID" }, 208 { NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED, "ATOMIC WRITE UNIT EXCEEDED" }, 209 { NVME_SC_OPERATION_DENIED, "OPERATION DENIED" }, 210 { NVME_SC_SGL_OFFSET_INVALID, "SGL OFFSET INVALID" }, 211 { NVME_SC_HOST_ID_INCONSISTENT_FORMAT, "HOST IDENTIFIER INCONSISTENT FORMAT" }, 212 { NVME_SC_KEEP_ALIVE_TIMEOUT_EXPIRED, "KEEP ALIVE TIMEOUT EXPIRED" }, 213 { NVME_SC_KEEP_ALIVE_TIMEOUT_INVALID, "KEEP ALIVE TIMEOUT INVALID" }, 214 { NVME_SC_ABORTED_DUE_TO_PREEMPT, "COMMAND ABORTED DUE TO PREEMPT AND ABORT" }, 215 { NVME_SC_SANITIZE_FAILED, "SANITIZE FAILED" }, 216 { NVME_SC_SANITIZE_IN_PROGRESS, "SANITIZE IN PROGRESS" }, 217 { NVME_SC_SGL_DATA_BLOCK_GRAN_INVALID, "SGL_DATA_BLOCK_GRANULARITY_INVALID" }, 218 { NVME_SC_NOT_SUPPORTED_IN_CMB, "COMMAND NOT SUPPORTED FOR QUEUE IN CMB" }, 219 220 { NVME_SC_LBA_OUT_OF_RANGE, "LBA OUT OF RANGE" }, 221 { NVME_SC_CAPACITY_EXCEEDED, "CAPACITY EXCEEDED" }, 222 { NVME_SC_NAMESPACE_NOT_READY, "NAMESPACE NOT READY" }, 223 { NVME_SC_RESERVATION_CONFLICT, "RESERVATION CONFLICT" }, 224 { NVME_SC_FORMAT_IN_PROGRESS, "FORMAT IN PROGRESS" }, 225 { 0xFFFF, "GENERIC" } 226 }; 227 228 static struct nvme_status_string command_specific_status[] = { 229 { NVME_SC_COMPLETION_QUEUE_INVALID, "INVALID COMPLETION QUEUE" }, 230 { NVME_SC_INVALID_QUEUE_IDENTIFIER, "INVALID QUEUE IDENTIFIER" }, 231 { NVME_SC_MAXIMUM_QUEUE_SIZE_EXCEEDED, "MAX QUEUE SIZE EXCEEDED" }, 232 { NVME_SC_ABORT_COMMAND_LIMIT_EXCEEDED, "ABORT CMD LIMIT EXCEEDED" }, 233 { NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED, "ASYNC LIMIT EXCEEDED" }, 234 { NVME_SC_INVALID_FIRMWARE_SLOT, "INVALID FIRMWARE SLOT" }, 235 { NVME_SC_INVALID_FIRMWARE_IMAGE, "INVALID FIRMWARE IMAGE" }, 236 { NVME_SC_INVALID_INTERRUPT_VECTOR, "INVALID INTERRUPT VECTOR" }, 237 { NVME_SC_INVALID_LOG_PAGE, "INVALID LOG PAGE" }, 238 { NVME_SC_INVALID_FORMAT, "INVALID FORMAT" }, 239 { NVME_SC_FIRMWARE_REQUIRES_RESET, "FIRMWARE REQUIRES RESET" }, 240 { NVME_SC_INVALID_QUEUE_DELETION, "INVALID QUEUE DELETION" }, 241 { NVME_SC_FEATURE_NOT_SAVEABLE, "FEATURE IDENTIFIER NOT SAVEABLE" }, 242 { NVME_SC_FEATURE_NOT_CHANGEABLE, "FEATURE NOT CHANGEABLE" }, 243 { NVME_SC_FEATURE_NOT_NS_SPECIFIC, "FEATURE NOT NAMESPACE SPECIFIC" }, 244 { NVME_SC_FW_ACT_REQUIRES_NVMS_RESET, "FIRMWARE ACTIVATION REQUIRES NVM SUBSYSTEM RESET" }, 245 { NVME_SC_FW_ACT_REQUIRES_RESET, "FIRMWARE ACTIVATION REQUIRES RESET" }, 246 { NVME_SC_FW_ACT_REQUIRES_TIME, "FIRMWARE ACTIVATION REQUIRES MAXIMUM TIME VIOLATION" }, 247 { NVME_SC_FW_ACT_PROHIBITED, "FIRMWARE ACTIVATION PROHIBITED" }, 248 { NVME_SC_OVERLAPPING_RANGE, "OVERLAPPING RANGE" }, 249 { NVME_SC_NS_INSUFFICIENT_CAPACITY, "NAMESPACE INSUFFICIENT CAPACITY" }, 250 { NVME_SC_NS_ID_UNAVAILABLE, "NAMESPACE IDENTIFIER UNAVAILABLE" }, 251 { NVME_SC_NS_ALREADY_ATTACHED, "NAMESPACE ALREADY ATTACHED" }, 252 { NVME_SC_NS_IS_PRIVATE, "NAMESPACE IS PRIVATE" }, 253 { NVME_SC_NS_NOT_ATTACHED, "NS NOT ATTACHED" }, 254 { NVME_SC_THIN_PROV_NOT_SUPPORTED, "THIN PROVISIONING NOT SUPPORTED" }, 255 { NVME_SC_CTRLR_LIST_INVALID, "CONTROLLER LIST INVALID" }, 256 { NVME_SC_SELT_TEST_IN_PROGRESS, "DEVICE SELT-TEST IN PROGRESS" }, 257 { NVME_SC_BOOT_PART_WRITE_PROHIB, "BOOT PARTITION WRITE PROHIBITED" }, 258 { NVME_SC_INVALID_CTRLR_ID, "INVALID CONTROLLER IDENTIFIER" }, 259 { NVME_SC_INVALID_SEC_CTRLR_STATE, "INVALID SECONDARY CONTROLLER STATE" }, 260 { NVME_SC_INVALID_NUM_OF_CTRLR_RESRC, "INVALID NUMBER OF CONTROLLER RESOURCES" }, 261 { NVME_SC_INVALID_RESOURCE_ID, "INVALID RESOURCE IDENTIFIER" }, 262 263 { NVME_SC_CONFLICTING_ATTRIBUTES, "CONFLICTING ATTRIBUTES" }, 264 { NVME_SC_INVALID_PROTECTION_INFO, "INVALID PROTECTION INFO" }, 265 { NVME_SC_ATTEMPTED_WRITE_TO_RO_PAGE, "WRITE TO RO PAGE" }, 266 { 0xFFFF, "COMMAND SPECIFIC" } 267 }; 268 269 static struct nvme_status_string media_error_status[] = { 270 { NVME_SC_WRITE_FAULTS, "WRITE FAULTS" }, 271 { NVME_SC_UNRECOVERED_READ_ERROR, "UNRECOVERED READ ERROR" }, 272 { NVME_SC_GUARD_CHECK_ERROR, "GUARD CHECK ERROR" }, 273 { NVME_SC_APPLICATION_TAG_CHECK_ERROR, "APPLICATION TAG CHECK ERROR" }, 274 { NVME_SC_REFERENCE_TAG_CHECK_ERROR, "REFERENCE TAG CHECK ERROR" }, 275 { NVME_SC_COMPARE_FAILURE, "COMPARE FAILURE" }, 276 { NVME_SC_ACCESS_DENIED, "ACCESS DENIED" }, 277 { NVME_SC_DEALLOCATED_OR_UNWRITTEN, "DEALLOCATED OR UNWRITTEN LOGICAL BLOCK" }, 278 { 0xFFFF, "MEDIA ERROR" } 279 }; 280 281 static const char * 282 get_status_string(uint16_t sct, uint16_t sc) 283 { 284 struct nvme_status_string *entry; 285 286 switch (sct) { 287 case NVME_SCT_GENERIC: 288 entry = generic_status; 289 break; 290 case NVME_SCT_COMMAND_SPECIFIC: 291 entry = command_specific_status; 292 break; 293 case NVME_SCT_MEDIA_ERROR: 294 entry = media_error_status; 295 break; 296 case NVME_SCT_VENDOR_SPECIFIC: 297 return ("VENDOR SPECIFIC"); 298 default: 299 return ("RESERVED"); 300 } 301 302 while (entry->sc != 0xFFFF) { 303 if (entry->sc == sc) 304 return (entry->str); 305 entry++; 306 } 307 return (entry->str); 308 } 309 310 static void 311 nvme_qpair_print_completion(struct nvme_qpair *qpair, 312 struct nvme_completion *cpl) 313 { 314 uint16_t sct, sc; 315 316 sct = NVME_STATUS_GET_SCT(cpl->status); 317 sc = NVME_STATUS_GET_SC(cpl->status); 318 319 nvme_printf(qpair->ctrlr, "%s (%02x/%02x) sqid:%d cid:%d cdw0:%x\n", 320 get_status_string(sct, sc), sct, sc, cpl->sqid, cpl->cid, 321 cpl->cdw0); 322 } 323 324 static boolean_t 325 nvme_completion_is_retry(const struct nvme_completion *cpl) 326 { 327 uint8_t sct, sc, dnr; 328 329 sct = NVME_STATUS_GET_SCT(cpl->status); 330 sc = NVME_STATUS_GET_SC(cpl->status); 331 dnr = NVME_STATUS_GET_DNR(cpl->status); /* Do Not Retry Bit */ 332 333 /* 334 * TODO: spec is not clear how commands that are aborted due 335 * to TLER will be marked. So for now, it seems 336 * NAMESPACE_NOT_READY is the only case where we should 337 * look at the DNR bit. Requests failed with ABORTED_BY_REQUEST 338 * set the DNR bit correctly since the driver controls that. 339 */ 340 switch (sct) { 341 case NVME_SCT_GENERIC: 342 switch (sc) { 343 case NVME_SC_ABORTED_BY_REQUEST: 344 case NVME_SC_NAMESPACE_NOT_READY: 345 if (dnr) 346 return (0); 347 else 348 return (1); 349 case NVME_SC_INVALID_OPCODE: 350 case NVME_SC_INVALID_FIELD: 351 case NVME_SC_COMMAND_ID_CONFLICT: 352 case NVME_SC_DATA_TRANSFER_ERROR: 353 case NVME_SC_ABORTED_POWER_LOSS: 354 case NVME_SC_INTERNAL_DEVICE_ERROR: 355 case NVME_SC_ABORTED_SQ_DELETION: 356 case NVME_SC_ABORTED_FAILED_FUSED: 357 case NVME_SC_ABORTED_MISSING_FUSED: 358 case NVME_SC_INVALID_NAMESPACE_OR_FORMAT: 359 case NVME_SC_COMMAND_SEQUENCE_ERROR: 360 case NVME_SC_LBA_OUT_OF_RANGE: 361 case NVME_SC_CAPACITY_EXCEEDED: 362 default: 363 return (0); 364 } 365 case NVME_SCT_COMMAND_SPECIFIC: 366 case NVME_SCT_MEDIA_ERROR: 367 case NVME_SCT_VENDOR_SPECIFIC: 368 default: 369 return (0); 370 } 371 } 372 373 static void 374 nvme_qpair_complete_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr, 375 struct nvme_completion *cpl, error_print_t print_on_error) 376 { 377 struct nvme_request *req; 378 boolean_t retry, error; 379 380 req = tr->req; 381 error = nvme_completion_is_error(cpl); 382 retry = error && nvme_completion_is_retry(cpl) && 383 req->retries < nvme_retry_count; 384 385 if (error && (print_on_error == ERROR_PRINT_ALL || 386 (!retry && print_on_error == ERROR_PRINT_NO_RETRY))) { 387 nvme_qpair_print_command(qpair, &req->cmd); 388 nvme_qpair_print_completion(qpair, cpl); 389 } 390 391 qpair->act_tr[cpl->cid] = NULL; 392 393 KASSERT(cpl->cid == req->cmd.cid, ("cpl cid does not match cmd cid\n")); 394 395 if (req->cb_fn && !retry) 396 req->cb_fn(req->cb_arg, cpl); 397 398 mtx_lock(&qpair->lock); 399 callout_stop(&tr->timer); 400 401 if (retry) { 402 req->retries++; 403 nvme_qpair_submit_tracker(qpair, tr); 404 } else { 405 if (req->type != NVME_REQUEST_NULL) { 406 bus_dmamap_sync(qpair->dma_tag_payload, 407 tr->payload_dma_map, 408 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 409 bus_dmamap_unload(qpair->dma_tag_payload, 410 tr->payload_dma_map); 411 } 412 413 nvme_free_request(req); 414 tr->req = NULL; 415 416 TAILQ_REMOVE(&qpair->outstanding_tr, tr, tailq); 417 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 418 419 /* 420 * If the controller is in the middle of resetting, don't 421 * try to submit queued requests here - let the reset logic 422 * handle that instead. 423 */ 424 if (!STAILQ_EMPTY(&qpair->queued_req) && 425 !qpair->ctrlr->is_resetting) { 426 req = STAILQ_FIRST(&qpair->queued_req); 427 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 428 _nvme_qpair_submit_request(qpair, req); 429 } 430 } 431 432 mtx_unlock(&qpair->lock); 433 } 434 435 static void 436 nvme_qpair_manual_complete_tracker(struct nvme_qpair *qpair, 437 struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr, 438 error_print_t print_on_error) 439 { 440 struct nvme_completion cpl; 441 442 memset(&cpl, 0, sizeof(cpl)); 443 cpl.sqid = qpair->id; 444 cpl.cid = tr->cid; 445 cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT; 446 cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT; 447 cpl.status |= (dnr & NVME_STATUS_DNR_MASK) << NVME_STATUS_DNR_SHIFT; 448 nvme_qpair_complete_tracker(qpair, tr, &cpl, print_on_error); 449 } 450 451 void 452 nvme_qpair_manual_complete_request(struct nvme_qpair *qpair, 453 struct nvme_request *req, uint32_t sct, uint32_t sc) 454 { 455 struct nvme_completion cpl; 456 boolean_t error; 457 458 memset(&cpl, 0, sizeof(cpl)); 459 cpl.sqid = qpair->id; 460 cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT; 461 cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT; 462 463 error = nvme_completion_is_error(&cpl); 464 465 if (error) { 466 nvme_qpair_print_command(qpair, &req->cmd); 467 nvme_qpair_print_completion(qpair, &cpl); 468 } 469 470 if (req->cb_fn) 471 req->cb_fn(req->cb_arg, &cpl); 472 473 nvme_free_request(req); 474 } 475 476 bool 477 nvme_qpair_process_completions(struct nvme_qpair *qpair) 478 { 479 struct nvme_tracker *tr; 480 struct nvme_completion cpl; 481 int done = 0; 482 483 qpair->num_intr_handler_calls++; 484 485 if (!qpair->is_enabled) 486 /* 487 * qpair is not enabled, likely because a controller reset is 488 * is in progress. Ignore the interrupt - any I/O that was 489 * associated with this interrupt will get retried when the 490 * reset is complete. 491 */ 492 return (false); 493 494 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 495 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 496 while (1) { 497 cpl = qpair->cpl[qpair->cq_head]; 498 499 /* Convert to host endian */ 500 nvme_completion_swapbytes(&cpl); 501 502 if (NVME_STATUS_GET_P(cpl.status) != qpair->phase) 503 break; 504 505 tr = qpair->act_tr[cpl.cid]; 506 507 if (tr != NULL) { 508 nvme_qpair_complete_tracker(qpair, tr, &cpl, ERROR_PRINT_ALL); 509 qpair->sq_head = cpl.sqhd; 510 done++; 511 } else { 512 nvme_printf(qpair->ctrlr, 513 "cpl does not map to outstanding cmd\n"); 514 /* nvme_dump_completion expects device endianess */ 515 nvme_dump_completion(&qpair->cpl[qpair->cq_head]); 516 KASSERT(0, ("received completion for unknown cmd\n")); 517 } 518 519 if (++qpair->cq_head == qpair->num_entries) { 520 qpair->cq_head = 0; 521 qpair->phase = !qpair->phase; 522 } 523 524 nvme_mmio_write_4(qpair->ctrlr, doorbell[qpair->id].cq_hdbl, 525 qpair->cq_head); 526 } 527 return (done != 0); 528 } 529 530 static void 531 nvme_qpair_msix_handler(void *arg) 532 { 533 struct nvme_qpair *qpair = arg; 534 535 nvme_qpair_process_completions(qpair); 536 } 537 538 int 539 nvme_qpair_construct(struct nvme_qpair *qpair, uint32_t id, 540 uint16_t vector, uint32_t num_entries, uint32_t num_trackers, 541 struct nvme_controller *ctrlr) 542 { 543 struct nvme_tracker *tr; 544 size_t cmdsz, cplsz, prpsz, allocsz, prpmemsz; 545 uint64_t queuemem_phys, prpmem_phys, list_phys; 546 uint8_t *queuemem, *prpmem, *prp_list; 547 int i, err; 548 549 qpair->id = id; 550 qpair->vector = vector; 551 qpair->num_entries = num_entries; 552 qpair->num_trackers = num_trackers; 553 qpair->ctrlr = ctrlr; 554 555 if (ctrlr->msix_enabled) { 556 557 /* 558 * MSI-X vector resource IDs start at 1, so we add one to 559 * the queue's vector to get the corresponding rid to use. 560 */ 561 qpair->rid = vector + 1; 562 563 qpair->res = bus_alloc_resource_any(ctrlr->dev, SYS_RES_IRQ, 564 &qpair->rid, RF_ACTIVE); 565 bus_setup_intr(ctrlr->dev, qpair->res, 566 INTR_TYPE_MISC | INTR_MPSAFE, NULL, 567 nvme_qpair_msix_handler, qpair, &qpair->tag); 568 if (id == 0) { 569 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 570 "admin"); 571 } else { 572 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 573 "io%d", id - 1); 574 } 575 } 576 577 mtx_init(&qpair->lock, "nvme qpair lock", NULL, MTX_DEF); 578 579 /* Note: NVMe PRP format is restricted to 4-byte alignment. */ 580 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 581 4, PAGE_SIZE, BUS_SPACE_MAXADDR, 582 BUS_SPACE_MAXADDR, NULL, NULL, NVME_MAX_XFER_SIZE, 583 (NVME_MAX_XFER_SIZE/PAGE_SIZE)+1, PAGE_SIZE, 0, 584 NULL, NULL, &qpair->dma_tag_payload); 585 if (err != 0) { 586 nvme_printf(ctrlr, "payload tag create failed %d\n", err); 587 goto out; 588 } 589 590 /* 591 * Each component must be page aligned, and individual PRP lists 592 * cannot cross a page boundary. 593 */ 594 cmdsz = qpair->num_entries * sizeof(struct nvme_command); 595 cmdsz = roundup2(cmdsz, PAGE_SIZE); 596 cplsz = qpair->num_entries * sizeof(struct nvme_completion); 597 cplsz = roundup2(cplsz, PAGE_SIZE); 598 prpsz = sizeof(uint64_t) * NVME_MAX_PRP_LIST_ENTRIES;; 599 prpmemsz = qpair->num_trackers * prpsz; 600 allocsz = cmdsz + cplsz + prpmemsz; 601 602 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 603 PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 604 allocsz, 1, allocsz, 0, NULL, NULL, &qpair->dma_tag); 605 if (err != 0) { 606 nvme_printf(ctrlr, "tag create failed %d\n", err); 607 goto out; 608 } 609 610 if (bus_dmamem_alloc(qpair->dma_tag, (void **)&queuemem, 611 BUS_DMA_NOWAIT, &qpair->queuemem_map)) { 612 nvme_printf(ctrlr, "failed to alloc qpair memory\n"); 613 goto out; 614 } 615 616 if (bus_dmamap_load(qpair->dma_tag, qpair->queuemem_map, 617 queuemem, allocsz, nvme_single_map, &queuemem_phys, 0) != 0) { 618 nvme_printf(ctrlr, "failed to load qpair memory\n"); 619 goto out; 620 } 621 622 qpair->num_cmds = 0; 623 qpair->num_intr_handler_calls = 0; 624 qpair->cmd = (struct nvme_command *)queuemem; 625 qpair->cpl = (struct nvme_completion *)(queuemem + cmdsz); 626 prpmem = (uint8_t *)(queuemem + cmdsz + cplsz); 627 qpair->cmd_bus_addr = queuemem_phys; 628 qpair->cpl_bus_addr = queuemem_phys + cmdsz; 629 prpmem_phys = queuemem_phys + cmdsz + cplsz; 630 631 qpair->sq_tdbl_off = nvme_mmio_offsetof(doorbell[id].sq_tdbl); 632 qpair->cq_hdbl_off = nvme_mmio_offsetof(doorbell[id].cq_hdbl); 633 634 TAILQ_INIT(&qpair->free_tr); 635 TAILQ_INIT(&qpair->outstanding_tr); 636 STAILQ_INIT(&qpair->queued_req); 637 638 list_phys = prpmem_phys; 639 prp_list = prpmem; 640 for (i = 0; i < qpair->num_trackers; i++) { 641 642 if (list_phys + prpsz > prpmem_phys + prpmemsz) { 643 qpair->num_trackers = i; 644 break; 645 } 646 647 /* 648 * Make sure that the PRP list for this tracker doesn't 649 * overflow to another page. 650 */ 651 if (trunc_page(list_phys) != 652 trunc_page(list_phys + prpsz - 1)) { 653 list_phys = roundup2(list_phys, PAGE_SIZE); 654 prp_list = 655 (uint8_t *)roundup2((uintptr_t)prp_list, PAGE_SIZE); 656 } 657 658 tr = malloc(sizeof(*tr), M_NVME, M_ZERO | M_WAITOK); 659 bus_dmamap_create(qpair->dma_tag_payload, 0, 660 &tr->payload_dma_map); 661 callout_init(&tr->timer, 1); 662 tr->cid = i; 663 tr->qpair = qpair; 664 tr->prp = (uint64_t *)prp_list; 665 tr->prp_bus_addr = list_phys; 666 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 667 list_phys += prpsz; 668 prp_list += prpsz; 669 } 670 671 if (qpair->num_trackers == 0) { 672 nvme_printf(ctrlr, "failed to allocate enough trackers\n"); 673 goto out; 674 } 675 676 qpair->act_tr = malloc(sizeof(struct nvme_tracker *) * 677 qpair->num_entries, M_NVME, M_ZERO | M_WAITOK); 678 return (0); 679 680 out: 681 nvme_qpair_destroy(qpair); 682 return (ENOMEM); 683 } 684 685 static void 686 nvme_qpair_destroy(struct nvme_qpair *qpair) 687 { 688 struct nvme_tracker *tr; 689 690 if (qpair->tag) 691 bus_teardown_intr(qpair->ctrlr->dev, qpair->res, qpair->tag); 692 693 if (mtx_initialized(&qpair->lock)) 694 mtx_destroy(&qpair->lock); 695 696 if (qpair->res) 697 bus_release_resource(qpair->ctrlr->dev, SYS_RES_IRQ, 698 rman_get_rid(qpair->res), qpair->res); 699 700 if (qpair->cmd != NULL) { 701 bus_dmamap_unload(qpair->dma_tag, qpair->queuemem_map); 702 bus_dmamem_free(qpair->dma_tag, qpair->cmd, 703 qpair->queuemem_map); 704 } 705 706 if (qpair->act_tr) 707 free(qpair->act_tr, M_NVME); 708 709 while (!TAILQ_EMPTY(&qpair->free_tr)) { 710 tr = TAILQ_FIRST(&qpair->free_tr); 711 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 712 bus_dmamap_destroy(qpair->dma_tag_payload, 713 tr->payload_dma_map); 714 free(tr, M_NVME); 715 } 716 717 if (qpair->dma_tag) 718 bus_dma_tag_destroy(qpair->dma_tag); 719 720 if (qpair->dma_tag_payload) 721 bus_dma_tag_destroy(qpair->dma_tag_payload); 722 } 723 724 static void 725 nvme_admin_qpair_abort_aers(struct nvme_qpair *qpair) 726 { 727 struct nvme_tracker *tr; 728 729 tr = TAILQ_FIRST(&qpair->outstanding_tr); 730 while (tr != NULL) { 731 if (tr->req->cmd.opc == NVME_OPC_ASYNC_EVENT_REQUEST) { 732 nvme_qpair_manual_complete_tracker(qpair, tr, 733 NVME_SCT_GENERIC, NVME_SC_ABORTED_SQ_DELETION, 0, 734 ERROR_PRINT_NONE); 735 tr = TAILQ_FIRST(&qpair->outstanding_tr); 736 } else { 737 tr = TAILQ_NEXT(tr, tailq); 738 } 739 } 740 } 741 742 void 743 nvme_admin_qpair_destroy(struct nvme_qpair *qpair) 744 { 745 746 nvme_admin_qpair_abort_aers(qpair); 747 nvme_qpair_destroy(qpair); 748 } 749 750 void 751 nvme_io_qpair_destroy(struct nvme_qpair *qpair) 752 { 753 754 nvme_qpair_destroy(qpair); 755 } 756 757 static void 758 nvme_abort_complete(void *arg, const struct nvme_completion *status) 759 { 760 struct nvme_tracker *tr = arg; 761 762 /* 763 * If cdw0 == 1, the controller was not able to abort the command 764 * we requested. We still need to check the active tracker array, 765 * to cover race where I/O timed out at same time controller was 766 * completing the I/O. 767 */ 768 if (status->cdw0 == 1 && tr->qpair->act_tr[tr->cid] != NULL) { 769 /* 770 * An I/O has timed out, and the controller was unable to 771 * abort it for some reason. Construct a fake completion 772 * status, and then complete the I/O's tracker manually. 773 */ 774 nvme_printf(tr->qpair->ctrlr, 775 "abort command failed, aborting command manually\n"); 776 nvme_qpair_manual_complete_tracker(tr->qpair, tr, 777 NVME_SCT_GENERIC, NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_ALL); 778 } 779 } 780 781 static void 782 nvme_timeout(void *arg) 783 { 784 struct nvme_tracker *tr = arg; 785 struct nvme_qpair *qpair = tr->qpair; 786 struct nvme_controller *ctrlr = qpair->ctrlr; 787 uint32_t csts; 788 uint8_t cfs; 789 790 /* 791 * Read csts to get value of cfs - controller fatal status. 792 * If no fatal status, try to call the completion routine, and 793 * if completes transactions, report a missed interrupt and 794 * return (this may need to be rate limited). Otherwise, if 795 * aborts are enabled and the controller is not reporting 796 * fatal status, abort the command. Otherwise, just reset the 797 * controller and hope for the best. 798 */ 799 csts = nvme_mmio_read_4(ctrlr, csts); 800 cfs = (csts >> NVME_CSTS_REG_CFS_SHIFT) & NVME_CSTS_REG_CFS_MASK; 801 if (cfs == 0 && nvme_qpair_process_completions(qpair)) { 802 nvme_printf(ctrlr, "Missing interrupt\n"); 803 return; 804 } 805 if (ctrlr->enable_aborts && cfs == 0) { 806 nvme_printf(ctrlr, "Aborting command due to a timeout.\n"); 807 nvme_ctrlr_cmd_abort(ctrlr, tr->cid, qpair->id, 808 nvme_abort_complete, tr); 809 } else { 810 nvme_printf(ctrlr, "Resetting controller due to a timeout%s.\n", 811 cfs ? " and fatal error status" : ""); 812 nvme_ctrlr_reset(ctrlr); 813 } 814 } 815 816 void 817 nvme_qpair_submit_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr) 818 { 819 struct nvme_request *req; 820 struct nvme_controller *ctrlr; 821 822 mtx_assert(&qpair->lock, MA_OWNED); 823 824 req = tr->req; 825 req->cmd.cid = tr->cid; 826 qpair->act_tr[tr->cid] = tr; 827 ctrlr = qpair->ctrlr; 828 829 if (req->timeout) 830 callout_reset_curcpu(&tr->timer, ctrlr->timeout_period * hz, 831 nvme_timeout, tr); 832 833 /* Copy the command from the tracker to the submission queue. */ 834 memcpy(&qpair->cmd[qpair->sq_tail], &req->cmd, sizeof(req->cmd)); 835 836 if (++qpair->sq_tail == qpair->num_entries) 837 qpair->sq_tail = 0; 838 839 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 840 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 841 #ifndef __powerpc__ 842 /* 843 * powerpc's bus_dmamap_sync() already includes a heavyweight sync, but 844 * no other archs do. 845 */ 846 wmb(); 847 #endif 848 849 nvme_mmio_write_4(qpair->ctrlr, doorbell[qpair->id].sq_tdbl, 850 qpair->sq_tail); 851 852 qpair->num_cmds++; 853 } 854 855 static void 856 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error) 857 { 858 struct nvme_tracker *tr = arg; 859 uint32_t cur_nseg; 860 861 /* 862 * If the mapping operation failed, return immediately. The caller 863 * is responsible for detecting the error status and failing the 864 * tracker manually. 865 */ 866 if (error != 0) { 867 nvme_printf(tr->qpair->ctrlr, 868 "nvme_payload_map err %d\n", error); 869 return; 870 } 871 872 /* 873 * Note that we specified PAGE_SIZE for alignment and max 874 * segment size when creating the bus dma tags. So here 875 * we can safely just transfer each segment to its 876 * associated PRP entry. 877 */ 878 tr->req->cmd.prp1 = htole64(seg[0].ds_addr); 879 880 if (nseg == 2) { 881 tr->req->cmd.prp2 = htole64(seg[1].ds_addr); 882 } else if (nseg > 2) { 883 cur_nseg = 1; 884 tr->req->cmd.prp2 = htole64((uint64_t)tr->prp_bus_addr); 885 while (cur_nseg < nseg) { 886 tr->prp[cur_nseg-1] = 887 htole64((uint64_t)seg[cur_nseg].ds_addr); 888 cur_nseg++; 889 } 890 } else { 891 /* 892 * prp2 should not be used by the controller 893 * since there is only one segment, but set 894 * to 0 just to be safe. 895 */ 896 tr->req->cmd.prp2 = 0; 897 } 898 899 bus_dmamap_sync(tr->qpair->dma_tag_payload, tr->payload_dma_map, 900 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 901 nvme_qpair_submit_tracker(tr->qpair, tr); 902 } 903 904 static void 905 _nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 906 { 907 struct nvme_tracker *tr; 908 int err = 0; 909 910 mtx_assert(&qpair->lock, MA_OWNED); 911 912 tr = TAILQ_FIRST(&qpair->free_tr); 913 req->qpair = qpair; 914 915 if (tr == NULL || !qpair->is_enabled) { 916 /* 917 * No tracker is available, or the qpair is disabled due to 918 * an in-progress controller-level reset or controller 919 * failure. 920 */ 921 922 if (qpair->ctrlr->is_failed) { 923 /* 924 * The controller has failed. Post the request to a 925 * task where it will be aborted, so that we do not 926 * invoke the request's callback in the context 927 * of the submission. 928 */ 929 nvme_ctrlr_post_failed_request(qpair->ctrlr, req); 930 } else { 931 /* 932 * Put the request on the qpair's request queue to be 933 * processed when a tracker frees up via a command 934 * completion or when the controller reset is 935 * completed. 936 */ 937 STAILQ_INSERT_TAIL(&qpair->queued_req, req, stailq); 938 } 939 return; 940 } 941 942 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 943 TAILQ_INSERT_TAIL(&qpair->outstanding_tr, tr, tailq); 944 tr->req = req; 945 946 switch (req->type) { 947 case NVME_REQUEST_VADDR: 948 KASSERT(req->payload_size <= qpair->ctrlr->max_xfer_size, 949 ("payload_size (%d) exceeds max_xfer_size (%d)\n", 950 req->payload_size, qpair->ctrlr->max_xfer_size)); 951 err = bus_dmamap_load(tr->qpair->dma_tag_payload, 952 tr->payload_dma_map, req->u.payload, req->payload_size, 953 nvme_payload_map, tr, 0); 954 if (err != 0) 955 nvme_printf(qpair->ctrlr, 956 "bus_dmamap_load returned 0x%x!\n", err); 957 break; 958 case NVME_REQUEST_NULL: 959 nvme_qpair_submit_tracker(tr->qpair, tr); 960 break; 961 case NVME_REQUEST_BIO: 962 KASSERT(req->u.bio->bio_bcount <= qpair->ctrlr->max_xfer_size, 963 ("bio->bio_bcount (%jd) exceeds max_xfer_size (%d)\n", 964 (intmax_t)req->u.bio->bio_bcount, 965 qpair->ctrlr->max_xfer_size)); 966 err = bus_dmamap_load_bio(tr->qpair->dma_tag_payload, 967 tr->payload_dma_map, req->u.bio, nvme_payload_map, tr, 0); 968 if (err != 0) 969 nvme_printf(qpair->ctrlr, 970 "bus_dmamap_load_bio returned 0x%x!\n", err); 971 break; 972 case NVME_REQUEST_CCB: 973 err = bus_dmamap_load_ccb(tr->qpair->dma_tag_payload, 974 tr->payload_dma_map, req->u.payload, 975 nvme_payload_map, tr, 0); 976 if (err != 0) 977 nvme_printf(qpair->ctrlr, 978 "bus_dmamap_load_ccb returned 0x%x!\n", err); 979 break; 980 default: 981 panic("unknown nvme request type 0x%x\n", req->type); 982 break; 983 } 984 985 if (err != 0) { 986 /* 987 * The dmamap operation failed, so we manually fail the 988 * tracker here with DATA_TRANSFER_ERROR status. 989 * 990 * nvme_qpair_manual_complete_tracker must not be called 991 * with the qpair lock held. 992 */ 993 mtx_unlock(&qpair->lock); 994 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 995 NVME_SC_DATA_TRANSFER_ERROR, DO_NOT_RETRY, ERROR_PRINT_ALL); 996 mtx_lock(&qpair->lock); 997 } 998 } 999 1000 void 1001 nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 1002 { 1003 1004 mtx_lock(&qpair->lock); 1005 _nvme_qpair_submit_request(qpair, req); 1006 mtx_unlock(&qpair->lock); 1007 } 1008 1009 static void 1010 nvme_qpair_enable(struct nvme_qpair *qpair) 1011 { 1012 1013 qpair->is_enabled = TRUE; 1014 } 1015 1016 void 1017 nvme_qpair_reset(struct nvme_qpair *qpair) 1018 { 1019 1020 qpair->sq_head = qpair->sq_tail = qpair->cq_head = 0; 1021 1022 /* 1023 * First time through the completion queue, HW will set phase 1024 * bit on completions to 1. So set this to 1 here, indicating 1025 * we're looking for a 1 to know which entries have completed. 1026 * we'll toggle the bit each time when the completion queue 1027 * rolls over. 1028 */ 1029 qpair->phase = 1; 1030 1031 memset(qpair->cmd, 0, 1032 qpair->num_entries * sizeof(struct nvme_command)); 1033 memset(qpair->cpl, 0, 1034 qpair->num_entries * sizeof(struct nvme_completion)); 1035 } 1036 1037 void 1038 nvme_admin_qpair_enable(struct nvme_qpair *qpair) 1039 { 1040 struct nvme_tracker *tr; 1041 struct nvme_tracker *tr_temp; 1042 1043 /* 1044 * Manually abort each outstanding admin command. Do not retry 1045 * admin commands found here, since they will be left over from 1046 * a controller reset and its likely the context in which the 1047 * command was issued no longer applies. 1048 */ 1049 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1050 nvme_printf(qpair->ctrlr, 1051 "aborting outstanding admin command\n"); 1052 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1053 NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL); 1054 } 1055 1056 nvme_qpair_enable(qpair); 1057 } 1058 1059 void 1060 nvme_io_qpair_enable(struct nvme_qpair *qpair) 1061 { 1062 STAILQ_HEAD(, nvme_request) temp; 1063 struct nvme_tracker *tr; 1064 struct nvme_tracker *tr_temp; 1065 struct nvme_request *req; 1066 1067 /* 1068 * Manually abort each outstanding I/O. This normally results in a 1069 * retry, unless the retry count on the associated request has 1070 * reached its limit. 1071 */ 1072 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1073 nvme_printf(qpair->ctrlr, "aborting outstanding i/o\n"); 1074 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1075 NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_NO_RETRY); 1076 } 1077 1078 mtx_lock(&qpair->lock); 1079 1080 nvme_qpair_enable(qpair); 1081 1082 STAILQ_INIT(&temp); 1083 STAILQ_SWAP(&qpair->queued_req, &temp, nvme_request); 1084 1085 while (!STAILQ_EMPTY(&temp)) { 1086 req = STAILQ_FIRST(&temp); 1087 STAILQ_REMOVE_HEAD(&temp, stailq); 1088 nvme_printf(qpair->ctrlr, "resubmitting queued i/o\n"); 1089 nvme_qpair_print_command(qpair, &req->cmd); 1090 _nvme_qpair_submit_request(qpair, req); 1091 } 1092 1093 mtx_unlock(&qpair->lock); 1094 } 1095 1096 static void 1097 nvme_qpair_disable(struct nvme_qpair *qpair) 1098 { 1099 struct nvme_tracker *tr; 1100 1101 qpair->is_enabled = FALSE; 1102 mtx_lock(&qpair->lock); 1103 TAILQ_FOREACH(tr, &qpair->outstanding_tr, tailq) 1104 callout_stop(&tr->timer); 1105 mtx_unlock(&qpair->lock); 1106 } 1107 1108 void 1109 nvme_admin_qpair_disable(struct nvme_qpair *qpair) 1110 { 1111 1112 nvme_qpair_disable(qpair); 1113 nvme_admin_qpair_abort_aers(qpair); 1114 } 1115 1116 void 1117 nvme_io_qpair_disable(struct nvme_qpair *qpair) 1118 { 1119 1120 nvme_qpair_disable(qpair); 1121 } 1122 1123 void 1124 nvme_qpair_fail(struct nvme_qpair *qpair) 1125 { 1126 struct nvme_tracker *tr; 1127 struct nvme_request *req; 1128 1129 if (!mtx_initialized(&qpair->lock)) 1130 return; 1131 1132 mtx_lock(&qpair->lock); 1133 1134 while (!STAILQ_EMPTY(&qpair->queued_req)) { 1135 req = STAILQ_FIRST(&qpair->queued_req); 1136 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 1137 nvme_printf(qpair->ctrlr, "failing queued i/o\n"); 1138 mtx_unlock(&qpair->lock); 1139 nvme_qpair_manual_complete_request(qpair, req, NVME_SCT_GENERIC, 1140 NVME_SC_ABORTED_BY_REQUEST); 1141 mtx_lock(&qpair->lock); 1142 } 1143 1144 /* Manually abort each outstanding I/O. */ 1145 while (!TAILQ_EMPTY(&qpair->outstanding_tr)) { 1146 tr = TAILQ_FIRST(&qpair->outstanding_tr); 1147 /* 1148 * Do not remove the tracker. The abort_tracker path will 1149 * do that for us. 1150 */ 1151 nvme_printf(qpair->ctrlr, "failing outstanding i/o\n"); 1152 mtx_unlock(&qpair->lock); 1153 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1154 NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL); 1155 mtx_lock(&qpair->lock); 1156 } 1157 1158 mtx_unlock(&qpair->lock); 1159 } 1160 1161