1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (C) 2012-2014 Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/domainset.h> 36 #include <sys/proc.h> 37 38 #include <dev/pci/pcivar.h> 39 40 #include "nvme_private.h" 41 42 typedef enum error_print { ERROR_PRINT_NONE, ERROR_PRINT_NO_RETRY, ERROR_PRINT_ALL } error_print_t; 43 #define DO_NOT_RETRY 1 44 45 static void _nvme_qpair_submit_request(struct nvme_qpair *qpair, 46 struct nvme_request *req); 47 static void nvme_qpair_destroy(struct nvme_qpair *qpair); 48 49 struct nvme_opcode_string { 50 uint16_t opc; 51 const char * str; 52 }; 53 54 static struct nvme_opcode_string admin_opcode[] = { 55 { NVME_OPC_DELETE_IO_SQ, "DELETE IO SQ" }, 56 { NVME_OPC_CREATE_IO_SQ, "CREATE IO SQ" }, 57 { NVME_OPC_GET_LOG_PAGE, "GET LOG PAGE" }, 58 { NVME_OPC_DELETE_IO_CQ, "DELETE IO CQ" }, 59 { NVME_OPC_CREATE_IO_CQ, "CREATE IO CQ" }, 60 { NVME_OPC_IDENTIFY, "IDENTIFY" }, 61 { NVME_OPC_ABORT, "ABORT" }, 62 { NVME_OPC_SET_FEATURES, "SET FEATURES" }, 63 { NVME_OPC_GET_FEATURES, "GET FEATURES" }, 64 { NVME_OPC_ASYNC_EVENT_REQUEST, "ASYNC EVENT REQUEST" }, 65 { NVME_OPC_NAMESPACE_MANAGEMENT, "NAMESPACE MANAGEMENT" }, 66 { NVME_OPC_FIRMWARE_ACTIVATE, "FIRMWARE ACTIVATE" }, 67 { NVME_OPC_FIRMWARE_IMAGE_DOWNLOAD, "FIRMWARE IMAGE DOWNLOAD" }, 68 { NVME_OPC_DEVICE_SELF_TEST, "DEVICE SELF-TEST" }, 69 { NVME_OPC_NAMESPACE_ATTACHMENT, "NAMESPACE ATTACHMENT" }, 70 { NVME_OPC_KEEP_ALIVE, "KEEP ALIVE" }, 71 { NVME_OPC_DIRECTIVE_SEND, "DIRECTIVE SEND" }, 72 { NVME_OPC_DIRECTIVE_RECEIVE, "DIRECTIVE RECEIVE" }, 73 { NVME_OPC_VIRTUALIZATION_MANAGEMENT, "VIRTUALIZATION MANAGEMENT" }, 74 { NVME_OPC_NVME_MI_SEND, "NVME-MI SEND" }, 75 { NVME_OPC_NVME_MI_RECEIVE, "NVME-MI RECEIVE" }, 76 { NVME_OPC_CAPACITY_MANAGEMENT, "CAPACITY MANAGEMENT" }, 77 { NVME_OPC_LOCKDOWN, "LOCKDOWN" }, 78 { NVME_OPC_DOORBELL_BUFFER_CONFIG, "DOORBELL BUFFER CONFIG" }, 79 { NVME_OPC_FABRICS_COMMANDS, "FABRICS COMMANDS" }, 80 { NVME_OPC_FORMAT_NVM, "FORMAT NVM" }, 81 { NVME_OPC_SECURITY_SEND, "SECURITY SEND" }, 82 { NVME_OPC_SECURITY_RECEIVE, "SECURITY RECEIVE" }, 83 { NVME_OPC_SANITIZE, "SANITIZE" }, 84 { NVME_OPC_GET_LBA_STATUS, "GET LBA STATUS" }, 85 { 0xFFFF, "ADMIN COMMAND" } 86 }; 87 88 static struct nvme_opcode_string io_opcode[] = { 89 { NVME_OPC_FLUSH, "FLUSH" }, 90 { NVME_OPC_WRITE, "WRITE" }, 91 { NVME_OPC_READ, "READ" }, 92 { NVME_OPC_WRITE_UNCORRECTABLE, "WRITE UNCORRECTABLE" }, 93 { NVME_OPC_COMPARE, "COMPARE" }, 94 { NVME_OPC_WRITE_ZEROES, "WRITE ZEROES" }, 95 { NVME_OPC_DATASET_MANAGEMENT, "DATASET MANAGEMENT" }, 96 { NVME_OPC_VERIFY, "VERIFY" }, 97 { NVME_OPC_RESERVATION_REGISTER, "RESERVATION REGISTER" }, 98 { NVME_OPC_RESERVATION_REPORT, "RESERVATION REPORT" }, 99 { NVME_OPC_RESERVATION_ACQUIRE, "RESERVATION ACQUIRE" }, 100 { NVME_OPC_RESERVATION_RELEASE, "RESERVATION RELEASE" }, 101 { NVME_OPC_COPY, "COPY" }, 102 { 0xFFFF, "IO COMMAND" } 103 }; 104 105 static const char * 106 get_opcode_string(struct nvme_opcode_string *entry, uint16_t opc) 107 { 108 while (entry->opc != 0xFFFF) { 109 if (entry->opc == opc) 110 return (entry->str); 111 entry++; 112 } 113 return (entry->str); 114 } 115 116 static const char * 117 get_admin_opcode_string(uint16_t opc) 118 { 119 return (get_opcode_string(admin_opcode, opc)); 120 } 121 122 static const char * 123 get_io_opcode_string(uint16_t opc) 124 { 125 return (get_opcode_string(io_opcode, opc)); 126 } 127 128 static void 129 nvme_admin_qpair_print_command(struct nvme_qpair *qpair, 130 struct nvme_command *cmd) 131 { 132 133 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%x " 134 "cdw10:%08x cdw11:%08x\n", 135 get_admin_opcode_string(cmd->opc), cmd->opc, qpair->id, cmd->cid, 136 le32toh(cmd->nsid), le32toh(cmd->cdw10), le32toh(cmd->cdw11)); 137 } 138 139 static void 140 nvme_io_qpair_print_command(struct nvme_qpair *qpair, 141 struct nvme_command *cmd) 142 { 143 144 switch (cmd->opc) { 145 case NVME_OPC_WRITE: 146 case NVME_OPC_READ: 147 case NVME_OPC_WRITE_UNCORRECTABLE: 148 case NVME_OPC_COMPARE: 149 case NVME_OPC_WRITE_ZEROES: 150 case NVME_OPC_VERIFY: 151 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d " 152 "lba:%llu len:%d\n", 153 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid), 154 ((unsigned long long)le32toh(cmd->cdw11) << 32) + le32toh(cmd->cdw10), 155 (le32toh(cmd->cdw12) & 0xFFFF) + 1); 156 break; 157 case NVME_OPC_FLUSH: 158 case NVME_OPC_DATASET_MANAGEMENT: 159 case NVME_OPC_RESERVATION_REGISTER: 160 case NVME_OPC_RESERVATION_REPORT: 161 case NVME_OPC_RESERVATION_ACQUIRE: 162 case NVME_OPC_RESERVATION_RELEASE: 163 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d\n", 164 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid)); 165 break; 166 default: 167 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%d\n", 168 get_io_opcode_string(cmd->opc), cmd->opc, qpair->id, 169 cmd->cid, le32toh(cmd->nsid)); 170 break; 171 } 172 } 173 174 void 175 nvme_qpair_print_command(struct nvme_qpair *qpair, struct nvme_command *cmd) 176 { 177 if (qpair->id == 0) 178 nvme_admin_qpair_print_command(qpair, cmd); 179 else 180 nvme_io_qpair_print_command(qpair, cmd); 181 if (nvme_verbose_cmd_dump) { 182 nvme_printf(qpair->ctrlr, 183 "nsid:%#x rsvd2:%#x rsvd3:%#x mptr:%#jx prp1:%#jx prp2:%#jx\n", 184 cmd->nsid, cmd->rsvd2, cmd->rsvd3, (uintmax_t)cmd->mptr, 185 (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2); 186 nvme_printf(qpair->ctrlr, 187 "cdw10: %#x cdw11:%#x cdw12:%#x cdw13:%#x cdw14:%#x cdw15:%#x\n", 188 cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14, 189 cmd->cdw15); 190 } 191 } 192 193 struct nvme_status_string { 194 uint16_t sc; 195 const char * str; 196 }; 197 198 static struct nvme_status_string generic_status[] = { 199 { NVME_SC_SUCCESS, "SUCCESS" }, 200 { NVME_SC_INVALID_OPCODE, "INVALID OPCODE" }, 201 { NVME_SC_INVALID_FIELD, "INVALID_FIELD" }, 202 { NVME_SC_COMMAND_ID_CONFLICT, "COMMAND ID CONFLICT" }, 203 { NVME_SC_DATA_TRANSFER_ERROR, "DATA TRANSFER ERROR" }, 204 { NVME_SC_ABORTED_POWER_LOSS, "ABORTED - POWER LOSS" }, 205 { NVME_SC_INTERNAL_DEVICE_ERROR, "INTERNAL DEVICE ERROR" }, 206 { NVME_SC_ABORTED_BY_REQUEST, "ABORTED - BY REQUEST" }, 207 { NVME_SC_ABORTED_SQ_DELETION, "ABORTED - SQ DELETION" }, 208 { NVME_SC_ABORTED_FAILED_FUSED, "ABORTED - FAILED FUSED" }, 209 { NVME_SC_ABORTED_MISSING_FUSED, "ABORTED - MISSING FUSED" }, 210 { NVME_SC_INVALID_NAMESPACE_OR_FORMAT, "INVALID NAMESPACE OR FORMAT" }, 211 { NVME_SC_COMMAND_SEQUENCE_ERROR, "COMMAND SEQUENCE ERROR" }, 212 { NVME_SC_INVALID_SGL_SEGMENT_DESCR, "INVALID SGL SEGMENT DESCRIPTOR" }, 213 { NVME_SC_INVALID_NUMBER_OF_SGL_DESCR, "INVALID NUMBER OF SGL DESCRIPTORS" }, 214 { NVME_SC_DATA_SGL_LENGTH_INVALID, "DATA SGL LENGTH INVALID" }, 215 { NVME_SC_METADATA_SGL_LENGTH_INVALID, "METADATA SGL LENGTH INVALID" }, 216 { NVME_SC_SGL_DESCRIPTOR_TYPE_INVALID, "SGL DESCRIPTOR TYPE INVALID" }, 217 { NVME_SC_INVALID_USE_OF_CMB, "INVALID USE OF CONTROLLER MEMORY BUFFER" }, 218 { NVME_SC_PRP_OFFET_INVALID, "PRP OFFET INVALID" }, 219 { NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED, "ATOMIC WRITE UNIT EXCEEDED" }, 220 { NVME_SC_OPERATION_DENIED, "OPERATION DENIED" }, 221 { NVME_SC_SGL_OFFSET_INVALID, "SGL OFFSET INVALID" }, 222 { NVME_SC_HOST_ID_INCONSISTENT_FORMAT, "HOST IDENTIFIER INCONSISTENT FORMAT" }, 223 { NVME_SC_KEEP_ALIVE_TIMEOUT_EXPIRED, "KEEP ALIVE TIMEOUT EXPIRED" }, 224 { NVME_SC_KEEP_ALIVE_TIMEOUT_INVALID, "KEEP ALIVE TIMEOUT INVALID" }, 225 { NVME_SC_ABORTED_DUE_TO_PREEMPT, "COMMAND ABORTED DUE TO PREEMPT AND ABORT" }, 226 { NVME_SC_SANITIZE_FAILED, "SANITIZE FAILED" }, 227 { NVME_SC_SANITIZE_IN_PROGRESS, "SANITIZE IN PROGRESS" }, 228 { NVME_SC_SGL_DATA_BLOCK_GRAN_INVALID, "SGL_DATA_BLOCK_GRANULARITY_INVALID" }, 229 { NVME_SC_NOT_SUPPORTED_IN_CMB, "COMMAND NOT SUPPORTED FOR QUEUE IN CMB" }, 230 { NVME_SC_NAMESPACE_IS_WRITE_PROTECTED, "NAMESPACE IS WRITE PROTECTED" }, 231 { NVME_SC_COMMAND_INTERRUPTED, "COMMAND INTERRUPTED" }, 232 { NVME_SC_TRANSIENT_TRANSPORT_ERROR, "TRANSIENT TRANSPORT ERROR" }, 233 234 { NVME_SC_LBA_OUT_OF_RANGE, "LBA OUT OF RANGE" }, 235 { NVME_SC_CAPACITY_EXCEEDED, "CAPACITY EXCEEDED" }, 236 { NVME_SC_NAMESPACE_NOT_READY, "NAMESPACE NOT READY" }, 237 { NVME_SC_RESERVATION_CONFLICT, "RESERVATION CONFLICT" }, 238 { NVME_SC_FORMAT_IN_PROGRESS, "FORMAT IN PROGRESS" }, 239 { 0xFFFF, "GENERIC" } 240 }; 241 242 static struct nvme_status_string command_specific_status[] = { 243 { NVME_SC_COMPLETION_QUEUE_INVALID, "INVALID COMPLETION QUEUE" }, 244 { NVME_SC_INVALID_QUEUE_IDENTIFIER, "INVALID QUEUE IDENTIFIER" }, 245 { NVME_SC_MAXIMUM_QUEUE_SIZE_EXCEEDED, "MAX QUEUE SIZE EXCEEDED" }, 246 { NVME_SC_ABORT_COMMAND_LIMIT_EXCEEDED, "ABORT CMD LIMIT EXCEEDED" }, 247 { NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED, "ASYNC LIMIT EXCEEDED" }, 248 { NVME_SC_INVALID_FIRMWARE_SLOT, "INVALID FIRMWARE SLOT" }, 249 { NVME_SC_INVALID_FIRMWARE_IMAGE, "INVALID FIRMWARE IMAGE" }, 250 { NVME_SC_INVALID_INTERRUPT_VECTOR, "INVALID INTERRUPT VECTOR" }, 251 { NVME_SC_INVALID_LOG_PAGE, "INVALID LOG PAGE" }, 252 { NVME_SC_INVALID_FORMAT, "INVALID FORMAT" }, 253 { NVME_SC_FIRMWARE_REQUIRES_RESET, "FIRMWARE REQUIRES RESET" }, 254 { NVME_SC_INVALID_QUEUE_DELETION, "INVALID QUEUE DELETION" }, 255 { NVME_SC_FEATURE_NOT_SAVEABLE, "FEATURE IDENTIFIER NOT SAVEABLE" }, 256 { NVME_SC_FEATURE_NOT_CHANGEABLE, "FEATURE NOT CHANGEABLE" }, 257 { NVME_SC_FEATURE_NOT_NS_SPECIFIC, "FEATURE NOT NAMESPACE SPECIFIC" }, 258 { NVME_SC_FW_ACT_REQUIRES_NVMS_RESET, "FIRMWARE ACTIVATION REQUIRES NVM SUBSYSTEM RESET" }, 259 { NVME_SC_FW_ACT_REQUIRES_RESET, "FIRMWARE ACTIVATION REQUIRES RESET" }, 260 { NVME_SC_FW_ACT_REQUIRES_TIME, "FIRMWARE ACTIVATION REQUIRES MAXIMUM TIME VIOLATION" }, 261 { NVME_SC_FW_ACT_PROHIBITED, "FIRMWARE ACTIVATION PROHIBITED" }, 262 { NVME_SC_OVERLAPPING_RANGE, "OVERLAPPING RANGE" }, 263 { NVME_SC_NS_INSUFFICIENT_CAPACITY, "NAMESPACE INSUFFICIENT CAPACITY" }, 264 { NVME_SC_NS_ID_UNAVAILABLE, "NAMESPACE IDENTIFIER UNAVAILABLE" }, 265 { NVME_SC_NS_ALREADY_ATTACHED, "NAMESPACE ALREADY ATTACHED" }, 266 { NVME_SC_NS_IS_PRIVATE, "NAMESPACE IS PRIVATE" }, 267 { NVME_SC_NS_NOT_ATTACHED, "NS NOT ATTACHED" }, 268 { NVME_SC_THIN_PROV_NOT_SUPPORTED, "THIN PROVISIONING NOT SUPPORTED" }, 269 { NVME_SC_CTRLR_LIST_INVALID, "CONTROLLER LIST INVALID" }, 270 { NVME_SC_SELF_TEST_IN_PROGRESS, "DEVICE SELF-TEST IN PROGRESS" }, 271 { NVME_SC_BOOT_PART_WRITE_PROHIB, "BOOT PARTITION WRITE PROHIBITED" }, 272 { NVME_SC_INVALID_CTRLR_ID, "INVALID CONTROLLER IDENTIFIER" }, 273 { NVME_SC_INVALID_SEC_CTRLR_STATE, "INVALID SECONDARY CONTROLLER STATE" }, 274 { NVME_SC_INVALID_NUM_OF_CTRLR_RESRC, "INVALID NUMBER OF CONTROLLER RESOURCES" }, 275 { NVME_SC_INVALID_RESOURCE_ID, "INVALID RESOURCE IDENTIFIER" }, 276 { NVME_SC_SANITIZE_PROHIBITED_WPMRE, "SANITIZE PROHIBITED WRITE PERSISTENT MEMORY REGION ENABLED" }, 277 { NVME_SC_ANA_GROUP_ID_INVALID, "ANA GROUP IDENTIFIED INVALID" }, 278 { NVME_SC_ANA_ATTACH_FAILED, "ANA ATTACH FAILED" }, 279 280 { NVME_SC_CONFLICTING_ATTRIBUTES, "CONFLICTING ATTRIBUTES" }, 281 { NVME_SC_INVALID_PROTECTION_INFO, "INVALID PROTECTION INFO" }, 282 { NVME_SC_ATTEMPTED_WRITE_TO_RO_PAGE, "WRITE TO RO PAGE" }, 283 { 0xFFFF, "COMMAND SPECIFIC" } 284 }; 285 286 static struct nvme_status_string media_error_status[] = { 287 { NVME_SC_WRITE_FAULTS, "WRITE FAULTS" }, 288 { NVME_SC_UNRECOVERED_READ_ERROR, "UNRECOVERED READ ERROR" }, 289 { NVME_SC_GUARD_CHECK_ERROR, "GUARD CHECK ERROR" }, 290 { NVME_SC_APPLICATION_TAG_CHECK_ERROR, "APPLICATION TAG CHECK ERROR" }, 291 { NVME_SC_REFERENCE_TAG_CHECK_ERROR, "REFERENCE TAG CHECK ERROR" }, 292 { NVME_SC_COMPARE_FAILURE, "COMPARE FAILURE" }, 293 { NVME_SC_ACCESS_DENIED, "ACCESS DENIED" }, 294 { NVME_SC_DEALLOCATED_OR_UNWRITTEN, "DEALLOCATED OR UNWRITTEN LOGICAL BLOCK" }, 295 { 0xFFFF, "MEDIA ERROR" } 296 }; 297 298 static struct nvme_status_string path_related_status[] = { 299 { NVME_SC_INTERNAL_PATH_ERROR, "INTERNAL PATH ERROR" }, 300 { NVME_SC_ASYMMETRIC_ACCESS_PERSISTENT_LOSS, "ASYMMETRIC ACCESS PERSISTENT LOSS" }, 301 { NVME_SC_ASYMMETRIC_ACCESS_INACCESSIBLE, "ASYMMETRIC ACCESS INACCESSIBLE" }, 302 { NVME_SC_ASYMMETRIC_ACCESS_TRANSITION, "ASYMMETRIC ACCESS TRANSITION" }, 303 { NVME_SC_CONTROLLER_PATHING_ERROR, "CONTROLLER PATHING ERROR" }, 304 { NVME_SC_HOST_PATHING_ERROR, "HOST PATHING ERROR" }, 305 { NVME_SC_COMMAND_ABORTED_BY_HOST, "COMMAND ABORTED BY HOST" }, 306 { 0xFFFF, "PATH RELATED" }, 307 }; 308 309 static const char * 310 get_status_string(uint16_t sct, uint16_t sc) 311 { 312 struct nvme_status_string *entry; 313 314 switch (sct) { 315 case NVME_SCT_GENERIC: 316 entry = generic_status; 317 break; 318 case NVME_SCT_COMMAND_SPECIFIC: 319 entry = command_specific_status; 320 break; 321 case NVME_SCT_MEDIA_ERROR: 322 entry = media_error_status; 323 break; 324 case NVME_SCT_PATH_RELATED: 325 entry = path_related_status; 326 break; 327 case NVME_SCT_VENDOR_SPECIFIC: 328 return ("VENDOR SPECIFIC"); 329 default: 330 return ("RESERVED"); 331 } 332 333 while (entry->sc != 0xFFFF) { 334 if (entry->sc == sc) 335 return (entry->str); 336 entry++; 337 } 338 return (entry->str); 339 } 340 341 void 342 nvme_qpair_print_completion(struct nvme_qpair *qpair, 343 struct nvme_completion *cpl) 344 { 345 uint8_t sct, sc, crd, m, dnr, p; 346 347 sct = NVME_STATUS_GET_SCT(cpl->status); 348 sc = NVME_STATUS_GET_SC(cpl->status); 349 crd = NVME_STATUS_GET_CRD(cpl->status); 350 m = NVME_STATUS_GET_M(cpl->status); 351 dnr = NVME_STATUS_GET_DNR(cpl->status); 352 p = NVME_STATUS_GET_P(cpl->status); 353 354 nvme_printf(qpair->ctrlr, "%s (%02x/%02x) crd:%x m:%x dnr:%x p:%d " 355 "sqid:%d cid:%d cdw0:%x\n", 356 get_status_string(sct, sc), sct, sc, crd, m, dnr, p, 357 cpl->sqid, cpl->cid, cpl->cdw0); 358 } 359 360 static bool 361 nvme_completion_is_retry(const struct nvme_completion *cpl) 362 { 363 uint8_t sct, sc, dnr; 364 365 sct = NVME_STATUS_GET_SCT(cpl->status); 366 sc = NVME_STATUS_GET_SC(cpl->status); 367 dnr = NVME_STATUS_GET_DNR(cpl->status); /* Do Not Retry Bit */ 368 369 /* 370 * TODO: spec is not clear how commands that are aborted due 371 * to TLER will be marked. So for now, it seems 372 * NAMESPACE_NOT_READY is the only case where we should 373 * look at the DNR bit. Requests failed with ABORTED_BY_REQUEST 374 * set the DNR bit correctly since the driver controls that. 375 */ 376 switch (sct) { 377 case NVME_SCT_GENERIC: 378 switch (sc) { 379 case NVME_SC_ABORTED_BY_REQUEST: 380 case NVME_SC_NAMESPACE_NOT_READY: 381 if (dnr) 382 return (0); 383 else 384 return (1); 385 case NVME_SC_INVALID_OPCODE: 386 case NVME_SC_INVALID_FIELD: 387 case NVME_SC_COMMAND_ID_CONFLICT: 388 case NVME_SC_DATA_TRANSFER_ERROR: 389 case NVME_SC_ABORTED_POWER_LOSS: 390 case NVME_SC_INTERNAL_DEVICE_ERROR: 391 case NVME_SC_ABORTED_SQ_DELETION: 392 case NVME_SC_ABORTED_FAILED_FUSED: 393 case NVME_SC_ABORTED_MISSING_FUSED: 394 case NVME_SC_INVALID_NAMESPACE_OR_FORMAT: 395 case NVME_SC_COMMAND_SEQUENCE_ERROR: 396 case NVME_SC_LBA_OUT_OF_RANGE: 397 case NVME_SC_CAPACITY_EXCEEDED: 398 default: 399 return (0); 400 } 401 case NVME_SCT_COMMAND_SPECIFIC: 402 case NVME_SCT_MEDIA_ERROR: 403 return (0); 404 case NVME_SCT_PATH_RELATED: 405 switch (sc) { 406 case NVME_SC_INTERNAL_PATH_ERROR: 407 if (dnr) 408 return (0); 409 else 410 return (1); 411 default: 412 return (0); 413 } 414 case NVME_SCT_VENDOR_SPECIFIC: 415 default: 416 return (0); 417 } 418 } 419 420 static void 421 nvme_qpair_complete_tracker(struct nvme_tracker *tr, 422 struct nvme_completion *cpl, error_print_t print_on_error) 423 { 424 struct nvme_qpair * qpair = tr->qpair; 425 struct nvme_request *req; 426 bool retry, error, retriable; 427 428 req = tr->req; 429 error = nvme_completion_is_error(cpl); 430 retriable = nvme_completion_is_retry(cpl); 431 retry = error && retriable && req->retries < nvme_retry_count; 432 if (retry) 433 qpair->num_retries++; 434 if (error && req->retries >= nvme_retry_count && retriable) 435 qpair->num_failures++; 436 437 if (error && (print_on_error == ERROR_PRINT_ALL || 438 (!retry && print_on_error == ERROR_PRINT_NO_RETRY))) { 439 nvme_qpair_print_command(qpair, &req->cmd); 440 nvme_qpair_print_completion(qpair, cpl); 441 } 442 443 qpair->act_tr[cpl->cid] = NULL; 444 445 KASSERT(cpl->cid == req->cmd.cid, ("cpl cid does not match cmd cid\n")); 446 447 if (!retry) { 448 if (req->payload_valid) { 449 bus_dmamap_sync(qpair->dma_tag_payload, 450 tr->payload_dma_map, 451 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 452 } 453 if (req->cb_fn) 454 req->cb_fn(req->cb_arg, cpl); 455 } 456 457 mtx_lock(&qpair->lock); 458 459 if (retry) { 460 req->retries++; 461 nvme_qpair_submit_tracker(qpair, tr); 462 } else { 463 if (req->payload_valid) { 464 bus_dmamap_unload(qpair->dma_tag_payload, 465 tr->payload_dma_map); 466 } 467 468 nvme_free_request(req); 469 tr->req = NULL; 470 471 TAILQ_REMOVE(&qpair->outstanding_tr, tr, tailq); 472 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 473 474 /* 475 * If the controller is in the middle of resetting, don't 476 * try to submit queued requests here - let the reset logic 477 * handle that instead. 478 */ 479 if (!STAILQ_EMPTY(&qpair->queued_req) && 480 !qpair->ctrlr->is_resetting) { 481 req = STAILQ_FIRST(&qpair->queued_req); 482 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 483 _nvme_qpair_submit_request(qpair, req); 484 } 485 } 486 487 mtx_unlock(&qpair->lock); 488 } 489 490 static void 491 nvme_qpair_manual_complete_tracker( 492 struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr, 493 error_print_t print_on_error) 494 { 495 struct nvme_completion cpl; 496 497 memset(&cpl, 0, sizeof(cpl)); 498 499 struct nvme_qpair * qpair = tr->qpair; 500 501 cpl.sqid = qpair->id; 502 cpl.cid = tr->cid; 503 cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT; 504 cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT; 505 cpl.status |= (dnr & NVME_STATUS_DNR_MASK) << NVME_STATUS_DNR_SHIFT; 506 nvme_qpair_complete_tracker(tr, &cpl, print_on_error); 507 } 508 509 void 510 nvme_qpair_manual_complete_request(struct nvme_qpair *qpair, 511 struct nvme_request *req, uint32_t sct, uint32_t sc) 512 { 513 struct nvme_completion cpl; 514 bool error; 515 516 memset(&cpl, 0, sizeof(cpl)); 517 cpl.sqid = qpair->id; 518 cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT; 519 cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT; 520 521 error = nvme_completion_is_error(&cpl); 522 523 if (error) { 524 nvme_qpair_print_command(qpair, &req->cmd); 525 nvme_qpair_print_completion(qpair, &cpl); 526 } 527 528 if (req->cb_fn) 529 req->cb_fn(req->cb_arg, &cpl); 530 531 nvme_free_request(req); 532 } 533 534 bool 535 nvme_qpair_process_completions(struct nvme_qpair *qpair) 536 { 537 struct nvme_tracker *tr; 538 struct nvme_completion cpl; 539 int done = 0; 540 bool in_panic = dumping || SCHEDULER_STOPPED(); 541 542 /* 543 * qpair is not enabled, likely because a controller reset is in 544 * progress. Ignore the interrupt - any I/O that was associated with 545 * this interrupt will get retried when the reset is complete. Any 546 * pending completions for when we're in startup will be completed 547 * as soon as initialization is complete and we start sending commands 548 * to the device. 549 */ 550 if (qpair->recovery_state != RECOVERY_NONE) { 551 qpair->num_ignored++; 552 return (false); 553 } 554 555 /* 556 * Sanity check initialization. After we reset the hardware, the phase 557 * is defined to be 1. So if we get here with zero prior calls and the 558 * phase is 0, it means that we've lost a race between the 559 * initialization and the ISR running. With the phase wrong, we'll 560 * process a bunch of completions that aren't really completions leading 561 * to a KASSERT below. 562 */ 563 KASSERT(!(qpair->num_intr_handler_calls == 0 && qpair->phase == 0), 564 ("%s: Phase wrong for first interrupt call.", 565 device_get_nameunit(qpair->ctrlr->dev))); 566 567 qpair->num_intr_handler_calls++; 568 569 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 570 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 571 /* 572 * A panic can stop the CPU this routine is running on at any point. If 573 * we're called during a panic, complete the sq_head wrap protocol for 574 * the case where we are interrupted just after the increment at 1 575 * below, but before we can reset cq_head to zero at 2. Also cope with 576 * the case where we do the zero at 2, but may or may not have done the 577 * phase adjustment at step 3. The panic machinery flushes all pending 578 * memory writes, so we can make these strong ordering assumptions 579 * that would otherwise be unwise if we were racing in real time. 580 */ 581 if (__predict_false(in_panic)) { 582 if (qpair->cq_head == qpair->num_entries) { 583 /* 584 * Here we know that we need to zero cq_head and then negate 585 * the phase, which hasn't been assigned if cq_head isn't 586 * zero due to the atomic_store_rel. 587 */ 588 qpair->cq_head = 0; 589 qpair->phase = !qpair->phase; 590 } else if (qpair->cq_head == 0) { 591 /* 592 * In this case, we know that the assignment at 2 593 * happened below, but we don't know if it 3 happened or 594 * not. To do this, we look at the last completion 595 * entry and set the phase to the opposite phase 596 * that it has. This gets us back in sync 597 */ 598 cpl = qpair->cpl[qpair->num_entries - 1]; 599 nvme_completion_swapbytes(&cpl); 600 qpair->phase = !NVME_STATUS_GET_P(cpl.status); 601 } 602 } 603 604 while (1) { 605 uint16_t status; 606 607 /* 608 * We need to do this dance to avoid a race between the host and 609 * the device where the device overtakes the host while the host 610 * is reading this record, leaving the status field 'new' and 611 * the sqhd and cid fields potentially stale. If the phase 612 * doesn't match, that means status hasn't yet been updated and 613 * we'll get any pending changes next time. It also means that 614 * the phase must be the same the second time. We have to sync 615 * before reading to ensure any bouncing completes. 616 */ 617 status = le16toh(qpair->cpl[qpair->cq_head].status); 618 if (NVME_STATUS_GET_P(status) != qpair->phase) 619 break; 620 621 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 622 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 623 cpl = qpair->cpl[qpair->cq_head]; 624 nvme_completion_swapbytes(&cpl); 625 626 KASSERT( 627 NVME_STATUS_GET_P(status) == NVME_STATUS_GET_P(cpl.status), 628 ("Phase unexpectedly inconsistent")); 629 630 if (cpl.cid < qpair->num_trackers) 631 tr = qpair->act_tr[cpl.cid]; 632 else 633 tr = NULL; 634 635 done++; 636 if (tr != NULL) { 637 nvme_qpair_complete_tracker(tr, &cpl, ERROR_PRINT_ALL); 638 qpair->sq_head = cpl.sqhd; 639 } else if (!in_panic) { 640 /* 641 * A missing tracker is normally an error. However, a 642 * panic can stop the CPU this routine is running on 643 * after completing an I/O but before updating 644 * qpair->cq_head at 1 below. Later, we re-enter this 645 * routine to poll I/O associated with the kernel 646 * dump. We find that the tr has been set to null before 647 * calling the completion routine. If it hasn't 648 * completed (or it triggers a panic), then '1' below 649 * won't have updated cq_head. Rather than panic again, 650 * ignore this condition because it's not unexpected. 651 */ 652 nvme_printf(qpair->ctrlr, 653 "cpl (cid = %u) does not map to outstanding cmd\n", 654 cpl.cid); 655 nvme_qpair_print_completion(qpair, 656 &qpair->cpl[qpair->cq_head]); 657 KASSERT(0, ("received completion for unknown cmd")); 658 } 659 660 /* 661 * There's a number of races with the following (see above) when 662 * the system panics. We compensate for each one of them by 663 * using the atomic store to force strong ordering (at least when 664 * viewed in the aftermath of a panic). 665 */ 666 if (++qpair->cq_head == qpair->num_entries) { /* 1 */ 667 atomic_store_rel_int(&qpair->cq_head, 0); /* 2 */ 668 qpair->phase = !qpair->phase; /* 3 */ 669 } 670 } 671 672 if (done != 0) { 673 bus_space_write_4(qpair->ctrlr->bus_tag, qpair->ctrlr->bus_handle, 674 qpair->cq_hdbl_off, qpair->cq_head); 675 } 676 677 return (done != 0); 678 } 679 680 static void 681 nvme_qpair_msi_handler(void *arg) 682 { 683 struct nvme_qpair *qpair = arg; 684 685 nvme_qpair_process_completions(qpair); 686 } 687 688 int 689 nvme_qpair_construct(struct nvme_qpair *qpair, 690 uint32_t num_entries, uint32_t num_trackers, 691 struct nvme_controller *ctrlr) 692 { 693 struct nvme_tracker *tr; 694 size_t cmdsz, cplsz, prpsz, allocsz, prpmemsz; 695 uint64_t queuemem_phys, prpmem_phys, list_phys; 696 uint8_t *queuemem, *prpmem, *prp_list; 697 int i, err; 698 699 qpair->vector = ctrlr->msi_count > 1 ? qpair->id : 0; 700 qpair->num_entries = num_entries; 701 qpair->num_trackers = num_trackers; 702 qpair->ctrlr = ctrlr; 703 704 mtx_init(&qpair->lock, "nvme qpair lock", NULL, MTX_DEF); 705 706 /* Note: NVMe PRP format is restricted to 4-byte alignment. */ 707 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 708 4, ctrlr->page_size, BUS_SPACE_MAXADDR, 709 BUS_SPACE_MAXADDR, NULL, NULL, ctrlr->max_xfer_size, 710 howmany(ctrlr->max_xfer_size, ctrlr->page_size) + 1, 711 ctrlr->page_size, 0, 712 NULL, NULL, &qpair->dma_tag_payload); 713 if (err != 0) { 714 nvme_printf(ctrlr, "payload tag create failed %d\n", err); 715 goto out; 716 } 717 718 /* 719 * Each component must be page aligned, and individual PRP lists 720 * cannot cross a page boundary. 721 */ 722 cmdsz = qpair->num_entries * sizeof(struct nvme_command); 723 cmdsz = roundup2(cmdsz, ctrlr->page_size); 724 cplsz = qpair->num_entries * sizeof(struct nvme_completion); 725 cplsz = roundup2(cplsz, ctrlr->page_size); 726 /* 727 * For commands requiring more than 2 PRP entries, one PRP will be 728 * embedded in the command (prp1), and the rest of the PRP entries 729 * will be in a list pointed to by the command (prp2). 730 */ 731 prpsz = sizeof(uint64_t) * 732 howmany(ctrlr->max_xfer_size, ctrlr->page_size); 733 prpmemsz = qpair->num_trackers * prpsz; 734 allocsz = cmdsz + cplsz + prpmemsz; 735 736 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 737 ctrlr->page_size, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 738 allocsz, 1, allocsz, 0, NULL, NULL, &qpair->dma_tag); 739 if (err != 0) { 740 nvme_printf(ctrlr, "tag create failed %d\n", err); 741 goto out; 742 } 743 bus_dma_tag_set_domain(qpair->dma_tag, qpair->domain); 744 745 if (bus_dmamem_alloc(qpair->dma_tag, (void **)&queuemem, 746 BUS_DMA_COHERENT | BUS_DMA_NOWAIT, &qpair->queuemem_map)) { 747 nvme_printf(ctrlr, "failed to alloc qpair memory\n"); 748 goto out; 749 } 750 751 if (bus_dmamap_load(qpair->dma_tag, qpair->queuemem_map, 752 queuemem, allocsz, nvme_single_map, &queuemem_phys, 0) != 0) { 753 nvme_printf(ctrlr, "failed to load qpair memory\n"); 754 bus_dmamem_free(qpair->dma_tag, qpair->cmd, 755 qpair->queuemem_map); 756 goto out; 757 } 758 759 qpair->num_cmds = 0; 760 qpair->num_intr_handler_calls = 0; 761 qpair->num_retries = 0; 762 qpair->num_failures = 0; 763 qpair->num_ignored = 0; 764 qpair->cmd = (struct nvme_command *)queuemem; 765 qpair->cpl = (struct nvme_completion *)(queuemem + cmdsz); 766 prpmem = (uint8_t *)(queuemem + cmdsz + cplsz); 767 qpair->cmd_bus_addr = queuemem_phys; 768 qpair->cpl_bus_addr = queuemem_phys + cmdsz; 769 prpmem_phys = queuemem_phys + cmdsz + cplsz; 770 771 callout_init(&qpair->timer, 1); 772 qpair->timer_armed = false; 773 qpair->recovery_state = RECOVERY_WAITING; 774 775 /* 776 * Calcuate the stride of the doorbell register. Many emulators set this 777 * value to correspond to a cache line. However, some hardware has set 778 * it to various small values. 779 */ 780 qpair->sq_tdbl_off = nvme_mmio_offsetof(doorbell[0]) + 781 (qpair->id << (ctrlr->dstrd + 1)); 782 qpair->cq_hdbl_off = nvme_mmio_offsetof(doorbell[0]) + 783 (qpair->id << (ctrlr->dstrd + 1)) + (1 << ctrlr->dstrd); 784 785 TAILQ_INIT(&qpair->free_tr); 786 TAILQ_INIT(&qpair->outstanding_tr); 787 STAILQ_INIT(&qpair->queued_req); 788 789 list_phys = prpmem_phys; 790 prp_list = prpmem; 791 for (i = 0; i < qpair->num_trackers; i++) { 792 if (list_phys + prpsz > prpmem_phys + prpmemsz) { 793 qpair->num_trackers = i; 794 break; 795 } 796 797 /* 798 * Make sure that the PRP list for this tracker doesn't 799 * overflow to another nvme page. 800 */ 801 if (trunc_page(list_phys) != 802 trunc_page(list_phys + prpsz - 1)) { 803 list_phys = roundup2(list_phys, ctrlr->page_size); 804 prp_list = 805 (uint8_t *)roundup2((uintptr_t)prp_list, ctrlr->page_size); 806 } 807 808 tr = malloc_domainset(sizeof(*tr), M_NVME, 809 DOMAINSET_PREF(qpair->domain), M_ZERO | M_WAITOK); 810 bus_dmamap_create(qpair->dma_tag_payload, 0, 811 &tr->payload_dma_map); 812 tr->cid = i; 813 tr->qpair = qpair; 814 tr->prp = (uint64_t *)prp_list; 815 tr->prp_bus_addr = list_phys; 816 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 817 list_phys += prpsz; 818 prp_list += prpsz; 819 } 820 821 if (qpair->num_trackers == 0) { 822 nvme_printf(ctrlr, "failed to allocate enough trackers\n"); 823 goto out; 824 } 825 826 qpair->act_tr = malloc_domainset(sizeof(struct nvme_tracker *) * 827 qpair->num_entries, M_NVME, DOMAINSET_PREF(qpair->domain), 828 M_ZERO | M_WAITOK); 829 830 if (ctrlr->msi_count > 1) { 831 /* 832 * MSI-X vector resource IDs start at 1, so we add one to 833 * the queue's vector to get the corresponding rid to use. 834 */ 835 qpair->rid = qpair->vector + 1; 836 837 qpair->res = bus_alloc_resource_any(ctrlr->dev, SYS_RES_IRQ, 838 &qpair->rid, RF_ACTIVE); 839 if (qpair->res == NULL) { 840 nvme_printf(ctrlr, "unable to allocate MSI\n"); 841 goto out; 842 } 843 if (bus_setup_intr(ctrlr->dev, qpair->res, 844 INTR_TYPE_MISC | INTR_MPSAFE, NULL, 845 nvme_qpair_msi_handler, qpair, &qpair->tag) != 0) { 846 nvme_printf(ctrlr, "unable to setup MSI\n"); 847 goto out; 848 } 849 if (qpair->id == 0) { 850 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 851 "admin"); 852 } else { 853 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 854 "io%d", qpair->id - 1); 855 } 856 } 857 858 return (0); 859 860 out: 861 nvme_qpair_destroy(qpair); 862 return (ENOMEM); 863 } 864 865 static void 866 nvme_qpair_destroy(struct nvme_qpair *qpair) 867 { 868 struct nvme_tracker *tr; 869 870 callout_drain(&qpair->timer); 871 872 if (qpair->tag) { 873 bus_teardown_intr(qpair->ctrlr->dev, qpair->res, qpair->tag); 874 qpair->tag = NULL; 875 } 876 877 if (qpair->act_tr) { 878 free(qpair->act_tr, M_NVME); 879 qpair->act_tr = NULL; 880 } 881 882 while (!TAILQ_EMPTY(&qpair->free_tr)) { 883 tr = TAILQ_FIRST(&qpair->free_tr); 884 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 885 bus_dmamap_destroy(qpair->dma_tag_payload, 886 tr->payload_dma_map); 887 free(tr, M_NVME); 888 } 889 890 if (qpair->cmd != NULL) { 891 bus_dmamap_unload(qpair->dma_tag, qpair->queuemem_map); 892 bus_dmamem_free(qpair->dma_tag, qpair->cmd, 893 qpair->queuemem_map); 894 qpair->cmd = NULL; 895 } 896 897 if (qpair->dma_tag) { 898 bus_dma_tag_destroy(qpair->dma_tag); 899 qpair->dma_tag = NULL; 900 } 901 902 if (qpair->dma_tag_payload) { 903 bus_dma_tag_destroy(qpair->dma_tag_payload); 904 qpair->dma_tag_payload = NULL; 905 } 906 907 if (mtx_initialized(&qpair->lock)) 908 mtx_destroy(&qpair->lock); 909 910 if (qpair->res) { 911 bus_release_resource(qpair->ctrlr->dev, SYS_RES_IRQ, 912 rman_get_rid(qpair->res), qpair->res); 913 qpair->res = NULL; 914 } 915 } 916 917 static void 918 nvme_admin_qpair_abort_aers(struct nvme_qpair *qpair) 919 { 920 struct nvme_tracker *tr; 921 922 tr = TAILQ_FIRST(&qpair->outstanding_tr); 923 while (tr != NULL) { 924 if (tr->req->cmd.opc == NVME_OPC_ASYNC_EVENT_REQUEST) { 925 nvme_qpair_manual_complete_tracker(tr, 926 NVME_SCT_GENERIC, NVME_SC_ABORTED_SQ_DELETION, 0, 927 ERROR_PRINT_NONE); 928 tr = TAILQ_FIRST(&qpair->outstanding_tr); 929 } else { 930 tr = TAILQ_NEXT(tr, tailq); 931 } 932 } 933 } 934 935 void 936 nvme_admin_qpair_destroy(struct nvme_qpair *qpair) 937 { 938 939 nvme_admin_qpair_abort_aers(qpair); 940 nvme_qpair_destroy(qpair); 941 } 942 943 void 944 nvme_io_qpair_destroy(struct nvme_qpair *qpair) 945 { 946 947 nvme_qpair_destroy(qpair); 948 } 949 950 static void 951 nvme_qpair_timeout(void *arg) 952 { 953 struct nvme_qpair *qpair = arg; 954 struct nvme_controller *ctrlr = qpair->ctrlr; 955 struct nvme_tracker *tr; 956 sbintime_t now; 957 bool idle; 958 uint32_t csts; 959 uint8_t cfs; 960 961 mtx_lock(&qpair->lock); 962 idle = TAILQ_EMPTY(&qpair->outstanding_tr); 963 again: 964 switch (qpair->recovery_state) { 965 case RECOVERY_NONE: 966 if (idle) 967 break; 968 now = getsbinuptime(); 969 idle = true; 970 TAILQ_FOREACH(tr, &qpair->outstanding_tr, tailq) { 971 if (tr->deadline == SBT_MAX) 972 continue; 973 idle = false; 974 if (now > tr->deadline) { 975 /* 976 * We're now passed our earliest deadline. We 977 * need to do expensive things to cope, but next 978 * time. Flag that and close the door to any 979 * further processing. 980 */ 981 qpair->recovery_state = RECOVERY_START; 982 nvme_printf(ctrlr, "RECOVERY_START %jd vs %jd\n", 983 (uintmax_t)now, (uintmax_t)tr->deadline); 984 break; 985 } 986 } 987 break; 988 case RECOVERY_START: 989 /* 990 * Read csts to get value of cfs - controller fatal status. 991 * If no fatal status, try to call the completion routine, and 992 * if completes transactions, report a missed interrupt and 993 * return (this may need to be rate limited). Otherwise, if 994 * aborts are enabled and the controller is not reporting 995 * fatal status, abort the command. Otherwise, just reset the 996 * controller and hope for the best. 997 */ 998 csts = nvme_mmio_read_4(ctrlr, csts); 999 cfs = (csts >> NVME_CSTS_REG_CFS_SHIFT) & NVME_CSTS_REG_CFS_MASK; 1000 if (cfs) { 1001 nvme_printf(ctrlr, "Controller in fatal status, resetting\n"); 1002 qpair->recovery_state = RECOVERY_RESET; 1003 goto again; 1004 } 1005 mtx_unlock(&qpair->lock); 1006 if (nvme_qpair_process_completions(qpair)) { 1007 nvme_printf(ctrlr, "Completions present in output without an interrupt\n"); 1008 qpair->recovery_state = RECOVERY_NONE; 1009 } else { 1010 nvme_printf(ctrlr, "timeout with nothing complete, resetting\n"); 1011 qpair->recovery_state = RECOVERY_RESET; 1012 mtx_lock(&qpair->lock); 1013 goto again; 1014 } 1015 mtx_lock(&qpair->lock); 1016 break; 1017 case RECOVERY_RESET: 1018 /* 1019 * If we get here due to a possible surprise hot-unplug event, 1020 * then we let nvme_ctrlr_reset confirm and fail the 1021 * controller. 1022 */ 1023 nvme_printf(ctrlr, "Resetting controller due to a timeout%s.\n", 1024 (csts == 0xffffffff) ? " and possible hot unplug" : 1025 (cfs ? " and fatal error status" : "")); 1026 nvme_printf(ctrlr, "RECOVERY_WAITING\n"); 1027 qpair->recovery_state = RECOVERY_WAITING; 1028 nvme_ctrlr_reset(ctrlr); 1029 break; 1030 case RECOVERY_WAITING: 1031 nvme_printf(ctrlr, "waiting\n"); 1032 break; 1033 } 1034 1035 /* 1036 * Rearm the timeout. 1037 */ 1038 if (!idle) { 1039 callout_schedule_sbt(&qpair->timer, SBT_1S / 2, SBT_1S / 2, 0); 1040 } else { 1041 qpair->timer_armed = false; 1042 } 1043 mtx_unlock(&qpair->lock); 1044 } 1045 1046 /* 1047 * Submit the tracker to the hardware. Must already be in the 1048 * outstanding queue when called. 1049 */ 1050 void 1051 nvme_qpair_submit_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr) 1052 { 1053 struct nvme_request *req; 1054 struct nvme_controller *ctrlr; 1055 int timeout; 1056 1057 mtx_assert(&qpair->lock, MA_OWNED); 1058 1059 req = tr->req; 1060 req->cmd.cid = tr->cid; 1061 qpair->act_tr[tr->cid] = tr; 1062 ctrlr = qpair->ctrlr; 1063 1064 if (req->timeout) { 1065 if (req->cb_fn == nvme_completion_poll_cb) 1066 timeout = 1; 1067 else 1068 timeout = ctrlr->timeout_period; 1069 tr->deadline = getsbinuptime() + timeout * SBT_1S; 1070 if (!qpair->timer_armed) { 1071 qpair->timer_armed = true; 1072 callout_reset_sbt_on(&qpair->timer, SBT_1S / 2, SBT_1S / 2, 1073 nvme_qpair_timeout, qpair, qpair->cpu, 0); 1074 } 1075 } else 1076 tr->deadline = SBT_MAX; 1077 1078 /* Copy the command from the tracker to the submission queue. */ 1079 memcpy(&qpair->cmd[qpair->sq_tail], &req->cmd, sizeof(req->cmd)); 1080 1081 if (++qpair->sq_tail == qpair->num_entries) 1082 qpair->sq_tail = 0; 1083 1084 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 1085 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1086 bus_space_write_4(qpair->ctrlr->bus_tag, qpair->ctrlr->bus_handle, 1087 qpair->sq_tdbl_off, qpair->sq_tail); 1088 qpair->num_cmds++; 1089 } 1090 1091 static void 1092 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error) 1093 { 1094 struct nvme_tracker *tr = arg; 1095 uint32_t cur_nseg; 1096 1097 /* 1098 * If the mapping operation failed, return immediately. The caller 1099 * is responsible for detecting the error status and failing the 1100 * tracker manually. 1101 */ 1102 if (error != 0) { 1103 nvme_printf(tr->qpair->ctrlr, 1104 "nvme_payload_map err %d\n", error); 1105 return; 1106 } 1107 1108 /* 1109 * Note that we specified ctrlr->page_size for alignment and max 1110 * segment size when creating the bus dma tags. So here we can safely 1111 * just transfer each segment to its associated PRP entry. 1112 */ 1113 tr->req->cmd.prp1 = htole64(seg[0].ds_addr); 1114 1115 if (nseg == 2) { 1116 tr->req->cmd.prp2 = htole64(seg[1].ds_addr); 1117 } else if (nseg > 2) { 1118 cur_nseg = 1; 1119 tr->req->cmd.prp2 = htole64((uint64_t)tr->prp_bus_addr); 1120 while (cur_nseg < nseg) { 1121 tr->prp[cur_nseg-1] = 1122 htole64((uint64_t)seg[cur_nseg].ds_addr); 1123 cur_nseg++; 1124 } 1125 } else { 1126 /* 1127 * prp2 should not be used by the controller 1128 * since there is only one segment, but set 1129 * to 0 just to be safe. 1130 */ 1131 tr->req->cmd.prp2 = 0; 1132 } 1133 1134 bus_dmamap_sync(tr->qpair->dma_tag_payload, tr->payload_dma_map, 1135 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1136 nvme_qpair_submit_tracker(tr->qpair, tr); 1137 } 1138 1139 static void 1140 _nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 1141 { 1142 struct nvme_tracker *tr; 1143 int err = 0; 1144 1145 mtx_assert(&qpair->lock, MA_OWNED); 1146 1147 tr = TAILQ_FIRST(&qpair->free_tr); 1148 req->qpair = qpair; 1149 1150 if (tr == NULL || qpair->recovery_state != RECOVERY_NONE) { 1151 /* 1152 * No tracker is available, or the qpair is disabled due to 1153 * an in-progress controller-level reset or controller 1154 * failure. 1155 */ 1156 1157 if (qpair->ctrlr->is_failed) { 1158 /* 1159 * The controller has failed, so fail the request. 1160 */ 1161 nvme_qpair_manual_complete_request(qpair, req, 1162 NVME_SCT_GENERIC, NVME_SC_ABORTED_BY_REQUEST); 1163 } else { 1164 /* 1165 * Put the request on the qpair's request queue to be 1166 * processed when a tracker frees up via a command 1167 * completion or when the controller reset is 1168 * completed. 1169 */ 1170 STAILQ_INSERT_TAIL(&qpair->queued_req, req, stailq); 1171 } 1172 return; 1173 } 1174 1175 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 1176 TAILQ_INSERT_TAIL(&qpair->outstanding_tr, tr, tailq); 1177 tr->deadline = SBT_MAX; 1178 tr->req = req; 1179 1180 if (!req->payload_valid) { 1181 nvme_qpair_submit_tracker(tr->qpair, tr); 1182 return; 1183 } 1184 1185 err = bus_dmamap_load_mem(tr->qpair->dma_tag_payload, 1186 tr->payload_dma_map, &req->payload, nvme_payload_map, tr, 0); 1187 if (err != 0) { 1188 /* 1189 * The dmamap operation failed, so we manually fail the 1190 * tracker here with DATA_TRANSFER_ERROR status. 1191 * 1192 * nvme_qpair_manual_complete_tracker must not be called 1193 * with the qpair lock held. 1194 */ 1195 nvme_printf(qpair->ctrlr, 1196 "bus_dmamap_load_mem returned 0x%x!\n", err); 1197 mtx_unlock(&qpair->lock); 1198 nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC, 1199 NVME_SC_DATA_TRANSFER_ERROR, DO_NOT_RETRY, ERROR_PRINT_ALL); 1200 mtx_lock(&qpair->lock); 1201 } 1202 } 1203 1204 void 1205 nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 1206 { 1207 1208 mtx_lock(&qpair->lock); 1209 _nvme_qpair_submit_request(qpair, req); 1210 mtx_unlock(&qpair->lock); 1211 } 1212 1213 static void 1214 nvme_qpair_enable(struct nvme_qpair *qpair) 1215 { 1216 mtx_assert(&qpair->lock, MA_OWNED); 1217 1218 qpair->recovery_state = RECOVERY_NONE; 1219 } 1220 1221 void 1222 nvme_qpair_reset(struct nvme_qpair *qpair) 1223 { 1224 1225 qpair->sq_head = qpair->sq_tail = qpair->cq_head = 0; 1226 1227 /* 1228 * First time through the completion queue, HW will set phase 1229 * bit on completions to 1. So set this to 1 here, indicating 1230 * we're looking for a 1 to know which entries have completed. 1231 * we'll toggle the bit each time when the completion queue 1232 * rolls over. 1233 */ 1234 qpair->phase = 1; 1235 1236 memset(qpair->cmd, 0, 1237 qpair->num_entries * sizeof(struct nvme_command)); 1238 memset(qpair->cpl, 0, 1239 qpair->num_entries * sizeof(struct nvme_completion)); 1240 } 1241 1242 void 1243 nvme_admin_qpair_enable(struct nvme_qpair *qpair) 1244 { 1245 struct nvme_tracker *tr; 1246 struct nvme_tracker *tr_temp; 1247 bool rpt; 1248 1249 /* 1250 * Manually abort each outstanding admin command. Do not retry 1251 * admin commands found here, since they will be left over from 1252 * a controller reset and its likely the context in which the 1253 * command was issued no longer applies. 1254 */ 1255 rpt = !TAILQ_EMPTY(&qpair->outstanding_tr); 1256 if (rpt) 1257 nvme_printf(qpair->ctrlr, 1258 "aborting outstanding admin command\n"); 1259 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1260 nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC, 1261 NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL); 1262 } 1263 if (rpt) 1264 nvme_printf(qpair->ctrlr, 1265 "done aborting outstanding admin\n"); 1266 1267 mtx_lock(&qpair->lock); 1268 nvme_qpair_enable(qpair); 1269 mtx_unlock(&qpair->lock); 1270 } 1271 1272 void 1273 nvme_io_qpair_enable(struct nvme_qpair *qpair) 1274 { 1275 STAILQ_HEAD(, nvme_request) temp; 1276 struct nvme_tracker *tr; 1277 struct nvme_tracker *tr_temp; 1278 struct nvme_request *req; 1279 bool report; 1280 1281 /* 1282 * Manually abort each outstanding I/O. This normally results in a 1283 * retry, unless the retry count on the associated request has 1284 * reached its limit. 1285 */ 1286 report = !TAILQ_EMPTY(&qpair->outstanding_tr); 1287 if (report) 1288 nvme_printf(qpair->ctrlr, "aborting outstanding i/o\n"); 1289 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1290 nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC, 1291 NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_NO_RETRY); 1292 } 1293 if (report) 1294 nvme_printf(qpair->ctrlr, "done aborting outstanding i/o\n"); 1295 1296 mtx_lock(&qpair->lock); 1297 1298 nvme_qpair_enable(qpair); 1299 1300 STAILQ_INIT(&temp); 1301 STAILQ_SWAP(&qpair->queued_req, &temp, nvme_request); 1302 1303 report = !STAILQ_EMPTY(&temp); 1304 if (report) 1305 nvme_printf(qpair->ctrlr, "resubmitting queued i/o\n"); 1306 while (!STAILQ_EMPTY(&temp)) { 1307 req = STAILQ_FIRST(&temp); 1308 STAILQ_REMOVE_HEAD(&temp, stailq); 1309 nvme_qpair_print_command(qpair, &req->cmd); 1310 _nvme_qpair_submit_request(qpair, req); 1311 } 1312 if (report) 1313 nvme_printf(qpair->ctrlr, "done resubmitting i/o\n"); 1314 1315 mtx_unlock(&qpair->lock); 1316 } 1317 1318 static void 1319 nvme_qpair_disable(struct nvme_qpair *qpair) 1320 { 1321 struct nvme_tracker *tr, *tr_temp; 1322 1323 mtx_lock(&qpair->lock); 1324 qpair->recovery_state = RECOVERY_WAITING; 1325 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1326 tr->deadline = SBT_MAX; 1327 } 1328 mtx_unlock(&qpair->lock); 1329 } 1330 1331 void 1332 nvme_admin_qpair_disable(struct nvme_qpair *qpair) 1333 { 1334 1335 nvme_qpair_disable(qpair); 1336 nvme_admin_qpair_abort_aers(qpair); 1337 } 1338 1339 void 1340 nvme_io_qpair_disable(struct nvme_qpair *qpair) 1341 { 1342 1343 nvme_qpair_disable(qpair); 1344 } 1345 1346 void 1347 nvme_qpair_fail(struct nvme_qpair *qpair) 1348 { 1349 struct nvme_tracker *tr; 1350 struct nvme_request *req; 1351 1352 if (!mtx_initialized(&qpair->lock)) 1353 return; 1354 1355 mtx_lock(&qpair->lock); 1356 1357 while (!STAILQ_EMPTY(&qpair->queued_req)) { 1358 req = STAILQ_FIRST(&qpair->queued_req); 1359 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 1360 nvme_printf(qpair->ctrlr, "failing queued i/o\n"); 1361 mtx_unlock(&qpair->lock); 1362 nvme_qpair_manual_complete_request(qpair, req, NVME_SCT_GENERIC, 1363 NVME_SC_ABORTED_BY_REQUEST); 1364 mtx_lock(&qpair->lock); 1365 } 1366 1367 /* Manually abort each outstanding I/O. */ 1368 while (!TAILQ_EMPTY(&qpair->outstanding_tr)) { 1369 tr = TAILQ_FIRST(&qpair->outstanding_tr); 1370 /* 1371 * Do not remove the tracker. The abort_tracker path will 1372 * do that for us. 1373 */ 1374 nvme_printf(qpair->ctrlr, "failing outstanding i/o\n"); 1375 mtx_unlock(&qpair->lock); 1376 nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC, 1377 NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL); 1378 mtx_lock(&qpair->lock); 1379 } 1380 1381 mtx_unlock(&qpair->lock); 1382 } 1383