1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012-2014 Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/proc.h> 36 37 #include <dev/pci/pcivar.h> 38 39 #include "nvme_private.h" 40 41 typedef enum error_print { ERROR_PRINT_NONE, ERROR_PRINT_NO_RETRY, ERROR_PRINT_ALL } error_print_t; 42 #define DO_NOT_RETRY 1 43 44 static void _nvme_qpair_submit_request(struct nvme_qpair *qpair, 45 struct nvme_request *req); 46 static void nvme_qpair_destroy(struct nvme_qpair *qpair); 47 48 struct nvme_opcode_string { 49 50 uint16_t opc; 51 const char * str; 52 }; 53 54 static struct nvme_opcode_string admin_opcode[] = { 55 { NVME_OPC_DELETE_IO_SQ, "DELETE IO SQ" }, 56 { NVME_OPC_CREATE_IO_SQ, "CREATE IO SQ" }, 57 { NVME_OPC_GET_LOG_PAGE, "GET LOG PAGE" }, 58 { NVME_OPC_DELETE_IO_CQ, "DELETE IO CQ" }, 59 { NVME_OPC_CREATE_IO_CQ, "CREATE IO CQ" }, 60 { NVME_OPC_IDENTIFY, "IDENTIFY" }, 61 { NVME_OPC_ABORT, "ABORT" }, 62 { NVME_OPC_SET_FEATURES, "SET FEATURES" }, 63 { NVME_OPC_GET_FEATURES, "GET FEATURES" }, 64 { NVME_OPC_ASYNC_EVENT_REQUEST, "ASYNC EVENT REQUEST" }, 65 { NVME_OPC_FIRMWARE_ACTIVATE, "FIRMWARE ACTIVATE" }, 66 { NVME_OPC_FIRMWARE_IMAGE_DOWNLOAD, "FIRMWARE IMAGE DOWNLOAD" }, 67 { NVME_OPC_DEVICE_SELF_TEST, "DEVICE SELF-TEST" }, 68 { NVME_OPC_NAMESPACE_ATTACHMENT, "NAMESPACE ATTACHMENT" }, 69 { NVME_OPC_KEEP_ALIVE, "KEEP ALIVE" }, 70 { NVME_OPC_DIRECTIVE_SEND, "DIRECTIVE SEND" }, 71 { NVME_OPC_DIRECTIVE_RECEIVE, "DIRECTIVE RECEIVE" }, 72 { NVME_OPC_VIRTUALIZATION_MANAGEMENT, "VIRTUALIZATION MANAGEMENT" }, 73 { NVME_OPC_NVME_MI_SEND, "NVME-MI SEND" }, 74 { NVME_OPC_NVME_MI_RECEIVE, "NVME-MI RECEIVE" }, 75 { NVME_OPC_DOORBELL_BUFFER_CONFIG, "DOORBELL BUFFER CONFIG" }, 76 { NVME_OPC_FORMAT_NVM, "FORMAT NVM" }, 77 { NVME_OPC_SECURITY_SEND, "SECURITY SEND" }, 78 { NVME_OPC_SECURITY_RECEIVE, "SECURITY RECEIVE" }, 79 { NVME_OPC_SANITIZE, "SANITIZE" }, 80 { 0xFFFF, "ADMIN COMMAND" } 81 }; 82 83 static struct nvme_opcode_string io_opcode[] = { 84 { NVME_OPC_FLUSH, "FLUSH" }, 85 { NVME_OPC_WRITE, "WRITE" }, 86 { NVME_OPC_READ, "READ" }, 87 { NVME_OPC_WRITE_UNCORRECTABLE, "WRITE UNCORRECTABLE" }, 88 { NVME_OPC_COMPARE, "COMPARE" }, 89 { NVME_OPC_WRITE_ZEROES, "WRITE ZEROES" }, 90 { NVME_OPC_DATASET_MANAGEMENT, "DATASET MANAGEMENT" }, 91 { NVME_OPC_RESERVATION_REGISTER, "RESERVATION REGISTER" }, 92 { NVME_OPC_RESERVATION_REPORT, "RESERVATION REPORT" }, 93 { NVME_OPC_RESERVATION_ACQUIRE, "RESERVATION ACQUIRE" }, 94 { NVME_OPC_RESERVATION_RELEASE, "RESERVATION RELEASE" }, 95 { 0xFFFF, "IO COMMAND" } 96 }; 97 98 static const char * 99 get_admin_opcode_string(uint16_t opc) 100 { 101 struct nvme_opcode_string *entry; 102 103 entry = admin_opcode; 104 105 while (entry->opc != 0xFFFF) { 106 if (entry->opc == opc) 107 return (entry->str); 108 entry++; 109 } 110 return (entry->str); 111 } 112 113 static const char * 114 get_io_opcode_string(uint16_t opc) 115 { 116 struct nvme_opcode_string *entry; 117 118 entry = io_opcode; 119 120 while (entry->opc != 0xFFFF) { 121 if (entry->opc == opc) 122 return (entry->str); 123 entry++; 124 } 125 return (entry->str); 126 } 127 128 129 static void 130 nvme_admin_qpair_print_command(struct nvme_qpair *qpair, 131 struct nvme_command *cmd) 132 { 133 134 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%x " 135 "cdw10:%08x cdw11:%08x\n", 136 get_admin_opcode_string(cmd->opc), cmd->opc, qpair->id, cmd->cid, 137 le32toh(cmd->nsid), le32toh(cmd->cdw10), le32toh(cmd->cdw11)); 138 } 139 140 static void 141 nvme_io_qpair_print_command(struct nvme_qpair *qpair, 142 struct nvme_command *cmd) 143 { 144 145 switch (cmd->opc) { 146 case NVME_OPC_WRITE: 147 case NVME_OPC_READ: 148 case NVME_OPC_WRITE_UNCORRECTABLE: 149 case NVME_OPC_COMPARE: 150 case NVME_OPC_WRITE_ZEROES: 151 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d " 152 "lba:%llu len:%d\n", 153 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid), 154 ((unsigned long long)le32toh(cmd->cdw11) << 32) + le32toh(cmd->cdw10), 155 (le32toh(cmd->cdw12) & 0xFFFF) + 1); 156 break; 157 case NVME_OPC_FLUSH: 158 case NVME_OPC_DATASET_MANAGEMENT: 159 case NVME_OPC_RESERVATION_REGISTER: 160 case NVME_OPC_RESERVATION_REPORT: 161 case NVME_OPC_RESERVATION_ACQUIRE: 162 case NVME_OPC_RESERVATION_RELEASE: 163 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d\n", 164 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid)); 165 break; 166 default: 167 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%d\n", 168 get_io_opcode_string(cmd->opc), cmd->opc, qpair->id, 169 cmd->cid, le32toh(cmd->nsid)); 170 break; 171 } 172 } 173 174 static void 175 nvme_qpair_print_command(struct nvme_qpair *qpair, struct nvme_command *cmd) 176 { 177 if (qpair->id == 0) 178 nvme_admin_qpair_print_command(qpair, cmd); 179 else 180 nvme_io_qpair_print_command(qpair, cmd); 181 } 182 183 struct nvme_status_string { 184 185 uint16_t sc; 186 const char * str; 187 }; 188 189 static struct nvme_status_string generic_status[] = { 190 { NVME_SC_SUCCESS, "SUCCESS" }, 191 { NVME_SC_INVALID_OPCODE, "INVALID OPCODE" }, 192 { NVME_SC_INVALID_FIELD, "INVALID_FIELD" }, 193 { NVME_SC_COMMAND_ID_CONFLICT, "COMMAND ID CONFLICT" }, 194 { NVME_SC_DATA_TRANSFER_ERROR, "DATA TRANSFER ERROR" }, 195 { NVME_SC_ABORTED_POWER_LOSS, "ABORTED - POWER LOSS" }, 196 { NVME_SC_INTERNAL_DEVICE_ERROR, "INTERNAL DEVICE ERROR" }, 197 { NVME_SC_ABORTED_BY_REQUEST, "ABORTED - BY REQUEST" }, 198 { NVME_SC_ABORTED_SQ_DELETION, "ABORTED - SQ DELETION" }, 199 { NVME_SC_ABORTED_FAILED_FUSED, "ABORTED - FAILED FUSED" }, 200 { NVME_SC_ABORTED_MISSING_FUSED, "ABORTED - MISSING FUSED" }, 201 { NVME_SC_INVALID_NAMESPACE_OR_FORMAT, "INVALID NAMESPACE OR FORMAT" }, 202 { NVME_SC_COMMAND_SEQUENCE_ERROR, "COMMAND SEQUENCE ERROR" }, 203 { NVME_SC_INVALID_SGL_SEGMENT_DESCR, "INVALID SGL SEGMENT DESCRIPTOR" }, 204 { NVME_SC_INVALID_NUMBER_OF_SGL_DESCR, "INVALID NUMBER OF SGL DESCRIPTORS" }, 205 { NVME_SC_DATA_SGL_LENGTH_INVALID, "DATA SGL LENGTH INVALID" }, 206 { NVME_SC_METADATA_SGL_LENGTH_INVALID, "METADATA SGL LENGTH INVALID" }, 207 { NVME_SC_SGL_DESCRIPTOR_TYPE_INVALID, "SGL DESCRIPTOR TYPE INVALID" }, 208 { NVME_SC_INVALID_USE_OF_CMB, "INVALID USE OF CONTROLLER MEMORY BUFFER" }, 209 { NVME_SC_PRP_OFFET_INVALID, "PRP OFFET INVALID" }, 210 { NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED, "ATOMIC WRITE UNIT EXCEEDED" }, 211 { NVME_SC_OPERATION_DENIED, "OPERATION DENIED" }, 212 { NVME_SC_SGL_OFFSET_INVALID, "SGL OFFSET INVALID" }, 213 { NVME_SC_HOST_ID_INCONSISTENT_FORMAT, "HOST IDENTIFIER INCONSISTENT FORMAT" }, 214 { NVME_SC_KEEP_ALIVE_TIMEOUT_EXPIRED, "KEEP ALIVE TIMEOUT EXPIRED" }, 215 { NVME_SC_KEEP_ALIVE_TIMEOUT_INVALID, "KEEP ALIVE TIMEOUT INVALID" }, 216 { NVME_SC_ABORTED_DUE_TO_PREEMPT, "COMMAND ABORTED DUE TO PREEMPT AND ABORT" }, 217 { NVME_SC_SANITIZE_FAILED, "SANITIZE FAILED" }, 218 { NVME_SC_SANITIZE_IN_PROGRESS, "SANITIZE IN PROGRESS" }, 219 { NVME_SC_SGL_DATA_BLOCK_GRAN_INVALID, "SGL_DATA_BLOCK_GRANULARITY_INVALID" }, 220 { NVME_SC_NOT_SUPPORTED_IN_CMB, "COMMAND NOT SUPPORTED FOR QUEUE IN CMB" }, 221 222 { NVME_SC_LBA_OUT_OF_RANGE, "LBA OUT OF RANGE" }, 223 { NVME_SC_CAPACITY_EXCEEDED, "CAPACITY EXCEEDED" }, 224 { NVME_SC_NAMESPACE_NOT_READY, "NAMESPACE NOT READY" }, 225 { NVME_SC_RESERVATION_CONFLICT, "RESERVATION CONFLICT" }, 226 { NVME_SC_FORMAT_IN_PROGRESS, "FORMAT IN PROGRESS" }, 227 { 0xFFFF, "GENERIC" } 228 }; 229 230 static struct nvme_status_string command_specific_status[] = { 231 { NVME_SC_COMPLETION_QUEUE_INVALID, "INVALID COMPLETION QUEUE" }, 232 { NVME_SC_INVALID_QUEUE_IDENTIFIER, "INVALID QUEUE IDENTIFIER" }, 233 { NVME_SC_MAXIMUM_QUEUE_SIZE_EXCEEDED, "MAX QUEUE SIZE EXCEEDED" }, 234 { NVME_SC_ABORT_COMMAND_LIMIT_EXCEEDED, "ABORT CMD LIMIT EXCEEDED" }, 235 { NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED, "ASYNC LIMIT EXCEEDED" }, 236 { NVME_SC_INVALID_FIRMWARE_SLOT, "INVALID FIRMWARE SLOT" }, 237 { NVME_SC_INVALID_FIRMWARE_IMAGE, "INVALID FIRMWARE IMAGE" }, 238 { NVME_SC_INVALID_INTERRUPT_VECTOR, "INVALID INTERRUPT VECTOR" }, 239 { NVME_SC_INVALID_LOG_PAGE, "INVALID LOG PAGE" }, 240 { NVME_SC_INVALID_FORMAT, "INVALID FORMAT" }, 241 { NVME_SC_FIRMWARE_REQUIRES_RESET, "FIRMWARE REQUIRES RESET" }, 242 { NVME_SC_INVALID_QUEUE_DELETION, "INVALID QUEUE DELETION" }, 243 { NVME_SC_FEATURE_NOT_SAVEABLE, "FEATURE IDENTIFIER NOT SAVEABLE" }, 244 { NVME_SC_FEATURE_NOT_CHANGEABLE, "FEATURE NOT CHANGEABLE" }, 245 { NVME_SC_FEATURE_NOT_NS_SPECIFIC, "FEATURE NOT NAMESPACE SPECIFIC" }, 246 { NVME_SC_FW_ACT_REQUIRES_NVMS_RESET, "FIRMWARE ACTIVATION REQUIRES NVM SUBSYSTEM RESET" }, 247 { NVME_SC_FW_ACT_REQUIRES_RESET, "FIRMWARE ACTIVATION REQUIRES RESET" }, 248 { NVME_SC_FW_ACT_REQUIRES_TIME, "FIRMWARE ACTIVATION REQUIRES MAXIMUM TIME VIOLATION" }, 249 { NVME_SC_FW_ACT_PROHIBITED, "FIRMWARE ACTIVATION PROHIBITED" }, 250 { NVME_SC_OVERLAPPING_RANGE, "OVERLAPPING RANGE" }, 251 { NVME_SC_NS_INSUFFICIENT_CAPACITY, "NAMESPACE INSUFFICIENT CAPACITY" }, 252 { NVME_SC_NS_ID_UNAVAILABLE, "NAMESPACE IDENTIFIER UNAVAILABLE" }, 253 { NVME_SC_NS_ALREADY_ATTACHED, "NAMESPACE ALREADY ATTACHED" }, 254 { NVME_SC_NS_IS_PRIVATE, "NAMESPACE IS PRIVATE" }, 255 { NVME_SC_NS_NOT_ATTACHED, "NS NOT ATTACHED" }, 256 { NVME_SC_THIN_PROV_NOT_SUPPORTED, "THIN PROVISIONING NOT SUPPORTED" }, 257 { NVME_SC_CTRLR_LIST_INVALID, "CONTROLLER LIST INVALID" }, 258 { NVME_SC_SELT_TEST_IN_PROGRESS, "DEVICE SELT-TEST IN PROGRESS" }, 259 { NVME_SC_BOOT_PART_WRITE_PROHIB, "BOOT PARTITION WRITE PROHIBITED" }, 260 { NVME_SC_INVALID_CTRLR_ID, "INVALID CONTROLLER IDENTIFIER" }, 261 { NVME_SC_INVALID_SEC_CTRLR_STATE, "INVALID SECONDARY CONTROLLER STATE" }, 262 { NVME_SC_INVALID_NUM_OF_CTRLR_RESRC, "INVALID NUMBER OF CONTROLLER RESOURCES" }, 263 { NVME_SC_INVALID_RESOURCE_ID, "INVALID RESOURCE IDENTIFIER" }, 264 265 { NVME_SC_CONFLICTING_ATTRIBUTES, "CONFLICTING ATTRIBUTES" }, 266 { NVME_SC_INVALID_PROTECTION_INFO, "INVALID PROTECTION INFO" }, 267 { NVME_SC_ATTEMPTED_WRITE_TO_RO_PAGE, "WRITE TO RO PAGE" }, 268 { 0xFFFF, "COMMAND SPECIFIC" } 269 }; 270 271 static struct nvme_status_string media_error_status[] = { 272 { NVME_SC_WRITE_FAULTS, "WRITE FAULTS" }, 273 { NVME_SC_UNRECOVERED_READ_ERROR, "UNRECOVERED READ ERROR" }, 274 { NVME_SC_GUARD_CHECK_ERROR, "GUARD CHECK ERROR" }, 275 { NVME_SC_APPLICATION_TAG_CHECK_ERROR, "APPLICATION TAG CHECK ERROR" }, 276 { NVME_SC_REFERENCE_TAG_CHECK_ERROR, "REFERENCE TAG CHECK ERROR" }, 277 { NVME_SC_COMPARE_FAILURE, "COMPARE FAILURE" }, 278 { NVME_SC_ACCESS_DENIED, "ACCESS DENIED" }, 279 { NVME_SC_DEALLOCATED_OR_UNWRITTEN, "DEALLOCATED OR UNWRITTEN LOGICAL BLOCK" }, 280 { 0xFFFF, "MEDIA ERROR" } 281 }; 282 283 static const char * 284 get_status_string(uint16_t sct, uint16_t sc) 285 { 286 struct nvme_status_string *entry; 287 288 switch (sct) { 289 case NVME_SCT_GENERIC: 290 entry = generic_status; 291 break; 292 case NVME_SCT_COMMAND_SPECIFIC: 293 entry = command_specific_status; 294 break; 295 case NVME_SCT_MEDIA_ERROR: 296 entry = media_error_status; 297 break; 298 case NVME_SCT_VENDOR_SPECIFIC: 299 return ("VENDOR SPECIFIC"); 300 default: 301 return ("RESERVED"); 302 } 303 304 while (entry->sc != 0xFFFF) { 305 if (entry->sc == sc) 306 return (entry->str); 307 entry++; 308 } 309 return (entry->str); 310 } 311 312 static void 313 nvme_qpair_print_completion(struct nvme_qpair *qpair, 314 struct nvme_completion *cpl) 315 { 316 uint16_t sct, sc; 317 318 sct = NVME_STATUS_GET_SCT(cpl->status); 319 sc = NVME_STATUS_GET_SC(cpl->status); 320 321 nvme_printf(qpair->ctrlr, "%s (%02x/%02x) sqid:%d cid:%d cdw0:%x\n", 322 get_status_string(sct, sc), sct, sc, cpl->sqid, cpl->cid, 323 cpl->cdw0); 324 } 325 326 static boolean_t 327 nvme_completion_is_retry(const struct nvme_completion *cpl) 328 { 329 uint8_t sct, sc, dnr; 330 331 sct = NVME_STATUS_GET_SCT(cpl->status); 332 sc = NVME_STATUS_GET_SC(cpl->status); 333 dnr = NVME_STATUS_GET_DNR(cpl->status); /* Do Not Retry Bit */ 334 335 /* 336 * TODO: spec is not clear how commands that are aborted due 337 * to TLER will be marked. So for now, it seems 338 * NAMESPACE_NOT_READY is the only case where we should 339 * look at the DNR bit. Requests failed with ABORTED_BY_REQUEST 340 * set the DNR bit correctly since the driver controls that. 341 */ 342 switch (sct) { 343 case NVME_SCT_GENERIC: 344 switch (sc) { 345 case NVME_SC_ABORTED_BY_REQUEST: 346 case NVME_SC_NAMESPACE_NOT_READY: 347 if (dnr) 348 return (0); 349 else 350 return (1); 351 case NVME_SC_INVALID_OPCODE: 352 case NVME_SC_INVALID_FIELD: 353 case NVME_SC_COMMAND_ID_CONFLICT: 354 case NVME_SC_DATA_TRANSFER_ERROR: 355 case NVME_SC_ABORTED_POWER_LOSS: 356 case NVME_SC_INTERNAL_DEVICE_ERROR: 357 case NVME_SC_ABORTED_SQ_DELETION: 358 case NVME_SC_ABORTED_FAILED_FUSED: 359 case NVME_SC_ABORTED_MISSING_FUSED: 360 case NVME_SC_INVALID_NAMESPACE_OR_FORMAT: 361 case NVME_SC_COMMAND_SEQUENCE_ERROR: 362 case NVME_SC_LBA_OUT_OF_RANGE: 363 case NVME_SC_CAPACITY_EXCEEDED: 364 default: 365 return (0); 366 } 367 case NVME_SCT_COMMAND_SPECIFIC: 368 case NVME_SCT_MEDIA_ERROR: 369 case NVME_SCT_VENDOR_SPECIFIC: 370 default: 371 return (0); 372 } 373 } 374 375 static void 376 nvme_qpair_complete_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr, 377 struct nvme_completion *cpl, error_print_t print_on_error) 378 { 379 struct nvme_request *req; 380 boolean_t retry, error; 381 382 req = tr->req; 383 error = nvme_completion_is_error(cpl); 384 retry = error && nvme_completion_is_retry(cpl) && 385 req->retries < nvme_retry_count; 386 387 if (error && (print_on_error == ERROR_PRINT_ALL || 388 (!retry && print_on_error == ERROR_PRINT_NO_RETRY))) { 389 nvme_qpair_print_command(qpair, &req->cmd); 390 nvme_qpair_print_completion(qpair, cpl); 391 } 392 393 qpair->act_tr[cpl->cid] = NULL; 394 395 KASSERT(cpl->cid == req->cmd.cid, ("cpl cid does not match cmd cid\n")); 396 397 if (req->cb_fn && !retry) 398 req->cb_fn(req->cb_arg, cpl); 399 400 mtx_lock(&qpair->lock); 401 callout_stop(&tr->timer); 402 403 if (retry) { 404 req->retries++; 405 nvme_qpair_submit_tracker(qpair, tr); 406 } else { 407 if (req->type != NVME_REQUEST_NULL) { 408 bus_dmamap_sync(qpair->dma_tag_payload, 409 tr->payload_dma_map, 410 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 411 bus_dmamap_unload(qpair->dma_tag_payload, 412 tr->payload_dma_map); 413 } 414 415 nvme_free_request(req); 416 tr->req = NULL; 417 418 TAILQ_REMOVE(&qpair->outstanding_tr, tr, tailq); 419 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 420 421 /* 422 * If the controller is in the middle of resetting, don't 423 * try to submit queued requests here - let the reset logic 424 * handle that instead. 425 */ 426 if (!STAILQ_EMPTY(&qpair->queued_req) && 427 !qpair->ctrlr->is_resetting) { 428 req = STAILQ_FIRST(&qpair->queued_req); 429 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 430 _nvme_qpair_submit_request(qpair, req); 431 } 432 } 433 434 mtx_unlock(&qpair->lock); 435 } 436 437 static void 438 nvme_qpair_manual_complete_tracker(struct nvme_qpair *qpair, 439 struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr, 440 error_print_t print_on_error) 441 { 442 struct nvme_completion cpl; 443 444 memset(&cpl, 0, sizeof(cpl)); 445 cpl.sqid = qpair->id; 446 cpl.cid = tr->cid; 447 cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT; 448 cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT; 449 cpl.status |= (dnr & NVME_STATUS_DNR_MASK) << NVME_STATUS_DNR_SHIFT; 450 nvme_qpair_complete_tracker(qpair, tr, &cpl, print_on_error); 451 } 452 453 void 454 nvme_qpair_manual_complete_request(struct nvme_qpair *qpair, 455 struct nvme_request *req, uint32_t sct, uint32_t sc) 456 { 457 struct nvme_completion cpl; 458 boolean_t error; 459 460 memset(&cpl, 0, sizeof(cpl)); 461 cpl.sqid = qpair->id; 462 cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT; 463 cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT; 464 465 error = nvme_completion_is_error(&cpl); 466 467 if (error) { 468 nvme_qpair_print_command(qpair, &req->cmd); 469 nvme_qpair_print_completion(qpair, &cpl); 470 } 471 472 if (req->cb_fn) 473 req->cb_fn(req->cb_arg, &cpl); 474 475 nvme_free_request(req); 476 } 477 478 bool 479 nvme_qpair_process_completions(struct nvme_qpair *qpair) 480 { 481 struct nvme_tracker *tr; 482 struct nvme_completion cpl; 483 int done = 0; 484 bool in_panic = dumping || SCHEDULER_STOPPED(); 485 486 qpair->num_intr_handler_calls++; 487 488 /* 489 * qpair is not enabled, likely because a controller reset is is in 490 * progress. Ignore the interrupt - any I/O that was associated with 491 * this interrupt will get retried when the reset is complete. 492 */ 493 if (!qpair->is_enabled) 494 return (false); 495 496 /* 497 * A panic can stop the CPU this routine is running on at any point. If 498 * we're called during a panic, complete the sq_head wrap protocol for 499 * the case where we are interrupted just after the increment at 1 500 * below, but before we can reset cq_head to zero at 2. Also cope with 501 * the case where we do the zero at 2, but may or may not have done the 502 * phase adjustment at step 3. The panic machinery flushes all pending 503 * memory writes, so we can make these strong ordering assumptions 504 * that would otherwise be unwise if we were racing in real time. 505 */ 506 if (__predict_false(in_panic)) { 507 if (qpair->cq_head == qpair->num_entries) { 508 /* 509 * Here we know that we need to zero cq_head and then negate 510 * the phase, which hasn't been assigned if cq_head isn't 511 * zero due to the atomic_store_rel. 512 */ 513 qpair->cq_head = 0; 514 qpair->phase = !qpair->phase; 515 } else if (qpair->cq_head == 0) { 516 /* 517 * In this case, we know that the assignment at 2 518 * happened below, but we don't know if it 3 happened or 519 * not. To do this, we look at the last completion 520 * entry and set the phase to the opposite phase 521 * that it has. This gets us back in sync 522 */ 523 cpl = qpair->cpl[qpair->num_entries - 1]; 524 nvme_completion_swapbytes(&cpl); 525 qpair->phase = !NVME_STATUS_GET_P(cpl.status); 526 } 527 } 528 529 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 530 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 531 while (1) { 532 cpl = qpair->cpl[qpair->cq_head]; 533 534 /* Convert to host endian */ 535 nvme_completion_swapbytes(&cpl); 536 537 if (NVME_STATUS_GET_P(cpl.status) != qpair->phase) 538 break; 539 540 tr = qpair->act_tr[cpl.cid]; 541 542 if (tr != NULL) { 543 nvme_qpair_complete_tracker(qpair, tr, &cpl, ERROR_PRINT_ALL); 544 qpair->sq_head = cpl.sqhd; 545 done++; 546 } else if (!in_panic) { 547 /* 548 * A missing tracker is normally an error. However, a 549 * panic can stop the CPU this routine is running on 550 * after completing an I/O but before updating 551 * qpair->cq_head at 1 below. Later, we re-enter this 552 * routine to poll I/O associated with the kernel 553 * dump. We find that the tr has been set to null before 554 * calling the completion routine. If it hasn't 555 * completed (or it triggers a panic), then '1' below 556 * won't have updated cq_head. Rather than panic again, 557 * ignore this condition because it's not unexpected. 558 */ 559 nvme_printf(qpair->ctrlr, 560 "cpl does not map to outstanding cmd\n"); 561 /* nvme_dump_completion expects device endianess */ 562 nvme_dump_completion(&qpair->cpl[qpair->cq_head]); 563 KASSERT(0, ("received completion for unknown cmd")); 564 } 565 566 /* 567 * There's a number of races with the following (see above) when 568 * the system panics. We compensate for each one of them by 569 * using the atomic store to force strong ordering (at least when 570 * viewed in the aftermath of a panic). 571 */ 572 if (++qpair->cq_head == qpair->num_entries) { /* 1 */ 573 atomic_store_rel_int(&qpair->cq_head, 0); /* 2 */ 574 qpair->phase = !qpair->phase; /* 3 */ 575 } 576 577 nvme_mmio_write_4(qpair->ctrlr, doorbell[qpair->id].cq_hdbl, 578 qpair->cq_head); 579 } 580 return (done != 0); 581 } 582 583 static void 584 nvme_qpair_msix_handler(void *arg) 585 { 586 struct nvme_qpair *qpair = arg; 587 588 nvme_qpair_process_completions(qpair); 589 } 590 591 int 592 nvme_qpair_construct(struct nvme_qpair *qpair, uint32_t id, 593 uint16_t vector, uint32_t num_entries, uint32_t num_trackers, 594 struct nvme_controller *ctrlr) 595 { 596 struct nvme_tracker *tr; 597 size_t cmdsz, cplsz, prpsz, allocsz, prpmemsz; 598 uint64_t queuemem_phys, prpmem_phys, list_phys; 599 uint8_t *queuemem, *prpmem, *prp_list; 600 int i, err; 601 602 qpair->id = id; 603 qpair->vector = vector; 604 qpair->num_entries = num_entries; 605 qpair->num_trackers = num_trackers; 606 qpair->ctrlr = ctrlr; 607 608 if (ctrlr->msix_enabled) { 609 610 /* 611 * MSI-X vector resource IDs start at 1, so we add one to 612 * the queue's vector to get the corresponding rid to use. 613 */ 614 qpair->rid = vector + 1; 615 616 qpair->res = bus_alloc_resource_any(ctrlr->dev, SYS_RES_IRQ, 617 &qpair->rid, RF_ACTIVE); 618 bus_setup_intr(ctrlr->dev, qpair->res, 619 INTR_TYPE_MISC | INTR_MPSAFE, NULL, 620 nvme_qpair_msix_handler, qpair, &qpair->tag); 621 if (id == 0) { 622 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 623 "admin"); 624 } else { 625 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 626 "io%d", id - 1); 627 } 628 } 629 630 mtx_init(&qpair->lock, "nvme qpair lock", NULL, MTX_DEF); 631 632 /* Note: NVMe PRP format is restricted to 4-byte alignment. */ 633 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 634 4, PAGE_SIZE, BUS_SPACE_MAXADDR, 635 BUS_SPACE_MAXADDR, NULL, NULL, NVME_MAX_XFER_SIZE, 636 (NVME_MAX_XFER_SIZE/PAGE_SIZE)+1, PAGE_SIZE, 0, 637 NULL, NULL, &qpair->dma_tag_payload); 638 if (err != 0) { 639 nvme_printf(ctrlr, "payload tag create failed %d\n", err); 640 goto out; 641 } 642 643 /* 644 * Each component must be page aligned, and individual PRP lists 645 * cannot cross a page boundary. 646 */ 647 cmdsz = qpair->num_entries * sizeof(struct nvme_command); 648 cmdsz = roundup2(cmdsz, PAGE_SIZE); 649 cplsz = qpair->num_entries * sizeof(struct nvme_completion); 650 cplsz = roundup2(cplsz, PAGE_SIZE); 651 prpsz = sizeof(uint64_t) * NVME_MAX_PRP_LIST_ENTRIES;; 652 prpmemsz = qpair->num_trackers * prpsz; 653 allocsz = cmdsz + cplsz + prpmemsz; 654 655 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 656 PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 657 allocsz, 1, allocsz, 0, NULL, NULL, &qpair->dma_tag); 658 if (err != 0) { 659 nvme_printf(ctrlr, "tag create failed %d\n", err); 660 goto out; 661 } 662 663 if (bus_dmamem_alloc(qpair->dma_tag, (void **)&queuemem, 664 BUS_DMA_NOWAIT, &qpair->queuemem_map)) { 665 nvme_printf(ctrlr, "failed to alloc qpair memory\n"); 666 goto out; 667 } 668 669 if (bus_dmamap_load(qpair->dma_tag, qpair->queuemem_map, 670 queuemem, allocsz, nvme_single_map, &queuemem_phys, 0) != 0) { 671 nvme_printf(ctrlr, "failed to load qpair memory\n"); 672 goto out; 673 } 674 675 qpair->num_cmds = 0; 676 qpair->num_intr_handler_calls = 0; 677 qpair->cmd = (struct nvme_command *)queuemem; 678 qpair->cpl = (struct nvme_completion *)(queuemem + cmdsz); 679 prpmem = (uint8_t *)(queuemem + cmdsz + cplsz); 680 qpair->cmd_bus_addr = queuemem_phys; 681 qpair->cpl_bus_addr = queuemem_phys + cmdsz; 682 prpmem_phys = queuemem_phys + cmdsz + cplsz; 683 684 qpair->sq_tdbl_off = nvme_mmio_offsetof(doorbell[id].sq_tdbl); 685 qpair->cq_hdbl_off = nvme_mmio_offsetof(doorbell[id].cq_hdbl); 686 687 TAILQ_INIT(&qpair->free_tr); 688 TAILQ_INIT(&qpair->outstanding_tr); 689 STAILQ_INIT(&qpair->queued_req); 690 691 list_phys = prpmem_phys; 692 prp_list = prpmem; 693 for (i = 0; i < qpair->num_trackers; i++) { 694 695 if (list_phys + prpsz > prpmem_phys + prpmemsz) { 696 qpair->num_trackers = i; 697 break; 698 } 699 700 /* 701 * Make sure that the PRP list for this tracker doesn't 702 * overflow to another page. 703 */ 704 if (trunc_page(list_phys) != 705 trunc_page(list_phys + prpsz - 1)) { 706 list_phys = roundup2(list_phys, PAGE_SIZE); 707 prp_list = 708 (uint8_t *)roundup2((uintptr_t)prp_list, PAGE_SIZE); 709 } 710 711 tr = malloc(sizeof(*tr), M_NVME, M_ZERO | M_WAITOK); 712 bus_dmamap_create(qpair->dma_tag_payload, 0, 713 &tr->payload_dma_map); 714 callout_init(&tr->timer, 1); 715 tr->cid = i; 716 tr->qpair = qpair; 717 tr->prp = (uint64_t *)prp_list; 718 tr->prp_bus_addr = list_phys; 719 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 720 list_phys += prpsz; 721 prp_list += prpsz; 722 } 723 724 if (qpair->num_trackers == 0) { 725 nvme_printf(ctrlr, "failed to allocate enough trackers\n"); 726 goto out; 727 } 728 729 qpair->act_tr = malloc(sizeof(struct nvme_tracker *) * 730 qpair->num_entries, M_NVME, M_ZERO | M_WAITOK); 731 return (0); 732 733 out: 734 nvme_qpair_destroy(qpair); 735 return (ENOMEM); 736 } 737 738 static void 739 nvme_qpair_destroy(struct nvme_qpair *qpair) 740 { 741 struct nvme_tracker *tr; 742 743 if (qpair->tag) 744 bus_teardown_intr(qpair->ctrlr->dev, qpair->res, qpair->tag); 745 746 if (mtx_initialized(&qpair->lock)) 747 mtx_destroy(&qpair->lock); 748 749 if (qpair->res) 750 bus_release_resource(qpair->ctrlr->dev, SYS_RES_IRQ, 751 rman_get_rid(qpair->res), qpair->res); 752 753 if (qpair->cmd != NULL) { 754 bus_dmamap_unload(qpair->dma_tag, qpair->queuemem_map); 755 bus_dmamem_free(qpair->dma_tag, qpair->cmd, 756 qpair->queuemem_map); 757 } 758 759 if (qpair->act_tr) 760 free(qpair->act_tr, M_NVME); 761 762 while (!TAILQ_EMPTY(&qpair->free_tr)) { 763 tr = TAILQ_FIRST(&qpair->free_tr); 764 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 765 bus_dmamap_destroy(qpair->dma_tag_payload, 766 tr->payload_dma_map); 767 free(tr, M_NVME); 768 } 769 770 if (qpair->dma_tag) 771 bus_dma_tag_destroy(qpair->dma_tag); 772 773 if (qpair->dma_tag_payload) 774 bus_dma_tag_destroy(qpair->dma_tag_payload); 775 } 776 777 static void 778 nvme_admin_qpair_abort_aers(struct nvme_qpair *qpair) 779 { 780 struct nvme_tracker *tr; 781 782 tr = TAILQ_FIRST(&qpair->outstanding_tr); 783 while (tr != NULL) { 784 if (tr->req->cmd.opc == NVME_OPC_ASYNC_EVENT_REQUEST) { 785 nvme_qpair_manual_complete_tracker(qpair, tr, 786 NVME_SCT_GENERIC, NVME_SC_ABORTED_SQ_DELETION, 0, 787 ERROR_PRINT_NONE); 788 tr = TAILQ_FIRST(&qpair->outstanding_tr); 789 } else { 790 tr = TAILQ_NEXT(tr, tailq); 791 } 792 } 793 } 794 795 void 796 nvme_admin_qpair_destroy(struct nvme_qpair *qpair) 797 { 798 799 nvme_admin_qpair_abort_aers(qpair); 800 nvme_qpair_destroy(qpair); 801 } 802 803 void 804 nvme_io_qpair_destroy(struct nvme_qpair *qpair) 805 { 806 807 nvme_qpair_destroy(qpair); 808 } 809 810 static void 811 nvme_abort_complete(void *arg, const struct nvme_completion *status) 812 { 813 struct nvme_tracker *tr = arg; 814 815 /* 816 * If cdw0 == 1, the controller was not able to abort the command 817 * we requested. We still need to check the active tracker array, 818 * to cover race where I/O timed out at same time controller was 819 * completing the I/O. 820 */ 821 if (status->cdw0 == 1 && tr->qpair->act_tr[tr->cid] != NULL) { 822 /* 823 * An I/O has timed out, and the controller was unable to 824 * abort it for some reason. Construct a fake completion 825 * status, and then complete the I/O's tracker manually. 826 */ 827 nvme_printf(tr->qpair->ctrlr, 828 "abort command failed, aborting command manually\n"); 829 nvme_qpair_manual_complete_tracker(tr->qpair, tr, 830 NVME_SCT_GENERIC, NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_ALL); 831 } 832 } 833 834 static void 835 nvme_timeout(void *arg) 836 { 837 struct nvme_tracker *tr = arg; 838 struct nvme_qpair *qpair = tr->qpair; 839 struct nvme_controller *ctrlr = qpair->ctrlr; 840 uint32_t csts; 841 uint8_t cfs; 842 843 /* 844 * Read csts to get value of cfs - controller fatal status. 845 * If no fatal status, try to call the completion routine, and 846 * if completes transactions, report a missed interrupt and 847 * return (this may need to be rate limited). Otherwise, if 848 * aborts are enabled and the controller is not reporting 849 * fatal status, abort the command. Otherwise, just reset the 850 * controller and hope for the best. 851 */ 852 csts = nvme_mmio_read_4(ctrlr, csts); 853 cfs = (csts >> NVME_CSTS_REG_CFS_SHIFT) & NVME_CSTS_REG_CFS_MASK; 854 if (cfs == 0 && nvme_qpair_process_completions(qpair)) { 855 nvme_printf(ctrlr, "Missing interrupt\n"); 856 return; 857 } 858 if (ctrlr->enable_aborts && cfs == 0) { 859 nvme_printf(ctrlr, "Aborting command due to a timeout.\n"); 860 nvme_ctrlr_cmd_abort(ctrlr, tr->cid, qpair->id, 861 nvme_abort_complete, tr); 862 } else { 863 nvme_printf(ctrlr, "Resetting controller due to a timeout%s.\n", 864 cfs ? " and fatal error status" : ""); 865 nvme_ctrlr_reset(ctrlr); 866 } 867 } 868 869 void 870 nvme_qpair_submit_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr) 871 { 872 struct nvme_request *req; 873 struct nvme_controller *ctrlr; 874 875 mtx_assert(&qpair->lock, MA_OWNED); 876 877 req = tr->req; 878 req->cmd.cid = tr->cid; 879 qpair->act_tr[tr->cid] = tr; 880 ctrlr = qpair->ctrlr; 881 882 if (req->timeout) 883 callout_reset_curcpu(&tr->timer, ctrlr->timeout_period * hz, 884 nvme_timeout, tr); 885 886 /* Copy the command from the tracker to the submission queue. */ 887 memcpy(&qpair->cmd[qpair->sq_tail], &req->cmd, sizeof(req->cmd)); 888 889 if (++qpair->sq_tail == qpair->num_entries) 890 qpair->sq_tail = 0; 891 892 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 893 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 894 #ifndef __powerpc__ 895 /* 896 * powerpc's bus_dmamap_sync() already includes a heavyweight sync, but 897 * no other archs do. 898 */ 899 wmb(); 900 #endif 901 902 nvme_mmio_write_4(qpair->ctrlr, doorbell[qpair->id].sq_tdbl, 903 qpair->sq_tail); 904 905 qpair->num_cmds++; 906 } 907 908 static void 909 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error) 910 { 911 struct nvme_tracker *tr = arg; 912 uint32_t cur_nseg; 913 914 /* 915 * If the mapping operation failed, return immediately. The caller 916 * is responsible for detecting the error status and failing the 917 * tracker manually. 918 */ 919 if (error != 0) { 920 nvme_printf(tr->qpair->ctrlr, 921 "nvme_payload_map err %d\n", error); 922 return; 923 } 924 925 /* 926 * Note that we specified PAGE_SIZE for alignment and max 927 * segment size when creating the bus dma tags. So here 928 * we can safely just transfer each segment to its 929 * associated PRP entry. 930 */ 931 tr->req->cmd.prp1 = htole64(seg[0].ds_addr); 932 933 if (nseg == 2) { 934 tr->req->cmd.prp2 = htole64(seg[1].ds_addr); 935 } else if (nseg > 2) { 936 cur_nseg = 1; 937 tr->req->cmd.prp2 = htole64((uint64_t)tr->prp_bus_addr); 938 while (cur_nseg < nseg) { 939 tr->prp[cur_nseg-1] = 940 htole64((uint64_t)seg[cur_nseg].ds_addr); 941 cur_nseg++; 942 } 943 } else { 944 /* 945 * prp2 should not be used by the controller 946 * since there is only one segment, but set 947 * to 0 just to be safe. 948 */ 949 tr->req->cmd.prp2 = 0; 950 } 951 952 bus_dmamap_sync(tr->qpair->dma_tag_payload, tr->payload_dma_map, 953 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 954 nvme_qpair_submit_tracker(tr->qpair, tr); 955 } 956 957 static void 958 _nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 959 { 960 struct nvme_tracker *tr; 961 int err = 0; 962 963 mtx_assert(&qpair->lock, MA_OWNED); 964 965 tr = TAILQ_FIRST(&qpair->free_tr); 966 req->qpair = qpair; 967 968 if (tr == NULL || !qpair->is_enabled) { 969 /* 970 * No tracker is available, or the qpair is disabled due to 971 * an in-progress controller-level reset or controller 972 * failure. 973 */ 974 975 if (qpair->ctrlr->is_failed) { 976 /* 977 * The controller has failed. Post the request to a 978 * task where it will be aborted, so that we do not 979 * invoke the request's callback in the context 980 * of the submission. 981 */ 982 nvme_ctrlr_post_failed_request(qpair->ctrlr, req); 983 } else { 984 /* 985 * Put the request on the qpair's request queue to be 986 * processed when a tracker frees up via a command 987 * completion or when the controller reset is 988 * completed. 989 */ 990 STAILQ_INSERT_TAIL(&qpair->queued_req, req, stailq); 991 } 992 return; 993 } 994 995 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 996 TAILQ_INSERT_TAIL(&qpair->outstanding_tr, tr, tailq); 997 tr->req = req; 998 999 switch (req->type) { 1000 case NVME_REQUEST_VADDR: 1001 KASSERT(req->payload_size <= qpair->ctrlr->max_xfer_size, 1002 ("payload_size (%d) exceeds max_xfer_size (%d)\n", 1003 req->payload_size, qpair->ctrlr->max_xfer_size)); 1004 err = bus_dmamap_load(tr->qpair->dma_tag_payload, 1005 tr->payload_dma_map, req->u.payload, req->payload_size, 1006 nvme_payload_map, tr, 0); 1007 if (err != 0) 1008 nvme_printf(qpair->ctrlr, 1009 "bus_dmamap_load returned 0x%x!\n", err); 1010 break; 1011 case NVME_REQUEST_NULL: 1012 nvme_qpair_submit_tracker(tr->qpair, tr); 1013 break; 1014 case NVME_REQUEST_BIO: 1015 KASSERT(req->u.bio->bio_bcount <= qpair->ctrlr->max_xfer_size, 1016 ("bio->bio_bcount (%jd) exceeds max_xfer_size (%d)\n", 1017 (intmax_t)req->u.bio->bio_bcount, 1018 qpair->ctrlr->max_xfer_size)); 1019 err = bus_dmamap_load_bio(tr->qpair->dma_tag_payload, 1020 tr->payload_dma_map, req->u.bio, nvme_payload_map, tr, 0); 1021 if (err != 0) 1022 nvme_printf(qpair->ctrlr, 1023 "bus_dmamap_load_bio returned 0x%x!\n", err); 1024 break; 1025 case NVME_REQUEST_CCB: 1026 err = bus_dmamap_load_ccb(tr->qpair->dma_tag_payload, 1027 tr->payload_dma_map, req->u.payload, 1028 nvme_payload_map, tr, 0); 1029 if (err != 0) 1030 nvme_printf(qpair->ctrlr, 1031 "bus_dmamap_load_ccb returned 0x%x!\n", err); 1032 break; 1033 default: 1034 panic("unknown nvme request type 0x%x\n", req->type); 1035 break; 1036 } 1037 1038 if (err != 0) { 1039 /* 1040 * The dmamap operation failed, so we manually fail the 1041 * tracker here with DATA_TRANSFER_ERROR status. 1042 * 1043 * nvme_qpair_manual_complete_tracker must not be called 1044 * with the qpair lock held. 1045 */ 1046 mtx_unlock(&qpair->lock); 1047 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1048 NVME_SC_DATA_TRANSFER_ERROR, DO_NOT_RETRY, ERROR_PRINT_ALL); 1049 mtx_lock(&qpair->lock); 1050 } 1051 } 1052 1053 void 1054 nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 1055 { 1056 1057 mtx_lock(&qpair->lock); 1058 _nvme_qpair_submit_request(qpair, req); 1059 mtx_unlock(&qpair->lock); 1060 } 1061 1062 static void 1063 nvme_qpair_enable(struct nvme_qpair *qpair) 1064 { 1065 1066 qpair->is_enabled = TRUE; 1067 } 1068 1069 void 1070 nvme_qpair_reset(struct nvme_qpair *qpair) 1071 { 1072 1073 qpair->sq_head = qpair->sq_tail = qpair->cq_head = 0; 1074 1075 /* 1076 * First time through the completion queue, HW will set phase 1077 * bit on completions to 1. So set this to 1 here, indicating 1078 * we're looking for a 1 to know which entries have completed. 1079 * we'll toggle the bit each time when the completion queue 1080 * rolls over. 1081 */ 1082 qpair->phase = 1; 1083 1084 memset(qpair->cmd, 0, 1085 qpair->num_entries * sizeof(struct nvme_command)); 1086 memset(qpair->cpl, 0, 1087 qpair->num_entries * sizeof(struct nvme_completion)); 1088 } 1089 1090 void 1091 nvme_admin_qpair_enable(struct nvme_qpair *qpair) 1092 { 1093 struct nvme_tracker *tr; 1094 struct nvme_tracker *tr_temp; 1095 1096 /* 1097 * Manually abort each outstanding admin command. Do not retry 1098 * admin commands found here, since they will be left over from 1099 * a controller reset and its likely the context in which the 1100 * command was issued no longer applies. 1101 */ 1102 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1103 nvme_printf(qpair->ctrlr, 1104 "aborting outstanding admin command\n"); 1105 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1106 NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL); 1107 } 1108 1109 nvme_qpair_enable(qpair); 1110 } 1111 1112 void 1113 nvme_io_qpair_enable(struct nvme_qpair *qpair) 1114 { 1115 STAILQ_HEAD(, nvme_request) temp; 1116 struct nvme_tracker *tr; 1117 struct nvme_tracker *tr_temp; 1118 struct nvme_request *req; 1119 1120 /* 1121 * Manually abort each outstanding I/O. This normally results in a 1122 * retry, unless the retry count on the associated request has 1123 * reached its limit. 1124 */ 1125 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1126 nvme_printf(qpair->ctrlr, "aborting outstanding i/o\n"); 1127 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1128 NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_NO_RETRY); 1129 } 1130 1131 mtx_lock(&qpair->lock); 1132 1133 nvme_qpair_enable(qpair); 1134 1135 STAILQ_INIT(&temp); 1136 STAILQ_SWAP(&qpair->queued_req, &temp, nvme_request); 1137 1138 while (!STAILQ_EMPTY(&temp)) { 1139 req = STAILQ_FIRST(&temp); 1140 STAILQ_REMOVE_HEAD(&temp, stailq); 1141 nvme_printf(qpair->ctrlr, "resubmitting queued i/o\n"); 1142 nvme_qpair_print_command(qpair, &req->cmd); 1143 _nvme_qpair_submit_request(qpair, req); 1144 } 1145 1146 mtx_unlock(&qpair->lock); 1147 } 1148 1149 static void 1150 nvme_qpair_disable(struct nvme_qpair *qpair) 1151 { 1152 struct nvme_tracker *tr; 1153 1154 qpair->is_enabled = FALSE; 1155 mtx_lock(&qpair->lock); 1156 TAILQ_FOREACH(tr, &qpair->outstanding_tr, tailq) 1157 callout_stop(&tr->timer); 1158 mtx_unlock(&qpair->lock); 1159 } 1160 1161 void 1162 nvme_admin_qpair_disable(struct nvme_qpair *qpair) 1163 { 1164 1165 nvme_qpair_disable(qpair); 1166 nvme_admin_qpair_abort_aers(qpair); 1167 } 1168 1169 void 1170 nvme_io_qpair_disable(struct nvme_qpair *qpair) 1171 { 1172 1173 nvme_qpair_disable(qpair); 1174 } 1175 1176 void 1177 nvme_qpair_fail(struct nvme_qpair *qpair) 1178 { 1179 struct nvme_tracker *tr; 1180 struct nvme_request *req; 1181 1182 if (!mtx_initialized(&qpair->lock)) 1183 return; 1184 1185 mtx_lock(&qpair->lock); 1186 1187 while (!STAILQ_EMPTY(&qpair->queued_req)) { 1188 req = STAILQ_FIRST(&qpair->queued_req); 1189 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 1190 nvme_printf(qpair->ctrlr, "failing queued i/o\n"); 1191 mtx_unlock(&qpair->lock); 1192 nvme_qpair_manual_complete_request(qpair, req, NVME_SCT_GENERIC, 1193 NVME_SC_ABORTED_BY_REQUEST); 1194 mtx_lock(&qpair->lock); 1195 } 1196 1197 /* Manually abort each outstanding I/O. */ 1198 while (!TAILQ_EMPTY(&qpair->outstanding_tr)) { 1199 tr = TAILQ_FIRST(&qpair->outstanding_tr); 1200 /* 1201 * Do not remove the tracker. The abort_tracker path will 1202 * do that for us. 1203 */ 1204 nvme_printf(qpair->ctrlr, "failing outstanding i/o\n"); 1205 mtx_unlock(&qpair->lock); 1206 nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC, 1207 NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL); 1208 mtx_lock(&qpair->lock); 1209 } 1210 1211 mtx_unlock(&qpair->lock); 1212 } 1213 1214