1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (C) 2012-2014 Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/conf.h> 32 #include <sys/domainset.h> 33 #include <sys/proc.h> 34 35 #include <dev/pci/pcivar.h> 36 37 #include "nvme_private.h" 38 39 typedef enum error_print { ERROR_PRINT_NONE, ERROR_PRINT_NO_RETRY, ERROR_PRINT_ALL } error_print_t; 40 #define DO_NOT_RETRY 1 41 42 static void _nvme_qpair_submit_request(struct nvme_qpair *qpair, 43 struct nvme_request *req); 44 static void nvme_qpair_destroy(struct nvme_qpair *qpair); 45 46 #define DEFAULT_INDEX 256 47 #define DEFAULT_ENTRY(x) [DEFAULT_INDEX] = x 48 #define OPC_ENTRY(x) [NVME_OPC_ ## x] = #x 49 50 static const char *admin_opcode[DEFAULT_INDEX + 1] = { 51 OPC_ENTRY(DELETE_IO_SQ), 52 OPC_ENTRY(CREATE_IO_SQ), 53 OPC_ENTRY(GET_LOG_PAGE), 54 OPC_ENTRY(DELETE_IO_CQ), 55 OPC_ENTRY(CREATE_IO_CQ), 56 OPC_ENTRY(IDENTIFY), 57 OPC_ENTRY(ABORT), 58 OPC_ENTRY(SET_FEATURES), 59 OPC_ENTRY(GET_FEATURES), 60 OPC_ENTRY(ASYNC_EVENT_REQUEST), 61 OPC_ENTRY(NAMESPACE_MANAGEMENT), 62 OPC_ENTRY(FIRMWARE_ACTIVATE), 63 OPC_ENTRY(FIRMWARE_IMAGE_DOWNLOAD), 64 OPC_ENTRY(DEVICE_SELF_TEST), 65 OPC_ENTRY(NAMESPACE_ATTACHMENT), 66 OPC_ENTRY(KEEP_ALIVE), 67 OPC_ENTRY(DIRECTIVE_SEND), 68 OPC_ENTRY(DIRECTIVE_RECEIVE), 69 OPC_ENTRY(VIRTUALIZATION_MANAGEMENT), 70 OPC_ENTRY(NVME_MI_SEND), 71 OPC_ENTRY(NVME_MI_RECEIVE), 72 OPC_ENTRY(CAPACITY_MANAGEMENT), 73 OPC_ENTRY(LOCKDOWN), 74 OPC_ENTRY(DOORBELL_BUFFER_CONFIG), 75 OPC_ENTRY(FABRICS_COMMANDS), 76 OPC_ENTRY(FORMAT_NVM), 77 OPC_ENTRY(SECURITY_SEND), 78 OPC_ENTRY(SECURITY_RECEIVE), 79 OPC_ENTRY(SANITIZE), 80 OPC_ENTRY(GET_LBA_STATUS), 81 DEFAULT_ENTRY("ADMIN COMMAND"), 82 }; 83 84 static const char *io_opcode[DEFAULT_INDEX + 1] = { 85 OPC_ENTRY(FLUSH), 86 OPC_ENTRY(WRITE), 87 OPC_ENTRY(READ), 88 OPC_ENTRY(WRITE_UNCORRECTABLE), 89 OPC_ENTRY(COMPARE), 90 OPC_ENTRY(WRITE_ZEROES), 91 OPC_ENTRY(DATASET_MANAGEMENT), 92 OPC_ENTRY(VERIFY), 93 OPC_ENTRY(RESERVATION_REGISTER), 94 OPC_ENTRY(RESERVATION_REPORT), 95 OPC_ENTRY(RESERVATION_ACQUIRE), 96 OPC_ENTRY(RESERVATION_RELEASE), 97 OPC_ENTRY(COPY), 98 DEFAULT_ENTRY("IO COMMAND"), 99 }; 100 101 static const char * 102 get_opcode_string(const char *op[DEFAULT_INDEX + 1], uint16_t opc) 103 { 104 const char *nm = opc < DEFAULT_INDEX ? op[opc] : op[DEFAULT_INDEX]; 105 106 return (nm != NULL ? nm : op[DEFAULT_INDEX]); 107 } 108 109 static const char * 110 get_admin_opcode_string(uint16_t opc) 111 { 112 return (get_opcode_string(admin_opcode, opc)); 113 } 114 115 static const char * 116 get_io_opcode_string(uint16_t opc) 117 { 118 return (get_opcode_string(io_opcode, opc)); 119 } 120 121 static void 122 nvme_admin_qpair_print_command(struct nvme_qpair *qpair, 123 struct nvme_command *cmd) 124 { 125 126 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%x " 127 "cdw10:%08x cdw11:%08x\n", 128 get_admin_opcode_string(cmd->opc), cmd->opc, qpair->id, cmd->cid, 129 le32toh(cmd->nsid), le32toh(cmd->cdw10), le32toh(cmd->cdw11)); 130 } 131 132 static void 133 nvme_io_qpair_print_command(struct nvme_qpair *qpair, 134 struct nvme_command *cmd) 135 { 136 137 switch (cmd->opc) { 138 case NVME_OPC_WRITE: 139 case NVME_OPC_READ: 140 case NVME_OPC_WRITE_UNCORRECTABLE: 141 case NVME_OPC_COMPARE: 142 case NVME_OPC_WRITE_ZEROES: 143 case NVME_OPC_VERIFY: 144 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d " 145 "lba:%llu len:%d\n", 146 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid), 147 ((unsigned long long)le32toh(cmd->cdw11) << 32) + le32toh(cmd->cdw10), 148 (le32toh(cmd->cdw12) & 0xFFFF) + 1); 149 break; 150 case NVME_OPC_FLUSH: 151 case NVME_OPC_DATASET_MANAGEMENT: 152 case NVME_OPC_RESERVATION_REGISTER: 153 case NVME_OPC_RESERVATION_REPORT: 154 case NVME_OPC_RESERVATION_ACQUIRE: 155 case NVME_OPC_RESERVATION_RELEASE: 156 nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d\n", 157 get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid)); 158 break; 159 default: 160 nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%d\n", 161 get_io_opcode_string(cmd->opc), cmd->opc, qpair->id, 162 cmd->cid, le32toh(cmd->nsid)); 163 break; 164 } 165 } 166 167 void 168 nvme_qpair_print_command(struct nvme_qpair *qpair, struct nvme_command *cmd) 169 { 170 if (qpair->id == 0) 171 nvme_admin_qpair_print_command(qpair, cmd); 172 else 173 nvme_io_qpair_print_command(qpair, cmd); 174 if (nvme_verbose_cmd_dump) { 175 nvme_printf(qpair->ctrlr, 176 "nsid:%#x rsvd2:%#x rsvd3:%#x mptr:%#jx prp1:%#jx prp2:%#jx\n", 177 cmd->nsid, cmd->rsvd2, cmd->rsvd3, (uintmax_t)cmd->mptr, 178 (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2); 179 nvme_printf(qpair->ctrlr, 180 "cdw10: %#x cdw11:%#x cdw12:%#x cdw13:%#x cdw14:%#x cdw15:%#x\n", 181 cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14, 182 cmd->cdw15); 183 } 184 } 185 186 struct nvme_status_string { 187 uint16_t sc; 188 const char * str; 189 }; 190 191 static struct nvme_status_string generic_status[] = { 192 { NVME_SC_SUCCESS, "SUCCESS" }, 193 { NVME_SC_INVALID_OPCODE, "INVALID OPCODE" }, 194 { NVME_SC_INVALID_FIELD, "INVALID_FIELD" }, 195 { NVME_SC_COMMAND_ID_CONFLICT, "COMMAND ID CONFLICT" }, 196 { NVME_SC_DATA_TRANSFER_ERROR, "DATA TRANSFER ERROR" }, 197 { NVME_SC_ABORTED_POWER_LOSS, "ABORTED - POWER LOSS" }, 198 { NVME_SC_INTERNAL_DEVICE_ERROR, "INTERNAL DEVICE ERROR" }, 199 { NVME_SC_ABORTED_BY_REQUEST, "ABORTED - BY REQUEST" }, 200 { NVME_SC_ABORTED_SQ_DELETION, "ABORTED - SQ DELETION" }, 201 { NVME_SC_ABORTED_FAILED_FUSED, "ABORTED - FAILED FUSED" }, 202 { NVME_SC_ABORTED_MISSING_FUSED, "ABORTED - MISSING FUSED" }, 203 { NVME_SC_INVALID_NAMESPACE_OR_FORMAT, "INVALID NAMESPACE OR FORMAT" }, 204 { NVME_SC_COMMAND_SEQUENCE_ERROR, "COMMAND SEQUENCE ERROR" }, 205 { NVME_SC_INVALID_SGL_SEGMENT_DESCR, "INVALID SGL SEGMENT DESCRIPTOR" }, 206 { NVME_SC_INVALID_NUMBER_OF_SGL_DESCR, "INVALID NUMBER OF SGL DESCRIPTORS" }, 207 { NVME_SC_DATA_SGL_LENGTH_INVALID, "DATA SGL LENGTH INVALID" }, 208 { NVME_SC_METADATA_SGL_LENGTH_INVALID, "METADATA SGL LENGTH INVALID" }, 209 { NVME_SC_SGL_DESCRIPTOR_TYPE_INVALID, "SGL DESCRIPTOR TYPE INVALID" }, 210 { NVME_SC_INVALID_USE_OF_CMB, "INVALID USE OF CONTROLLER MEMORY BUFFER" }, 211 { NVME_SC_PRP_OFFET_INVALID, "PRP OFFET INVALID" }, 212 { NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED, "ATOMIC WRITE UNIT EXCEEDED" }, 213 { NVME_SC_OPERATION_DENIED, "OPERATION DENIED" }, 214 { NVME_SC_SGL_OFFSET_INVALID, "SGL OFFSET INVALID" }, 215 { NVME_SC_HOST_ID_INCONSISTENT_FORMAT, "HOST IDENTIFIER INCONSISTENT FORMAT" }, 216 { NVME_SC_KEEP_ALIVE_TIMEOUT_EXPIRED, "KEEP ALIVE TIMEOUT EXPIRED" }, 217 { NVME_SC_KEEP_ALIVE_TIMEOUT_INVALID, "KEEP ALIVE TIMEOUT INVALID" }, 218 { NVME_SC_ABORTED_DUE_TO_PREEMPT, "COMMAND ABORTED DUE TO PREEMPT AND ABORT" }, 219 { NVME_SC_SANITIZE_FAILED, "SANITIZE FAILED" }, 220 { NVME_SC_SANITIZE_IN_PROGRESS, "SANITIZE IN PROGRESS" }, 221 { NVME_SC_SGL_DATA_BLOCK_GRAN_INVALID, "SGL_DATA_BLOCK_GRANULARITY_INVALID" }, 222 { NVME_SC_NOT_SUPPORTED_IN_CMB, "COMMAND NOT SUPPORTED FOR QUEUE IN CMB" }, 223 { NVME_SC_NAMESPACE_IS_WRITE_PROTECTED, "NAMESPACE IS WRITE PROTECTED" }, 224 { NVME_SC_COMMAND_INTERRUPTED, "COMMAND INTERRUPTED" }, 225 { NVME_SC_TRANSIENT_TRANSPORT_ERROR, "TRANSIENT TRANSPORT ERROR" }, 226 227 { NVME_SC_LBA_OUT_OF_RANGE, "LBA OUT OF RANGE" }, 228 { NVME_SC_CAPACITY_EXCEEDED, "CAPACITY EXCEEDED" }, 229 { NVME_SC_NAMESPACE_NOT_READY, "NAMESPACE NOT READY" }, 230 { NVME_SC_RESERVATION_CONFLICT, "RESERVATION CONFLICT" }, 231 { NVME_SC_FORMAT_IN_PROGRESS, "FORMAT IN PROGRESS" }, 232 { 0xFFFF, "GENERIC" } 233 }; 234 235 static struct nvme_status_string command_specific_status[] = { 236 { NVME_SC_COMPLETION_QUEUE_INVALID, "INVALID COMPLETION QUEUE" }, 237 { NVME_SC_INVALID_QUEUE_IDENTIFIER, "INVALID QUEUE IDENTIFIER" }, 238 { NVME_SC_MAXIMUM_QUEUE_SIZE_EXCEEDED, "MAX QUEUE SIZE EXCEEDED" }, 239 { NVME_SC_ABORT_COMMAND_LIMIT_EXCEEDED, "ABORT CMD LIMIT EXCEEDED" }, 240 { NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED, "ASYNC LIMIT EXCEEDED" }, 241 { NVME_SC_INVALID_FIRMWARE_SLOT, "INVALID FIRMWARE SLOT" }, 242 { NVME_SC_INVALID_FIRMWARE_IMAGE, "INVALID FIRMWARE IMAGE" }, 243 { NVME_SC_INVALID_INTERRUPT_VECTOR, "INVALID INTERRUPT VECTOR" }, 244 { NVME_SC_INVALID_LOG_PAGE, "INVALID LOG PAGE" }, 245 { NVME_SC_INVALID_FORMAT, "INVALID FORMAT" }, 246 { NVME_SC_FIRMWARE_REQUIRES_RESET, "FIRMWARE REQUIRES RESET" }, 247 { NVME_SC_INVALID_QUEUE_DELETION, "INVALID QUEUE DELETION" }, 248 { NVME_SC_FEATURE_NOT_SAVEABLE, "FEATURE IDENTIFIER NOT SAVEABLE" }, 249 { NVME_SC_FEATURE_NOT_CHANGEABLE, "FEATURE NOT CHANGEABLE" }, 250 { NVME_SC_FEATURE_NOT_NS_SPECIFIC, "FEATURE NOT NAMESPACE SPECIFIC" }, 251 { NVME_SC_FW_ACT_REQUIRES_NVMS_RESET, "FIRMWARE ACTIVATION REQUIRES NVM SUBSYSTEM RESET" }, 252 { NVME_SC_FW_ACT_REQUIRES_RESET, "FIRMWARE ACTIVATION REQUIRES RESET" }, 253 { NVME_SC_FW_ACT_REQUIRES_TIME, "FIRMWARE ACTIVATION REQUIRES MAXIMUM TIME VIOLATION" }, 254 { NVME_SC_FW_ACT_PROHIBITED, "FIRMWARE ACTIVATION PROHIBITED" }, 255 { NVME_SC_OVERLAPPING_RANGE, "OVERLAPPING RANGE" }, 256 { NVME_SC_NS_INSUFFICIENT_CAPACITY, "NAMESPACE INSUFFICIENT CAPACITY" }, 257 { NVME_SC_NS_ID_UNAVAILABLE, "NAMESPACE IDENTIFIER UNAVAILABLE" }, 258 { NVME_SC_NS_ALREADY_ATTACHED, "NAMESPACE ALREADY ATTACHED" }, 259 { NVME_SC_NS_IS_PRIVATE, "NAMESPACE IS PRIVATE" }, 260 { NVME_SC_NS_NOT_ATTACHED, "NS NOT ATTACHED" }, 261 { NVME_SC_THIN_PROV_NOT_SUPPORTED, "THIN PROVISIONING NOT SUPPORTED" }, 262 { NVME_SC_CTRLR_LIST_INVALID, "CONTROLLER LIST INVALID" }, 263 { NVME_SC_SELF_TEST_IN_PROGRESS, "DEVICE SELF-TEST IN PROGRESS" }, 264 { NVME_SC_BOOT_PART_WRITE_PROHIB, "BOOT PARTITION WRITE PROHIBITED" }, 265 { NVME_SC_INVALID_CTRLR_ID, "INVALID CONTROLLER IDENTIFIER" }, 266 { NVME_SC_INVALID_SEC_CTRLR_STATE, "INVALID SECONDARY CONTROLLER STATE" }, 267 { NVME_SC_INVALID_NUM_OF_CTRLR_RESRC, "INVALID NUMBER OF CONTROLLER RESOURCES" }, 268 { NVME_SC_INVALID_RESOURCE_ID, "INVALID RESOURCE IDENTIFIER" }, 269 { NVME_SC_SANITIZE_PROHIBITED_WPMRE, "SANITIZE PROHIBITED WRITE PERSISTENT MEMORY REGION ENABLED" }, 270 { NVME_SC_ANA_GROUP_ID_INVALID, "ANA GROUP IDENTIFIED INVALID" }, 271 { NVME_SC_ANA_ATTACH_FAILED, "ANA ATTACH FAILED" }, 272 273 { NVME_SC_CONFLICTING_ATTRIBUTES, "CONFLICTING ATTRIBUTES" }, 274 { NVME_SC_INVALID_PROTECTION_INFO, "INVALID PROTECTION INFO" }, 275 { NVME_SC_ATTEMPTED_WRITE_TO_RO_PAGE, "WRITE TO RO PAGE" }, 276 { 0xFFFF, "COMMAND SPECIFIC" } 277 }; 278 279 static struct nvme_status_string media_error_status[] = { 280 { NVME_SC_WRITE_FAULTS, "WRITE FAULTS" }, 281 { NVME_SC_UNRECOVERED_READ_ERROR, "UNRECOVERED READ ERROR" }, 282 { NVME_SC_GUARD_CHECK_ERROR, "GUARD CHECK ERROR" }, 283 { NVME_SC_APPLICATION_TAG_CHECK_ERROR, "APPLICATION TAG CHECK ERROR" }, 284 { NVME_SC_REFERENCE_TAG_CHECK_ERROR, "REFERENCE TAG CHECK ERROR" }, 285 { NVME_SC_COMPARE_FAILURE, "COMPARE FAILURE" }, 286 { NVME_SC_ACCESS_DENIED, "ACCESS DENIED" }, 287 { NVME_SC_DEALLOCATED_OR_UNWRITTEN, "DEALLOCATED OR UNWRITTEN LOGICAL BLOCK" }, 288 { 0xFFFF, "MEDIA ERROR" } 289 }; 290 291 static struct nvme_status_string path_related_status[] = { 292 { NVME_SC_INTERNAL_PATH_ERROR, "INTERNAL PATH ERROR" }, 293 { NVME_SC_ASYMMETRIC_ACCESS_PERSISTENT_LOSS, "ASYMMETRIC ACCESS PERSISTENT LOSS" }, 294 { NVME_SC_ASYMMETRIC_ACCESS_INACCESSIBLE, "ASYMMETRIC ACCESS INACCESSIBLE" }, 295 { NVME_SC_ASYMMETRIC_ACCESS_TRANSITION, "ASYMMETRIC ACCESS TRANSITION" }, 296 { NVME_SC_CONTROLLER_PATHING_ERROR, "CONTROLLER PATHING ERROR" }, 297 { NVME_SC_HOST_PATHING_ERROR, "HOST PATHING ERROR" }, 298 { NVME_SC_COMMAND_ABORTED_BY_HOST, "COMMAND ABORTED BY HOST" }, 299 { 0xFFFF, "PATH RELATED" }, 300 }; 301 302 static const char * 303 get_status_string(uint16_t sct, uint16_t sc) 304 { 305 struct nvme_status_string *entry; 306 307 switch (sct) { 308 case NVME_SCT_GENERIC: 309 entry = generic_status; 310 break; 311 case NVME_SCT_COMMAND_SPECIFIC: 312 entry = command_specific_status; 313 break; 314 case NVME_SCT_MEDIA_ERROR: 315 entry = media_error_status; 316 break; 317 case NVME_SCT_PATH_RELATED: 318 entry = path_related_status; 319 break; 320 case NVME_SCT_VENDOR_SPECIFIC: 321 return ("VENDOR SPECIFIC"); 322 default: 323 return ("RESERVED"); 324 } 325 326 while (entry->sc != 0xFFFF) { 327 if (entry->sc == sc) 328 return (entry->str); 329 entry++; 330 } 331 return (entry->str); 332 } 333 334 void 335 nvme_qpair_print_completion(struct nvme_qpair *qpair, 336 struct nvme_completion *cpl) 337 { 338 uint8_t sct, sc, crd, m, dnr, p; 339 340 sct = NVME_STATUS_GET_SCT(cpl->status); 341 sc = NVME_STATUS_GET_SC(cpl->status); 342 crd = NVME_STATUS_GET_CRD(cpl->status); 343 m = NVME_STATUS_GET_M(cpl->status); 344 dnr = NVME_STATUS_GET_DNR(cpl->status); 345 p = NVME_STATUS_GET_P(cpl->status); 346 347 nvme_printf(qpair->ctrlr, "%s (%02x/%02x) crd:%x m:%x dnr:%x p:%d " 348 "sqid:%d cid:%d cdw0:%x\n", 349 get_status_string(sct, sc), sct, sc, crd, m, dnr, p, 350 cpl->sqid, cpl->cid, cpl->cdw0); 351 } 352 353 static bool 354 nvme_completion_is_retry(const struct nvme_completion *cpl) 355 { 356 uint8_t sct, sc, dnr; 357 358 sct = NVME_STATUS_GET_SCT(cpl->status); 359 sc = NVME_STATUS_GET_SC(cpl->status); 360 dnr = NVME_STATUS_GET_DNR(cpl->status); /* Do Not Retry Bit */ 361 362 /* 363 * TODO: spec is not clear how commands that are aborted due 364 * to TLER will be marked. So for now, it seems 365 * NAMESPACE_NOT_READY is the only case where we should 366 * look at the DNR bit. Requests failed with ABORTED_BY_REQUEST 367 * set the DNR bit correctly since the driver controls that. 368 */ 369 switch (sct) { 370 case NVME_SCT_GENERIC: 371 switch (sc) { 372 case NVME_SC_ABORTED_BY_REQUEST: 373 case NVME_SC_NAMESPACE_NOT_READY: 374 if (dnr) 375 return (0); 376 else 377 return (1); 378 case NVME_SC_INVALID_OPCODE: 379 case NVME_SC_INVALID_FIELD: 380 case NVME_SC_COMMAND_ID_CONFLICT: 381 case NVME_SC_DATA_TRANSFER_ERROR: 382 case NVME_SC_ABORTED_POWER_LOSS: 383 case NVME_SC_INTERNAL_DEVICE_ERROR: 384 case NVME_SC_ABORTED_SQ_DELETION: 385 case NVME_SC_ABORTED_FAILED_FUSED: 386 case NVME_SC_ABORTED_MISSING_FUSED: 387 case NVME_SC_INVALID_NAMESPACE_OR_FORMAT: 388 case NVME_SC_COMMAND_SEQUENCE_ERROR: 389 case NVME_SC_LBA_OUT_OF_RANGE: 390 case NVME_SC_CAPACITY_EXCEEDED: 391 default: 392 return (0); 393 } 394 case NVME_SCT_COMMAND_SPECIFIC: 395 case NVME_SCT_MEDIA_ERROR: 396 return (0); 397 case NVME_SCT_PATH_RELATED: 398 switch (sc) { 399 case NVME_SC_INTERNAL_PATH_ERROR: 400 if (dnr) 401 return (0); 402 else 403 return (1); 404 default: 405 return (0); 406 } 407 case NVME_SCT_VENDOR_SPECIFIC: 408 default: 409 return (0); 410 } 411 } 412 413 static void 414 nvme_qpair_complete_tracker(struct nvme_tracker *tr, 415 struct nvme_completion *cpl, error_print_t print_on_error) 416 { 417 struct nvme_qpair * qpair = tr->qpair; 418 struct nvme_request *req; 419 bool retry, error, retriable; 420 421 req = tr->req; 422 error = nvme_completion_is_error(cpl); 423 retriable = nvme_completion_is_retry(cpl); 424 retry = error && retriable && req->retries < nvme_retry_count; 425 if (retry) 426 qpair->num_retries++; 427 if (error && req->retries >= nvme_retry_count && retriable) 428 qpair->num_failures++; 429 430 if (error && (print_on_error == ERROR_PRINT_ALL || 431 (!retry && print_on_error == ERROR_PRINT_NO_RETRY))) { 432 nvme_qpair_print_command(qpair, &req->cmd); 433 nvme_qpair_print_completion(qpair, cpl); 434 } 435 436 qpair->act_tr[cpl->cid] = NULL; 437 438 KASSERT(cpl->cid == req->cmd.cid, ("cpl cid does not match cmd cid\n")); 439 440 if (!retry) { 441 if (req->payload_valid) { 442 bus_dmamap_sync(qpair->dma_tag_payload, 443 tr->payload_dma_map, 444 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 445 } 446 if (req->cb_fn) 447 req->cb_fn(req->cb_arg, cpl); 448 } 449 450 mtx_lock(&qpair->lock); 451 452 if (retry) { 453 req->retries++; 454 nvme_qpair_submit_tracker(qpair, tr); 455 } else { 456 if (req->payload_valid) { 457 bus_dmamap_unload(qpair->dma_tag_payload, 458 tr->payload_dma_map); 459 } 460 461 nvme_free_request(req); 462 tr->req = NULL; 463 464 TAILQ_REMOVE(&qpair->outstanding_tr, tr, tailq); 465 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 466 467 /* 468 * If the controller is in the middle of resetting, don't 469 * try to submit queued requests here - let the reset logic 470 * handle that instead. 471 */ 472 if (!STAILQ_EMPTY(&qpair->queued_req) && 473 !qpair->ctrlr->is_resetting) { 474 req = STAILQ_FIRST(&qpair->queued_req); 475 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 476 _nvme_qpair_submit_request(qpair, req); 477 } 478 } 479 480 mtx_unlock(&qpair->lock); 481 } 482 483 static void 484 nvme_qpair_manual_complete_tracker( 485 struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr, 486 error_print_t print_on_error) 487 { 488 struct nvme_completion cpl; 489 490 memset(&cpl, 0, sizeof(cpl)); 491 492 struct nvme_qpair * qpair = tr->qpair; 493 494 cpl.sqid = qpair->id; 495 cpl.cid = tr->cid; 496 cpl.status |= NVMEF(NVME_STATUS_SCT, sct); 497 cpl.status |= NVMEF(NVME_STATUS_SC, sc); 498 cpl.status |= NVMEF(NVME_STATUS_DNR, dnr); 499 /* M=0 : this is artificial so no data in error log page */ 500 /* CRD=0 : this is artificial and no delayed retry support anyway */ 501 /* P=0 : phase not checked */ 502 nvme_qpair_complete_tracker(tr, &cpl, print_on_error); 503 } 504 505 void 506 nvme_qpair_manual_complete_request(struct nvme_qpair *qpair, 507 struct nvme_request *req, uint32_t sct, uint32_t sc) 508 { 509 struct nvme_completion cpl; 510 bool error; 511 512 memset(&cpl, 0, sizeof(cpl)); 513 cpl.sqid = qpair->id; 514 cpl.status |= NVMEF(NVME_STATUS_SCT, sct); 515 cpl.status |= NVMEF(NVME_STATUS_SC, sc); 516 517 error = nvme_completion_is_error(&cpl); 518 519 if (error) { 520 nvme_qpair_print_command(qpair, &req->cmd); 521 nvme_qpair_print_completion(qpair, &cpl); 522 } 523 524 if (req->cb_fn) 525 req->cb_fn(req->cb_arg, &cpl); 526 527 nvme_free_request(req); 528 } 529 530 /* Locked version of completion processor */ 531 static bool 532 _nvme_qpair_process_completions(struct nvme_qpair *qpair) 533 { 534 struct nvme_tracker *tr; 535 struct nvme_completion cpl; 536 bool done = false; 537 bool in_panic = dumping || SCHEDULER_STOPPED(); 538 539 mtx_assert(&qpair->recovery, MA_OWNED); 540 541 /* 542 * qpair is not enabled, likely because a controller reset is in 543 * progress. Ignore the interrupt - any I/O that was associated with 544 * this interrupt will get retried when the reset is complete. Any 545 * pending completions for when we're in startup will be completed 546 * as soon as initialization is complete and we start sending commands 547 * to the device. 548 */ 549 if (qpair->recovery_state != RECOVERY_NONE) { 550 qpair->num_ignored++; 551 return (false); 552 } 553 554 /* 555 * Sanity check initialization. After we reset the hardware, the phase 556 * is defined to be 1. So if we get here with zero prior calls and the 557 * phase is 0, it means that we've lost a race between the 558 * initialization and the ISR running. With the phase wrong, we'll 559 * process a bunch of completions that aren't really completions leading 560 * to a KASSERT below. 561 */ 562 KASSERT(!(qpair->num_intr_handler_calls == 0 && qpair->phase == 0), 563 ("%s: Phase wrong for first interrupt call.", 564 device_get_nameunit(qpair->ctrlr->dev))); 565 566 qpair->num_intr_handler_calls++; 567 568 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 569 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 570 /* 571 * A panic can stop the CPU this routine is running on at any point. If 572 * we're called during a panic, complete the sq_head wrap protocol for 573 * the case where we are interrupted just after the increment at 1 574 * below, but before we can reset cq_head to zero at 2. Also cope with 575 * the case where we do the zero at 2, but may or may not have done the 576 * phase adjustment at step 3. The panic machinery flushes all pending 577 * memory writes, so we can make these strong ordering assumptions 578 * that would otherwise be unwise if we were racing in real time. 579 */ 580 if (__predict_false(in_panic)) { 581 if (qpair->cq_head == qpair->num_entries) { 582 /* 583 * Here we know that we need to zero cq_head and then negate 584 * the phase, which hasn't been assigned if cq_head isn't 585 * zero due to the atomic_store_rel. 586 */ 587 qpair->cq_head = 0; 588 qpair->phase = !qpair->phase; 589 } else if (qpair->cq_head == 0) { 590 /* 591 * In this case, we know that the assignment at 2 592 * happened below, but we don't know if it 3 happened or 593 * not. To do this, we look at the last completion 594 * entry and set the phase to the opposite phase 595 * that it has. This gets us back in sync 596 */ 597 cpl = qpair->cpl[qpair->num_entries - 1]; 598 nvme_completion_swapbytes(&cpl); 599 qpair->phase = !NVME_STATUS_GET_P(cpl.status); 600 } 601 } 602 603 while (1) { 604 uint16_t status; 605 606 /* 607 * We need to do this dance to avoid a race between the host and 608 * the device where the device overtakes the host while the host 609 * is reading this record, leaving the status field 'new' and 610 * the sqhd and cid fields potentially stale. If the phase 611 * doesn't match, that means status hasn't yet been updated and 612 * we'll get any pending changes next time. It also means that 613 * the phase must be the same the second time. We have to sync 614 * before reading to ensure any bouncing completes. 615 */ 616 status = le16toh(qpair->cpl[qpair->cq_head].status); 617 if (NVME_STATUS_GET_P(status) != qpair->phase) 618 break; 619 620 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 621 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 622 cpl = qpair->cpl[qpair->cq_head]; 623 nvme_completion_swapbytes(&cpl); 624 625 KASSERT( 626 NVME_STATUS_GET_P(status) == NVME_STATUS_GET_P(cpl.status), 627 ("Phase unexpectedly inconsistent")); 628 629 if (cpl.cid < qpair->num_trackers) 630 tr = qpair->act_tr[cpl.cid]; 631 else 632 tr = NULL; 633 634 done = true; 635 if (tr != NULL) { 636 nvme_qpair_complete_tracker(tr, &cpl, ERROR_PRINT_ALL); 637 qpair->sq_head = cpl.sqhd; 638 } else if (!in_panic) { 639 /* 640 * A missing tracker is normally an error. However, a 641 * panic can stop the CPU this routine is running on 642 * after completing an I/O but before updating 643 * qpair->cq_head at 1 below. Later, we re-enter this 644 * routine to poll I/O associated with the kernel 645 * dump. We find that the tr has been set to null before 646 * calling the completion routine. If it hasn't 647 * completed (or it triggers a panic), then '1' below 648 * won't have updated cq_head. Rather than panic again, 649 * ignore this condition because it's not unexpected. 650 */ 651 nvme_printf(qpair->ctrlr, 652 "cpl (cid = %u) does not map to outstanding cmd\n", 653 cpl.cid); 654 nvme_qpair_print_completion(qpair, 655 &qpair->cpl[qpair->cq_head]); 656 KASSERT(0, ("received completion for unknown cmd")); 657 } 658 659 /* 660 * There's a number of races with the following (see above) when 661 * the system panics. We compensate for each one of them by 662 * using the atomic store to force strong ordering (at least when 663 * viewed in the aftermath of a panic). 664 */ 665 if (++qpair->cq_head == qpair->num_entries) { /* 1 */ 666 atomic_store_rel_int(&qpair->cq_head, 0); /* 2 */ 667 qpair->phase = !qpair->phase; /* 3 */ 668 } 669 } 670 671 if (done) { 672 bus_space_write_4(qpair->ctrlr->bus_tag, qpair->ctrlr->bus_handle, 673 qpair->cq_hdbl_off, qpair->cq_head); 674 } 675 676 return (done); 677 } 678 679 bool 680 nvme_qpair_process_completions(struct nvme_qpair *qpair) 681 { 682 bool done; 683 684 /* 685 * Interlock with reset / recovery code. This is an usually uncontended 686 * to make sure that we drain out of the ISRs before we reset the card 687 * and to prevent races with the recovery process called from a timeout 688 * context. 689 */ 690 if (!mtx_trylock(&qpair->recovery)) { 691 qpair->num_recovery_nolock++; 692 return (false); 693 } 694 695 done = _nvme_qpair_process_completions(qpair); 696 697 mtx_unlock(&qpair->recovery); 698 699 return (done); 700 } 701 702 static void 703 nvme_qpair_msi_handler(void *arg) 704 { 705 struct nvme_qpair *qpair = arg; 706 707 nvme_qpair_process_completions(qpair); 708 } 709 710 int 711 nvme_qpair_construct(struct nvme_qpair *qpair, 712 uint32_t num_entries, uint32_t num_trackers, 713 struct nvme_controller *ctrlr) 714 { 715 struct nvme_tracker *tr; 716 size_t cmdsz, cplsz, prpsz, allocsz, prpmemsz; 717 uint64_t queuemem_phys, prpmem_phys, list_phys; 718 uint8_t *queuemem, *prpmem, *prp_list; 719 int i, err; 720 721 qpair->vector = ctrlr->msi_count > 1 ? qpair->id : 0; 722 qpair->num_entries = num_entries; 723 qpair->num_trackers = num_trackers; 724 qpair->ctrlr = ctrlr; 725 726 mtx_init(&qpair->lock, "nvme qpair lock", NULL, MTX_DEF); 727 mtx_init(&qpair->recovery, "nvme qpair recovery", NULL, MTX_DEF); 728 729 callout_init_mtx(&qpair->timer, &qpair->recovery, 0); 730 qpair->timer_armed = false; 731 qpair->recovery_state = RECOVERY_WAITING; 732 733 /* Note: NVMe PRP format is restricted to 4-byte alignment. */ 734 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 735 4, ctrlr->page_size, BUS_SPACE_MAXADDR, 736 BUS_SPACE_MAXADDR, NULL, NULL, ctrlr->max_xfer_size, 737 howmany(ctrlr->max_xfer_size, ctrlr->page_size) + 1, 738 ctrlr->page_size, 0, 739 NULL, NULL, &qpair->dma_tag_payload); 740 if (err != 0) { 741 nvme_printf(ctrlr, "payload tag create failed %d\n", err); 742 goto out; 743 } 744 745 /* 746 * Each component must be page aligned, and individual PRP lists 747 * cannot cross a page boundary. 748 */ 749 cmdsz = qpair->num_entries * sizeof(struct nvme_command); 750 cmdsz = roundup2(cmdsz, ctrlr->page_size); 751 cplsz = qpair->num_entries * sizeof(struct nvme_completion); 752 cplsz = roundup2(cplsz, ctrlr->page_size); 753 /* 754 * For commands requiring more than 2 PRP entries, one PRP will be 755 * embedded in the command (prp1), and the rest of the PRP entries 756 * will be in a list pointed to by the command (prp2). 757 */ 758 prpsz = sizeof(uint64_t) * 759 howmany(ctrlr->max_xfer_size, ctrlr->page_size); 760 prpmemsz = qpair->num_trackers * prpsz; 761 allocsz = cmdsz + cplsz + prpmemsz; 762 763 err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev), 764 ctrlr->page_size, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 765 allocsz, 1, allocsz, 0, NULL, NULL, &qpair->dma_tag); 766 if (err != 0) { 767 nvme_printf(ctrlr, "tag create failed %d\n", err); 768 goto out; 769 } 770 bus_dma_tag_set_domain(qpair->dma_tag, qpair->domain); 771 772 if (bus_dmamem_alloc(qpair->dma_tag, (void **)&queuemem, 773 BUS_DMA_COHERENT | BUS_DMA_NOWAIT, &qpair->queuemem_map)) { 774 nvme_printf(ctrlr, "failed to alloc qpair memory\n"); 775 goto out; 776 } 777 778 if (bus_dmamap_load(qpair->dma_tag, qpair->queuemem_map, 779 queuemem, allocsz, nvme_single_map, &queuemem_phys, 0) != 0) { 780 nvme_printf(ctrlr, "failed to load qpair memory\n"); 781 bus_dmamem_free(qpair->dma_tag, qpair->cmd, 782 qpair->queuemem_map); 783 goto out; 784 } 785 786 qpair->num_cmds = 0; 787 qpair->num_intr_handler_calls = 0; 788 qpair->num_retries = 0; 789 qpair->num_failures = 0; 790 qpair->num_ignored = 0; 791 qpair->cmd = (struct nvme_command *)queuemem; 792 qpair->cpl = (struct nvme_completion *)(queuemem + cmdsz); 793 prpmem = (uint8_t *)(queuemem + cmdsz + cplsz); 794 qpair->cmd_bus_addr = queuemem_phys; 795 qpair->cpl_bus_addr = queuemem_phys + cmdsz; 796 prpmem_phys = queuemem_phys + cmdsz + cplsz; 797 798 /* 799 * Calcuate the stride of the doorbell register. Many emulators set this 800 * value to correspond to a cache line. However, some hardware has set 801 * it to various small values. 802 */ 803 qpair->sq_tdbl_off = nvme_mmio_offsetof(doorbell[0]) + 804 (qpair->id << (ctrlr->dstrd + 1)); 805 qpair->cq_hdbl_off = nvme_mmio_offsetof(doorbell[0]) + 806 (qpair->id << (ctrlr->dstrd + 1)) + (1 << ctrlr->dstrd); 807 808 TAILQ_INIT(&qpair->free_tr); 809 TAILQ_INIT(&qpair->outstanding_tr); 810 STAILQ_INIT(&qpair->queued_req); 811 812 list_phys = prpmem_phys; 813 prp_list = prpmem; 814 for (i = 0; i < qpair->num_trackers; i++) { 815 if (list_phys + prpsz > prpmem_phys + prpmemsz) { 816 qpair->num_trackers = i; 817 break; 818 } 819 820 /* 821 * Make sure that the PRP list for this tracker doesn't 822 * overflow to another nvme page. 823 */ 824 if (trunc_page(list_phys) != 825 trunc_page(list_phys + prpsz - 1)) { 826 list_phys = roundup2(list_phys, ctrlr->page_size); 827 prp_list = 828 (uint8_t *)roundup2((uintptr_t)prp_list, ctrlr->page_size); 829 } 830 831 tr = malloc_domainset(sizeof(*tr), M_NVME, 832 DOMAINSET_PREF(qpair->domain), M_ZERO | M_WAITOK); 833 bus_dmamap_create(qpair->dma_tag_payload, 0, 834 &tr->payload_dma_map); 835 tr->cid = i; 836 tr->qpair = qpair; 837 tr->prp = (uint64_t *)prp_list; 838 tr->prp_bus_addr = list_phys; 839 TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq); 840 list_phys += prpsz; 841 prp_list += prpsz; 842 } 843 844 if (qpair->num_trackers == 0) { 845 nvme_printf(ctrlr, "failed to allocate enough trackers\n"); 846 goto out; 847 } 848 849 qpair->act_tr = malloc_domainset(sizeof(struct nvme_tracker *) * 850 qpair->num_entries, M_NVME, DOMAINSET_PREF(qpair->domain), 851 M_ZERO | M_WAITOK); 852 853 if (ctrlr->msi_count > 1) { 854 /* 855 * MSI-X vector resource IDs start at 1, so we add one to 856 * the queue's vector to get the corresponding rid to use. 857 */ 858 qpair->rid = qpair->vector + 1; 859 860 qpair->res = bus_alloc_resource_any(ctrlr->dev, SYS_RES_IRQ, 861 &qpair->rid, RF_ACTIVE); 862 if (qpair->res == NULL) { 863 nvme_printf(ctrlr, "unable to allocate MSI\n"); 864 goto out; 865 } 866 if (bus_setup_intr(ctrlr->dev, qpair->res, 867 INTR_TYPE_MISC | INTR_MPSAFE, NULL, 868 nvme_qpair_msi_handler, qpair, &qpair->tag) != 0) { 869 nvme_printf(ctrlr, "unable to setup MSI\n"); 870 goto out; 871 } 872 if (qpair->id == 0) { 873 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 874 "admin"); 875 } else { 876 bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag, 877 "io%d", qpair->id - 1); 878 } 879 } 880 881 return (0); 882 883 out: 884 nvme_qpair_destroy(qpair); 885 return (ENOMEM); 886 } 887 888 static void 889 nvme_qpair_destroy(struct nvme_qpair *qpair) 890 { 891 struct nvme_tracker *tr; 892 893 mtx_lock(&qpair->recovery); 894 qpair->timer_armed = false; 895 mtx_unlock(&qpair->recovery); 896 callout_drain(&qpair->timer); 897 898 if (qpair->tag) { 899 bus_teardown_intr(qpair->ctrlr->dev, qpair->res, qpair->tag); 900 qpair->tag = NULL; 901 } 902 903 if (qpair->act_tr) { 904 free(qpair->act_tr, M_NVME); 905 qpair->act_tr = NULL; 906 } 907 908 while (!TAILQ_EMPTY(&qpair->free_tr)) { 909 tr = TAILQ_FIRST(&qpair->free_tr); 910 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 911 bus_dmamap_destroy(qpair->dma_tag_payload, 912 tr->payload_dma_map); 913 free(tr, M_NVME); 914 } 915 916 if (qpair->cmd != NULL) { 917 bus_dmamap_unload(qpair->dma_tag, qpair->queuemem_map); 918 bus_dmamem_free(qpair->dma_tag, qpair->cmd, 919 qpair->queuemem_map); 920 qpair->cmd = NULL; 921 } 922 923 if (qpair->dma_tag) { 924 bus_dma_tag_destroy(qpair->dma_tag); 925 qpair->dma_tag = NULL; 926 } 927 928 if (qpair->dma_tag_payload) { 929 bus_dma_tag_destroy(qpair->dma_tag_payload); 930 qpair->dma_tag_payload = NULL; 931 } 932 933 if (mtx_initialized(&qpair->lock)) 934 mtx_destroy(&qpair->lock); 935 if (mtx_initialized(&qpair->recovery)) 936 mtx_destroy(&qpair->recovery); 937 938 if (qpair->res) { 939 bus_release_resource(qpair->ctrlr->dev, SYS_RES_IRQ, 940 rman_get_rid(qpair->res), qpair->res); 941 qpair->res = NULL; 942 } 943 } 944 945 static void 946 nvme_admin_qpair_abort_aers(struct nvme_qpair *qpair) 947 { 948 struct nvme_tracker *tr; 949 950 /* 951 * nvme_complete_tracker must be called without the qpair lock held. It 952 * takes the lock to adjust outstanding_tr list, so make sure we don't 953 * have it yet (since this is a general purpose routine). We take the 954 * lock to make the list traverse safe, but have to drop the lock to 955 * complete any AER. We restart the list scan when we do this to make 956 * this safe. There's interlock with the ISR so we know this tracker 957 * won't be completed twice. 958 */ 959 mtx_assert(&qpair->lock, MA_NOTOWNED); 960 961 mtx_lock(&qpair->lock); 962 tr = TAILQ_FIRST(&qpair->outstanding_tr); 963 while (tr != NULL) { 964 if (tr->req->cmd.opc == NVME_OPC_ASYNC_EVENT_REQUEST) { 965 mtx_unlock(&qpair->lock); 966 nvme_qpair_manual_complete_tracker(tr, 967 NVME_SCT_GENERIC, NVME_SC_ABORTED_SQ_DELETION, 0, 968 ERROR_PRINT_NONE); 969 mtx_lock(&qpair->lock); 970 tr = TAILQ_FIRST(&qpair->outstanding_tr); 971 } else { 972 tr = TAILQ_NEXT(tr, tailq); 973 } 974 } 975 mtx_unlock(&qpair->lock); 976 } 977 978 void 979 nvme_admin_qpair_destroy(struct nvme_qpair *qpair) 980 { 981 mtx_assert(&qpair->lock, MA_NOTOWNED); 982 983 nvme_admin_qpair_abort_aers(qpair); 984 nvme_qpair_destroy(qpair); 985 } 986 987 void 988 nvme_io_qpair_destroy(struct nvme_qpair *qpair) 989 { 990 991 nvme_qpair_destroy(qpair); 992 } 993 994 static void 995 nvme_abort_complete(void *arg, const struct nvme_completion *status) 996 { 997 struct nvme_tracker *tr = arg; 998 999 /* 1000 * If cdw0 == 1, the controller was not able to abort the command 1001 * we requested. We still need to check the active tracker array, 1002 * to cover race where I/O timed out at same time controller was 1003 * completing the I/O. 1004 */ 1005 if (status->cdw0 == 1 && tr->qpair->act_tr[tr->cid] != NULL) { 1006 /* 1007 * An I/O has timed out, and the controller was unable to 1008 * abort it for some reason. Construct a fake completion 1009 * status, and then complete the I/O's tracker manually. 1010 */ 1011 nvme_printf(tr->qpair->ctrlr, 1012 "abort command failed, aborting command manually\n"); 1013 nvme_qpair_manual_complete_tracker(tr, 1014 NVME_SCT_GENERIC, NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_ALL); 1015 } 1016 } 1017 1018 static void 1019 nvme_qpair_timeout(void *arg) 1020 { 1021 struct nvme_qpair *qpair = arg; 1022 struct nvme_controller *ctrlr = qpair->ctrlr; 1023 struct nvme_tracker *tr; 1024 sbintime_t now; 1025 bool idle = false; 1026 bool needs_reset; 1027 uint32_t csts; 1028 uint8_t cfs; 1029 1030 mtx_assert(&qpair->recovery, MA_OWNED); 1031 1032 /* 1033 * If the controller is failed, then stop polling. This ensures that any 1034 * failure processing that races with the qpair timeout will fail 1035 * safely. 1036 */ 1037 if (qpair->ctrlr->is_failed) { 1038 nvme_printf(qpair->ctrlr, 1039 "Failed controller, stopping watchdog timeout.\n"); 1040 qpair->timer_armed = false; 1041 return; 1042 } 1043 1044 /* 1045 * Shutdown condition: We set qpair->timer_armed to false in 1046 * nvme_qpair_destroy before calling callout_drain. When we call that, 1047 * this routine might get called one last time. Exit w/o setting a 1048 * timeout. None of the watchdog stuff needs to be done since we're 1049 * destroying the qpair. 1050 */ 1051 if (!qpair->timer_armed) { 1052 nvme_printf(qpair->ctrlr, 1053 "Timeout fired during nvme_qpair_destroy\n"); 1054 return; 1055 } 1056 1057 switch (qpair->recovery_state) { 1058 case RECOVERY_NONE: 1059 /* 1060 * Read csts to get value of cfs - controller fatal status. If 1061 * we are in the hot-plug or controller failed status proceed 1062 * directly to reset. We also bail early if the status reads all 1063 * 1's or the control fatal status bit is now 1. The latter is 1064 * always true when the former is true, but not vice versa. The 1065 * intent of the code is that if the card is gone (all 1's) or 1066 * we've failed, then try to do a reset (which someitmes 1067 * unwedges a card reading all 1's that's not gone away, but 1068 * usually doesn't). 1069 */ 1070 csts = nvme_mmio_read_4(ctrlr, csts); 1071 cfs = NVMEV(NVME_CSTS_REG_CFS, csts); 1072 if (csts == NVME_GONE || cfs == 1) 1073 goto do_reset; 1074 1075 /* 1076 * Process completions. We already have the recovery lock, so 1077 * call the locked version. 1078 */ 1079 _nvme_qpair_process_completions(qpair); 1080 1081 /* 1082 * Check to see if we need to timeout any commands. If we do, then 1083 * we also enter a recovery phase. 1084 */ 1085 now = getsbinuptime(); 1086 needs_reset = false; 1087 idle = true; 1088 mtx_lock(&qpair->lock); 1089 TAILQ_FOREACH(tr, &qpair->outstanding_tr, tailq) { 1090 /* 1091 * Skip async commands, they are posted to the card for 1092 * an indefinite amount of time and have no deadline. 1093 */ 1094 if (tr->deadline == SBT_MAX) 1095 continue; 1096 if (now > tr->deadline) { 1097 if (tr->req->cb_fn != nvme_abort_complete && 1098 ctrlr->enable_aborts) { 1099 /* 1100 * This isn't an abort command, ask 1101 * for a hardware abort. 1102 */ 1103 nvme_ctrlr_cmd_abort(ctrlr, tr->cid, 1104 qpair->id, nvme_abort_complete, tr); 1105 } else { 1106 /* 1107 * Otherwise we have a live command in 1108 * the card (either one we couldn't 1109 * abort, or aborts weren't enabled). 1110 * The only safe way to proceed is to do 1111 * a reset. 1112 */ 1113 needs_reset = true; 1114 } 1115 } else { 1116 idle = false; 1117 } 1118 } 1119 mtx_unlock(&qpair->lock); 1120 if (!needs_reset) 1121 break; 1122 1123 /* 1124 * We've had a command timeout that we weren't able to abort 1125 * 1126 * If we get here due to a possible surprise hot-unplug event, 1127 * then we let nvme_ctrlr_reset confirm and fail the 1128 * controller. 1129 */ 1130 do_reset: 1131 nvme_printf(ctrlr, "Resetting controller due to a timeout%s.\n", 1132 (csts == 0xffffffff) ? " and possible hot unplug" : 1133 (cfs ? " and fatal error status" : "")); 1134 qpair->recovery_state = RECOVERY_WAITING; 1135 nvme_ctrlr_reset(ctrlr); 1136 idle = false; /* We want to keep polling */ 1137 break; 1138 case RECOVERY_WAITING: 1139 /* 1140 * These messages aren't interesting while we're suspended. We 1141 * put the queues into waiting state while 1142 * suspending. Suspending takes a while, so we'll see these 1143 * during that time and they aren't diagnostic. At other times, 1144 * they indicate a problem that's worth complaining about. 1145 */ 1146 if (!device_is_suspended(ctrlr->dev)) 1147 nvme_printf(ctrlr, "Waiting for reset to complete\n"); 1148 idle = false; /* We want to keep polling */ 1149 break; 1150 } 1151 1152 /* 1153 * Rearm the timeout. 1154 */ 1155 if (!idle) { 1156 callout_schedule_sbt(&qpair->timer, SBT_1S / 2, SBT_1S / 2, 0); 1157 } else { 1158 qpair->timer_armed = false; 1159 } 1160 } 1161 1162 /* 1163 * Submit the tracker to the hardware. Must already be in the 1164 * outstanding queue when called. 1165 */ 1166 void 1167 nvme_qpair_submit_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr) 1168 { 1169 struct nvme_request *req; 1170 struct nvme_controller *ctrlr; 1171 int timeout; 1172 1173 mtx_assert(&qpair->lock, MA_OWNED); 1174 1175 req = tr->req; 1176 req->cmd.cid = tr->cid; 1177 qpair->act_tr[tr->cid] = tr; 1178 ctrlr = qpair->ctrlr; 1179 1180 if (req->timeout) { 1181 if (req->cb_fn == nvme_completion_poll_cb) 1182 timeout = 1; 1183 else if (qpair->id == 0) 1184 timeout = ctrlr->admin_timeout_period; 1185 else 1186 timeout = ctrlr->timeout_period; 1187 tr->deadline = getsbinuptime() + timeout * SBT_1S; 1188 if (!qpair->timer_armed) { 1189 qpair->timer_armed = true; 1190 callout_reset_sbt_on(&qpair->timer, SBT_1S / 2, SBT_1S / 2, 1191 nvme_qpair_timeout, qpair, qpair->cpu, 0); 1192 } 1193 } else 1194 tr->deadline = SBT_MAX; 1195 1196 /* Copy the command from the tracker to the submission queue. */ 1197 memcpy(&qpair->cmd[qpair->sq_tail], &req->cmd, sizeof(req->cmd)); 1198 1199 if (++qpair->sq_tail == qpair->num_entries) 1200 qpair->sq_tail = 0; 1201 1202 bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map, 1203 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1204 bus_space_write_4(qpair->ctrlr->bus_tag, qpair->ctrlr->bus_handle, 1205 qpair->sq_tdbl_off, qpair->sq_tail); 1206 qpair->num_cmds++; 1207 } 1208 1209 static void 1210 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error) 1211 { 1212 struct nvme_tracker *tr = arg; 1213 uint32_t cur_nseg; 1214 1215 /* 1216 * If the mapping operation failed, return immediately. The caller 1217 * is responsible for detecting the error status and failing the 1218 * tracker manually. 1219 */ 1220 if (error != 0) { 1221 nvme_printf(tr->qpair->ctrlr, 1222 "nvme_payload_map err %d\n", error); 1223 return; 1224 } 1225 1226 /* 1227 * Note that we specified ctrlr->page_size for alignment and max 1228 * segment size when creating the bus dma tags. So here we can safely 1229 * just transfer each segment to its associated PRP entry. 1230 */ 1231 tr->req->cmd.prp1 = htole64(seg[0].ds_addr); 1232 1233 if (nseg == 2) { 1234 tr->req->cmd.prp2 = htole64(seg[1].ds_addr); 1235 } else if (nseg > 2) { 1236 cur_nseg = 1; 1237 tr->req->cmd.prp2 = htole64((uint64_t)tr->prp_bus_addr); 1238 while (cur_nseg < nseg) { 1239 tr->prp[cur_nseg-1] = 1240 htole64((uint64_t)seg[cur_nseg].ds_addr); 1241 cur_nseg++; 1242 } 1243 } else { 1244 /* 1245 * prp2 should not be used by the controller 1246 * since there is only one segment, but set 1247 * to 0 just to be safe. 1248 */ 1249 tr->req->cmd.prp2 = 0; 1250 } 1251 1252 bus_dmamap_sync(tr->qpair->dma_tag_payload, tr->payload_dma_map, 1253 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1254 nvme_qpair_submit_tracker(tr->qpair, tr); 1255 } 1256 1257 static void 1258 _nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 1259 { 1260 struct nvme_tracker *tr; 1261 int err = 0; 1262 1263 mtx_assert(&qpair->lock, MA_OWNED); 1264 1265 tr = TAILQ_FIRST(&qpair->free_tr); 1266 req->qpair = qpair; 1267 1268 if (tr == NULL || qpair->recovery_state != RECOVERY_NONE) { 1269 /* 1270 * No tracker is available, or the qpair is disabled due to an 1271 * in-progress controller-level reset. If we lose the race with 1272 * recovery_state, then we may add an extra request to the queue 1273 * which will be resubmitted later. We only set recovery_state 1274 * to NONE with qpair->lock also held, so if we observe that the 1275 * state is not NONE, we know it can't transition to NONE below 1276 * when we've submitted the request to hardware. 1277 * 1278 * Also, as part of the failure process, we set recovery_state 1279 * to RECOVERY_WAITING, so we check here to see if we've failed 1280 * the controller. We set it before we call the qpair_fail 1281 * functions, which take out the lock lock before messing with 1282 * queued_req. Since we hold that lock, we know it's safe to 1283 * either fail directly, or queue the failure should is_failed 1284 * be stale. If we lose the race reading is_failed, then 1285 * nvme_qpair_fail will fail the queued request. 1286 */ 1287 1288 if (qpair->ctrlr->is_failed) { 1289 /* 1290 * The controller has failed, so fail the request. 1291 */ 1292 nvme_qpair_manual_complete_request(qpair, req, 1293 NVME_SCT_GENERIC, NVME_SC_ABORTED_BY_REQUEST); 1294 } else { 1295 /* 1296 * Put the request on the qpair's request queue to be 1297 * processed when a tracker frees up via a command 1298 * completion or when the controller reset is 1299 * completed. 1300 */ 1301 STAILQ_INSERT_TAIL(&qpair->queued_req, req, stailq); 1302 } 1303 return; 1304 } 1305 1306 TAILQ_REMOVE(&qpair->free_tr, tr, tailq); 1307 TAILQ_INSERT_TAIL(&qpair->outstanding_tr, tr, tailq); 1308 tr->deadline = SBT_MAX; 1309 tr->req = req; 1310 1311 if (!req->payload_valid) { 1312 nvme_qpair_submit_tracker(tr->qpair, tr); 1313 return; 1314 } 1315 1316 err = bus_dmamap_load_mem(tr->qpair->dma_tag_payload, 1317 tr->payload_dma_map, &req->payload, nvme_payload_map, tr, 0); 1318 if (err != 0) { 1319 /* 1320 * The dmamap operation failed, so we manually fail the 1321 * tracker here with DATA_TRANSFER_ERROR status. 1322 * 1323 * nvme_qpair_manual_complete_tracker must not be called 1324 * with the qpair lock held. 1325 */ 1326 nvme_printf(qpair->ctrlr, 1327 "bus_dmamap_load_mem returned 0x%x!\n", err); 1328 mtx_unlock(&qpair->lock); 1329 nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC, 1330 NVME_SC_DATA_TRANSFER_ERROR, DO_NOT_RETRY, ERROR_PRINT_ALL); 1331 mtx_lock(&qpair->lock); 1332 } 1333 } 1334 1335 void 1336 nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req) 1337 { 1338 1339 mtx_lock(&qpair->lock); 1340 _nvme_qpair_submit_request(qpair, req); 1341 mtx_unlock(&qpair->lock); 1342 } 1343 1344 static void 1345 nvme_qpair_enable(struct nvme_qpair *qpair) 1346 { 1347 if (mtx_initialized(&qpair->recovery)) 1348 mtx_assert(&qpair->recovery, MA_OWNED); 1349 if (mtx_initialized(&qpair->lock)) 1350 mtx_assert(&qpair->lock, MA_OWNED); 1351 KASSERT(!qpair->ctrlr->is_failed, 1352 ("Enabling a failed qpair\n")); 1353 1354 qpair->recovery_state = RECOVERY_NONE; 1355 } 1356 1357 void 1358 nvme_qpair_reset(struct nvme_qpair *qpair) 1359 { 1360 1361 qpair->sq_head = qpair->sq_tail = qpair->cq_head = 0; 1362 1363 /* 1364 * First time through the completion queue, HW will set phase 1365 * bit on completions to 1. So set this to 1 here, indicating 1366 * we're looking for a 1 to know which entries have completed. 1367 * we'll toggle the bit each time when the completion queue 1368 * rolls over. 1369 */ 1370 qpair->phase = 1; 1371 1372 memset(qpair->cmd, 0, 1373 qpair->num_entries * sizeof(struct nvme_command)); 1374 memset(qpair->cpl, 0, 1375 qpair->num_entries * sizeof(struct nvme_completion)); 1376 } 1377 1378 void 1379 nvme_admin_qpair_enable(struct nvme_qpair *qpair) 1380 { 1381 struct nvme_tracker *tr; 1382 struct nvme_tracker *tr_temp; 1383 bool rpt; 1384 1385 /* 1386 * Manually abort each outstanding admin command. Do not retry 1387 * admin commands found here, since they will be left over from 1388 * a controller reset and its likely the context in which the 1389 * command was issued no longer applies. 1390 */ 1391 rpt = !TAILQ_EMPTY(&qpair->outstanding_tr); 1392 if (rpt) 1393 nvme_printf(qpair->ctrlr, 1394 "aborting outstanding admin command\n"); 1395 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1396 nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC, 1397 NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL); 1398 } 1399 if (rpt) 1400 nvme_printf(qpair->ctrlr, 1401 "done aborting outstanding admin\n"); 1402 1403 mtx_lock(&qpair->recovery); 1404 mtx_lock(&qpair->lock); 1405 nvme_qpair_enable(qpair); 1406 mtx_unlock(&qpair->lock); 1407 mtx_unlock(&qpair->recovery); 1408 } 1409 1410 void 1411 nvme_io_qpair_enable(struct nvme_qpair *qpair) 1412 { 1413 STAILQ_HEAD(, nvme_request) temp; 1414 struct nvme_tracker *tr; 1415 struct nvme_tracker *tr_temp; 1416 struct nvme_request *req; 1417 bool report; 1418 1419 /* 1420 * Manually abort each outstanding I/O. This normally results in a 1421 * retry, unless the retry count on the associated request has 1422 * reached its limit. 1423 */ 1424 report = !TAILQ_EMPTY(&qpair->outstanding_tr); 1425 if (report) 1426 nvme_printf(qpair->ctrlr, "aborting outstanding i/o\n"); 1427 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1428 nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC, 1429 NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_NO_RETRY); 1430 } 1431 if (report) 1432 nvme_printf(qpair->ctrlr, "done aborting outstanding i/o\n"); 1433 1434 mtx_lock(&qpair->recovery); 1435 mtx_lock(&qpair->lock); 1436 nvme_qpair_enable(qpair); 1437 1438 STAILQ_INIT(&temp); 1439 STAILQ_SWAP(&qpair->queued_req, &temp, nvme_request); 1440 1441 report = !STAILQ_EMPTY(&temp); 1442 if (report) 1443 nvme_printf(qpair->ctrlr, "resubmitting queued i/o\n"); 1444 while (!STAILQ_EMPTY(&temp)) { 1445 req = STAILQ_FIRST(&temp); 1446 STAILQ_REMOVE_HEAD(&temp, stailq); 1447 nvme_qpair_print_command(qpair, &req->cmd); 1448 _nvme_qpair_submit_request(qpair, req); 1449 } 1450 if (report) 1451 nvme_printf(qpair->ctrlr, "done resubmitting i/o\n"); 1452 1453 mtx_unlock(&qpair->lock); 1454 mtx_unlock(&qpair->recovery); 1455 } 1456 1457 static void 1458 nvme_qpair_disable(struct nvme_qpair *qpair) 1459 { 1460 struct nvme_tracker *tr, *tr_temp; 1461 1462 if (mtx_initialized(&qpair->recovery)) 1463 mtx_assert(&qpair->recovery, MA_OWNED); 1464 if (mtx_initialized(&qpair->lock)) 1465 mtx_assert(&qpair->lock, MA_OWNED); 1466 1467 qpair->recovery_state = RECOVERY_WAITING; 1468 TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) { 1469 tr->deadline = SBT_MAX; 1470 } 1471 } 1472 1473 void 1474 nvme_admin_qpair_disable(struct nvme_qpair *qpair) 1475 { 1476 mtx_lock(&qpair->recovery); 1477 1478 mtx_lock(&qpair->lock); 1479 nvme_qpair_disable(qpair); 1480 mtx_unlock(&qpair->lock); 1481 1482 nvme_admin_qpair_abort_aers(qpair); 1483 1484 mtx_unlock(&qpair->recovery); 1485 } 1486 1487 void 1488 nvme_io_qpair_disable(struct nvme_qpair *qpair) 1489 { 1490 mtx_lock(&qpair->recovery); 1491 mtx_lock(&qpair->lock); 1492 1493 nvme_qpair_disable(qpair); 1494 1495 mtx_unlock(&qpair->lock); 1496 mtx_unlock(&qpair->recovery); 1497 } 1498 1499 void 1500 nvme_qpair_fail(struct nvme_qpair *qpair) 1501 { 1502 struct nvme_tracker *tr; 1503 struct nvme_request *req; 1504 1505 if (!mtx_initialized(&qpair->lock)) 1506 return; 1507 1508 mtx_lock(&qpair->lock); 1509 1510 if (!STAILQ_EMPTY(&qpair->queued_req)) { 1511 nvme_printf(qpair->ctrlr, "failing queued i/o\n"); 1512 } 1513 while (!STAILQ_EMPTY(&qpair->queued_req)) { 1514 req = STAILQ_FIRST(&qpair->queued_req); 1515 STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq); 1516 mtx_unlock(&qpair->lock); 1517 nvme_qpair_manual_complete_request(qpair, req, NVME_SCT_GENERIC, 1518 NVME_SC_ABORTED_BY_REQUEST); 1519 mtx_lock(&qpair->lock); 1520 } 1521 1522 if (!TAILQ_EMPTY(&qpair->outstanding_tr)) { 1523 nvme_printf(qpair->ctrlr, "failing outstanding i/o\n"); 1524 } 1525 /* Manually abort each outstanding I/O. */ 1526 while (!TAILQ_EMPTY(&qpair->outstanding_tr)) { 1527 tr = TAILQ_FIRST(&qpair->outstanding_tr); 1528 /* 1529 * Do not remove the tracker. The abort_tracker path will 1530 * do that for us. 1531 */ 1532 mtx_unlock(&qpair->lock); 1533 nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC, 1534 NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL); 1535 mtx_lock(&qpair->lock); 1536 } 1537 1538 mtx_unlock(&qpair->lock); 1539 } 1540