xref: /freebsd/sys/dev/nvme/nvme_qpair.c (revision e3bdf3da769a55f0944d9c337bb4d91b6435f02c)
1bb0ec6b3SJim Harris /*-
2718cf2ccSPedro F. Giffuni  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3718cf2ccSPedro F. Giffuni  *
4f42ca756SJim Harris  * Copyright (C) 2012-2014 Intel Corporation
5bb0ec6b3SJim Harris  * All rights reserved.
6bb0ec6b3SJim Harris  *
7bb0ec6b3SJim Harris  * Redistribution and use in source and binary forms, with or without
8bb0ec6b3SJim Harris  * modification, are permitted provided that the following conditions
9bb0ec6b3SJim Harris  * are met:
10bb0ec6b3SJim Harris  * 1. Redistributions of source code must retain the above copyright
11bb0ec6b3SJim Harris  *    notice, this list of conditions and the following disclaimer.
12bb0ec6b3SJim Harris  * 2. Redistributions in binary form must reproduce the above copyright
13bb0ec6b3SJim Harris  *    notice, this list of conditions and the following disclaimer in the
14bb0ec6b3SJim Harris  *    documentation and/or other materials provided with the distribution.
15bb0ec6b3SJim Harris  *
16bb0ec6b3SJim Harris  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17bb0ec6b3SJim Harris  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18bb0ec6b3SJim Harris  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19bb0ec6b3SJim Harris  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20bb0ec6b3SJim Harris  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21bb0ec6b3SJim Harris  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22bb0ec6b3SJim Harris  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23bb0ec6b3SJim Harris  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24bb0ec6b3SJim Harris  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25bb0ec6b3SJim Harris  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26bb0ec6b3SJim Harris  * SUCH DAMAGE.
27bb0ec6b3SJim Harris  */
28bb0ec6b3SJim Harris 
29bb0ec6b3SJim Harris #include <sys/cdefs.h>
30bb0ec6b3SJim Harris __FBSDID("$FreeBSD$");
31bb0ec6b3SJim Harris 
32bb0ec6b3SJim Harris #include <sys/param.h>
33bb0ec6b3SJim Harris #include <sys/bus.h>
34d0aaeffdSWarner Losh #include <sys/conf.h>
351eab19cbSAlexander Motin #include <sys/domainset.h>
36d0aaeffdSWarner Losh #include <sys/proc.h>
37bb0ec6b3SJim Harris 
380f71ecf7SJim Harris #include <dev/pci/pcivar.h>
390f71ecf7SJim Harris 
40bb0ec6b3SJim Harris #include "nvme_private.h"
41bb0ec6b3SJim Harris 
422ffd6fceSWarner Losh typedef enum error_print { ERROR_PRINT_NONE, ERROR_PRINT_NO_RETRY, ERROR_PRINT_ALL } error_print_t;
432ffd6fceSWarner Losh #define DO_NOT_RETRY	1
442ffd6fceSWarner Losh 
45d6f54866SJim Harris static void	_nvme_qpair_submit_request(struct nvme_qpair *qpair,
46d6f54866SJim Harris 					   struct nvme_request *req);
47a965389bSScott Long static void	nvme_qpair_destroy(struct nvme_qpair *qpair);
48d6f54866SJim Harris 
49547d523eSJim Harris struct nvme_opcode_string {
50547d523eSJim Harris 	uint16_t	opc;
51547d523eSJim Harris 	const char *	str;
52547d523eSJim Harris };
53547d523eSJim Harris 
54547d523eSJim Harris static struct nvme_opcode_string admin_opcode[] = {
55547d523eSJim Harris 	{ NVME_OPC_DELETE_IO_SQ, "DELETE IO SQ" },
56547d523eSJim Harris 	{ NVME_OPC_CREATE_IO_SQ, "CREATE IO SQ" },
57547d523eSJim Harris 	{ NVME_OPC_GET_LOG_PAGE, "GET LOG PAGE" },
58547d523eSJim Harris 	{ NVME_OPC_DELETE_IO_CQ, "DELETE IO CQ" },
59547d523eSJim Harris 	{ NVME_OPC_CREATE_IO_CQ, "CREATE IO CQ" },
60547d523eSJim Harris 	{ NVME_OPC_IDENTIFY, "IDENTIFY" },
61547d523eSJim Harris 	{ NVME_OPC_ABORT, "ABORT" },
62547d523eSJim Harris 	{ NVME_OPC_SET_FEATURES, "SET FEATURES" },
63547d523eSJim Harris 	{ NVME_OPC_GET_FEATURES, "GET FEATURES" },
64547d523eSJim Harris 	{ NVME_OPC_ASYNC_EVENT_REQUEST, "ASYNC EVENT REQUEST" },
65547d523eSJim Harris 	{ NVME_OPC_FIRMWARE_ACTIVATE, "FIRMWARE ACTIVATE" },
66547d523eSJim Harris 	{ NVME_OPC_FIRMWARE_IMAGE_DOWNLOAD, "FIRMWARE IMAGE DOWNLOAD" },
676b1a96b1SAlexander Motin 	{ NVME_OPC_DEVICE_SELF_TEST, "DEVICE SELF-TEST" },
686b1a96b1SAlexander Motin 	{ NVME_OPC_NAMESPACE_ATTACHMENT, "NAMESPACE ATTACHMENT" },
696b1a96b1SAlexander Motin 	{ NVME_OPC_KEEP_ALIVE, "KEEP ALIVE" },
706b1a96b1SAlexander Motin 	{ NVME_OPC_DIRECTIVE_SEND, "DIRECTIVE SEND" },
716b1a96b1SAlexander Motin 	{ NVME_OPC_DIRECTIVE_RECEIVE, "DIRECTIVE RECEIVE" },
726b1a96b1SAlexander Motin 	{ NVME_OPC_VIRTUALIZATION_MANAGEMENT, "VIRTUALIZATION MANAGEMENT" },
736b1a96b1SAlexander Motin 	{ NVME_OPC_NVME_MI_SEND, "NVME-MI SEND" },
746b1a96b1SAlexander Motin 	{ NVME_OPC_NVME_MI_RECEIVE, "NVME-MI RECEIVE" },
756b1a96b1SAlexander Motin 	{ NVME_OPC_DOORBELL_BUFFER_CONFIG, "DOORBELL BUFFER CONFIG" },
76547d523eSJim Harris 	{ NVME_OPC_FORMAT_NVM, "FORMAT NVM" },
77547d523eSJim Harris 	{ NVME_OPC_SECURITY_SEND, "SECURITY SEND" },
78547d523eSJim Harris 	{ NVME_OPC_SECURITY_RECEIVE, "SECURITY RECEIVE" },
796b1a96b1SAlexander Motin 	{ NVME_OPC_SANITIZE, "SANITIZE" },
8090dfa8f0SAlexander Motin 	{ NVME_OPC_GET_LBA_STATUS, "GET LBA STATUS" },
81547d523eSJim Harris 	{ 0xFFFF, "ADMIN COMMAND" }
82547d523eSJim Harris };
83547d523eSJim Harris 
84547d523eSJim Harris static struct nvme_opcode_string io_opcode[] = {
85547d523eSJim Harris 	{ NVME_OPC_FLUSH, "FLUSH" },
86547d523eSJim Harris 	{ NVME_OPC_WRITE, "WRITE" },
87547d523eSJim Harris 	{ NVME_OPC_READ, "READ" },
88547d523eSJim Harris 	{ NVME_OPC_WRITE_UNCORRECTABLE, "WRITE UNCORRECTABLE" },
89547d523eSJim Harris 	{ NVME_OPC_COMPARE, "COMPARE" },
906b1a96b1SAlexander Motin 	{ NVME_OPC_WRITE_ZEROES, "WRITE ZEROES" },
91547d523eSJim Harris 	{ NVME_OPC_DATASET_MANAGEMENT, "DATASET MANAGEMENT" },
9290dfa8f0SAlexander Motin 	{ NVME_OPC_VERIFY, "VERIFY" },
936b1a96b1SAlexander Motin 	{ NVME_OPC_RESERVATION_REGISTER, "RESERVATION REGISTER" },
946b1a96b1SAlexander Motin 	{ NVME_OPC_RESERVATION_REPORT, "RESERVATION REPORT" },
956b1a96b1SAlexander Motin 	{ NVME_OPC_RESERVATION_ACQUIRE, "RESERVATION ACQUIRE" },
966b1a96b1SAlexander Motin 	{ NVME_OPC_RESERVATION_RELEASE, "RESERVATION RELEASE" },
97547d523eSJim Harris 	{ 0xFFFF, "IO COMMAND" }
98547d523eSJim Harris };
99547d523eSJim Harris 
100547d523eSJim Harris static const char *
101547d523eSJim Harris get_admin_opcode_string(uint16_t opc)
102547d523eSJim Harris {
103547d523eSJim Harris 	struct nvme_opcode_string *entry;
104547d523eSJim Harris 
105547d523eSJim Harris 	entry = admin_opcode;
106547d523eSJim Harris 
107547d523eSJim Harris 	while (entry->opc != 0xFFFF) {
108547d523eSJim Harris 		if (entry->opc == opc)
109547d523eSJim Harris 			return (entry->str);
110547d523eSJim Harris 		entry++;
111547d523eSJim Harris 	}
112547d523eSJim Harris 	return (entry->str);
113547d523eSJim Harris }
114547d523eSJim Harris 
115547d523eSJim Harris static const char *
116547d523eSJim Harris get_io_opcode_string(uint16_t opc)
117547d523eSJim Harris {
118547d523eSJim Harris 	struct nvme_opcode_string *entry;
119547d523eSJim Harris 
120547d523eSJim Harris 	entry = io_opcode;
121547d523eSJim Harris 
122547d523eSJim Harris 	while (entry->opc != 0xFFFF) {
123547d523eSJim Harris 		if (entry->opc == opc)
124547d523eSJim Harris 			return (entry->str);
125547d523eSJim Harris 		entry++;
126547d523eSJim Harris 	}
127547d523eSJim Harris 	return (entry->str);
128547d523eSJim Harris }
129547d523eSJim Harris 
130547d523eSJim Harris static void
131547d523eSJim Harris nvme_admin_qpair_print_command(struct nvme_qpair *qpair,
132547d523eSJim Harris     struct nvme_command *cmd)
133547d523eSJim Harris {
134547d523eSJim Harris 
135547d523eSJim Harris 	nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%x "
136547d523eSJim Harris 	    "cdw10:%08x cdw11:%08x\n",
1379544e6dcSChuck Tuffli 	    get_admin_opcode_string(cmd->opc), cmd->opc, qpair->id, cmd->cid,
1380d787e9bSWojciech Macek 	    le32toh(cmd->nsid), le32toh(cmd->cdw10), le32toh(cmd->cdw11));
139547d523eSJim Harris }
140547d523eSJim Harris 
141547d523eSJim Harris static void
142547d523eSJim Harris nvme_io_qpair_print_command(struct nvme_qpair *qpair,
143547d523eSJim Harris     struct nvme_command *cmd)
144547d523eSJim Harris {
145547d523eSJim Harris 
1469544e6dcSChuck Tuffli 	switch (cmd->opc) {
147547d523eSJim Harris 	case NVME_OPC_WRITE:
148547d523eSJim Harris 	case NVME_OPC_READ:
149547d523eSJim Harris 	case NVME_OPC_WRITE_UNCORRECTABLE:
150547d523eSJim Harris 	case NVME_OPC_COMPARE:
1516b1a96b1SAlexander Motin 	case NVME_OPC_WRITE_ZEROES:
15290dfa8f0SAlexander Motin 	case NVME_OPC_VERIFY:
153547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d "
154bdd1fd40SJim Harris 		    "lba:%llu len:%d\n",
1559544e6dcSChuck Tuffli 		    get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid),
1560d787e9bSWojciech Macek 		    ((unsigned long long)le32toh(cmd->cdw11) << 32) + le32toh(cmd->cdw10),
1570d787e9bSWojciech Macek 		    (le32toh(cmd->cdw12) & 0xFFFF) + 1);
158547d523eSJim Harris 		break;
159547d523eSJim Harris 	case NVME_OPC_FLUSH:
160547d523eSJim Harris 	case NVME_OPC_DATASET_MANAGEMENT:
1616b1a96b1SAlexander Motin 	case NVME_OPC_RESERVATION_REGISTER:
1626b1a96b1SAlexander Motin 	case NVME_OPC_RESERVATION_REPORT:
1636b1a96b1SAlexander Motin 	case NVME_OPC_RESERVATION_ACQUIRE:
1646b1a96b1SAlexander Motin 	case NVME_OPC_RESERVATION_RELEASE:
165547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d\n",
1669544e6dcSChuck Tuffli 		    get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid));
167547d523eSJim Harris 		break;
168547d523eSJim Harris 	default:
169547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%d\n",
1709544e6dcSChuck Tuffli 		    get_io_opcode_string(cmd->opc), cmd->opc, qpair->id,
1710d787e9bSWojciech Macek 		    cmd->cid, le32toh(cmd->nsid));
172547d523eSJim Harris 		break;
173547d523eSJim Harris 	}
174547d523eSJim Harris }
175547d523eSJim Harris 
176547d523eSJim Harris static void
177547d523eSJim Harris nvme_qpair_print_command(struct nvme_qpair *qpair, struct nvme_command *cmd)
178547d523eSJim Harris {
179547d523eSJim Harris 	if (qpair->id == 0)
180547d523eSJim Harris 		nvme_admin_qpair_print_command(qpair, cmd);
181547d523eSJim Harris 	else
182547d523eSJim Harris 		nvme_io_qpair_print_command(qpair, cmd);
183c75bdc04SWarner Losh 	if (nvme_verbose_cmd_dump) {
184c75bdc04SWarner Losh 		nvme_printf(qpair->ctrlr,
185c75bdc04SWarner Losh 		    "nsid:%#x rsvd2:%#x rsvd3:%#x mptr:%#jx prp1:%#jx prp2:%#jx\n",
186c75bdc04SWarner Losh 		    cmd->nsid, cmd->rsvd2, cmd->rsvd3, (uintmax_t)cmd->mptr,
187c75bdc04SWarner Losh 		    (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2);
188c75bdc04SWarner Losh 		nvme_printf(qpair->ctrlr,
189c75bdc04SWarner Losh 		    "cdw10: %#x cdw11:%#x cdw12:%#x cdw13:%#x cdw14:%#x cdw15:%#x\n",
190c75bdc04SWarner Losh 		    cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
191c75bdc04SWarner Losh 		    cmd->cdw15);
192c75bdc04SWarner Losh 	}
193547d523eSJim Harris }
194547d523eSJim Harris 
195547d523eSJim Harris struct nvme_status_string {
196547d523eSJim Harris 	uint16_t	sc;
197547d523eSJim Harris 	const char *	str;
198547d523eSJim Harris };
199547d523eSJim Harris 
200547d523eSJim Harris static struct nvme_status_string generic_status[] = {
201547d523eSJim Harris 	{ NVME_SC_SUCCESS, "SUCCESS" },
202547d523eSJim Harris 	{ NVME_SC_INVALID_OPCODE, "INVALID OPCODE" },
203547d523eSJim Harris 	{ NVME_SC_INVALID_FIELD, "INVALID_FIELD" },
204547d523eSJim Harris 	{ NVME_SC_COMMAND_ID_CONFLICT, "COMMAND ID CONFLICT" },
205547d523eSJim Harris 	{ NVME_SC_DATA_TRANSFER_ERROR, "DATA TRANSFER ERROR" },
206547d523eSJim Harris 	{ NVME_SC_ABORTED_POWER_LOSS, "ABORTED - POWER LOSS" },
207547d523eSJim Harris 	{ NVME_SC_INTERNAL_DEVICE_ERROR, "INTERNAL DEVICE ERROR" },
208547d523eSJim Harris 	{ NVME_SC_ABORTED_BY_REQUEST, "ABORTED - BY REQUEST" },
209547d523eSJim Harris 	{ NVME_SC_ABORTED_SQ_DELETION, "ABORTED - SQ DELETION" },
210547d523eSJim Harris 	{ NVME_SC_ABORTED_FAILED_FUSED, "ABORTED - FAILED FUSED" },
211547d523eSJim Harris 	{ NVME_SC_ABORTED_MISSING_FUSED, "ABORTED - MISSING FUSED" },
212547d523eSJim Harris 	{ NVME_SC_INVALID_NAMESPACE_OR_FORMAT, "INVALID NAMESPACE OR FORMAT" },
213547d523eSJim Harris 	{ NVME_SC_COMMAND_SEQUENCE_ERROR, "COMMAND SEQUENCE ERROR" },
2146b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_SGL_SEGMENT_DESCR, "INVALID SGL SEGMENT DESCRIPTOR" },
2156b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_NUMBER_OF_SGL_DESCR, "INVALID NUMBER OF SGL DESCRIPTORS" },
2166b1a96b1SAlexander Motin 	{ NVME_SC_DATA_SGL_LENGTH_INVALID, "DATA SGL LENGTH INVALID" },
2176b1a96b1SAlexander Motin 	{ NVME_SC_METADATA_SGL_LENGTH_INVALID, "METADATA SGL LENGTH INVALID" },
2186b1a96b1SAlexander Motin 	{ NVME_SC_SGL_DESCRIPTOR_TYPE_INVALID, "SGL DESCRIPTOR TYPE INVALID" },
2196b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_USE_OF_CMB, "INVALID USE OF CONTROLLER MEMORY BUFFER" },
2206b1a96b1SAlexander Motin 	{ NVME_SC_PRP_OFFET_INVALID, "PRP OFFET INVALID" },
2216b1a96b1SAlexander Motin 	{ NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED, "ATOMIC WRITE UNIT EXCEEDED" },
2226b1a96b1SAlexander Motin 	{ NVME_SC_OPERATION_DENIED, "OPERATION DENIED" },
2236b1a96b1SAlexander Motin 	{ NVME_SC_SGL_OFFSET_INVALID, "SGL OFFSET INVALID" },
2246b1a96b1SAlexander Motin 	{ NVME_SC_HOST_ID_INCONSISTENT_FORMAT, "HOST IDENTIFIER INCONSISTENT FORMAT" },
2256b1a96b1SAlexander Motin 	{ NVME_SC_KEEP_ALIVE_TIMEOUT_EXPIRED, "KEEP ALIVE TIMEOUT EXPIRED" },
2266b1a96b1SAlexander Motin 	{ NVME_SC_KEEP_ALIVE_TIMEOUT_INVALID, "KEEP ALIVE TIMEOUT INVALID" },
2276b1a96b1SAlexander Motin 	{ NVME_SC_ABORTED_DUE_TO_PREEMPT, "COMMAND ABORTED DUE TO PREEMPT AND ABORT" },
2286b1a96b1SAlexander Motin 	{ NVME_SC_SANITIZE_FAILED, "SANITIZE FAILED" },
2296b1a96b1SAlexander Motin 	{ NVME_SC_SANITIZE_IN_PROGRESS, "SANITIZE IN PROGRESS" },
2306b1a96b1SAlexander Motin 	{ NVME_SC_SGL_DATA_BLOCK_GRAN_INVALID, "SGL_DATA_BLOCK_GRANULARITY_INVALID" },
2316b1a96b1SAlexander Motin 	{ NVME_SC_NOT_SUPPORTED_IN_CMB, "COMMAND NOT SUPPORTED FOR QUEUE IN CMB" },
23290dfa8f0SAlexander Motin 	{ NVME_SC_NAMESPACE_IS_WRITE_PROTECTED, "NAMESPACE IS WRITE PROTECTED" },
23390dfa8f0SAlexander Motin 	{ NVME_SC_COMMAND_INTERRUPTED, "COMMAND INTERRUPTED" },
23490dfa8f0SAlexander Motin 	{ NVME_SC_TRANSIENT_TRANSPORT_ERROR, "TRANSIENT TRANSPORT ERROR" },
2356b1a96b1SAlexander Motin 
236547d523eSJim Harris 	{ NVME_SC_LBA_OUT_OF_RANGE, "LBA OUT OF RANGE" },
237547d523eSJim Harris 	{ NVME_SC_CAPACITY_EXCEEDED, "CAPACITY EXCEEDED" },
238547d523eSJim Harris 	{ NVME_SC_NAMESPACE_NOT_READY, "NAMESPACE NOT READY" },
2396b1a96b1SAlexander Motin 	{ NVME_SC_RESERVATION_CONFLICT, "RESERVATION CONFLICT" },
2406b1a96b1SAlexander Motin 	{ NVME_SC_FORMAT_IN_PROGRESS, "FORMAT IN PROGRESS" },
241547d523eSJim Harris 	{ 0xFFFF, "GENERIC" }
242547d523eSJim Harris };
243547d523eSJim Harris 
244547d523eSJim Harris static struct nvme_status_string command_specific_status[] = {
245547d523eSJim Harris 	{ NVME_SC_COMPLETION_QUEUE_INVALID, "INVALID COMPLETION QUEUE" },
246547d523eSJim Harris 	{ NVME_SC_INVALID_QUEUE_IDENTIFIER, "INVALID QUEUE IDENTIFIER" },
247547d523eSJim Harris 	{ NVME_SC_MAXIMUM_QUEUE_SIZE_EXCEEDED, "MAX QUEUE SIZE EXCEEDED" },
248547d523eSJim Harris 	{ NVME_SC_ABORT_COMMAND_LIMIT_EXCEEDED, "ABORT CMD LIMIT EXCEEDED" },
249547d523eSJim Harris 	{ NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED, "ASYNC LIMIT EXCEEDED" },
250547d523eSJim Harris 	{ NVME_SC_INVALID_FIRMWARE_SLOT, "INVALID FIRMWARE SLOT" },
251547d523eSJim Harris 	{ NVME_SC_INVALID_FIRMWARE_IMAGE, "INVALID FIRMWARE IMAGE" },
252547d523eSJim Harris 	{ NVME_SC_INVALID_INTERRUPT_VECTOR, "INVALID INTERRUPT VECTOR" },
253547d523eSJim Harris 	{ NVME_SC_INVALID_LOG_PAGE, "INVALID LOG PAGE" },
254547d523eSJim Harris 	{ NVME_SC_INVALID_FORMAT, "INVALID FORMAT" },
255547d523eSJim Harris 	{ NVME_SC_FIRMWARE_REQUIRES_RESET, "FIRMWARE REQUIRES RESET" },
2566b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_QUEUE_DELETION, "INVALID QUEUE DELETION" },
2576b1a96b1SAlexander Motin 	{ NVME_SC_FEATURE_NOT_SAVEABLE, "FEATURE IDENTIFIER NOT SAVEABLE" },
2586b1a96b1SAlexander Motin 	{ NVME_SC_FEATURE_NOT_CHANGEABLE, "FEATURE NOT CHANGEABLE" },
2596b1a96b1SAlexander Motin 	{ NVME_SC_FEATURE_NOT_NS_SPECIFIC, "FEATURE NOT NAMESPACE SPECIFIC" },
2606b1a96b1SAlexander Motin 	{ NVME_SC_FW_ACT_REQUIRES_NVMS_RESET, "FIRMWARE ACTIVATION REQUIRES NVM SUBSYSTEM RESET" },
2616b1a96b1SAlexander Motin 	{ NVME_SC_FW_ACT_REQUIRES_RESET, "FIRMWARE ACTIVATION REQUIRES RESET" },
2626b1a96b1SAlexander Motin 	{ NVME_SC_FW_ACT_REQUIRES_TIME, "FIRMWARE ACTIVATION REQUIRES MAXIMUM TIME VIOLATION" },
2636b1a96b1SAlexander Motin 	{ NVME_SC_FW_ACT_PROHIBITED, "FIRMWARE ACTIVATION PROHIBITED" },
2646b1a96b1SAlexander Motin 	{ NVME_SC_OVERLAPPING_RANGE, "OVERLAPPING RANGE" },
2656b1a96b1SAlexander Motin 	{ NVME_SC_NS_INSUFFICIENT_CAPACITY, "NAMESPACE INSUFFICIENT CAPACITY" },
2666b1a96b1SAlexander Motin 	{ NVME_SC_NS_ID_UNAVAILABLE, "NAMESPACE IDENTIFIER UNAVAILABLE" },
2676b1a96b1SAlexander Motin 	{ NVME_SC_NS_ALREADY_ATTACHED, "NAMESPACE ALREADY ATTACHED" },
2686b1a96b1SAlexander Motin 	{ NVME_SC_NS_IS_PRIVATE, "NAMESPACE IS PRIVATE" },
2696b1a96b1SAlexander Motin 	{ NVME_SC_NS_NOT_ATTACHED, "NS NOT ATTACHED" },
2706b1a96b1SAlexander Motin 	{ NVME_SC_THIN_PROV_NOT_SUPPORTED, "THIN PROVISIONING NOT SUPPORTED" },
2716b1a96b1SAlexander Motin 	{ NVME_SC_CTRLR_LIST_INVALID, "CONTROLLER LIST INVALID" },
2728d08cdc7SChuck Tuffli 	{ NVME_SC_SELF_TEST_IN_PROGRESS, "DEVICE SELF-TEST IN PROGRESS" },
2736b1a96b1SAlexander Motin 	{ NVME_SC_BOOT_PART_WRITE_PROHIB, "BOOT PARTITION WRITE PROHIBITED" },
2746b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_CTRLR_ID, "INVALID CONTROLLER IDENTIFIER" },
2756b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_SEC_CTRLR_STATE, "INVALID SECONDARY CONTROLLER STATE" },
2766b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_NUM_OF_CTRLR_RESRC, "INVALID NUMBER OF CONTROLLER RESOURCES" },
2776b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_RESOURCE_ID, "INVALID RESOURCE IDENTIFIER" },
27890dfa8f0SAlexander Motin 	{ NVME_SC_SANITIZE_PROHIBITED_WPMRE, "SANITIZE PROHIBITED WRITE PERSISTENT MEMORY REGION ENABLED" },
27990dfa8f0SAlexander Motin 	{ NVME_SC_ANA_GROUP_ID_INVALID, "ANA GROUP IDENTIFIED INVALID" },
28090dfa8f0SAlexander Motin 	{ NVME_SC_ANA_ATTACH_FAILED, "ANA ATTACH FAILED" },
2816b1a96b1SAlexander Motin 
282547d523eSJim Harris 	{ NVME_SC_CONFLICTING_ATTRIBUTES, "CONFLICTING ATTRIBUTES" },
283547d523eSJim Harris 	{ NVME_SC_INVALID_PROTECTION_INFO, "INVALID PROTECTION INFO" },
284547d523eSJim Harris 	{ NVME_SC_ATTEMPTED_WRITE_TO_RO_PAGE, "WRITE TO RO PAGE" },
285547d523eSJim Harris 	{ 0xFFFF, "COMMAND SPECIFIC" }
286547d523eSJim Harris };
287547d523eSJim Harris 
288547d523eSJim Harris static struct nvme_status_string media_error_status[] = {
289547d523eSJim Harris 	{ NVME_SC_WRITE_FAULTS, "WRITE FAULTS" },
290547d523eSJim Harris 	{ NVME_SC_UNRECOVERED_READ_ERROR, "UNRECOVERED READ ERROR" },
291547d523eSJim Harris 	{ NVME_SC_GUARD_CHECK_ERROR, "GUARD CHECK ERROR" },
292547d523eSJim Harris 	{ NVME_SC_APPLICATION_TAG_CHECK_ERROR, "APPLICATION TAG CHECK ERROR" },
293547d523eSJim Harris 	{ NVME_SC_REFERENCE_TAG_CHECK_ERROR, "REFERENCE TAG CHECK ERROR" },
294547d523eSJim Harris 	{ NVME_SC_COMPARE_FAILURE, "COMPARE FAILURE" },
295547d523eSJim Harris 	{ NVME_SC_ACCESS_DENIED, "ACCESS DENIED" },
2966b1a96b1SAlexander Motin 	{ NVME_SC_DEALLOCATED_OR_UNWRITTEN, "DEALLOCATED OR UNWRITTEN LOGICAL BLOCK" },
297547d523eSJim Harris 	{ 0xFFFF, "MEDIA ERROR" }
298547d523eSJim Harris };
299547d523eSJim Harris 
300a6d222ebSAlexander Motin static struct nvme_status_string path_related_status[] = {
301a6d222ebSAlexander Motin 	{ NVME_SC_INTERNAL_PATH_ERROR, "INTERNAL PATH ERROR" },
302a6d222ebSAlexander Motin 	{ NVME_SC_ASYMMETRIC_ACCESS_PERSISTENT_LOSS, "ASYMMETRIC ACCESS PERSISTENT LOSS" },
303a6d222ebSAlexander Motin 	{ NVME_SC_ASYMMETRIC_ACCESS_INACCESSIBLE, "ASYMMETRIC ACCESS INACCESSIBLE" },
304a6d222ebSAlexander Motin 	{ NVME_SC_ASYMMETRIC_ACCESS_TRANSITION, "ASYMMETRIC ACCESS TRANSITION" },
305a6d222ebSAlexander Motin 	{ NVME_SC_CONTROLLER_PATHING_ERROR, "CONTROLLER PATHING ERROR" },
306a6d222ebSAlexander Motin 	{ NVME_SC_HOST_PATHING_ERROR, "HOST PATHING ERROR" },
307a6d222ebSAlexander Motin 	{ NVME_SC_COMMAND_ABOTHED_BY_HOST, "COMMAND ABOTHED BY HOST" },
308a6d222ebSAlexander Motin 	{ 0xFFFF, "PATH RELATED" },
309a6d222ebSAlexander Motin };
310a6d222ebSAlexander Motin 
311547d523eSJim Harris static const char *
312547d523eSJim Harris get_status_string(uint16_t sct, uint16_t sc)
313547d523eSJim Harris {
314547d523eSJim Harris 	struct nvme_status_string *entry;
315547d523eSJim Harris 
316547d523eSJim Harris 	switch (sct) {
317547d523eSJim Harris 	case NVME_SCT_GENERIC:
318547d523eSJim Harris 		entry = generic_status;
319547d523eSJim Harris 		break;
320547d523eSJim Harris 	case NVME_SCT_COMMAND_SPECIFIC:
321547d523eSJim Harris 		entry = command_specific_status;
322547d523eSJim Harris 		break;
323547d523eSJim Harris 	case NVME_SCT_MEDIA_ERROR:
324547d523eSJim Harris 		entry = media_error_status;
325547d523eSJim Harris 		break;
326a6d222ebSAlexander Motin 	case NVME_SCT_PATH_RELATED:
327a6d222ebSAlexander Motin 		entry = path_related_status;
328a6d222ebSAlexander Motin 		break;
329547d523eSJim Harris 	case NVME_SCT_VENDOR_SPECIFIC:
330547d523eSJim Harris 		return ("VENDOR SPECIFIC");
331547d523eSJim Harris 	default:
332547d523eSJim Harris 		return ("RESERVED");
333547d523eSJim Harris 	}
334547d523eSJim Harris 
335547d523eSJim Harris 	while (entry->sc != 0xFFFF) {
336547d523eSJim Harris 		if (entry->sc == sc)
337547d523eSJim Harris 			return (entry->str);
338547d523eSJim Harris 		entry++;
339547d523eSJim Harris 	}
340547d523eSJim Harris 	return (entry->str);
341547d523eSJim Harris }
342547d523eSJim Harris 
343547d523eSJim Harris static void
344547d523eSJim Harris nvme_qpair_print_completion(struct nvme_qpair *qpair,
345547d523eSJim Harris     struct nvme_completion *cpl)
346547d523eSJim Harris {
3470d787e9bSWojciech Macek 	uint16_t sct, sc;
3480d787e9bSWojciech Macek 
3490d787e9bSWojciech Macek 	sct = NVME_STATUS_GET_SCT(cpl->status);
3500d787e9bSWojciech Macek 	sc = NVME_STATUS_GET_SC(cpl->status);
3510d787e9bSWojciech Macek 
352547d523eSJim Harris 	nvme_printf(qpair->ctrlr, "%s (%02x/%02x) sqid:%d cid:%d cdw0:%x\n",
3530d787e9bSWojciech Macek 	    get_status_string(sct, sc), sct, sc, cpl->sqid, cpl->cid,
3540d787e9bSWojciech Macek 	    cpl->cdw0);
355547d523eSJim Harris }
356547d523eSJim Harris 
3577588c6ccSWarner Losh static bool
3586cb06070SJim Harris nvme_completion_is_retry(const struct nvme_completion *cpl)
359bb0ec6b3SJim Harris {
3600d787e9bSWojciech Macek 	uint8_t sct, sc, dnr;
3610d787e9bSWojciech Macek 
3620d787e9bSWojciech Macek 	sct = NVME_STATUS_GET_SCT(cpl->status);
3630d787e9bSWojciech Macek 	sc = NVME_STATUS_GET_SC(cpl->status);
3642ffd6fceSWarner Losh 	dnr = NVME_STATUS_GET_DNR(cpl->status);	/* Do Not Retry Bit */
3650d787e9bSWojciech Macek 
366bb0ec6b3SJim Harris 	/*
367bb0ec6b3SJim Harris 	 * TODO: spec is not clear how commands that are aborted due
368bb0ec6b3SJim Harris 	 *  to TLER will be marked.  So for now, it seems
369bb0ec6b3SJim Harris 	 *  NAMESPACE_NOT_READY is the only case where we should
37095108cadSWarner Losh 	 *  look at the DNR bit. Requests failed with ABORTED_BY_REQUEST
37195108cadSWarner Losh 	 *  set the DNR bit correctly since the driver controls that.
372bb0ec6b3SJim Harris 	 */
3730d787e9bSWojciech Macek 	switch (sct) {
374bb0ec6b3SJim Harris 	case NVME_SCT_GENERIC:
3750d787e9bSWojciech Macek 		switch (sc) {
376448195e7SJim Harris 		case NVME_SC_ABORTED_BY_REQUEST:
377bb0ec6b3SJim Harris 		case NVME_SC_NAMESPACE_NOT_READY:
3780d787e9bSWojciech Macek 			if (dnr)
379bb0ec6b3SJim Harris 				return (0);
380bb0ec6b3SJim Harris 			else
381bb0ec6b3SJim Harris 				return (1);
382bb0ec6b3SJim Harris 		case NVME_SC_INVALID_OPCODE:
383bb0ec6b3SJim Harris 		case NVME_SC_INVALID_FIELD:
384bb0ec6b3SJim Harris 		case NVME_SC_COMMAND_ID_CONFLICT:
385bb0ec6b3SJim Harris 		case NVME_SC_DATA_TRANSFER_ERROR:
386bb0ec6b3SJim Harris 		case NVME_SC_ABORTED_POWER_LOSS:
387bb0ec6b3SJim Harris 		case NVME_SC_INTERNAL_DEVICE_ERROR:
388bb0ec6b3SJim Harris 		case NVME_SC_ABORTED_SQ_DELETION:
389bb0ec6b3SJim Harris 		case NVME_SC_ABORTED_FAILED_FUSED:
390bb0ec6b3SJim Harris 		case NVME_SC_ABORTED_MISSING_FUSED:
391bb0ec6b3SJim Harris 		case NVME_SC_INVALID_NAMESPACE_OR_FORMAT:
392bb0ec6b3SJim Harris 		case NVME_SC_COMMAND_SEQUENCE_ERROR:
393bb0ec6b3SJim Harris 		case NVME_SC_LBA_OUT_OF_RANGE:
394bb0ec6b3SJim Harris 		case NVME_SC_CAPACITY_EXCEEDED:
395bb0ec6b3SJim Harris 		default:
396bb0ec6b3SJim Harris 			return (0);
397bb0ec6b3SJim Harris 		}
398bb0ec6b3SJim Harris 	case NVME_SCT_COMMAND_SPECIFIC:
399bb0ec6b3SJim Harris 	case NVME_SCT_MEDIA_ERROR:
400a6d222ebSAlexander Motin 		return (0);
401a6d222ebSAlexander Motin 	case NVME_SCT_PATH_RELATED:
402a6d222ebSAlexander Motin 		switch (sc) {
403a6d222ebSAlexander Motin 		case NVME_SC_INTERNAL_PATH_ERROR:
404a6d222ebSAlexander Motin 			if (dnr)
405a6d222ebSAlexander Motin 				return (0);
406a6d222ebSAlexander Motin 			else
407a6d222ebSAlexander Motin 				return (1);
408a6d222ebSAlexander Motin 		default:
409a6d222ebSAlexander Motin 			return (0);
410a6d222ebSAlexander Motin 		}
411bb0ec6b3SJim Harris 	case NVME_SCT_VENDOR_SPECIFIC:
412bb0ec6b3SJim Harris 	default:
413bb0ec6b3SJim Harris 		return (0);
414bb0ec6b3SJim Harris 	}
415bb0ec6b3SJim Harris }
416bb0ec6b3SJim Harris 
41721b6da58SJim Harris static void
41843393e8bSWarner Losh nvme_qpair_complete_tracker(struct nvme_tracker *tr,
4192ffd6fceSWarner Losh     struct nvme_completion *cpl, error_print_t print_on_error)
420bb0ec6b3SJim Harris {
42143393e8bSWarner Losh 	struct nvme_qpair * qpair = tr->qpair;
422ad697276SJim Harris 	struct nvme_request	*req;
4237588c6ccSWarner Losh 	bool			retry, error, retriable;
424bb0ec6b3SJim Harris 
425ad697276SJim Harris 	req = tr->req;
4266cb06070SJim Harris 	error = nvme_completion_is_error(cpl);
4275e83c2ffSWarner Losh 	retriable = nvme_completion_is_retry(cpl);
4285e83c2ffSWarner Losh 	retry = error && retriable && req->retries < nvme_retry_count;
429c37fc318SWarner Losh 	if (retry)
430c37fc318SWarner Losh 		qpair->num_retries++;
4315e83c2ffSWarner Losh 	if (error && req->retries >= nvme_retry_count && retriable)
4325e83c2ffSWarner Losh 		qpair->num_failures++;
433ad697276SJim Harris 
4342ffd6fceSWarner Losh 	if (error && (print_on_error == ERROR_PRINT_ALL ||
4352ffd6fceSWarner Losh 		(!retry && print_on_error == ERROR_PRINT_NO_RETRY))) {
436547d523eSJim Harris 		nvme_qpair_print_command(qpair, &req->cmd);
437547d523eSJim Harris 		nvme_qpair_print_completion(qpair, cpl);
438bb0ec6b3SJim Harris 	}
439bb0ec6b3SJim Harris 
440bb0ec6b3SJim Harris 	qpair->act_tr[cpl->cid] = NULL;
441bb0ec6b3SJim Harris 
4426cb06070SJim Harris 	KASSERT(cpl->cid == req->cmd.cid, ("cpl cid does not match cmd cid\n"));
443bb0ec6b3SJim Harris 
4440a4b14e8SMichal Meloun 	if (!retry) {
4450a4b14e8SMichal Meloun 		if (req->type != NVME_REQUEST_NULL) {
4460a4b14e8SMichal Meloun 			bus_dmamap_sync(qpair->dma_tag_payload,
4470a4b14e8SMichal Meloun 			    tr->payload_dma_map,
4480a4b14e8SMichal Meloun 			    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
4490a4b14e8SMichal Meloun 		}
4500a4b14e8SMichal Meloun 		if (req->cb_fn)
451ad697276SJim Harris 			req->cb_fn(req->cb_arg, cpl);
4520a4b14e8SMichal Meloun 	}
453bb0ec6b3SJim Harris 
454bb0ec6b3SJim Harris 	mtx_lock(&qpair->lock);
455bb0ec6b3SJim Harris 	callout_stop(&tr->timer);
456bb0ec6b3SJim Harris 
457cb5b7c13SJim Harris 	if (retry) {
458cb5b7c13SJim Harris 		req->retries++;
459b846efd7SJim Harris 		nvme_qpair_submit_tracker(qpair, tr);
460cb5b7c13SJim Harris 	} else {
4612e0090afSJustin Hibbits 		if (req->type != NVME_REQUEST_NULL) {
462a6e30963SJim Harris 			bus_dmamap_unload(qpair->dma_tag_payload,
463f2b19f67SJim Harris 			    tr->payload_dma_map);
4642e0090afSJustin Hibbits 		}
465bb0ec6b3SJim Harris 
466ad697276SJim Harris 		nvme_free_request(req);
4670a0b08ccSJim Harris 		tr->req = NULL;
46821b6da58SJim Harris 
46965c2474eSJim Harris 		TAILQ_REMOVE(&qpair->outstanding_tr, tr, tailq);
47065c2474eSJim Harris 		TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq);
4710f71ecf7SJim Harris 
472f37c22a3SJim Harris 		/*
473f37c22a3SJim Harris 		 * If the controller is in the middle of resetting, don't
474f37c22a3SJim Harris 		 *  try to submit queued requests here - let the reset logic
475f37c22a3SJim Harris 		 *  handle that instead.
476f37c22a3SJim Harris 		 */
477f37c22a3SJim Harris 		if (!STAILQ_EMPTY(&qpair->queued_req) &&
478f37c22a3SJim Harris 		    !qpair->ctrlr->is_resetting) {
4790f71ecf7SJim Harris 			req = STAILQ_FIRST(&qpair->queued_req);
4800f71ecf7SJim Harris 			STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq);
481d6f54866SJim Harris 			_nvme_qpair_submit_request(qpair, req);
4820f71ecf7SJim Harris 		}
483c2e83b40SJim Harris 	}
484bb0ec6b3SJim Harris 
485bb0ec6b3SJim Harris 	mtx_unlock(&qpair->lock);
4866cb06070SJim Harris }
4876cb06070SJim Harris 
488b846efd7SJim Harris static void
48943393e8bSWarner Losh nvme_qpair_manual_complete_tracker(
490232e2edbSJim Harris     struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr,
4912ffd6fceSWarner Losh     error_print_t print_on_error)
492b846efd7SJim Harris {
493b846efd7SJim Harris 	struct nvme_completion	cpl;
494b846efd7SJim Harris 
495b846efd7SJim Harris 	memset(&cpl, 0, sizeof(cpl));
49643393e8bSWarner Losh 
49743393e8bSWarner Losh 	struct nvme_qpair * qpair = tr->qpair;
49843393e8bSWarner Losh 
499b846efd7SJim Harris 	cpl.sqid = qpair->id;
500b846efd7SJim Harris 	cpl.cid = tr->cid;
5010d787e9bSWojciech Macek 	cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT;
5020d787e9bSWojciech Macek 	cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT;
5030d787e9bSWojciech Macek 	cpl.status |= (dnr & NVME_STATUS_DNR_MASK) << NVME_STATUS_DNR_SHIFT;
50443393e8bSWarner Losh 	nvme_qpair_complete_tracker(tr, &cpl, print_on_error);
505b846efd7SJim Harris }
506b846efd7SJim Harris 
5076cb06070SJim Harris void
508232e2edbSJim Harris nvme_qpair_manual_complete_request(struct nvme_qpair *qpair,
5092ffd6fceSWarner Losh     struct nvme_request *req, uint32_t sct, uint32_t sc)
510232e2edbSJim Harris {
511232e2edbSJim Harris 	struct nvme_completion	cpl;
5127588c6ccSWarner Losh 	bool			error;
513232e2edbSJim Harris 
514232e2edbSJim Harris 	memset(&cpl, 0, sizeof(cpl));
515232e2edbSJim Harris 	cpl.sqid = qpair->id;
5160d787e9bSWojciech Macek 	cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT;
5170d787e9bSWojciech Macek 	cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT;
518232e2edbSJim Harris 
519232e2edbSJim Harris 	error = nvme_completion_is_error(&cpl);
520232e2edbSJim Harris 
5212ffd6fceSWarner Losh 	if (error) {
522547d523eSJim Harris 		nvme_qpair_print_command(qpair, &req->cmd);
523547d523eSJim Harris 		nvme_qpair_print_completion(qpair, &cpl);
524232e2edbSJim Harris 	}
525232e2edbSJim Harris 
526232e2edbSJim Harris 	if (req->cb_fn)
527232e2edbSJim Harris 		req->cb_fn(req->cb_arg, &cpl);
528232e2edbSJim Harris 
529232e2edbSJim Harris 	nvme_free_request(req);
530232e2edbSJim Harris }
531232e2edbSJim Harris 
532d85d9648SWarner Losh bool
5336cb06070SJim Harris nvme_qpair_process_completions(struct nvme_qpair *qpair)
5346cb06070SJim Harris {
5356cb06070SJim Harris 	struct nvme_tracker	*tr;
5360d787e9bSWojciech Macek 	struct nvme_completion	cpl;
537d85d9648SWarner Losh 	int done = 0;
538d0aaeffdSWarner Losh 	bool in_panic = dumping || SCHEDULER_STOPPED();
5396cb06070SJim Harris 
5406cb06070SJim Harris 	qpair->num_intr_handler_calls++;
5416cb06070SJim Harris 
542b846efd7SJim Harris 	/*
543d0aaeffdSWarner Losh 	 * qpair is not enabled, likely because a controller reset is is in
544d0aaeffdSWarner Losh 	 * progress.  Ignore the interrupt - any I/O that was associated with
545d0aaeffdSWarner Losh 	 * this interrupt will get retried when the reset is complete.
546b846efd7SJim Harris 	 */
547d0aaeffdSWarner Losh 	if (!qpair->is_enabled)
548d85d9648SWarner Losh 		return (false);
549b846efd7SJim Harris 
5508f9d5a8dSMichal Meloun 	bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
5518f9d5a8dSMichal Meloun 	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
552d0aaeffdSWarner Losh 	/*
553d0aaeffdSWarner Losh 	 * A panic can stop the CPU this routine is running on at any point.  If
554d0aaeffdSWarner Losh 	 * we're called during a panic, complete the sq_head wrap protocol for
555d0aaeffdSWarner Losh 	 * the case where we are interrupted just after the increment at 1
556d0aaeffdSWarner Losh 	 * below, but before we can reset cq_head to zero at 2. Also cope with
557d0aaeffdSWarner Losh 	 * the case where we do the zero at 2, but may or may not have done the
558d0aaeffdSWarner Losh 	 * phase adjustment at step 3. The panic machinery flushes all pending
559d0aaeffdSWarner Losh 	 * memory writes, so we can make these strong ordering assumptions
560d0aaeffdSWarner Losh 	 * that would otherwise be unwise if we were racing in real time.
561d0aaeffdSWarner Losh 	 */
562d0aaeffdSWarner Losh 	if (__predict_false(in_panic)) {
563d0aaeffdSWarner Losh 		if (qpair->cq_head == qpair->num_entries) {
564d0aaeffdSWarner Losh 			/*
565d0aaeffdSWarner Losh 			 * Here we know that we need to zero cq_head and then negate
566d0aaeffdSWarner Losh 			 * the phase, which hasn't been assigned if cq_head isn't
567d0aaeffdSWarner Losh 			 * zero due to the atomic_store_rel.
568d0aaeffdSWarner Losh 			 */
569d0aaeffdSWarner Losh 			qpair->cq_head = 0;
570d0aaeffdSWarner Losh 			qpair->phase = !qpair->phase;
571d0aaeffdSWarner Losh 		} else if (qpair->cq_head == 0) {
572d0aaeffdSWarner Losh 			/*
573d0aaeffdSWarner Losh 			 * In this case, we know that the assignment at 2
574d0aaeffdSWarner Losh 			 * happened below, but we don't know if it 3 happened or
575d0aaeffdSWarner Losh 			 * not. To do this, we look at the last completion
576d0aaeffdSWarner Losh 			 * entry and set the phase to the opposite phase
577d0aaeffdSWarner Losh 			 * that it has. This gets us back in sync
578d0aaeffdSWarner Losh 			 */
579d0aaeffdSWarner Losh 			cpl = qpair->cpl[qpair->num_entries - 1];
580d0aaeffdSWarner Losh 			nvme_completion_swapbytes(&cpl);
581d0aaeffdSWarner Losh 			qpair->phase = !NVME_STATUS_GET_P(cpl.status);
582d0aaeffdSWarner Losh 		}
583d0aaeffdSWarner Losh 	}
584d0aaeffdSWarner Losh 
5856cb06070SJim Harris 	while (1) {
586aa0ab681SWarner Losh 		uint16_t status;
5876cb06070SJim Harris 
588aa0ab681SWarner Losh 		/*
589aa0ab681SWarner Losh 		 * We need to do this dance to avoid a race between the host and
590aa0ab681SWarner Losh 		 * the device where the device overtakes the host while the host
591aa0ab681SWarner Losh 		 * is reading this record, leaving the status field 'new' and
592aa0ab681SWarner Losh 		 * the sqhd and cid fields potentially stale. If the phase
593aa0ab681SWarner Losh 		 * doesn't match, that means status hasn't yet been updated and
594aa0ab681SWarner Losh 		 * we'll get any pending changes next time. It also means that
595aa0ab681SWarner Losh 		 * the phase must be the same the second time. We have to sync
596aa0ab681SWarner Losh 		 * before reading to ensure any bouncing completes.
597aa0ab681SWarner Losh 		 */
598aa0ab681SWarner Losh 		status = le16toh(qpair->cpl[qpair->cq_head].status);
599aa0ab681SWarner Losh 		if (NVME_STATUS_GET_P(status) != qpair->phase)
600aa0ab681SWarner Losh 			break;
601aa0ab681SWarner Losh 
602aa0ab681SWarner Losh 		bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
603aa0ab681SWarner Losh 		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
604aa0ab681SWarner Losh 		cpl = qpair->cpl[qpair->cq_head];
6050d787e9bSWojciech Macek 		nvme_completion_swapbytes(&cpl);
6060d787e9bSWojciech Macek 
607aa0ab681SWarner Losh 		KASSERT(
608aa0ab681SWarner Losh 		    NVME_STATUS_GET_P(status) == NVME_STATUS_GET_P(cpl.status),
609aa0ab681SWarner Losh 		    ("Phase unexpectedly inconsistent"));
6106cb06070SJim Harris 
6110d787e9bSWojciech Macek 		tr = qpair->act_tr[cpl.cid];
6126cb06070SJim Harris 
6136cb06070SJim Harris 		if (tr != NULL) {
61443393e8bSWarner Losh 			nvme_qpair_complete_tracker(tr, &cpl, ERROR_PRINT_ALL);
6150d787e9bSWojciech Macek 			qpair->sq_head = cpl.sqhd;
616d85d9648SWarner Losh 			done++;
617d0aaeffdSWarner Losh 		} else if (!in_panic) {
618d0aaeffdSWarner Losh 			/*
619d0aaeffdSWarner Losh 			 * A missing tracker is normally an error.  However, a
620d0aaeffdSWarner Losh 			 * panic can stop the CPU this routine is running on
621d0aaeffdSWarner Losh 			 * after completing an I/O but before updating
622d0aaeffdSWarner Losh 			 * qpair->cq_head at 1 below.  Later, we re-enter this
623d0aaeffdSWarner Losh 			 * routine to poll I/O associated with the kernel
624d0aaeffdSWarner Losh 			 * dump. We find that the tr has been set to null before
625d0aaeffdSWarner Losh 			 * calling the completion routine.  If it hasn't
626d0aaeffdSWarner Losh 			 * completed (or it triggers a panic), then '1' below
627d0aaeffdSWarner Losh 			 * won't have updated cq_head. Rather than panic again,
628d0aaeffdSWarner Losh 			 * ignore this condition because it's not unexpected.
629d0aaeffdSWarner Losh 			 */
630547d523eSJim Harris 			nvme_printf(qpair->ctrlr,
631547d523eSJim Harris 			    "cpl does not map to outstanding cmd\n");
6320d787e9bSWojciech Macek 			/* nvme_dump_completion expects device endianess */
6330d787e9bSWojciech Macek 			nvme_dump_completion(&qpair->cpl[qpair->cq_head]);
634d0aaeffdSWarner Losh 			KASSERT(0, ("received completion for unknown cmd"));
6356cb06070SJim Harris 		}
636bb0ec6b3SJim Harris 
637d0aaeffdSWarner Losh 		/*
638d0aaeffdSWarner Losh 		 * There's a number of races with the following (see above) when
639d0aaeffdSWarner Losh 		 * the system panics. We compensate for each one of them by
640d0aaeffdSWarner Losh 		 * using the atomic store to force strong ordering (at least when
641d0aaeffdSWarner Losh 		 * viewed in the aftermath of a panic).
642d0aaeffdSWarner Losh 		 */
643d0aaeffdSWarner Losh 		if (++qpair->cq_head == qpair->num_entries) {		/* 1 */
644d0aaeffdSWarner Losh 			atomic_store_rel_int(&qpair->cq_head, 0);	/* 2 */
645d0aaeffdSWarner Losh 			qpair->phase = !qpair->phase;			/* 3 */
646bb0ec6b3SJim Harris 		}
647bb0ec6b3SJim Harris 
648f93b7f95SWarner Losh 		bus_space_write_4(qpair->ctrlr->bus_tag, qpair->ctrlr->bus_handle,
649f93b7f95SWarner Losh 		    qpair->cq_hdbl_off, qpair->cq_head);
650bb0ec6b3SJim Harris 	}
651d85d9648SWarner Losh 	return (done != 0);
652bb0ec6b3SJim Harris }
653bb0ec6b3SJim Harris 
654bb0ec6b3SJim Harris static void
655*e3bdf3daSAlexander Motin nvme_qpair_msi_handler(void *arg)
656bb0ec6b3SJim Harris {
657bb0ec6b3SJim Harris 	struct nvme_qpair *qpair = arg;
658bb0ec6b3SJim Harris 
659bb0ec6b3SJim Harris 	nvme_qpair_process_completions(qpair);
660bb0ec6b3SJim Harris }
661bb0ec6b3SJim Harris 
662a965389bSScott Long int
6631eab19cbSAlexander Motin nvme_qpair_construct(struct nvme_qpair *qpair,
6641eab19cbSAlexander Motin     uint32_t num_entries, uint32_t num_trackers,
6658d09e3c4SJim Harris     struct nvme_controller *ctrlr)
666bb0ec6b3SJim Harris {
66721b6da58SJim Harris 	struct nvme_tracker	*tr;
668a965389bSScott Long 	size_t			cmdsz, cplsz, prpsz, allocsz, prpmemsz;
669a965389bSScott Long 	uint64_t		queuemem_phys, prpmem_phys, list_phys;
670a965389bSScott Long 	uint8_t			*queuemem, *prpmem, *prp_list;
671a965389bSScott Long 	int			i, err;
672bb0ec6b3SJim Harris 
673*e3bdf3daSAlexander Motin 	qpair->vector = ctrlr->msi_count > 1 ? qpair->id : 0;
674bb0ec6b3SJim Harris 	qpair->num_entries = num_entries;
6750f71ecf7SJim Harris 	qpair->num_trackers = num_trackers;
676bb0ec6b3SJim Harris 	qpair->ctrlr = ctrlr;
677bb0ec6b3SJim Harris 
678bb0ec6b3SJim Harris 	mtx_init(&qpair->lock, "nvme qpair lock", NULL, MTX_DEF);
679bb0ec6b3SJim Harris 
6801416ef36SJim Harris 	/* Note: NVMe PRP format is restricted to 4-byte alignment. */
681a6e30963SJim Harris 	err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev),
6821416ef36SJim Harris 	    4, PAGE_SIZE, BUS_SPACE_MAXADDR,
683ac90f70dSAlexander Motin 	    BUS_SPACE_MAXADDR, NULL, NULL, ctrlr->max_xfer_size,
684ac90f70dSAlexander Motin 	    btoc(ctrlr->max_xfer_size) + 1, PAGE_SIZE, 0,
685a6e30963SJim Harris 	    NULL, NULL, &qpair->dma_tag_payload);
686a965389bSScott Long 	if (err != 0) {
687a6e30963SJim Harris 		nvme_printf(ctrlr, "payload tag create failed %d\n", err);
688a965389bSScott Long 		goto out;
689a965389bSScott Long 	}
690a965389bSScott Long 
691a965389bSScott Long 	/*
692a965389bSScott Long 	 * Each component must be page aligned, and individual PRP lists
693a965389bSScott Long 	 * cannot cross a page boundary.
694a965389bSScott Long 	 */
695a965389bSScott Long 	cmdsz = qpair->num_entries * sizeof(struct nvme_command);
696a965389bSScott Long 	cmdsz = roundup2(cmdsz, PAGE_SIZE);
697a965389bSScott Long 	cplsz = qpair->num_entries * sizeof(struct nvme_completion);
698a965389bSScott Long 	cplsz = roundup2(cplsz, PAGE_SIZE);
699ac90f70dSAlexander Motin 	/*
700ac90f70dSAlexander Motin 	 * For commands requiring more than 2 PRP entries, one PRP will be
701ac90f70dSAlexander Motin 	 * embedded in the command (prp1), and the rest of the PRP entries
702ac90f70dSAlexander Motin 	 * will be in a list pointed to by the command (prp2).
703ac90f70dSAlexander Motin 	 */
704ac90f70dSAlexander Motin 	prpsz = sizeof(uint64_t) * btoc(ctrlr->max_xfer_size);
705a965389bSScott Long 	prpmemsz = qpair->num_trackers * prpsz;
706a965389bSScott Long 	allocsz = cmdsz + cplsz + prpmemsz;
707a6e30963SJim Harris 
708a6e30963SJim Harris 	err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev),
709a965389bSScott Long 	    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
710a965389bSScott Long 	    allocsz, 1, allocsz, 0, NULL, NULL, &qpair->dma_tag);
711a965389bSScott Long 	if (err != 0) {
712a6e30963SJim Harris 		nvme_printf(ctrlr, "tag create failed %d\n", err);
713a965389bSScott Long 		goto out;
714a965389bSScott Long 	}
7151eab19cbSAlexander Motin 	bus_dma_tag_set_domain(qpair->dma_tag, qpair->domain);
716a965389bSScott Long 
717a965389bSScott Long 	if (bus_dmamem_alloc(qpair->dma_tag, (void **)&queuemem,
7188f9d5a8dSMichal Meloun 	     BUS_DMA_COHERENT | BUS_DMA_NOWAIT, &qpair->queuemem_map)) {
719a965389bSScott Long 		nvme_printf(ctrlr, "failed to alloc qpair memory\n");
720a965389bSScott Long 		goto out;
721a965389bSScott Long 	}
722a965389bSScott Long 
723a965389bSScott Long 	if (bus_dmamap_load(qpair->dma_tag, qpair->queuemem_map,
724a965389bSScott Long 	    queuemem, allocsz, nvme_single_map, &queuemem_phys, 0) != 0) {
725a965389bSScott Long 		nvme_printf(ctrlr, "failed to load qpair memory\n");
726550d5d64SAlexander Motin 		bus_dmamem_free(qpair->dma_tag, qpair->cmd,
727550d5d64SAlexander Motin 		    qpair->queuemem_map);
728a965389bSScott Long 		goto out;
729a965389bSScott Long 	}
730bb0ec6b3SJim Harris 
731bb0ec6b3SJim Harris 	qpair->num_cmds = 0;
7326568ebfcSJim Harris 	qpair->num_intr_handler_calls = 0;
733c37fc318SWarner Losh 	qpair->num_retries = 0;
7345e83c2ffSWarner Losh 	qpair->num_failures = 0;
735a965389bSScott Long 	qpair->cmd = (struct nvme_command *)queuemem;
736a965389bSScott Long 	qpair->cpl = (struct nvme_completion *)(queuemem + cmdsz);
737a965389bSScott Long 	prpmem = (uint8_t *)(queuemem + cmdsz + cplsz);
738a965389bSScott Long 	qpair->cmd_bus_addr = queuemem_phys;
739a965389bSScott Long 	qpair->cpl_bus_addr = queuemem_phys + cmdsz;
740a965389bSScott Long 	prpmem_phys = queuemem_phys + cmdsz + cplsz;
741bb0ec6b3SJim Harris 
742f93b7f95SWarner Losh 	/*
743f93b7f95SWarner Losh 	 * Calcuate the stride of the doorbell register. Many emulators set this
744f93b7f95SWarner Losh 	 * value to correspond to a cache line. However, some hardware has set
745f93b7f95SWarner Losh 	 * it to various small values.
746f93b7f95SWarner Losh 	 */
747f93b7f95SWarner Losh 	qpair->sq_tdbl_off = nvme_mmio_offsetof(doorbell[0]) +
7481eab19cbSAlexander Motin 	    (qpair->id << (ctrlr->dstrd + 1));
749f93b7f95SWarner Losh 	qpair->cq_hdbl_off = nvme_mmio_offsetof(doorbell[0]) +
7501eab19cbSAlexander Motin 	    (qpair->id << (ctrlr->dstrd + 1)) + (1 << ctrlr->dstrd);
751bb0ec6b3SJim Harris 
75265c2474eSJim Harris 	TAILQ_INIT(&qpair->free_tr);
75365c2474eSJim Harris 	TAILQ_INIT(&qpair->outstanding_tr);
7540f71ecf7SJim Harris 	STAILQ_INIT(&qpair->queued_req);
755bb0ec6b3SJim Harris 
756a965389bSScott Long 	list_phys = prpmem_phys;
757a965389bSScott Long 	prp_list = prpmem;
7580f71ecf7SJim Harris 	for (i = 0; i < qpair->num_trackers; i++) {
759a965389bSScott Long 		if (list_phys + prpsz > prpmem_phys + prpmemsz) {
760a965389bSScott Long 			qpair->num_trackers = i;
761a965389bSScott Long 			break;
76221b6da58SJim Harris 		}
76321b6da58SJim Harris 
764a965389bSScott Long 		/*
765a965389bSScott Long 		 * Make sure that the PRP list for this tracker doesn't
766a965389bSScott Long 		 * overflow to another page.
767a965389bSScott Long 		 */
768a965389bSScott Long 		if (trunc_page(list_phys) !=
769a965389bSScott Long 		    trunc_page(list_phys + prpsz - 1)) {
770a965389bSScott Long 			list_phys = roundup2(list_phys, PAGE_SIZE);
771a965389bSScott Long 			prp_list =
772a965389bSScott Long 			    (uint8_t *)roundup2((uintptr_t)prp_list, PAGE_SIZE);
773a965389bSScott Long 		}
774a965389bSScott Long 
7751eab19cbSAlexander Motin 		tr = malloc_domainset(sizeof(*tr), M_NVME,
7761eab19cbSAlexander Motin 		    DOMAINSET_PREF(qpair->domain), M_ZERO | M_WAITOK);
777a965389bSScott Long 		bus_dmamap_create(qpair->dma_tag_payload, 0,
778a965389bSScott Long 		    &tr->payload_dma_map);
779a965389bSScott Long 		callout_init(&tr->timer, 1);
780a965389bSScott Long 		tr->cid = i;
781a965389bSScott Long 		tr->qpair = qpair;
782a965389bSScott Long 		tr->prp = (uint64_t *)prp_list;
783a965389bSScott Long 		tr->prp_bus_addr = list_phys;
784a965389bSScott Long 		TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq);
785a965389bSScott Long 		list_phys += prpsz;
786a965389bSScott Long 		prp_list += prpsz;
787a965389bSScott Long 	}
788a965389bSScott Long 
789a965389bSScott Long 	if (qpair->num_trackers == 0) {
790a965389bSScott Long 		nvme_printf(ctrlr, "failed to allocate enough trackers\n");
791a965389bSScott Long 		goto out;
792a965389bSScott Long 	}
793a965389bSScott Long 
7941eab19cbSAlexander Motin 	qpair->act_tr = malloc_domainset(sizeof(struct nvme_tracker *) *
7951eab19cbSAlexander Motin 	    qpair->num_entries, M_NVME, DOMAINSET_PREF(qpair->domain),
7961eab19cbSAlexander Motin 	    M_ZERO | M_WAITOK);
797fc9a0840SWarner Losh 
798*e3bdf3daSAlexander Motin 	if (ctrlr->msi_count > 1) {
799fc9a0840SWarner Losh 		/*
800fc9a0840SWarner Losh 		 * MSI-X vector resource IDs start at 1, so we add one to
801fc9a0840SWarner Losh 		 *  the queue's vector to get the corresponding rid to use.
802fc9a0840SWarner Losh 		 */
803fc9a0840SWarner Losh 		qpair->rid = qpair->vector + 1;
804fc9a0840SWarner Losh 
805fc9a0840SWarner Losh 		qpair->res = bus_alloc_resource_any(ctrlr->dev, SYS_RES_IRQ,
806fc9a0840SWarner Losh 		    &qpair->rid, RF_ACTIVE);
807*e3bdf3daSAlexander Motin 		if (qpair->res == NULL) {
808*e3bdf3daSAlexander Motin 			nvme_printf(ctrlr, "unable to allocate MSI\n");
809*e3bdf3daSAlexander Motin 			goto out;
810*e3bdf3daSAlexander Motin 		}
811fc9a0840SWarner Losh 		if (bus_setup_intr(ctrlr->dev, qpair->res,
812fc9a0840SWarner Losh 		    INTR_TYPE_MISC | INTR_MPSAFE, NULL,
813*e3bdf3daSAlexander Motin 		    nvme_qpair_msi_handler, qpair, &qpair->tag) != 0) {
814*e3bdf3daSAlexander Motin 			nvme_printf(ctrlr, "unable to setup MSI\n");
815fc9a0840SWarner Losh 			goto out;
816fc9a0840SWarner Losh 		}
817fc9a0840SWarner Losh 		if (qpair->id == 0) {
818fc9a0840SWarner Losh 			bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag,
819fc9a0840SWarner Losh 			    "admin");
820fc9a0840SWarner Losh 		} else {
821fc9a0840SWarner Losh 			bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag,
822fc9a0840SWarner Losh 			    "io%d", qpair->id - 1);
823fc9a0840SWarner Losh 		}
824fc9a0840SWarner Losh 	}
825fc9a0840SWarner Losh 
826a965389bSScott Long 	return (0);
827a965389bSScott Long 
828a965389bSScott Long out:
829a965389bSScott Long 	nvme_qpair_destroy(qpair);
830a965389bSScott Long 	return (ENOMEM);
831bb0ec6b3SJim Harris }
832bb0ec6b3SJim Harris 
833bb0ec6b3SJim Harris static void
834bb0ec6b3SJim Harris nvme_qpair_destroy(struct nvme_qpair *qpair)
835bb0ec6b3SJim Harris {
836bb0ec6b3SJim Harris 	struct nvme_tracker	*tr;
837bb0ec6b3SJim Harris 
838550d5d64SAlexander Motin 	if (qpair->tag) {
839bb0ec6b3SJim Harris 		bus_teardown_intr(qpair->ctrlr->dev, qpair->res, qpair->tag);
840550d5d64SAlexander Motin 		qpair->tag = NULL;
8413d7eb41cSJim Harris 	}
8423d7eb41cSJim Harris 
843550d5d64SAlexander Motin 	if (qpair->act_tr) {
84496ad26eeSMark Johnston 		free(qpair->act_tr, M_NVME);
845550d5d64SAlexander Motin 		qpair->act_tr = NULL;
846550d5d64SAlexander Motin 	}
847bb0ec6b3SJim Harris 
84865c2474eSJim Harris 	while (!TAILQ_EMPTY(&qpair->free_tr)) {
84965c2474eSJim Harris 		tr = TAILQ_FIRST(&qpair->free_tr);
85065c2474eSJim Harris 		TAILQ_REMOVE(&qpair->free_tr, tr, tailq);
851c6c70c07SAlexander Motin 		bus_dmamap_destroy(qpair->dma_tag_payload,
852c6c70c07SAlexander Motin 		    tr->payload_dma_map);
85396ad26eeSMark Johnston 		free(tr, M_NVME);
854bb0ec6b3SJim Harris 	}
855c6c70c07SAlexander Motin 
856550d5d64SAlexander Motin 	if (qpair->cmd != NULL) {
857550d5d64SAlexander Motin 		bus_dmamap_unload(qpair->dma_tag, qpair->queuemem_map);
858550d5d64SAlexander Motin 		bus_dmamem_free(qpair->dma_tag, qpair->cmd,
859550d5d64SAlexander Motin 		    qpair->queuemem_map);
860550d5d64SAlexander Motin 		qpair->cmd = NULL;
861550d5d64SAlexander Motin 	}
862c6c70c07SAlexander Motin 
863550d5d64SAlexander Motin 	if (qpair->dma_tag) {
864550d5d64SAlexander Motin 		bus_dma_tag_destroy(qpair->dma_tag);
865550d5d64SAlexander Motin 		qpair->dma_tag = NULL;
866550d5d64SAlexander Motin 	}
867550d5d64SAlexander Motin 
868550d5d64SAlexander Motin 	if (qpair->dma_tag_payload) {
869c6c70c07SAlexander Motin 		bus_dma_tag_destroy(qpair->dma_tag_payload);
870550d5d64SAlexander Motin 		qpair->dma_tag_payload = NULL;
871550d5d64SAlexander Motin 	}
872550d5d64SAlexander Motin 
873550d5d64SAlexander Motin 	if (mtx_initialized(&qpair->lock))
874550d5d64SAlexander Motin 		mtx_destroy(&qpair->lock);
875550d5d64SAlexander Motin 
876550d5d64SAlexander Motin 	if (qpair->res) {
877550d5d64SAlexander Motin 		bus_release_resource(qpair->ctrlr->dev, SYS_RES_IRQ,
878550d5d64SAlexander Motin 		    rman_get_rid(qpair->res), qpair->res);
879550d5d64SAlexander Motin 		qpair->res = NULL;
880550d5d64SAlexander Motin 	}
881bb0ec6b3SJim Harris }
882bb0ec6b3SJim Harris 
883b846efd7SJim Harris static void
884b846efd7SJim Harris nvme_admin_qpair_abort_aers(struct nvme_qpair *qpair)
885b846efd7SJim Harris {
886b846efd7SJim Harris 	struct nvme_tracker	*tr;
887b846efd7SJim Harris 
888b846efd7SJim Harris 	tr = TAILQ_FIRST(&qpair->outstanding_tr);
889b846efd7SJim Harris 	while (tr != NULL) {
8909544e6dcSChuck Tuffli 		if (tr->req->cmd.opc == NVME_OPC_ASYNC_EVENT_REQUEST) {
89143393e8bSWarner Losh 			nvme_qpair_manual_complete_tracker(tr,
892232e2edbSJim Harris 			    NVME_SCT_GENERIC, NVME_SC_ABORTED_SQ_DELETION, 0,
8932ffd6fceSWarner Losh 			    ERROR_PRINT_NONE);
894b846efd7SJim Harris 			tr = TAILQ_FIRST(&qpair->outstanding_tr);
895b846efd7SJim Harris 		} else {
896b846efd7SJim Harris 			tr = TAILQ_NEXT(tr, tailq);
897b846efd7SJim Harris 		}
898b846efd7SJim Harris 	}
899b846efd7SJim Harris }
900b846efd7SJim Harris 
901bb0ec6b3SJim Harris void
902bb0ec6b3SJim Harris nvme_admin_qpair_destroy(struct nvme_qpair *qpair)
903bb0ec6b3SJim Harris {
904bb0ec6b3SJim Harris 
905b846efd7SJim Harris 	nvme_admin_qpair_abort_aers(qpair);
906bb0ec6b3SJim Harris 	nvme_qpair_destroy(qpair);
907bb0ec6b3SJim Harris }
908bb0ec6b3SJim Harris 
909bb0ec6b3SJim Harris void
910bb0ec6b3SJim Harris nvme_io_qpair_destroy(struct nvme_qpair *qpair)
911bb0ec6b3SJim Harris {
912bb0ec6b3SJim Harris 
913bb0ec6b3SJim Harris 	nvme_qpair_destroy(qpair);
914bb0ec6b3SJim Harris }
915bb0ec6b3SJim Harris 
916bb0ec6b3SJim Harris static void
9170a0b08ccSJim Harris nvme_abort_complete(void *arg, const struct nvme_completion *status)
9180a0b08ccSJim Harris {
919879de699SJim Harris 	struct nvme_tracker	*tr = arg;
920879de699SJim Harris 
921879de699SJim Harris 	/*
922879de699SJim Harris 	 * If cdw0 == 1, the controller was not able to abort the command
923879de699SJim Harris 	 *  we requested.  We still need to check the active tracker array,
924879de699SJim Harris 	 *  to cover race where I/O timed out at same time controller was
925879de699SJim Harris 	 *  completing the I/O.
926879de699SJim Harris 	 */
927879de699SJim Harris 	if (status->cdw0 == 1 && tr->qpair->act_tr[tr->cid] != NULL) {
928879de699SJim Harris 		/*
929879de699SJim Harris 		 * An I/O has timed out, and the controller was unable to
930879de699SJim Harris 		 *  abort it for some reason.  Construct a fake completion
931879de699SJim Harris 		 *  status, and then complete the I/O's tracker manually.
932879de699SJim Harris 		 */
933547d523eSJim Harris 		nvme_printf(tr->qpair->ctrlr,
934547d523eSJim Harris 		    "abort command failed, aborting command manually\n");
93543393e8bSWarner Losh 		nvme_qpair_manual_complete_tracker(tr,
9362ffd6fceSWarner Losh 		    NVME_SCT_GENERIC, NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_ALL);
937879de699SJim Harris 	}
938879de699SJim Harris }
939879de699SJim Harris 
940879de699SJim Harris static void
941bb0ec6b3SJim Harris nvme_timeout(void *arg)
942bb0ec6b3SJim Harris {
943448195e7SJim Harris 	struct nvme_tracker	*tr = arg;
94412d191ecSJim Harris 	struct nvme_qpair	*qpair = tr->qpair;
94512d191ecSJim Harris 	struct nvme_controller	*ctrlr = qpair->ctrlr;
9460d787e9bSWojciech Macek 	uint32_t		csts;
9470d787e9bSWojciech Macek 	uint8_t			cfs;
948448195e7SJim Harris 
94948ce3178SJim Harris 	/*
950d85d9648SWarner Losh 	 * Read csts to get value of cfs - controller fatal status.
951d85d9648SWarner Losh 	 * If no fatal status, try to call the completion routine, and
952d85d9648SWarner Losh 	 * if completes transactions, report a missed interrupt and
953d85d9648SWarner Losh 	 * return (this may need to be rate limited). Otherwise, if
954d85d9648SWarner Losh 	 * aborts are enabled and the controller is not reporting
955d85d9648SWarner Losh 	 * fatal status, abort the command. Otherwise, just reset the
956d85d9648SWarner Losh 	 * controller and hope for the best.
95748ce3178SJim Harris 	 */
958d85d9648SWarner Losh 	csts = nvme_mmio_read_4(ctrlr, csts);
959d85d9648SWarner Losh 	cfs = (csts >> NVME_CSTS_REG_CFS_SHIFT) & NVME_CSTS_REG_CFS_MASK;
960d85d9648SWarner Losh 	if (cfs == 0 && nvme_qpair_process_completions(qpair)) {
961d85d9648SWarner Losh 		nvme_printf(ctrlr, "Missing interrupt\n");
962d85d9648SWarner Losh 		return;
963d85d9648SWarner Losh 	}
964d85d9648SWarner Losh 	if (ctrlr->enable_aborts && cfs == 0) {
965d85d9648SWarner Losh 		nvme_printf(ctrlr, "Aborting command due to a timeout.\n");
96612d191ecSJim Harris 		nvme_ctrlr_cmd_abort(ctrlr, tr->cid, qpair->id,
967879de699SJim Harris 		    nvme_abort_complete, tr);
968d85d9648SWarner Losh 	} else {
969d85d9648SWarner Losh 		nvme_printf(ctrlr, "Resetting controller due to a timeout%s.\n",
9709600aa31SWarner Losh 		    (csts == NVME_GONE) ? " and possible hot unplug" :
97171a28181SAlexander Motin 		    (cfs ? " and fatal error status" : ""));
97248ce3178SJim Harris 		nvme_ctrlr_reset(ctrlr);
973bb0ec6b3SJim Harris 	}
974d85d9648SWarner Losh }
975bb0ec6b3SJim Harris 
976bb0ec6b3SJim Harris void
977b846efd7SJim Harris nvme_qpair_submit_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr)
978bb0ec6b3SJim Harris {
979ad697276SJim Harris 	struct nvme_request	*req;
98094143332SJim Harris 	struct nvme_controller	*ctrlr;
981ead7e103SAlexander Motin 	int timeout;
982bb0ec6b3SJim Harris 
983b846efd7SJim Harris 	mtx_assert(&qpair->lock, MA_OWNED);
984b846efd7SJim Harris 
985ad697276SJim Harris 	req = tr->req;
986ad697276SJim Harris 	req->cmd.cid = tr->cid;
987bb0ec6b3SJim Harris 	qpair->act_tr[tr->cid] = tr;
98894143332SJim Harris 	ctrlr = qpair->ctrlr;
989bb0ec6b3SJim Harris 
990ead7e103SAlexander Motin 	if (req->timeout) {
991ead7e103SAlexander Motin 		if (req->cb_fn == nvme_completion_poll_cb)
992ead7e103SAlexander Motin 			timeout = hz;
993ead7e103SAlexander Motin 		else
994ead7e103SAlexander Motin 			timeout = ctrlr->timeout_period * hz;
995ead7e103SAlexander Motin 		callout_reset_on(&tr->timer, timeout, nvme_timeout, tr,
996ead7e103SAlexander Motin 		    qpair->cpu);
997ead7e103SAlexander Motin 	}
998bb0ec6b3SJim Harris 
999bb0ec6b3SJim Harris 	/* Copy the command from the tracker to the submission queue. */
1000ad697276SJim Harris 	memcpy(&qpair->cmd[qpair->sq_tail], &req->cmd, sizeof(req->cmd));
1001bb0ec6b3SJim Harris 
1002bb0ec6b3SJim Harris 	if (++qpair->sq_tail == qpair->num_entries)
1003bb0ec6b3SJim Harris 		qpair->sq_tail = 0;
1004bb0ec6b3SJim Harris 
10052e0090afSJustin Hibbits 	bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
10062e0090afSJustin Hibbits 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1007f93b7f95SWarner Losh 	bus_space_write_4(qpair->ctrlr->bus_tag, qpair->ctrlr->bus_handle,
1008f93b7f95SWarner Losh 	    qpair->sq_tdbl_off, qpair->sq_tail);
1009bb0ec6b3SJim Harris 	qpair->num_cmds++;
1010bb0ec6b3SJim Harris }
10115ae9ed68SJim Harris 
1012d6f54866SJim Harris static void
1013ca269f32SJim Harris nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
1014ca269f32SJim Harris {
1015ca269f32SJim Harris 	struct nvme_tracker 	*tr = arg;
1016ca269f32SJim Harris 	uint32_t		cur_nseg;
1017ca269f32SJim Harris 
1018ca269f32SJim Harris 	/*
1019ca269f32SJim Harris 	 * If the mapping operation failed, return immediately.  The caller
1020ca269f32SJim Harris 	 *  is responsible for detecting the error status and failing the
1021ca269f32SJim Harris 	 *  tracker manually.
1022ca269f32SJim Harris 	 */
1023a6e30963SJim Harris 	if (error != 0) {
1024a6e30963SJim Harris 		nvme_printf(tr->qpair->ctrlr,
1025a6e30963SJim Harris 		    "nvme_payload_map err %d\n", error);
1026ca269f32SJim Harris 		return;
1027a6e30963SJim Harris 	}
1028ca269f32SJim Harris 
1029ca269f32SJim Harris 	/*
1030ca269f32SJim Harris 	 * Note that we specified PAGE_SIZE for alignment and max
1031ca269f32SJim Harris 	 *  segment size when creating the bus dma tags.  So here
1032ca269f32SJim Harris 	 *  we can safely just transfer each segment to its
1033ca269f32SJim Harris 	 *  associated PRP entry.
1034ca269f32SJim Harris 	 */
10350d787e9bSWojciech Macek 	tr->req->cmd.prp1 = htole64(seg[0].ds_addr);
1036ca269f32SJim Harris 
1037ca269f32SJim Harris 	if (nseg == 2) {
10380d787e9bSWojciech Macek 		tr->req->cmd.prp2 = htole64(seg[1].ds_addr);
1039ca269f32SJim Harris 	} else if (nseg > 2) {
1040ca269f32SJim Harris 		cur_nseg = 1;
10410d787e9bSWojciech Macek 		tr->req->cmd.prp2 = htole64((uint64_t)tr->prp_bus_addr);
1042ca269f32SJim Harris 		while (cur_nseg < nseg) {
1043ca269f32SJim Harris 			tr->prp[cur_nseg-1] =
10440d787e9bSWojciech Macek 			    htole64((uint64_t)seg[cur_nseg].ds_addr);
1045ca269f32SJim Harris 			cur_nseg++;
1046ca269f32SJim Harris 		}
1047a6e30963SJim Harris 	} else {
1048a6e30963SJim Harris 		/*
1049a6e30963SJim Harris 		 * prp2 should not be used by the controller
1050a6e30963SJim Harris 		 *  since there is only one segment, but set
1051a6e30963SJim Harris 		 *  to 0 just to be safe.
1052a6e30963SJim Harris 		 */
1053a6e30963SJim Harris 		tr->req->cmd.prp2 = 0;
1054ca269f32SJim Harris 	}
1055ca269f32SJim Harris 
10562e0090afSJustin Hibbits 	bus_dmamap_sync(tr->qpair->dma_tag_payload, tr->payload_dma_map,
10572e0090afSJustin Hibbits 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1058ca269f32SJim Harris 	nvme_qpair_submit_tracker(tr->qpair, tr);
1059ca269f32SJim Harris }
1060ca269f32SJim Harris 
1061ca269f32SJim Harris static void
1062d6f54866SJim Harris _nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req)
10635ae9ed68SJim Harris {
10645ae9ed68SJim Harris 	struct nvme_tracker	*tr;
1065e2b99004SJim Harris 	int			err = 0;
10665ae9ed68SJim Harris 
1067d6f54866SJim Harris 	mtx_assert(&qpair->lock, MA_OWNED);
10685ae9ed68SJim Harris 
106965c2474eSJim Harris 	tr = TAILQ_FIRST(&qpair->free_tr);
1070232e2edbSJim Harris 	req->qpair = qpair;
107121b6da58SJim Harris 
1072b846efd7SJim Harris 	if (tr == NULL || !qpair->is_enabled) {
10730f71ecf7SJim Harris 		/*
1074b846efd7SJim Harris 		 * No tracker is available, or the qpair is disabled due to
1075232e2edbSJim Harris 		 *  an in-progress controller-level reset or controller
1076232e2edbSJim Harris 		 *  failure.
1077232e2edbSJim Harris 		 */
1078232e2edbSJim Harris 
1079232e2edbSJim Harris 		if (qpair->ctrlr->is_failed) {
1080232e2edbSJim Harris 			/*
1081232e2edbSJim Harris 			 * The controller has failed.  Post the request to a
1082232e2edbSJim Harris 			 *  task where it will be aborted, so that we do not
1083232e2edbSJim Harris 			 *  invoke the request's callback in the context
1084232e2edbSJim Harris 			 *  of the submission.
1085232e2edbSJim Harris 			 */
1086232e2edbSJim Harris 			nvme_ctrlr_post_failed_request(qpair->ctrlr, req);
1087232e2edbSJim Harris 		} else {
1088232e2edbSJim Harris 			/*
1089232e2edbSJim Harris 			 * Put the request on the qpair's request queue to be
1090232e2edbSJim Harris 			 *  processed when a tracker frees up via a command
1091232e2edbSJim Harris 			 *  completion or when the controller reset is
1092232e2edbSJim Harris 			 *  completed.
10930f71ecf7SJim Harris 			 */
10940f71ecf7SJim Harris 			STAILQ_INSERT_TAIL(&qpair->queued_req, req, stailq);
1095232e2edbSJim Harris 		}
1096d6f54866SJim Harris 		return;
109721b6da58SJim Harris 	}
109821b6da58SJim Harris 
109965c2474eSJim Harris 	TAILQ_REMOVE(&qpair->free_tr, tr, tailq);
110065c2474eSJim Harris 	TAILQ_INSERT_TAIL(&qpair->outstanding_tr, tr, tailq);
11015ae9ed68SJim Harris 	tr->req = req;
11025ae9ed68SJim Harris 
11031e526bc4SJim Harris 	switch (req->type) {
11041e526bc4SJim Harris 	case NVME_REQUEST_VADDR:
11057b68ae1eSJim Harris 		KASSERT(req->payload_size <= qpair->ctrlr->max_xfer_size,
11067b68ae1eSJim Harris 		    ("payload_size (%d) exceeds max_xfer_size (%d)\n",
11077b68ae1eSJim Harris 		    req->payload_size, qpair->ctrlr->max_xfer_size));
1108a6e30963SJim Harris 		err = bus_dmamap_load(tr->qpair->dma_tag_payload,
1109a6e30963SJim Harris 		    tr->payload_dma_map, req->u.payload, req->payload_size,
1110a6e30963SJim Harris 		    nvme_payload_map, tr, 0);
11115ae9ed68SJim Harris 		if (err != 0)
1112e2b99004SJim Harris 			nvme_printf(qpair->ctrlr,
1113e2b99004SJim Harris 			    "bus_dmamap_load returned 0x%x!\n", err);
11141e526bc4SJim Harris 		break;
11151e526bc4SJim Harris 	case NVME_REQUEST_NULL:
1116b846efd7SJim Harris 		nvme_qpair_submit_tracker(tr->qpair, tr);
11171e526bc4SJim Harris 		break;
11185fdf9c3cSJim Harris 	case NVME_REQUEST_BIO:
11197b68ae1eSJim Harris 		KASSERT(req->u.bio->bio_bcount <= qpair->ctrlr->max_xfer_size,
11207b68ae1eSJim Harris 		    ("bio->bio_bcount (%jd) exceeds max_xfer_size (%d)\n",
11217b68ae1eSJim Harris 		    (intmax_t)req->u.bio->bio_bcount,
11227b68ae1eSJim Harris 		    qpair->ctrlr->max_xfer_size));
1123a6e30963SJim Harris 		err = bus_dmamap_load_bio(tr->qpair->dma_tag_payload,
11245fdf9c3cSJim Harris 		    tr->payload_dma_map, req->u.bio, nvme_payload_map, tr, 0);
11255fdf9c3cSJim Harris 		if (err != 0)
1126e2b99004SJim Harris 			nvme_printf(qpair->ctrlr,
1127e2b99004SJim Harris 			    "bus_dmamap_load_bio returned 0x%x!\n", err);
11285fdf9c3cSJim Harris 		break;
112951977281SWarner Losh 	case NVME_REQUEST_CCB:
113051977281SWarner Losh 		err = bus_dmamap_load_ccb(tr->qpair->dma_tag_payload,
113151977281SWarner Losh 		    tr->payload_dma_map, req->u.payload,
113251977281SWarner Losh 		    nvme_payload_map, tr, 0);
113351977281SWarner Losh 		if (err != 0)
113451977281SWarner Losh 			nvme_printf(qpair->ctrlr,
113551977281SWarner Losh 			    "bus_dmamap_load_ccb returned 0x%x!\n", err);
113651977281SWarner Losh 		break;
11371e526bc4SJim Harris 	default:
11381e526bc4SJim Harris 		panic("unknown nvme request type 0x%x\n", req->type);
11391e526bc4SJim Harris 		break;
11405ae9ed68SJim Harris 	}
1141e2b99004SJim Harris 
1142e2b99004SJim Harris 	if (err != 0) {
1143e2b99004SJim Harris 		/*
1144e2b99004SJim Harris 		 * The dmamap operation failed, so we manually fail the
1145e2b99004SJim Harris 		 *  tracker here with DATA_TRANSFER_ERROR status.
1146e2b99004SJim Harris 		 *
1147e2b99004SJim Harris 		 * nvme_qpair_manual_complete_tracker must not be called
1148e2b99004SJim Harris 		 *  with the qpair lock held.
1149e2b99004SJim Harris 		 */
1150e2b99004SJim Harris 		mtx_unlock(&qpair->lock);
115143393e8bSWarner Losh 		nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC,
11522ffd6fceSWarner Losh 		    NVME_SC_DATA_TRANSFER_ERROR, DO_NOT_RETRY, ERROR_PRINT_ALL);
1153e2b99004SJim Harris 		mtx_lock(&qpair->lock);
1154e2b99004SJim Harris 	}
1155d6f54866SJim Harris }
11565ae9ed68SJim Harris 
1157d6f54866SJim Harris void
1158d6f54866SJim Harris nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req)
1159d6f54866SJim Harris {
1160d6f54866SJim Harris 
1161d6f54866SJim Harris 	mtx_lock(&qpair->lock);
1162d6f54866SJim Harris 	_nvme_qpair_submit_request(qpair, req);
11635ae9ed68SJim Harris 	mtx_unlock(&qpair->lock);
11645ae9ed68SJim Harris }
1165b846efd7SJim Harris 
1166b846efd7SJim Harris static void
1167b846efd7SJim Harris nvme_qpair_enable(struct nvme_qpair *qpair)
1168b846efd7SJim Harris {
1169b846efd7SJim Harris 
11707588c6ccSWarner Losh 	qpair->is_enabled = true;
1171cb5b7c13SJim Harris }
1172cb5b7c13SJim Harris 
1173cb5b7c13SJim Harris void
1174cb5b7c13SJim Harris nvme_qpair_reset(struct nvme_qpair *qpair)
1175cb5b7c13SJim Harris {
1176cb5b7c13SJim Harris 
1177b846efd7SJim Harris 	qpair->sq_head = qpair->sq_tail = qpair->cq_head = 0;
1178b846efd7SJim Harris 
1179b846efd7SJim Harris 	/*
1180b846efd7SJim Harris 	 * First time through the completion queue, HW will set phase
1181b846efd7SJim Harris 	 *  bit on completions to 1.  So set this to 1 here, indicating
1182b846efd7SJim Harris 	 *  we're looking for a 1 to know which entries have completed.
1183b846efd7SJim Harris 	 *  we'll toggle the bit each time when the completion queue
1184b846efd7SJim Harris 	 *  rolls over.
1185b846efd7SJim Harris 	 */
1186b846efd7SJim Harris 	qpair->phase = 1;
1187b846efd7SJim Harris 
1188b846efd7SJim Harris 	memset(qpair->cmd, 0,
1189b846efd7SJim Harris 	    qpair->num_entries * sizeof(struct nvme_command));
1190b846efd7SJim Harris 	memset(qpair->cpl, 0,
1191b846efd7SJim Harris 	    qpair->num_entries * sizeof(struct nvme_completion));
1192b846efd7SJim Harris }
1193b846efd7SJim Harris 
1194b846efd7SJim Harris void
1195b846efd7SJim Harris nvme_admin_qpair_enable(struct nvme_qpair *qpair)
1196b846efd7SJim Harris {
119743a37256SJim Harris 	struct nvme_tracker		*tr;
119843a37256SJim Harris 	struct nvme_tracker		*tr_temp;
119943a37256SJim Harris 
120043a37256SJim Harris 	/*
120143a37256SJim Harris 	 * Manually abort each outstanding admin command.  Do not retry
120243a37256SJim Harris 	 *  admin commands found here, since they will be left over from
120343a37256SJim Harris 	 *  a controller reset and its likely the context in which the
120443a37256SJim Harris 	 *  command was issued no longer applies.
120543a37256SJim Harris 	 */
120643a37256SJim Harris 	TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) {
1207547d523eSJim Harris 		nvme_printf(qpair->ctrlr,
120843a37256SJim Harris 		    "aborting outstanding admin command\n");
120943393e8bSWarner Losh 		nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC,
12102ffd6fceSWarner Losh 		    NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL);
121143a37256SJim Harris 	}
1212b846efd7SJim Harris 
1213b846efd7SJim Harris 	nvme_qpair_enable(qpair);
1214b846efd7SJim Harris }
1215b846efd7SJim Harris 
1216b846efd7SJim Harris void
1217b846efd7SJim Harris nvme_io_qpair_enable(struct nvme_qpair *qpair)
1218b846efd7SJim Harris {
1219b846efd7SJim Harris 	STAILQ_HEAD(, nvme_request)	temp;
1220b846efd7SJim Harris 	struct nvme_tracker		*tr;
1221cb5b7c13SJim Harris 	struct nvme_tracker		*tr_temp;
1222b846efd7SJim Harris 	struct nvme_request		*req;
1223b846efd7SJim Harris 
1224cb5b7c13SJim Harris 	/*
1225cb5b7c13SJim Harris 	 * Manually abort each outstanding I/O.  This normally results in a
1226cb5b7c13SJim Harris 	 *  retry, unless the retry count on the associated request has
1227cb5b7c13SJim Harris 	 *  reached its limit.
1228cb5b7c13SJim Harris 	 */
1229cb5b7c13SJim Harris 	TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) {
1230547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "aborting outstanding i/o\n");
123143393e8bSWarner Losh 		nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC,
12322ffd6fceSWarner Losh 		    NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_NO_RETRY);
1233cb5b7c13SJim Harris 	}
1234cb5b7c13SJim Harris 
1235b846efd7SJim Harris 	mtx_lock(&qpair->lock);
1236b846efd7SJim Harris 
1237b846efd7SJim Harris 	nvme_qpair_enable(qpair);
1238b846efd7SJim Harris 
1239b846efd7SJim Harris 	STAILQ_INIT(&temp);
1240b846efd7SJim Harris 	STAILQ_SWAP(&qpair->queued_req, &temp, nvme_request);
1241b846efd7SJim Harris 
1242b846efd7SJim Harris 	while (!STAILQ_EMPTY(&temp)) {
1243b846efd7SJim Harris 		req = STAILQ_FIRST(&temp);
1244b846efd7SJim Harris 		STAILQ_REMOVE_HEAD(&temp, stailq);
1245547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "resubmitting queued i/o\n");
1246547d523eSJim Harris 		nvme_qpair_print_command(qpair, &req->cmd);
1247b846efd7SJim Harris 		_nvme_qpair_submit_request(qpair, req);
1248b846efd7SJim Harris 	}
1249b846efd7SJim Harris 
1250b846efd7SJim Harris 	mtx_unlock(&qpair->lock);
1251b846efd7SJim Harris }
1252b846efd7SJim Harris 
1253b846efd7SJim Harris static void
1254b846efd7SJim Harris nvme_qpair_disable(struct nvme_qpair *qpair)
1255b846efd7SJim Harris {
1256b846efd7SJim Harris 	struct nvme_tracker *tr;
1257b846efd7SJim Harris 
12587588c6ccSWarner Losh 	qpair->is_enabled = false;
1259b846efd7SJim Harris 	mtx_lock(&qpair->lock);
1260b846efd7SJim Harris 	TAILQ_FOREACH(tr, &qpair->outstanding_tr, tailq)
1261b846efd7SJim Harris 		callout_stop(&tr->timer);
1262b846efd7SJim Harris 	mtx_unlock(&qpair->lock);
1263b846efd7SJim Harris }
1264b846efd7SJim Harris 
1265b846efd7SJim Harris void
1266b846efd7SJim Harris nvme_admin_qpair_disable(struct nvme_qpair *qpair)
1267b846efd7SJim Harris {
1268b846efd7SJim Harris 
1269b846efd7SJim Harris 	nvme_qpair_disable(qpair);
1270b846efd7SJim Harris 	nvme_admin_qpair_abort_aers(qpair);
1271b846efd7SJim Harris }
1272b846efd7SJim Harris 
1273b846efd7SJim Harris void
1274b846efd7SJim Harris nvme_io_qpair_disable(struct nvme_qpair *qpair)
1275b846efd7SJim Harris {
1276b846efd7SJim Harris 
1277b846efd7SJim Harris 	nvme_qpair_disable(qpair);
1278b846efd7SJim Harris }
1279232e2edbSJim Harris 
1280232e2edbSJim Harris void
1281232e2edbSJim Harris nvme_qpair_fail(struct nvme_qpair *qpair)
1282232e2edbSJim Harris {
1283232e2edbSJim Harris 	struct nvme_tracker		*tr;
1284232e2edbSJim Harris 	struct nvme_request		*req;
1285232e2edbSJim Harris 
1286824073fbSWarner Losh 	if (!mtx_initialized(&qpair->lock))
1287824073fbSWarner Losh 		return;
1288824073fbSWarner Losh 
1289232e2edbSJim Harris 	mtx_lock(&qpair->lock);
1290232e2edbSJim Harris 
1291232e2edbSJim Harris 	while (!STAILQ_EMPTY(&qpair->queued_req)) {
1292232e2edbSJim Harris 		req = STAILQ_FIRST(&qpair->queued_req);
1293232e2edbSJim Harris 		STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq);
1294547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "failing queued i/o\n");
1295232e2edbSJim Harris 		mtx_unlock(&qpair->lock);
1296232e2edbSJim Harris 		nvme_qpair_manual_complete_request(qpair, req, NVME_SCT_GENERIC,
12972ffd6fceSWarner Losh 		    NVME_SC_ABORTED_BY_REQUEST);
1298232e2edbSJim Harris 		mtx_lock(&qpair->lock);
1299232e2edbSJim Harris 	}
1300232e2edbSJim Harris 
1301232e2edbSJim Harris 	/* Manually abort each outstanding I/O. */
1302232e2edbSJim Harris 	while (!TAILQ_EMPTY(&qpair->outstanding_tr)) {
1303232e2edbSJim Harris 		tr = TAILQ_FIRST(&qpair->outstanding_tr);
1304232e2edbSJim Harris 		/*
1305232e2edbSJim Harris 		 * Do not remove the tracker.  The abort_tracker path will
1306232e2edbSJim Harris 		 *  do that for us.
1307232e2edbSJim Harris 		 */
1308547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "failing outstanding i/o\n");
1309232e2edbSJim Harris 		mtx_unlock(&qpair->lock);
131043393e8bSWarner Losh 		nvme_qpair_manual_complete_tracker(tr, NVME_SCT_GENERIC,
13112ffd6fceSWarner Losh 		    NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL);
1312232e2edbSJim Harris 		mtx_lock(&qpair->lock);
1313232e2edbSJim Harris 	}
1314232e2edbSJim Harris 
1315232e2edbSJim Harris 	mtx_unlock(&qpair->lock);
1316232e2edbSJim Harris }
1317