xref: /freebsd/sys/dev/nvme/nvme_qpair.c (revision a6d222eb6835ba8f9334a330f99f2fa0001e713d)
1bb0ec6b3SJim Harris /*-
2718cf2ccSPedro F. Giffuni  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3718cf2ccSPedro F. Giffuni  *
4f42ca756SJim Harris  * Copyright (C) 2012-2014 Intel Corporation
5bb0ec6b3SJim Harris  * All rights reserved.
6bb0ec6b3SJim Harris  *
7bb0ec6b3SJim Harris  * Redistribution and use in source and binary forms, with or without
8bb0ec6b3SJim Harris  * modification, are permitted provided that the following conditions
9bb0ec6b3SJim Harris  * are met:
10bb0ec6b3SJim Harris  * 1. Redistributions of source code must retain the above copyright
11bb0ec6b3SJim Harris  *    notice, this list of conditions and the following disclaimer.
12bb0ec6b3SJim Harris  * 2. Redistributions in binary form must reproduce the above copyright
13bb0ec6b3SJim Harris  *    notice, this list of conditions and the following disclaimer in the
14bb0ec6b3SJim Harris  *    documentation and/or other materials provided with the distribution.
15bb0ec6b3SJim Harris  *
16bb0ec6b3SJim Harris  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17bb0ec6b3SJim Harris  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18bb0ec6b3SJim Harris  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19bb0ec6b3SJim Harris  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20bb0ec6b3SJim Harris  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21bb0ec6b3SJim Harris  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22bb0ec6b3SJim Harris  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23bb0ec6b3SJim Harris  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24bb0ec6b3SJim Harris  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25bb0ec6b3SJim Harris  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26bb0ec6b3SJim Harris  * SUCH DAMAGE.
27bb0ec6b3SJim Harris  */
28bb0ec6b3SJim Harris 
29bb0ec6b3SJim Harris #include <sys/cdefs.h>
30bb0ec6b3SJim Harris __FBSDID("$FreeBSD$");
31bb0ec6b3SJim Harris 
32bb0ec6b3SJim Harris #include <sys/param.h>
33bb0ec6b3SJim Harris #include <sys/bus.h>
34d0aaeffdSWarner Losh #include <sys/conf.h>
35d0aaeffdSWarner Losh #include <sys/proc.h>
36bb0ec6b3SJim Harris 
370f71ecf7SJim Harris #include <dev/pci/pcivar.h>
380f71ecf7SJim Harris 
39bb0ec6b3SJim Harris #include "nvme_private.h"
40bb0ec6b3SJim Harris 
412ffd6fceSWarner Losh typedef enum error_print { ERROR_PRINT_NONE, ERROR_PRINT_NO_RETRY, ERROR_PRINT_ALL } error_print_t;
422ffd6fceSWarner Losh #define DO_NOT_RETRY	1
432ffd6fceSWarner Losh 
44d6f54866SJim Harris static void	_nvme_qpair_submit_request(struct nvme_qpair *qpair,
45d6f54866SJim Harris 					   struct nvme_request *req);
46a965389bSScott Long static void	nvme_qpair_destroy(struct nvme_qpair *qpair);
47d6f54866SJim Harris 
48547d523eSJim Harris struct nvme_opcode_string {
49547d523eSJim Harris 
50547d523eSJim Harris 	uint16_t	opc;
51547d523eSJim Harris 	const char *	str;
52547d523eSJim Harris };
53547d523eSJim Harris 
54547d523eSJim Harris static struct nvme_opcode_string admin_opcode[] = {
55547d523eSJim Harris 	{ NVME_OPC_DELETE_IO_SQ, "DELETE IO SQ" },
56547d523eSJim Harris 	{ NVME_OPC_CREATE_IO_SQ, "CREATE IO SQ" },
57547d523eSJim Harris 	{ NVME_OPC_GET_LOG_PAGE, "GET LOG PAGE" },
58547d523eSJim Harris 	{ NVME_OPC_DELETE_IO_CQ, "DELETE IO CQ" },
59547d523eSJim Harris 	{ NVME_OPC_CREATE_IO_CQ, "CREATE IO CQ" },
60547d523eSJim Harris 	{ NVME_OPC_IDENTIFY, "IDENTIFY" },
61547d523eSJim Harris 	{ NVME_OPC_ABORT, "ABORT" },
62547d523eSJim Harris 	{ NVME_OPC_SET_FEATURES, "SET FEATURES" },
63547d523eSJim Harris 	{ NVME_OPC_GET_FEATURES, "GET FEATURES" },
64547d523eSJim Harris 	{ NVME_OPC_ASYNC_EVENT_REQUEST, "ASYNC EVENT REQUEST" },
65547d523eSJim Harris 	{ NVME_OPC_FIRMWARE_ACTIVATE, "FIRMWARE ACTIVATE" },
66547d523eSJim Harris 	{ NVME_OPC_FIRMWARE_IMAGE_DOWNLOAD, "FIRMWARE IMAGE DOWNLOAD" },
676b1a96b1SAlexander Motin 	{ NVME_OPC_DEVICE_SELF_TEST, "DEVICE SELF-TEST" },
686b1a96b1SAlexander Motin 	{ NVME_OPC_NAMESPACE_ATTACHMENT, "NAMESPACE ATTACHMENT" },
696b1a96b1SAlexander Motin 	{ NVME_OPC_KEEP_ALIVE, "KEEP ALIVE" },
706b1a96b1SAlexander Motin 	{ NVME_OPC_DIRECTIVE_SEND, "DIRECTIVE SEND" },
716b1a96b1SAlexander Motin 	{ NVME_OPC_DIRECTIVE_RECEIVE, "DIRECTIVE RECEIVE" },
726b1a96b1SAlexander Motin 	{ NVME_OPC_VIRTUALIZATION_MANAGEMENT, "VIRTUALIZATION MANAGEMENT" },
736b1a96b1SAlexander Motin 	{ NVME_OPC_NVME_MI_SEND, "NVME-MI SEND" },
746b1a96b1SAlexander Motin 	{ NVME_OPC_NVME_MI_RECEIVE, "NVME-MI RECEIVE" },
756b1a96b1SAlexander Motin 	{ NVME_OPC_DOORBELL_BUFFER_CONFIG, "DOORBELL BUFFER CONFIG" },
76547d523eSJim Harris 	{ NVME_OPC_FORMAT_NVM, "FORMAT NVM" },
77547d523eSJim Harris 	{ NVME_OPC_SECURITY_SEND, "SECURITY SEND" },
78547d523eSJim Harris 	{ NVME_OPC_SECURITY_RECEIVE, "SECURITY RECEIVE" },
796b1a96b1SAlexander Motin 	{ NVME_OPC_SANITIZE, "SANITIZE" },
8090dfa8f0SAlexander Motin 	{ NVME_OPC_GET_LBA_STATUS, "GET LBA STATUS" },
81547d523eSJim Harris 	{ 0xFFFF, "ADMIN COMMAND" }
82547d523eSJim Harris };
83547d523eSJim Harris 
84547d523eSJim Harris static struct nvme_opcode_string io_opcode[] = {
85547d523eSJim Harris 	{ NVME_OPC_FLUSH, "FLUSH" },
86547d523eSJim Harris 	{ NVME_OPC_WRITE, "WRITE" },
87547d523eSJim Harris 	{ NVME_OPC_READ, "READ" },
88547d523eSJim Harris 	{ NVME_OPC_WRITE_UNCORRECTABLE, "WRITE UNCORRECTABLE" },
89547d523eSJim Harris 	{ NVME_OPC_COMPARE, "COMPARE" },
906b1a96b1SAlexander Motin 	{ NVME_OPC_WRITE_ZEROES, "WRITE ZEROES" },
91547d523eSJim Harris 	{ NVME_OPC_DATASET_MANAGEMENT, "DATASET MANAGEMENT" },
9290dfa8f0SAlexander Motin 	{ NVME_OPC_VERIFY, "VERIFY" },
936b1a96b1SAlexander Motin 	{ NVME_OPC_RESERVATION_REGISTER, "RESERVATION REGISTER" },
946b1a96b1SAlexander Motin 	{ NVME_OPC_RESERVATION_REPORT, "RESERVATION REPORT" },
956b1a96b1SAlexander Motin 	{ NVME_OPC_RESERVATION_ACQUIRE, "RESERVATION ACQUIRE" },
966b1a96b1SAlexander Motin 	{ NVME_OPC_RESERVATION_RELEASE, "RESERVATION RELEASE" },
97547d523eSJim Harris 	{ 0xFFFF, "IO COMMAND" }
98547d523eSJim Harris };
99547d523eSJim Harris 
100547d523eSJim Harris static const char *
101547d523eSJim Harris get_admin_opcode_string(uint16_t opc)
102547d523eSJim Harris {
103547d523eSJim Harris 	struct nvme_opcode_string *entry;
104547d523eSJim Harris 
105547d523eSJim Harris 	entry = admin_opcode;
106547d523eSJim Harris 
107547d523eSJim Harris 	while (entry->opc != 0xFFFF) {
108547d523eSJim Harris 		if (entry->opc == opc)
109547d523eSJim Harris 			return (entry->str);
110547d523eSJim Harris 		entry++;
111547d523eSJim Harris 	}
112547d523eSJim Harris 	return (entry->str);
113547d523eSJim Harris }
114547d523eSJim Harris 
115547d523eSJim Harris static const char *
116547d523eSJim Harris get_io_opcode_string(uint16_t opc)
117547d523eSJim Harris {
118547d523eSJim Harris 	struct nvme_opcode_string *entry;
119547d523eSJim Harris 
120547d523eSJim Harris 	entry = io_opcode;
121547d523eSJim Harris 
122547d523eSJim Harris 	while (entry->opc != 0xFFFF) {
123547d523eSJim Harris 		if (entry->opc == opc)
124547d523eSJim Harris 			return (entry->str);
125547d523eSJim Harris 		entry++;
126547d523eSJim Harris 	}
127547d523eSJim Harris 	return (entry->str);
128547d523eSJim Harris }
129547d523eSJim Harris 
130547d523eSJim Harris 
131547d523eSJim Harris static void
132547d523eSJim Harris nvme_admin_qpair_print_command(struct nvme_qpair *qpair,
133547d523eSJim Harris     struct nvme_command *cmd)
134547d523eSJim Harris {
135547d523eSJim Harris 
136547d523eSJim Harris 	nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%x "
137547d523eSJim Harris 	    "cdw10:%08x cdw11:%08x\n",
1389544e6dcSChuck Tuffli 	    get_admin_opcode_string(cmd->opc), cmd->opc, qpair->id, cmd->cid,
1390d787e9bSWojciech Macek 	    le32toh(cmd->nsid), le32toh(cmd->cdw10), le32toh(cmd->cdw11));
140547d523eSJim Harris }
141547d523eSJim Harris 
142547d523eSJim Harris static void
143547d523eSJim Harris nvme_io_qpair_print_command(struct nvme_qpair *qpair,
144547d523eSJim Harris     struct nvme_command *cmd)
145547d523eSJim Harris {
146547d523eSJim Harris 
1479544e6dcSChuck Tuffli 	switch (cmd->opc) {
148547d523eSJim Harris 	case NVME_OPC_WRITE:
149547d523eSJim Harris 	case NVME_OPC_READ:
150547d523eSJim Harris 	case NVME_OPC_WRITE_UNCORRECTABLE:
151547d523eSJim Harris 	case NVME_OPC_COMPARE:
1526b1a96b1SAlexander Motin 	case NVME_OPC_WRITE_ZEROES:
15390dfa8f0SAlexander Motin 	case NVME_OPC_VERIFY:
154547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d "
155bdd1fd40SJim Harris 		    "lba:%llu len:%d\n",
1569544e6dcSChuck Tuffli 		    get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid),
1570d787e9bSWojciech Macek 		    ((unsigned long long)le32toh(cmd->cdw11) << 32) + le32toh(cmd->cdw10),
1580d787e9bSWojciech Macek 		    (le32toh(cmd->cdw12) & 0xFFFF) + 1);
159547d523eSJim Harris 		break;
160547d523eSJim Harris 	case NVME_OPC_FLUSH:
161547d523eSJim Harris 	case NVME_OPC_DATASET_MANAGEMENT:
1626b1a96b1SAlexander Motin 	case NVME_OPC_RESERVATION_REGISTER:
1636b1a96b1SAlexander Motin 	case NVME_OPC_RESERVATION_REPORT:
1646b1a96b1SAlexander Motin 	case NVME_OPC_RESERVATION_ACQUIRE:
1656b1a96b1SAlexander Motin 	case NVME_OPC_RESERVATION_RELEASE:
166547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "%s sqid:%d cid:%d nsid:%d\n",
1679544e6dcSChuck Tuffli 		    get_io_opcode_string(cmd->opc), qpair->id, cmd->cid, le32toh(cmd->nsid));
168547d523eSJim Harris 		break;
169547d523eSJim Harris 	default:
170547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "%s (%02x) sqid:%d cid:%d nsid:%d\n",
1719544e6dcSChuck Tuffli 		    get_io_opcode_string(cmd->opc), cmd->opc, qpair->id,
1720d787e9bSWojciech Macek 		    cmd->cid, le32toh(cmd->nsid));
173547d523eSJim Harris 		break;
174547d523eSJim Harris 	}
175547d523eSJim Harris }
176547d523eSJim Harris 
177547d523eSJim Harris static void
178547d523eSJim Harris nvme_qpair_print_command(struct nvme_qpair *qpair, struct nvme_command *cmd)
179547d523eSJim Harris {
180547d523eSJim Harris 	if (qpair->id == 0)
181547d523eSJim Harris 		nvme_admin_qpair_print_command(qpair, cmd);
182547d523eSJim Harris 	else
183547d523eSJim Harris 		nvme_io_qpair_print_command(qpair, cmd);
184c75bdc04SWarner Losh 	if (nvme_verbose_cmd_dump) {
185c75bdc04SWarner Losh 		nvme_printf(qpair->ctrlr,
186c75bdc04SWarner Losh 		    "nsid:%#x rsvd2:%#x rsvd3:%#x mptr:%#jx prp1:%#jx prp2:%#jx\n",
187c75bdc04SWarner Losh 		    cmd->nsid, cmd->rsvd2, cmd->rsvd3, (uintmax_t)cmd->mptr,
188c75bdc04SWarner Losh 		    (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2);
189c75bdc04SWarner Losh 		nvme_printf(qpair->ctrlr,
190c75bdc04SWarner Losh 		    "cdw10: %#x cdw11:%#x cdw12:%#x cdw13:%#x cdw14:%#x cdw15:%#x\n",
191c75bdc04SWarner Losh 		    cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
192c75bdc04SWarner Losh 		    cmd->cdw15);
193c75bdc04SWarner Losh 	}
194547d523eSJim Harris }
195547d523eSJim Harris 
196547d523eSJim Harris struct nvme_status_string {
197547d523eSJim Harris 
198547d523eSJim Harris 	uint16_t	sc;
199547d523eSJim Harris 	const char *	str;
200547d523eSJim Harris };
201547d523eSJim Harris 
202547d523eSJim Harris static struct nvme_status_string generic_status[] = {
203547d523eSJim Harris 	{ NVME_SC_SUCCESS, "SUCCESS" },
204547d523eSJim Harris 	{ NVME_SC_INVALID_OPCODE, "INVALID OPCODE" },
205547d523eSJim Harris 	{ NVME_SC_INVALID_FIELD, "INVALID_FIELD" },
206547d523eSJim Harris 	{ NVME_SC_COMMAND_ID_CONFLICT, "COMMAND ID CONFLICT" },
207547d523eSJim Harris 	{ NVME_SC_DATA_TRANSFER_ERROR, "DATA TRANSFER ERROR" },
208547d523eSJim Harris 	{ NVME_SC_ABORTED_POWER_LOSS, "ABORTED - POWER LOSS" },
209547d523eSJim Harris 	{ NVME_SC_INTERNAL_DEVICE_ERROR, "INTERNAL DEVICE ERROR" },
210547d523eSJim Harris 	{ NVME_SC_ABORTED_BY_REQUEST, "ABORTED - BY REQUEST" },
211547d523eSJim Harris 	{ NVME_SC_ABORTED_SQ_DELETION, "ABORTED - SQ DELETION" },
212547d523eSJim Harris 	{ NVME_SC_ABORTED_FAILED_FUSED, "ABORTED - FAILED FUSED" },
213547d523eSJim Harris 	{ NVME_SC_ABORTED_MISSING_FUSED, "ABORTED - MISSING FUSED" },
214547d523eSJim Harris 	{ NVME_SC_INVALID_NAMESPACE_OR_FORMAT, "INVALID NAMESPACE OR FORMAT" },
215547d523eSJim Harris 	{ NVME_SC_COMMAND_SEQUENCE_ERROR, "COMMAND SEQUENCE ERROR" },
2166b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_SGL_SEGMENT_DESCR, "INVALID SGL SEGMENT DESCRIPTOR" },
2176b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_NUMBER_OF_SGL_DESCR, "INVALID NUMBER OF SGL DESCRIPTORS" },
2186b1a96b1SAlexander Motin 	{ NVME_SC_DATA_SGL_LENGTH_INVALID, "DATA SGL LENGTH INVALID" },
2196b1a96b1SAlexander Motin 	{ NVME_SC_METADATA_SGL_LENGTH_INVALID, "METADATA SGL LENGTH INVALID" },
2206b1a96b1SAlexander Motin 	{ NVME_SC_SGL_DESCRIPTOR_TYPE_INVALID, "SGL DESCRIPTOR TYPE INVALID" },
2216b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_USE_OF_CMB, "INVALID USE OF CONTROLLER MEMORY BUFFER" },
2226b1a96b1SAlexander Motin 	{ NVME_SC_PRP_OFFET_INVALID, "PRP OFFET INVALID" },
2236b1a96b1SAlexander Motin 	{ NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED, "ATOMIC WRITE UNIT EXCEEDED" },
2246b1a96b1SAlexander Motin 	{ NVME_SC_OPERATION_DENIED, "OPERATION DENIED" },
2256b1a96b1SAlexander Motin 	{ NVME_SC_SGL_OFFSET_INVALID, "SGL OFFSET INVALID" },
2266b1a96b1SAlexander Motin 	{ NVME_SC_HOST_ID_INCONSISTENT_FORMAT, "HOST IDENTIFIER INCONSISTENT FORMAT" },
2276b1a96b1SAlexander Motin 	{ NVME_SC_KEEP_ALIVE_TIMEOUT_EXPIRED, "KEEP ALIVE TIMEOUT EXPIRED" },
2286b1a96b1SAlexander Motin 	{ NVME_SC_KEEP_ALIVE_TIMEOUT_INVALID, "KEEP ALIVE TIMEOUT INVALID" },
2296b1a96b1SAlexander Motin 	{ NVME_SC_ABORTED_DUE_TO_PREEMPT, "COMMAND ABORTED DUE TO PREEMPT AND ABORT" },
2306b1a96b1SAlexander Motin 	{ NVME_SC_SANITIZE_FAILED, "SANITIZE FAILED" },
2316b1a96b1SAlexander Motin 	{ NVME_SC_SANITIZE_IN_PROGRESS, "SANITIZE IN PROGRESS" },
2326b1a96b1SAlexander Motin 	{ NVME_SC_SGL_DATA_BLOCK_GRAN_INVALID, "SGL_DATA_BLOCK_GRANULARITY_INVALID" },
2336b1a96b1SAlexander Motin 	{ NVME_SC_NOT_SUPPORTED_IN_CMB, "COMMAND NOT SUPPORTED FOR QUEUE IN CMB" },
23490dfa8f0SAlexander Motin 	{ NVME_SC_NAMESPACE_IS_WRITE_PROTECTED, "NAMESPACE IS WRITE PROTECTED" },
23590dfa8f0SAlexander Motin 	{ NVME_SC_COMMAND_INTERRUPTED, "COMMAND INTERRUPTED" },
23690dfa8f0SAlexander Motin 	{ NVME_SC_TRANSIENT_TRANSPORT_ERROR, "TRANSIENT TRANSPORT ERROR" },
2376b1a96b1SAlexander Motin 
238547d523eSJim Harris 	{ NVME_SC_LBA_OUT_OF_RANGE, "LBA OUT OF RANGE" },
239547d523eSJim Harris 	{ NVME_SC_CAPACITY_EXCEEDED, "CAPACITY EXCEEDED" },
240547d523eSJim Harris 	{ NVME_SC_NAMESPACE_NOT_READY, "NAMESPACE NOT READY" },
2416b1a96b1SAlexander Motin 	{ NVME_SC_RESERVATION_CONFLICT, "RESERVATION CONFLICT" },
2426b1a96b1SAlexander Motin 	{ NVME_SC_FORMAT_IN_PROGRESS, "FORMAT IN PROGRESS" },
243547d523eSJim Harris 	{ 0xFFFF, "GENERIC" }
244547d523eSJim Harris };
245547d523eSJim Harris 
246547d523eSJim Harris static struct nvme_status_string command_specific_status[] = {
247547d523eSJim Harris 	{ NVME_SC_COMPLETION_QUEUE_INVALID, "INVALID COMPLETION QUEUE" },
248547d523eSJim Harris 	{ NVME_SC_INVALID_QUEUE_IDENTIFIER, "INVALID QUEUE IDENTIFIER" },
249547d523eSJim Harris 	{ NVME_SC_MAXIMUM_QUEUE_SIZE_EXCEEDED, "MAX QUEUE SIZE EXCEEDED" },
250547d523eSJim Harris 	{ NVME_SC_ABORT_COMMAND_LIMIT_EXCEEDED, "ABORT CMD LIMIT EXCEEDED" },
251547d523eSJim Harris 	{ NVME_SC_ASYNC_EVENT_REQUEST_LIMIT_EXCEEDED, "ASYNC LIMIT EXCEEDED" },
252547d523eSJim Harris 	{ NVME_SC_INVALID_FIRMWARE_SLOT, "INVALID FIRMWARE SLOT" },
253547d523eSJim Harris 	{ NVME_SC_INVALID_FIRMWARE_IMAGE, "INVALID FIRMWARE IMAGE" },
254547d523eSJim Harris 	{ NVME_SC_INVALID_INTERRUPT_VECTOR, "INVALID INTERRUPT VECTOR" },
255547d523eSJim Harris 	{ NVME_SC_INVALID_LOG_PAGE, "INVALID LOG PAGE" },
256547d523eSJim Harris 	{ NVME_SC_INVALID_FORMAT, "INVALID FORMAT" },
257547d523eSJim Harris 	{ NVME_SC_FIRMWARE_REQUIRES_RESET, "FIRMWARE REQUIRES RESET" },
2586b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_QUEUE_DELETION, "INVALID QUEUE DELETION" },
2596b1a96b1SAlexander Motin 	{ NVME_SC_FEATURE_NOT_SAVEABLE, "FEATURE IDENTIFIER NOT SAVEABLE" },
2606b1a96b1SAlexander Motin 	{ NVME_SC_FEATURE_NOT_CHANGEABLE, "FEATURE NOT CHANGEABLE" },
2616b1a96b1SAlexander Motin 	{ NVME_SC_FEATURE_NOT_NS_SPECIFIC, "FEATURE NOT NAMESPACE SPECIFIC" },
2626b1a96b1SAlexander Motin 	{ NVME_SC_FW_ACT_REQUIRES_NVMS_RESET, "FIRMWARE ACTIVATION REQUIRES NVM SUBSYSTEM RESET" },
2636b1a96b1SAlexander Motin 	{ NVME_SC_FW_ACT_REQUIRES_RESET, "FIRMWARE ACTIVATION REQUIRES RESET" },
2646b1a96b1SAlexander Motin 	{ NVME_SC_FW_ACT_REQUIRES_TIME, "FIRMWARE ACTIVATION REQUIRES MAXIMUM TIME VIOLATION" },
2656b1a96b1SAlexander Motin 	{ NVME_SC_FW_ACT_PROHIBITED, "FIRMWARE ACTIVATION PROHIBITED" },
2666b1a96b1SAlexander Motin 	{ NVME_SC_OVERLAPPING_RANGE, "OVERLAPPING RANGE" },
2676b1a96b1SAlexander Motin 	{ NVME_SC_NS_INSUFFICIENT_CAPACITY, "NAMESPACE INSUFFICIENT CAPACITY" },
2686b1a96b1SAlexander Motin 	{ NVME_SC_NS_ID_UNAVAILABLE, "NAMESPACE IDENTIFIER UNAVAILABLE" },
2696b1a96b1SAlexander Motin 	{ NVME_SC_NS_ALREADY_ATTACHED, "NAMESPACE ALREADY ATTACHED" },
2706b1a96b1SAlexander Motin 	{ NVME_SC_NS_IS_PRIVATE, "NAMESPACE IS PRIVATE" },
2716b1a96b1SAlexander Motin 	{ NVME_SC_NS_NOT_ATTACHED, "NS NOT ATTACHED" },
2726b1a96b1SAlexander Motin 	{ NVME_SC_THIN_PROV_NOT_SUPPORTED, "THIN PROVISIONING NOT SUPPORTED" },
2736b1a96b1SAlexander Motin 	{ NVME_SC_CTRLR_LIST_INVALID, "CONTROLLER LIST INVALID" },
2746b1a96b1SAlexander Motin 	{ NVME_SC_SELT_TEST_IN_PROGRESS, "DEVICE SELT-TEST IN PROGRESS" },
2756b1a96b1SAlexander Motin 	{ NVME_SC_BOOT_PART_WRITE_PROHIB, "BOOT PARTITION WRITE PROHIBITED" },
2766b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_CTRLR_ID, "INVALID CONTROLLER IDENTIFIER" },
2776b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_SEC_CTRLR_STATE, "INVALID SECONDARY CONTROLLER STATE" },
2786b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_NUM_OF_CTRLR_RESRC, "INVALID NUMBER OF CONTROLLER RESOURCES" },
2796b1a96b1SAlexander Motin 	{ NVME_SC_INVALID_RESOURCE_ID, "INVALID RESOURCE IDENTIFIER" },
28090dfa8f0SAlexander Motin 	{ NVME_SC_SANITIZE_PROHIBITED_WPMRE, "SANITIZE PROHIBITED WRITE PERSISTENT MEMORY REGION ENABLED" },
28190dfa8f0SAlexander Motin 	{ NVME_SC_ANA_GROUP_ID_INVALID, "ANA GROUP IDENTIFIED INVALID" },
28290dfa8f0SAlexander Motin 	{ NVME_SC_ANA_ATTACH_FAILED, "ANA ATTACH FAILED" },
2836b1a96b1SAlexander Motin 
284547d523eSJim Harris 	{ NVME_SC_CONFLICTING_ATTRIBUTES, "CONFLICTING ATTRIBUTES" },
285547d523eSJim Harris 	{ NVME_SC_INVALID_PROTECTION_INFO, "INVALID PROTECTION INFO" },
286547d523eSJim Harris 	{ NVME_SC_ATTEMPTED_WRITE_TO_RO_PAGE, "WRITE TO RO PAGE" },
287547d523eSJim Harris 	{ 0xFFFF, "COMMAND SPECIFIC" }
288547d523eSJim Harris };
289547d523eSJim Harris 
290547d523eSJim Harris static struct nvme_status_string media_error_status[] = {
291547d523eSJim Harris 	{ NVME_SC_WRITE_FAULTS, "WRITE FAULTS" },
292547d523eSJim Harris 	{ NVME_SC_UNRECOVERED_READ_ERROR, "UNRECOVERED READ ERROR" },
293547d523eSJim Harris 	{ NVME_SC_GUARD_CHECK_ERROR, "GUARD CHECK ERROR" },
294547d523eSJim Harris 	{ NVME_SC_APPLICATION_TAG_CHECK_ERROR, "APPLICATION TAG CHECK ERROR" },
295547d523eSJim Harris 	{ NVME_SC_REFERENCE_TAG_CHECK_ERROR, "REFERENCE TAG CHECK ERROR" },
296547d523eSJim Harris 	{ NVME_SC_COMPARE_FAILURE, "COMPARE FAILURE" },
297547d523eSJim Harris 	{ NVME_SC_ACCESS_DENIED, "ACCESS DENIED" },
2986b1a96b1SAlexander Motin 	{ NVME_SC_DEALLOCATED_OR_UNWRITTEN, "DEALLOCATED OR UNWRITTEN LOGICAL BLOCK" },
299547d523eSJim Harris 	{ 0xFFFF, "MEDIA ERROR" }
300547d523eSJim Harris };
301547d523eSJim Harris 
302*a6d222ebSAlexander Motin static struct nvme_status_string path_related_status[] = {
303*a6d222ebSAlexander Motin 	{ NVME_SC_INTERNAL_PATH_ERROR, "INTERNAL PATH ERROR" },
304*a6d222ebSAlexander Motin 	{ NVME_SC_ASYMMETRIC_ACCESS_PERSISTENT_LOSS, "ASYMMETRIC ACCESS PERSISTENT LOSS" },
305*a6d222ebSAlexander Motin 	{ NVME_SC_ASYMMETRIC_ACCESS_INACCESSIBLE, "ASYMMETRIC ACCESS INACCESSIBLE" },
306*a6d222ebSAlexander Motin 	{ NVME_SC_ASYMMETRIC_ACCESS_TRANSITION, "ASYMMETRIC ACCESS TRANSITION" },
307*a6d222ebSAlexander Motin 	{ NVME_SC_CONTROLLER_PATHING_ERROR, "CONTROLLER PATHING ERROR" },
308*a6d222ebSAlexander Motin 	{ NVME_SC_HOST_PATHING_ERROR, "HOST PATHING ERROR" },
309*a6d222ebSAlexander Motin 	{ NVME_SC_COMMAND_ABOTHED_BY_HOST, "COMMAND ABOTHED BY HOST" },
310*a6d222ebSAlexander Motin 	{ 0xFFFF, "PATH RELATED" },
311*a6d222ebSAlexander Motin };
312*a6d222ebSAlexander Motin 
313547d523eSJim Harris static const char *
314547d523eSJim Harris get_status_string(uint16_t sct, uint16_t sc)
315547d523eSJim Harris {
316547d523eSJim Harris 	struct nvme_status_string *entry;
317547d523eSJim Harris 
318547d523eSJim Harris 	switch (sct) {
319547d523eSJim Harris 	case NVME_SCT_GENERIC:
320547d523eSJim Harris 		entry = generic_status;
321547d523eSJim Harris 		break;
322547d523eSJim Harris 	case NVME_SCT_COMMAND_SPECIFIC:
323547d523eSJim Harris 		entry = command_specific_status;
324547d523eSJim Harris 		break;
325547d523eSJim Harris 	case NVME_SCT_MEDIA_ERROR:
326547d523eSJim Harris 		entry = media_error_status;
327547d523eSJim Harris 		break;
328*a6d222ebSAlexander Motin 	case NVME_SCT_PATH_RELATED:
329*a6d222ebSAlexander Motin 		entry = path_related_status;
330*a6d222ebSAlexander Motin 		break;
331547d523eSJim Harris 	case NVME_SCT_VENDOR_SPECIFIC:
332547d523eSJim Harris 		return ("VENDOR SPECIFIC");
333547d523eSJim Harris 	default:
334547d523eSJim Harris 		return ("RESERVED");
335547d523eSJim Harris 	}
336547d523eSJim Harris 
337547d523eSJim Harris 	while (entry->sc != 0xFFFF) {
338547d523eSJim Harris 		if (entry->sc == sc)
339547d523eSJim Harris 			return (entry->str);
340547d523eSJim Harris 		entry++;
341547d523eSJim Harris 	}
342547d523eSJim Harris 	return (entry->str);
343547d523eSJim Harris }
344547d523eSJim Harris 
345547d523eSJim Harris static void
346547d523eSJim Harris nvme_qpair_print_completion(struct nvme_qpair *qpair,
347547d523eSJim Harris     struct nvme_completion *cpl)
348547d523eSJim Harris {
3490d787e9bSWojciech Macek 	uint16_t sct, sc;
3500d787e9bSWojciech Macek 
3510d787e9bSWojciech Macek 	sct = NVME_STATUS_GET_SCT(cpl->status);
3520d787e9bSWojciech Macek 	sc = NVME_STATUS_GET_SC(cpl->status);
3530d787e9bSWojciech Macek 
354547d523eSJim Harris 	nvme_printf(qpair->ctrlr, "%s (%02x/%02x) sqid:%d cid:%d cdw0:%x\n",
3550d787e9bSWojciech Macek 	    get_status_string(sct, sc), sct, sc, cpl->sqid, cpl->cid,
3560d787e9bSWojciech Macek 	    cpl->cdw0);
357547d523eSJim Harris }
358547d523eSJim Harris 
359bb0ec6b3SJim Harris static boolean_t
3606cb06070SJim Harris nvme_completion_is_retry(const struct nvme_completion *cpl)
361bb0ec6b3SJim Harris {
3620d787e9bSWojciech Macek 	uint8_t sct, sc, dnr;
3630d787e9bSWojciech Macek 
3640d787e9bSWojciech Macek 	sct = NVME_STATUS_GET_SCT(cpl->status);
3650d787e9bSWojciech Macek 	sc = NVME_STATUS_GET_SC(cpl->status);
3662ffd6fceSWarner Losh 	dnr = NVME_STATUS_GET_DNR(cpl->status);	/* Do Not Retry Bit */
3670d787e9bSWojciech Macek 
368bb0ec6b3SJim Harris 	/*
369bb0ec6b3SJim Harris 	 * TODO: spec is not clear how commands that are aborted due
370bb0ec6b3SJim Harris 	 *  to TLER will be marked.  So for now, it seems
371bb0ec6b3SJim Harris 	 *  NAMESPACE_NOT_READY is the only case where we should
37295108cadSWarner Losh 	 *  look at the DNR bit. Requests failed with ABORTED_BY_REQUEST
37395108cadSWarner Losh 	 *  set the DNR bit correctly since the driver controls that.
374bb0ec6b3SJim Harris 	 */
3750d787e9bSWojciech Macek 	switch (sct) {
376bb0ec6b3SJim Harris 	case NVME_SCT_GENERIC:
3770d787e9bSWojciech Macek 		switch (sc) {
378448195e7SJim Harris 		case NVME_SC_ABORTED_BY_REQUEST:
379bb0ec6b3SJim Harris 		case NVME_SC_NAMESPACE_NOT_READY:
3800d787e9bSWojciech Macek 			if (dnr)
381bb0ec6b3SJim Harris 				return (0);
382bb0ec6b3SJim Harris 			else
383bb0ec6b3SJim Harris 				return (1);
384bb0ec6b3SJim Harris 		case NVME_SC_INVALID_OPCODE:
385bb0ec6b3SJim Harris 		case NVME_SC_INVALID_FIELD:
386bb0ec6b3SJim Harris 		case NVME_SC_COMMAND_ID_CONFLICT:
387bb0ec6b3SJim Harris 		case NVME_SC_DATA_TRANSFER_ERROR:
388bb0ec6b3SJim Harris 		case NVME_SC_ABORTED_POWER_LOSS:
389bb0ec6b3SJim Harris 		case NVME_SC_INTERNAL_DEVICE_ERROR:
390bb0ec6b3SJim Harris 		case NVME_SC_ABORTED_SQ_DELETION:
391bb0ec6b3SJim Harris 		case NVME_SC_ABORTED_FAILED_FUSED:
392bb0ec6b3SJim Harris 		case NVME_SC_ABORTED_MISSING_FUSED:
393bb0ec6b3SJim Harris 		case NVME_SC_INVALID_NAMESPACE_OR_FORMAT:
394bb0ec6b3SJim Harris 		case NVME_SC_COMMAND_SEQUENCE_ERROR:
395bb0ec6b3SJim Harris 		case NVME_SC_LBA_OUT_OF_RANGE:
396bb0ec6b3SJim Harris 		case NVME_SC_CAPACITY_EXCEEDED:
397bb0ec6b3SJim Harris 		default:
398bb0ec6b3SJim Harris 			return (0);
399bb0ec6b3SJim Harris 		}
400bb0ec6b3SJim Harris 	case NVME_SCT_COMMAND_SPECIFIC:
401bb0ec6b3SJim Harris 	case NVME_SCT_MEDIA_ERROR:
402*a6d222ebSAlexander Motin 		return (0);
403*a6d222ebSAlexander Motin 	case NVME_SCT_PATH_RELATED:
404*a6d222ebSAlexander Motin 		switch (sc) {
405*a6d222ebSAlexander Motin 		case NVME_SC_INTERNAL_PATH_ERROR:
406*a6d222ebSAlexander Motin 			if (dnr)
407*a6d222ebSAlexander Motin 				return (0);
408*a6d222ebSAlexander Motin 			else
409*a6d222ebSAlexander Motin 				return (1);
410*a6d222ebSAlexander Motin 		default:
411*a6d222ebSAlexander Motin 			return (0);
412*a6d222ebSAlexander Motin 		}
413bb0ec6b3SJim Harris 	case NVME_SCT_VENDOR_SPECIFIC:
414bb0ec6b3SJim Harris 	default:
415bb0ec6b3SJim Harris 		return (0);
416bb0ec6b3SJim Harris 	}
417bb0ec6b3SJim Harris }
418bb0ec6b3SJim Harris 
41921b6da58SJim Harris static void
4206cb06070SJim Harris nvme_qpair_complete_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr,
4212ffd6fceSWarner Losh     struct nvme_completion *cpl, error_print_t print_on_error)
422bb0ec6b3SJim Harris {
423ad697276SJim Harris 	struct nvme_request	*req;
4245e83c2ffSWarner Losh 	boolean_t		retry, error, retriable;
425bb0ec6b3SJim Harris 
426ad697276SJim Harris 	req = tr->req;
4276cb06070SJim Harris 	error = nvme_completion_is_error(cpl);
4285e83c2ffSWarner Losh 	retriable = nvme_completion_is_retry(cpl);
4295e83c2ffSWarner Losh 	retry = error && retriable && req->retries < nvme_retry_count;
430c37fc318SWarner Losh 	if (retry)
431c37fc318SWarner Losh 		qpair->num_retries++;
4325e83c2ffSWarner Losh 	if (error && req->retries >= nvme_retry_count && retriable)
4335e83c2ffSWarner Losh 		qpair->num_failures++;
434ad697276SJim Harris 
4352ffd6fceSWarner Losh 	if (error && (print_on_error == ERROR_PRINT_ALL ||
4362ffd6fceSWarner Losh 		(!retry && print_on_error == ERROR_PRINT_NO_RETRY))) {
437547d523eSJim Harris 		nvme_qpair_print_command(qpair, &req->cmd);
438547d523eSJim Harris 		nvme_qpair_print_completion(qpair, cpl);
439bb0ec6b3SJim Harris 	}
440bb0ec6b3SJim Harris 
441bb0ec6b3SJim Harris 	qpair->act_tr[cpl->cid] = NULL;
442bb0ec6b3SJim Harris 
4436cb06070SJim Harris 	KASSERT(cpl->cid == req->cmd.cid, ("cpl cid does not match cmd cid\n"));
444bb0ec6b3SJim Harris 
445ad697276SJim Harris 	if (req->cb_fn && !retry)
446ad697276SJim Harris 		req->cb_fn(req->cb_arg, cpl);
447bb0ec6b3SJim Harris 
448bb0ec6b3SJim Harris 	mtx_lock(&qpair->lock);
449bb0ec6b3SJim Harris 	callout_stop(&tr->timer);
450bb0ec6b3SJim Harris 
451cb5b7c13SJim Harris 	if (retry) {
452cb5b7c13SJim Harris 		req->retries++;
453b846efd7SJim Harris 		nvme_qpair_submit_tracker(qpair, tr);
454cb5b7c13SJim Harris 	} else {
4552e0090afSJustin Hibbits 		if (req->type != NVME_REQUEST_NULL) {
4562e0090afSJustin Hibbits 			bus_dmamap_sync(qpair->dma_tag_payload,
4572e0090afSJustin Hibbits 			    tr->payload_dma_map,
4582e0090afSJustin Hibbits 			    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
459a6e30963SJim Harris 			bus_dmamap_unload(qpair->dma_tag_payload,
460f2b19f67SJim Harris 			    tr->payload_dma_map);
4612e0090afSJustin Hibbits 		}
462bb0ec6b3SJim Harris 
463ad697276SJim Harris 		nvme_free_request(req);
4640a0b08ccSJim Harris 		tr->req = NULL;
46521b6da58SJim Harris 
46665c2474eSJim Harris 		TAILQ_REMOVE(&qpair->outstanding_tr, tr, tailq);
46765c2474eSJim Harris 		TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq);
4680f71ecf7SJim Harris 
469f37c22a3SJim Harris 		/*
470f37c22a3SJim Harris 		 * If the controller is in the middle of resetting, don't
471f37c22a3SJim Harris 		 *  try to submit queued requests here - let the reset logic
472f37c22a3SJim Harris 		 *  handle that instead.
473f37c22a3SJim Harris 		 */
474f37c22a3SJim Harris 		if (!STAILQ_EMPTY(&qpair->queued_req) &&
475f37c22a3SJim Harris 		    !qpair->ctrlr->is_resetting) {
4760f71ecf7SJim Harris 			req = STAILQ_FIRST(&qpair->queued_req);
4770f71ecf7SJim Harris 			STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq);
478d6f54866SJim Harris 			_nvme_qpair_submit_request(qpair, req);
4790f71ecf7SJim Harris 		}
480c2e83b40SJim Harris 	}
481bb0ec6b3SJim Harris 
482bb0ec6b3SJim Harris 	mtx_unlock(&qpair->lock);
4836cb06070SJim Harris }
4846cb06070SJim Harris 
485b846efd7SJim Harris static void
486b846efd7SJim Harris nvme_qpair_manual_complete_tracker(struct nvme_qpair *qpair,
487232e2edbSJim Harris     struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr,
4882ffd6fceSWarner Losh     error_print_t print_on_error)
489b846efd7SJim Harris {
490b846efd7SJim Harris 	struct nvme_completion	cpl;
491b846efd7SJim Harris 
492b846efd7SJim Harris 	memset(&cpl, 0, sizeof(cpl));
493b846efd7SJim Harris 	cpl.sqid = qpair->id;
494b846efd7SJim Harris 	cpl.cid = tr->cid;
4950d787e9bSWojciech Macek 	cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT;
4960d787e9bSWojciech Macek 	cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT;
4970d787e9bSWojciech Macek 	cpl.status |= (dnr & NVME_STATUS_DNR_MASK) << NVME_STATUS_DNR_SHIFT;
498b846efd7SJim Harris 	nvme_qpair_complete_tracker(qpair, tr, &cpl, print_on_error);
499b846efd7SJim Harris }
500b846efd7SJim Harris 
5016cb06070SJim Harris void
502232e2edbSJim Harris nvme_qpair_manual_complete_request(struct nvme_qpair *qpair,
5032ffd6fceSWarner Losh     struct nvme_request *req, uint32_t sct, uint32_t sc)
504232e2edbSJim Harris {
505232e2edbSJim Harris 	struct nvme_completion	cpl;
506232e2edbSJim Harris 	boolean_t		error;
507232e2edbSJim Harris 
508232e2edbSJim Harris 	memset(&cpl, 0, sizeof(cpl));
509232e2edbSJim Harris 	cpl.sqid = qpair->id;
5100d787e9bSWojciech Macek 	cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT;
5110d787e9bSWojciech Macek 	cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT;
512232e2edbSJim Harris 
513232e2edbSJim Harris 	error = nvme_completion_is_error(&cpl);
514232e2edbSJim Harris 
5152ffd6fceSWarner Losh 	if (error) {
516547d523eSJim Harris 		nvme_qpair_print_command(qpair, &req->cmd);
517547d523eSJim Harris 		nvme_qpair_print_completion(qpair, &cpl);
518232e2edbSJim Harris 	}
519232e2edbSJim Harris 
520232e2edbSJim Harris 	if (req->cb_fn)
521232e2edbSJim Harris 		req->cb_fn(req->cb_arg, &cpl);
522232e2edbSJim Harris 
523232e2edbSJim Harris 	nvme_free_request(req);
524232e2edbSJim Harris }
525232e2edbSJim Harris 
526d85d9648SWarner Losh bool
5276cb06070SJim Harris nvme_qpair_process_completions(struct nvme_qpair *qpair)
5286cb06070SJim Harris {
5296cb06070SJim Harris 	struct nvme_tracker	*tr;
5300d787e9bSWojciech Macek 	struct nvme_completion	cpl;
531d85d9648SWarner Losh 	int done = 0;
532d0aaeffdSWarner Losh 	bool in_panic = dumping || SCHEDULER_STOPPED();
5336cb06070SJim Harris 
5346cb06070SJim Harris 	qpair->num_intr_handler_calls++;
5356cb06070SJim Harris 
536b846efd7SJim Harris 	/*
537d0aaeffdSWarner Losh 	 * qpair is not enabled, likely because a controller reset is is in
538d0aaeffdSWarner Losh 	 * progress.  Ignore the interrupt - any I/O that was associated with
539d0aaeffdSWarner Losh 	 * this interrupt will get retried when the reset is complete.
540b846efd7SJim Harris 	 */
541d0aaeffdSWarner Losh 	if (!qpair->is_enabled)
542d85d9648SWarner Losh 		return (false);
543b846efd7SJim Harris 
544d0aaeffdSWarner Losh 	/*
545d0aaeffdSWarner Losh 	 * A panic can stop the CPU this routine is running on at any point.  If
546d0aaeffdSWarner Losh 	 * we're called during a panic, complete the sq_head wrap protocol for
547d0aaeffdSWarner Losh 	 * the case where we are interrupted just after the increment at 1
548d0aaeffdSWarner Losh 	 * below, but before we can reset cq_head to zero at 2. Also cope with
549d0aaeffdSWarner Losh 	 * the case where we do the zero at 2, but may or may not have done the
550d0aaeffdSWarner Losh 	 * phase adjustment at step 3. The panic machinery flushes all pending
551d0aaeffdSWarner Losh 	 * memory writes, so we can make these strong ordering assumptions
552d0aaeffdSWarner Losh 	 * that would otherwise be unwise if we were racing in real time.
553d0aaeffdSWarner Losh 	 */
554d0aaeffdSWarner Losh 	if (__predict_false(in_panic)) {
555d0aaeffdSWarner Losh 		if (qpair->cq_head == qpair->num_entries) {
556d0aaeffdSWarner Losh 			/*
557d0aaeffdSWarner Losh 			 * Here we know that we need to zero cq_head and then negate
558d0aaeffdSWarner Losh 			 * the phase, which hasn't been assigned if cq_head isn't
559d0aaeffdSWarner Losh 			 * zero due to the atomic_store_rel.
560d0aaeffdSWarner Losh 			 */
561d0aaeffdSWarner Losh 			qpair->cq_head = 0;
562d0aaeffdSWarner Losh 			qpair->phase = !qpair->phase;
563d0aaeffdSWarner Losh 		} else if (qpair->cq_head == 0) {
564d0aaeffdSWarner Losh 			/*
565d0aaeffdSWarner Losh 			 * In this case, we know that the assignment at 2
566d0aaeffdSWarner Losh 			 * happened below, but we don't know if it 3 happened or
567d0aaeffdSWarner Losh 			 * not. To do this, we look at the last completion
568d0aaeffdSWarner Losh 			 * entry and set the phase to the opposite phase
569d0aaeffdSWarner Losh 			 * that it has. This gets us back in sync
570d0aaeffdSWarner Losh 			 */
571d0aaeffdSWarner Losh 			cpl = qpair->cpl[qpair->num_entries - 1];
572d0aaeffdSWarner Losh 			nvme_completion_swapbytes(&cpl);
573d0aaeffdSWarner Losh 			qpair->phase = !NVME_STATUS_GET_P(cpl.status);
574d0aaeffdSWarner Losh 		}
575d0aaeffdSWarner Losh 	}
576d0aaeffdSWarner Losh 
5772e0090afSJustin Hibbits 	bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
5782e0090afSJustin Hibbits 	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
5796cb06070SJim Harris 	while (1) {
5800d787e9bSWojciech Macek 		cpl = qpair->cpl[qpair->cq_head];
5816cb06070SJim Harris 
5820d787e9bSWojciech Macek 		/* Convert to host endian */
5830d787e9bSWojciech Macek 		nvme_completion_swapbytes(&cpl);
5840d787e9bSWojciech Macek 
5850d787e9bSWojciech Macek 		if (NVME_STATUS_GET_P(cpl.status) != qpair->phase)
5866cb06070SJim Harris 			break;
5876cb06070SJim Harris 
5880d787e9bSWojciech Macek 		tr = qpair->act_tr[cpl.cid];
5896cb06070SJim Harris 
5906cb06070SJim Harris 		if (tr != NULL) {
5912ffd6fceSWarner Losh 			nvme_qpair_complete_tracker(qpair, tr, &cpl, ERROR_PRINT_ALL);
5920d787e9bSWojciech Macek 			qpair->sq_head = cpl.sqhd;
593d85d9648SWarner Losh 			done++;
594d0aaeffdSWarner Losh 		} else if (!in_panic) {
595d0aaeffdSWarner Losh 			/*
596d0aaeffdSWarner Losh 			 * A missing tracker is normally an error.  However, a
597d0aaeffdSWarner Losh 			 * panic can stop the CPU this routine is running on
598d0aaeffdSWarner Losh 			 * after completing an I/O but before updating
599d0aaeffdSWarner Losh 			 * qpair->cq_head at 1 below.  Later, we re-enter this
600d0aaeffdSWarner Losh 			 * routine to poll I/O associated with the kernel
601d0aaeffdSWarner Losh 			 * dump. We find that the tr has been set to null before
602d0aaeffdSWarner Losh 			 * calling the completion routine.  If it hasn't
603d0aaeffdSWarner Losh 			 * completed (or it triggers a panic), then '1' below
604d0aaeffdSWarner Losh 			 * won't have updated cq_head. Rather than panic again,
605d0aaeffdSWarner Losh 			 * ignore this condition because it's not unexpected.
606d0aaeffdSWarner Losh 			 */
607547d523eSJim Harris 			nvme_printf(qpair->ctrlr,
608547d523eSJim Harris 			    "cpl does not map to outstanding cmd\n");
6090d787e9bSWojciech Macek 			/* nvme_dump_completion expects device endianess */
6100d787e9bSWojciech Macek 			nvme_dump_completion(&qpair->cpl[qpair->cq_head]);
611d0aaeffdSWarner Losh 			KASSERT(0, ("received completion for unknown cmd"));
6126cb06070SJim Harris 		}
613bb0ec6b3SJim Harris 
614d0aaeffdSWarner Losh 		/*
615d0aaeffdSWarner Losh 		 * There's a number of races with the following (see above) when
616d0aaeffdSWarner Losh 		 * the system panics. We compensate for each one of them by
617d0aaeffdSWarner Losh 		 * using the atomic store to force strong ordering (at least when
618d0aaeffdSWarner Losh 		 * viewed in the aftermath of a panic).
619d0aaeffdSWarner Losh 		 */
620d0aaeffdSWarner Losh 		if (++qpair->cq_head == qpair->num_entries) {		/* 1 */
621d0aaeffdSWarner Losh 			atomic_store_rel_int(&qpair->cq_head, 0);	/* 2 */
622d0aaeffdSWarner Losh 			qpair->phase = !qpair->phase;			/* 3 */
623bb0ec6b3SJim Harris 		}
624bb0ec6b3SJim Harris 
625bb0ec6b3SJim Harris 		nvme_mmio_write_4(qpair->ctrlr, doorbell[qpair->id].cq_hdbl,
626bb0ec6b3SJim Harris 		    qpair->cq_head);
627bb0ec6b3SJim Harris 	}
628d85d9648SWarner Losh 	return (done != 0);
629bb0ec6b3SJim Harris }
630bb0ec6b3SJim Harris 
631bb0ec6b3SJim Harris static void
632bb0ec6b3SJim Harris nvme_qpair_msix_handler(void *arg)
633bb0ec6b3SJim Harris {
634bb0ec6b3SJim Harris 	struct nvme_qpair *qpair = arg;
635bb0ec6b3SJim Harris 
636bb0ec6b3SJim Harris 	nvme_qpair_process_completions(qpair);
637bb0ec6b3SJim Harris }
638bb0ec6b3SJim Harris 
639a965389bSScott Long int
640bb0ec6b3SJim Harris nvme_qpair_construct(struct nvme_qpair *qpair, uint32_t id,
64121b6da58SJim Harris     uint16_t vector, uint32_t num_entries, uint32_t num_trackers,
6428d09e3c4SJim Harris     struct nvme_controller *ctrlr)
643bb0ec6b3SJim Harris {
64421b6da58SJim Harris 	struct nvme_tracker	*tr;
645a965389bSScott Long 	size_t			cmdsz, cplsz, prpsz, allocsz, prpmemsz;
646a965389bSScott Long 	uint64_t		queuemem_phys, prpmem_phys, list_phys;
647a965389bSScott Long 	uint8_t			*queuemem, *prpmem, *prp_list;
648a965389bSScott Long 	int			i, err;
649bb0ec6b3SJim Harris 
650bb0ec6b3SJim Harris 	qpair->id = id;
651bb0ec6b3SJim Harris 	qpair->vector = vector;
652bb0ec6b3SJim Harris 	qpair->num_entries = num_entries;
6530f71ecf7SJim Harris 	qpair->num_trackers = num_trackers;
654bb0ec6b3SJim Harris 	qpair->ctrlr = ctrlr;
655bb0ec6b3SJim Harris 
656bb0ec6b3SJim Harris 	if (ctrlr->msix_enabled) {
657bb0ec6b3SJim Harris 
658bb0ec6b3SJim Harris 		/*
659bb0ec6b3SJim Harris 		 * MSI-X vector resource IDs start at 1, so we add one to
660bb0ec6b3SJim Harris 		 *  the queue's vector to get the corresponding rid to use.
661bb0ec6b3SJim Harris 		 */
662bb0ec6b3SJim Harris 		qpair->rid = vector + 1;
663bb0ec6b3SJim Harris 
664e5af5854SJim Harris 		qpair->res = bus_alloc_resource_any(ctrlr->dev, SYS_RES_IRQ,
665e5af5854SJim Harris 		    &qpair->rid, RF_ACTIVE);
666bb0ec6b3SJim Harris 		bus_setup_intr(ctrlr->dev, qpair->res,
667bb0ec6b3SJim Harris 		    INTR_TYPE_MISC | INTR_MPSAFE, NULL,
668bb0ec6b3SJim Harris 		    nvme_qpair_msix_handler, qpair, &qpair->tag);
669a6461357SAlexander Motin 		if (id == 0) {
670a6461357SAlexander Motin 			bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag,
671a6461357SAlexander Motin 			    "admin");
672a6461357SAlexander Motin 		} else {
673a6461357SAlexander Motin 			bus_describe_intr(ctrlr->dev, qpair->res, qpair->tag,
674a6461357SAlexander Motin 			    "io%d", id - 1);
675a6461357SAlexander Motin 		}
676bb0ec6b3SJim Harris 	}
677bb0ec6b3SJim Harris 
678bb0ec6b3SJim Harris 	mtx_init(&qpair->lock, "nvme qpair lock", NULL, MTX_DEF);
679bb0ec6b3SJim Harris 
6801416ef36SJim Harris 	/* Note: NVMe PRP format is restricted to 4-byte alignment. */
681a6e30963SJim Harris 	err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev),
6821416ef36SJim Harris 	    4, PAGE_SIZE, BUS_SPACE_MAXADDR,
6838d09e3c4SJim Harris 	    BUS_SPACE_MAXADDR, NULL, NULL, NVME_MAX_XFER_SIZE,
6848d09e3c4SJim Harris 	    (NVME_MAX_XFER_SIZE/PAGE_SIZE)+1, PAGE_SIZE, 0,
685a6e30963SJim Harris 	    NULL, NULL, &qpair->dma_tag_payload);
686a965389bSScott Long 	if (err != 0) {
687a6e30963SJim Harris 		nvme_printf(ctrlr, "payload tag create failed %d\n", err);
688a965389bSScott Long 		goto out;
689a965389bSScott Long 	}
690a965389bSScott Long 
691a965389bSScott Long 	/*
692a965389bSScott Long 	 * Each component must be page aligned, and individual PRP lists
693a965389bSScott Long 	 * cannot cross a page boundary.
694a965389bSScott Long 	 */
695a965389bSScott Long 	cmdsz = qpair->num_entries * sizeof(struct nvme_command);
696a965389bSScott Long 	cmdsz = roundup2(cmdsz, PAGE_SIZE);
697a965389bSScott Long 	cplsz = qpair->num_entries * sizeof(struct nvme_completion);
698a965389bSScott Long 	cplsz = roundup2(cplsz, PAGE_SIZE);
699a965389bSScott Long 	prpsz = sizeof(uint64_t) * NVME_MAX_PRP_LIST_ENTRIES;;
700a965389bSScott Long 	prpmemsz = qpair->num_trackers * prpsz;
701a965389bSScott Long 	allocsz = cmdsz + cplsz + prpmemsz;
702a6e30963SJim Harris 
703a6e30963SJim Harris 	err = bus_dma_tag_create(bus_get_dma_tag(ctrlr->dev),
704a965389bSScott Long 	    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
705a965389bSScott Long 	    allocsz, 1, allocsz, 0, NULL, NULL, &qpair->dma_tag);
706a965389bSScott Long 	if (err != 0) {
707a6e30963SJim Harris 		nvme_printf(ctrlr, "tag create failed %d\n", err);
708a965389bSScott Long 		goto out;
709a965389bSScott Long 	}
710a965389bSScott Long 
711a965389bSScott Long 	if (bus_dmamem_alloc(qpair->dma_tag, (void **)&queuemem,
712a965389bSScott Long 	    BUS_DMA_NOWAIT, &qpair->queuemem_map)) {
713a965389bSScott Long 		nvme_printf(ctrlr, "failed to alloc qpair memory\n");
714a965389bSScott Long 		goto out;
715a965389bSScott Long 	}
716a965389bSScott Long 
717a965389bSScott Long 	if (bus_dmamap_load(qpair->dma_tag, qpair->queuemem_map,
718a965389bSScott Long 	    queuemem, allocsz, nvme_single_map, &queuemem_phys, 0) != 0) {
719a965389bSScott Long 		nvme_printf(ctrlr, "failed to load qpair memory\n");
720a965389bSScott Long 		goto out;
721a965389bSScott Long 	}
722bb0ec6b3SJim Harris 
723bb0ec6b3SJim Harris 	qpair->num_cmds = 0;
7246568ebfcSJim Harris 	qpair->num_intr_handler_calls = 0;
725c37fc318SWarner Losh 	qpair->num_retries = 0;
7265e83c2ffSWarner Losh 	qpair->num_failures = 0;
727a965389bSScott Long 	qpair->cmd = (struct nvme_command *)queuemem;
728a965389bSScott Long 	qpair->cpl = (struct nvme_completion *)(queuemem + cmdsz);
729a965389bSScott Long 	prpmem = (uint8_t *)(queuemem + cmdsz + cplsz);
730a965389bSScott Long 	qpair->cmd_bus_addr = queuemem_phys;
731a965389bSScott Long 	qpair->cpl_bus_addr = queuemem_phys + cmdsz;
732a965389bSScott Long 	prpmem_phys = queuemem_phys + cmdsz + cplsz;
733bb0ec6b3SJim Harris 
734bb0ec6b3SJim Harris 	qpair->sq_tdbl_off = nvme_mmio_offsetof(doorbell[id].sq_tdbl);
735bb0ec6b3SJim Harris 	qpair->cq_hdbl_off = nvme_mmio_offsetof(doorbell[id].cq_hdbl);
736bb0ec6b3SJim Harris 
73765c2474eSJim Harris 	TAILQ_INIT(&qpair->free_tr);
73865c2474eSJim Harris 	TAILQ_INIT(&qpair->outstanding_tr);
7390f71ecf7SJim Harris 	STAILQ_INIT(&qpair->queued_req);
740bb0ec6b3SJim Harris 
741a965389bSScott Long 	list_phys = prpmem_phys;
742a965389bSScott Long 	prp_list = prpmem;
7430f71ecf7SJim Harris 	for (i = 0; i < qpair->num_trackers; i++) {
744a965389bSScott Long 
745a965389bSScott Long 		if (list_phys + prpsz > prpmem_phys + prpmemsz) {
746a965389bSScott Long 			qpair->num_trackers = i;
747a965389bSScott Long 			break;
74821b6da58SJim Harris 		}
74921b6da58SJim Harris 
750a965389bSScott Long 		/*
751a965389bSScott Long 		 * Make sure that the PRP list for this tracker doesn't
752a965389bSScott Long 		 * overflow to another page.
753a965389bSScott Long 		 */
754a965389bSScott Long 		if (trunc_page(list_phys) !=
755a965389bSScott Long 		    trunc_page(list_phys + prpsz - 1)) {
756a965389bSScott Long 			list_phys = roundup2(list_phys, PAGE_SIZE);
757a965389bSScott Long 			prp_list =
758a965389bSScott Long 			    (uint8_t *)roundup2((uintptr_t)prp_list, PAGE_SIZE);
759a965389bSScott Long 		}
760a965389bSScott Long 
761a965389bSScott Long 		tr = malloc(sizeof(*tr), M_NVME, M_ZERO | M_WAITOK);
762a965389bSScott Long 		bus_dmamap_create(qpair->dma_tag_payload, 0,
763a965389bSScott Long 		    &tr->payload_dma_map);
764a965389bSScott Long 		callout_init(&tr->timer, 1);
765a965389bSScott Long 		tr->cid = i;
766a965389bSScott Long 		tr->qpair = qpair;
767a965389bSScott Long 		tr->prp = (uint64_t *)prp_list;
768a965389bSScott Long 		tr->prp_bus_addr = list_phys;
769a965389bSScott Long 		TAILQ_INSERT_HEAD(&qpair->free_tr, tr, tailq);
770a965389bSScott Long 		list_phys += prpsz;
771a965389bSScott Long 		prp_list += prpsz;
772a965389bSScott Long 	}
773a965389bSScott Long 
774a965389bSScott Long 	if (qpair->num_trackers == 0) {
775a965389bSScott Long 		nvme_printf(ctrlr, "failed to allocate enough trackers\n");
776a965389bSScott Long 		goto out;
777a965389bSScott Long 	}
778a965389bSScott Long 
779a965389bSScott Long 	qpair->act_tr = malloc(sizeof(struct nvme_tracker *) *
780a965389bSScott Long 	    qpair->num_entries, M_NVME, M_ZERO | M_WAITOK);
781a965389bSScott Long 	return (0);
782a965389bSScott Long 
783a965389bSScott Long out:
784a965389bSScott Long 	nvme_qpair_destroy(qpair);
785a965389bSScott Long 	return (ENOMEM);
786bb0ec6b3SJim Harris }
787bb0ec6b3SJim Harris 
788bb0ec6b3SJim Harris static void
789bb0ec6b3SJim Harris nvme_qpair_destroy(struct nvme_qpair *qpair)
790bb0ec6b3SJim Harris {
791bb0ec6b3SJim Harris 	struct nvme_tracker	*tr;
792bb0ec6b3SJim Harris 
793bb0ec6b3SJim Harris 	if (qpair->tag)
794bb0ec6b3SJim Harris 		bus_teardown_intr(qpair->ctrlr->dev, qpair->res, qpair->tag);
795bb0ec6b3SJim Harris 
796a965389bSScott Long 	if (mtx_initialized(&qpair->lock))
797a965389bSScott Long 		mtx_destroy(&qpair->lock);
798a965389bSScott Long 
799bb0ec6b3SJim Harris 	if (qpair->res)
800bb0ec6b3SJim Harris 		bus_release_resource(qpair->ctrlr->dev, SYS_RES_IRQ,
801bb0ec6b3SJim Harris 		    rman_get_rid(qpair->res), qpair->res);
802bb0ec6b3SJim Harris 
803a965389bSScott Long 	if (qpair->cmd != NULL) {
804a965389bSScott Long 		bus_dmamap_unload(qpair->dma_tag, qpair->queuemem_map);
805a965389bSScott Long 		bus_dmamem_free(qpair->dma_tag, qpair->cmd,
806a965389bSScott Long 		    qpair->queuemem_map);
8073d7eb41cSJim Harris 	}
8083d7eb41cSJim Harris 
809bb0ec6b3SJim Harris 	if (qpair->act_tr)
810bb0ec6b3SJim Harris 		free(qpair->act_tr, M_NVME);
811bb0ec6b3SJim Harris 
81265c2474eSJim Harris 	while (!TAILQ_EMPTY(&qpair->free_tr)) {
81365c2474eSJim Harris 		tr = TAILQ_FIRST(&qpair->free_tr);
81465c2474eSJim Harris 		TAILQ_REMOVE(&qpair->free_tr, tr, tailq);
815c6c70c07SAlexander Motin 		bus_dmamap_destroy(qpair->dma_tag_payload,
816c6c70c07SAlexander Motin 		    tr->payload_dma_map);
817bb0ec6b3SJim Harris 		free(tr, M_NVME);
818bb0ec6b3SJim Harris 	}
819c6c70c07SAlexander Motin 
820c6c70c07SAlexander Motin 	if (qpair->dma_tag)
821c6c70c07SAlexander Motin 		bus_dma_tag_destroy(qpair->dma_tag);
822c6c70c07SAlexander Motin 
823c6c70c07SAlexander Motin 	if (qpair->dma_tag_payload)
824c6c70c07SAlexander Motin 		bus_dma_tag_destroy(qpair->dma_tag_payload);
825bb0ec6b3SJim Harris }
826bb0ec6b3SJim Harris 
827b846efd7SJim Harris static void
828b846efd7SJim Harris nvme_admin_qpair_abort_aers(struct nvme_qpair *qpair)
829b846efd7SJim Harris {
830b846efd7SJim Harris 	struct nvme_tracker	*tr;
831b846efd7SJim Harris 
832b846efd7SJim Harris 	tr = TAILQ_FIRST(&qpair->outstanding_tr);
833b846efd7SJim Harris 	while (tr != NULL) {
8349544e6dcSChuck Tuffli 		if (tr->req->cmd.opc == NVME_OPC_ASYNC_EVENT_REQUEST) {
835b846efd7SJim Harris 			nvme_qpair_manual_complete_tracker(qpair, tr,
836232e2edbSJim Harris 			    NVME_SCT_GENERIC, NVME_SC_ABORTED_SQ_DELETION, 0,
8372ffd6fceSWarner Losh 			    ERROR_PRINT_NONE);
838b846efd7SJim Harris 			tr = TAILQ_FIRST(&qpair->outstanding_tr);
839b846efd7SJim Harris 		} else {
840b846efd7SJim Harris 			tr = TAILQ_NEXT(tr, tailq);
841b846efd7SJim Harris 		}
842b846efd7SJim Harris 	}
843b846efd7SJim Harris }
844b846efd7SJim Harris 
845bb0ec6b3SJim Harris void
846bb0ec6b3SJim Harris nvme_admin_qpair_destroy(struct nvme_qpair *qpair)
847bb0ec6b3SJim Harris {
848bb0ec6b3SJim Harris 
849b846efd7SJim Harris 	nvme_admin_qpair_abort_aers(qpair);
850bb0ec6b3SJim Harris 	nvme_qpair_destroy(qpair);
851bb0ec6b3SJim Harris }
852bb0ec6b3SJim Harris 
853bb0ec6b3SJim Harris void
854bb0ec6b3SJim Harris nvme_io_qpair_destroy(struct nvme_qpair *qpair)
855bb0ec6b3SJim Harris {
856bb0ec6b3SJim Harris 
857bb0ec6b3SJim Harris 	nvme_qpair_destroy(qpair);
858bb0ec6b3SJim Harris }
859bb0ec6b3SJim Harris 
860bb0ec6b3SJim Harris static void
8610a0b08ccSJim Harris nvme_abort_complete(void *arg, const struct nvme_completion *status)
8620a0b08ccSJim Harris {
863879de699SJim Harris 	struct nvme_tracker	*tr = arg;
864879de699SJim Harris 
865879de699SJim Harris 	/*
866879de699SJim Harris 	 * If cdw0 == 1, the controller was not able to abort the command
867879de699SJim Harris 	 *  we requested.  We still need to check the active tracker array,
868879de699SJim Harris 	 *  to cover race where I/O timed out at same time controller was
869879de699SJim Harris 	 *  completing the I/O.
870879de699SJim Harris 	 */
871879de699SJim Harris 	if (status->cdw0 == 1 && tr->qpair->act_tr[tr->cid] != NULL) {
872879de699SJim Harris 		/*
873879de699SJim Harris 		 * An I/O has timed out, and the controller was unable to
874879de699SJim Harris 		 *  abort it for some reason.  Construct a fake completion
875879de699SJim Harris 		 *  status, and then complete the I/O's tracker manually.
876879de699SJim Harris 		 */
877547d523eSJim Harris 		nvme_printf(tr->qpair->ctrlr,
878547d523eSJim Harris 		    "abort command failed, aborting command manually\n");
879b846efd7SJim Harris 		nvme_qpair_manual_complete_tracker(tr->qpair, tr,
8802ffd6fceSWarner Losh 		    NVME_SCT_GENERIC, NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_ALL);
881879de699SJim Harris 	}
882879de699SJim Harris }
883879de699SJim Harris 
884879de699SJim Harris static void
885bb0ec6b3SJim Harris nvme_timeout(void *arg)
886bb0ec6b3SJim Harris {
887448195e7SJim Harris 	struct nvme_tracker	*tr = arg;
88812d191ecSJim Harris 	struct nvme_qpair	*qpair = tr->qpair;
88912d191ecSJim Harris 	struct nvme_controller	*ctrlr = qpair->ctrlr;
8900d787e9bSWojciech Macek 	uint32_t		csts;
8910d787e9bSWojciech Macek 	uint8_t			cfs;
892448195e7SJim Harris 
89348ce3178SJim Harris 	/*
894d85d9648SWarner Losh 	 * Read csts to get value of cfs - controller fatal status.
895d85d9648SWarner Losh 	 * If no fatal status, try to call the completion routine, and
896d85d9648SWarner Losh 	 * if completes transactions, report a missed interrupt and
897d85d9648SWarner Losh 	 * return (this may need to be rate limited). Otherwise, if
898d85d9648SWarner Losh 	 * aborts are enabled and the controller is not reporting
899d85d9648SWarner Losh 	 * fatal status, abort the command. Otherwise, just reset the
900d85d9648SWarner Losh 	 * controller and hope for the best.
90148ce3178SJim Harris 	 */
902d85d9648SWarner Losh 	csts = nvme_mmio_read_4(ctrlr, csts);
903d85d9648SWarner Losh 	cfs = (csts >> NVME_CSTS_REG_CFS_SHIFT) & NVME_CSTS_REG_CFS_MASK;
904d85d9648SWarner Losh 	if (cfs == 0 && nvme_qpair_process_completions(qpair)) {
905d85d9648SWarner Losh 		nvme_printf(ctrlr, "Missing interrupt\n");
906d85d9648SWarner Losh 		return;
907d85d9648SWarner Losh 	}
908d85d9648SWarner Losh 	if (ctrlr->enable_aborts && cfs == 0) {
909d85d9648SWarner Losh 		nvme_printf(ctrlr, "Aborting command due to a timeout.\n");
91012d191ecSJim Harris 		nvme_ctrlr_cmd_abort(ctrlr, tr->cid, qpair->id,
911879de699SJim Harris 		    nvme_abort_complete, tr);
912d85d9648SWarner Losh 	} else {
913d85d9648SWarner Losh 		nvme_printf(ctrlr, "Resetting controller due to a timeout%s.\n",
914d85d9648SWarner Losh 		    cfs ? " and fatal error status" : "");
91548ce3178SJim Harris 		nvme_ctrlr_reset(ctrlr);
916bb0ec6b3SJim Harris 	}
917d85d9648SWarner Losh }
918bb0ec6b3SJim Harris 
919bb0ec6b3SJim Harris void
920b846efd7SJim Harris nvme_qpair_submit_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr)
921bb0ec6b3SJim Harris {
922ad697276SJim Harris 	struct nvme_request	*req;
92394143332SJim Harris 	struct nvme_controller	*ctrlr;
924bb0ec6b3SJim Harris 
925b846efd7SJim Harris 	mtx_assert(&qpair->lock, MA_OWNED);
926b846efd7SJim Harris 
927ad697276SJim Harris 	req = tr->req;
928ad697276SJim Harris 	req->cmd.cid = tr->cid;
929bb0ec6b3SJim Harris 	qpair->act_tr[tr->cid] = tr;
93094143332SJim Harris 	ctrlr = qpair->ctrlr;
931bb0ec6b3SJim Harris 
93294143332SJim Harris 	if (req->timeout)
93394143332SJim Harris 		callout_reset_curcpu(&tr->timer, ctrlr->timeout_period * hz,
934633c5729SJim Harris 		    nvme_timeout, tr);
935bb0ec6b3SJim Harris 
936bb0ec6b3SJim Harris 	/* Copy the command from the tracker to the submission queue. */
937ad697276SJim Harris 	memcpy(&qpair->cmd[qpair->sq_tail], &req->cmd, sizeof(req->cmd));
938bb0ec6b3SJim Harris 
939bb0ec6b3SJim Harris 	if (++qpair->sq_tail == qpair->num_entries)
940bb0ec6b3SJim Harris 		qpair->sq_tail = 0;
941bb0ec6b3SJim Harris 
9422e0090afSJustin Hibbits 	bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
9432e0090afSJustin Hibbits 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
9442e0090afSJustin Hibbits #ifndef __powerpc__
9452e0090afSJustin Hibbits 	/*
9462e0090afSJustin Hibbits 	 * powerpc's bus_dmamap_sync() already includes a heavyweight sync, but
9472e0090afSJustin Hibbits 	 * no other archs do.
9482e0090afSJustin Hibbits 	 */
949bb0ec6b3SJim Harris 	wmb();
9502e0090afSJustin Hibbits #endif
9512e0090afSJustin Hibbits 
952bb0ec6b3SJim Harris 	nvme_mmio_write_4(qpair->ctrlr, doorbell[qpair->id].sq_tdbl,
953bb0ec6b3SJim Harris 	    qpair->sq_tail);
954bb0ec6b3SJim Harris 
955bb0ec6b3SJim Harris 	qpair->num_cmds++;
956bb0ec6b3SJim Harris }
9575ae9ed68SJim Harris 
958d6f54866SJim Harris static void
959ca269f32SJim Harris nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
960ca269f32SJim Harris {
961ca269f32SJim Harris 	struct nvme_tracker 	*tr = arg;
962ca269f32SJim Harris 	uint32_t		cur_nseg;
963ca269f32SJim Harris 
964ca269f32SJim Harris 	/*
965ca269f32SJim Harris 	 * If the mapping operation failed, return immediately.  The caller
966ca269f32SJim Harris 	 *  is responsible for detecting the error status and failing the
967ca269f32SJim Harris 	 *  tracker manually.
968ca269f32SJim Harris 	 */
969a6e30963SJim Harris 	if (error != 0) {
970a6e30963SJim Harris 		nvme_printf(tr->qpair->ctrlr,
971a6e30963SJim Harris 		    "nvme_payload_map err %d\n", error);
972ca269f32SJim Harris 		return;
973a6e30963SJim Harris 	}
974ca269f32SJim Harris 
975ca269f32SJim Harris 	/*
976ca269f32SJim Harris 	 * Note that we specified PAGE_SIZE for alignment and max
977ca269f32SJim Harris 	 *  segment size when creating the bus dma tags.  So here
978ca269f32SJim Harris 	 *  we can safely just transfer each segment to its
979ca269f32SJim Harris 	 *  associated PRP entry.
980ca269f32SJim Harris 	 */
9810d787e9bSWojciech Macek 	tr->req->cmd.prp1 = htole64(seg[0].ds_addr);
982ca269f32SJim Harris 
983ca269f32SJim Harris 	if (nseg == 2) {
9840d787e9bSWojciech Macek 		tr->req->cmd.prp2 = htole64(seg[1].ds_addr);
985ca269f32SJim Harris 	} else if (nseg > 2) {
986ca269f32SJim Harris 		cur_nseg = 1;
9870d787e9bSWojciech Macek 		tr->req->cmd.prp2 = htole64((uint64_t)tr->prp_bus_addr);
988ca269f32SJim Harris 		while (cur_nseg < nseg) {
989ca269f32SJim Harris 			tr->prp[cur_nseg-1] =
9900d787e9bSWojciech Macek 			    htole64((uint64_t)seg[cur_nseg].ds_addr);
991ca269f32SJim Harris 			cur_nseg++;
992ca269f32SJim Harris 		}
993a6e30963SJim Harris 	} else {
994a6e30963SJim Harris 		/*
995a6e30963SJim Harris 		 * prp2 should not be used by the controller
996a6e30963SJim Harris 		 *  since there is only one segment, but set
997a6e30963SJim Harris 		 *  to 0 just to be safe.
998a6e30963SJim Harris 		 */
999a6e30963SJim Harris 		tr->req->cmd.prp2 = 0;
1000ca269f32SJim Harris 	}
1001ca269f32SJim Harris 
10022e0090afSJustin Hibbits 	bus_dmamap_sync(tr->qpair->dma_tag_payload, tr->payload_dma_map,
10032e0090afSJustin Hibbits 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1004ca269f32SJim Harris 	nvme_qpair_submit_tracker(tr->qpair, tr);
1005ca269f32SJim Harris }
1006ca269f32SJim Harris 
1007ca269f32SJim Harris static void
1008d6f54866SJim Harris _nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req)
10095ae9ed68SJim Harris {
10105ae9ed68SJim Harris 	struct nvme_tracker	*tr;
1011e2b99004SJim Harris 	int			err = 0;
10125ae9ed68SJim Harris 
1013d6f54866SJim Harris 	mtx_assert(&qpair->lock, MA_OWNED);
10145ae9ed68SJim Harris 
101565c2474eSJim Harris 	tr = TAILQ_FIRST(&qpair->free_tr);
1016232e2edbSJim Harris 	req->qpair = qpair;
101721b6da58SJim Harris 
1018b846efd7SJim Harris 	if (tr == NULL || !qpair->is_enabled) {
10190f71ecf7SJim Harris 		/*
1020b846efd7SJim Harris 		 * No tracker is available, or the qpair is disabled due to
1021232e2edbSJim Harris 		 *  an in-progress controller-level reset or controller
1022232e2edbSJim Harris 		 *  failure.
1023232e2edbSJim Harris 		 */
1024232e2edbSJim Harris 
1025232e2edbSJim Harris 		if (qpair->ctrlr->is_failed) {
1026232e2edbSJim Harris 			/*
1027232e2edbSJim Harris 			 * The controller has failed.  Post the request to a
1028232e2edbSJim Harris 			 *  task where it will be aborted, so that we do not
1029232e2edbSJim Harris 			 *  invoke the request's callback in the context
1030232e2edbSJim Harris 			 *  of the submission.
1031232e2edbSJim Harris 			 */
1032232e2edbSJim Harris 			nvme_ctrlr_post_failed_request(qpair->ctrlr, req);
1033232e2edbSJim Harris 		} else {
1034232e2edbSJim Harris 			/*
1035232e2edbSJim Harris 			 * Put the request on the qpair's request queue to be
1036232e2edbSJim Harris 			 *  processed when a tracker frees up via a command
1037232e2edbSJim Harris 			 *  completion or when the controller reset is
1038232e2edbSJim Harris 			 *  completed.
10390f71ecf7SJim Harris 			 */
10400f71ecf7SJim Harris 			STAILQ_INSERT_TAIL(&qpair->queued_req, req, stailq);
1041232e2edbSJim Harris 		}
1042d6f54866SJim Harris 		return;
104321b6da58SJim Harris 	}
104421b6da58SJim Harris 
104565c2474eSJim Harris 	TAILQ_REMOVE(&qpair->free_tr, tr, tailq);
104665c2474eSJim Harris 	TAILQ_INSERT_TAIL(&qpair->outstanding_tr, tr, tailq);
10475ae9ed68SJim Harris 	tr->req = req;
10485ae9ed68SJim Harris 
10491e526bc4SJim Harris 	switch (req->type) {
10501e526bc4SJim Harris 	case NVME_REQUEST_VADDR:
10517b68ae1eSJim Harris 		KASSERT(req->payload_size <= qpair->ctrlr->max_xfer_size,
10527b68ae1eSJim Harris 		    ("payload_size (%d) exceeds max_xfer_size (%d)\n",
10537b68ae1eSJim Harris 		    req->payload_size, qpair->ctrlr->max_xfer_size));
1054a6e30963SJim Harris 		err = bus_dmamap_load(tr->qpair->dma_tag_payload,
1055a6e30963SJim Harris 		    tr->payload_dma_map, req->u.payload, req->payload_size,
1056a6e30963SJim Harris 		    nvme_payload_map, tr, 0);
10575ae9ed68SJim Harris 		if (err != 0)
1058e2b99004SJim Harris 			nvme_printf(qpair->ctrlr,
1059e2b99004SJim Harris 			    "bus_dmamap_load returned 0x%x!\n", err);
10601e526bc4SJim Harris 		break;
10611e526bc4SJim Harris 	case NVME_REQUEST_NULL:
1062b846efd7SJim Harris 		nvme_qpair_submit_tracker(tr->qpair, tr);
10631e526bc4SJim Harris 		break;
10645fdf9c3cSJim Harris 	case NVME_REQUEST_BIO:
10657b68ae1eSJim Harris 		KASSERT(req->u.bio->bio_bcount <= qpair->ctrlr->max_xfer_size,
10667b68ae1eSJim Harris 		    ("bio->bio_bcount (%jd) exceeds max_xfer_size (%d)\n",
10677b68ae1eSJim Harris 		    (intmax_t)req->u.bio->bio_bcount,
10687b68ae1eSJim Harris 		    qpair->ctrlr->max_xfer_size));
1069a6e30963SJim Harris 		err = bus_dmamap_load_bio(tr->qpair->dma_tag_payload,
10705fdf9c3cSJim Harris 		    tr->payload_dma_map, req->u.bio, nvme_payload_map, tr, 0);
10715fdf9c3cSJim Harris 		if (err != 0)
1072e2b99004SJim Harris 			nvme_printf(qpair->ctrlr,
1073e2b99004SJim Harris 			    "bus_dmamap_load_bio returned 0x%x!\n", err);
10745fdf9c3cSJim Harris 		break;
107551977281SWarner Losh 	case NVME_REQUEST_CCB:
107651977281SWarner Losh 		err = bus_dmamap_load_ccb(tr->qpair->dma_tag_payload,
107751977281SWarner Losh 		    tr->payload_dma_map, req->u.payload,
107851977281SWarner Losh 		    nvme_payload_map, tr, 0);
107951977281SWarner Losh 		if (err != 0)
108051977281SWarner Losh 			nvme_printf(qpair->ctrlr,
108151977281SWarner Losh 			    "bus_dmamap_load_ccb returned 0x%x!\n", err);
108251977281SWarner Losh 		break;
10831e526bc4SJim Harris 	default:
10841e526bc4SJim Harris 		panic("unknown nvme request type 0x%x\n", req->type);
10851e526bc4SJim Harris 		break;
10865ae9ed68SJim Harris 	}
1087e2b99004SJim Harris 
1088e2b99004SJim Harris 	if (err != 0) {
1089e2b99004SJim Harris 		/*
1090e2b99004SJim Harris 		 * The dmamap operation failed, so we manually fail the
1091e2b99004SJim Harris 		 *  tracker here with DATA_TRANSFER_ERROR status.
1092e2b99004SJim Harris 		 *
1093e2b99004SJim Harris 		 * nvme_qpair_manual_complete_tracker must not be called
1094e2b99004SJim Harris 		 *  with the qpair lock held.
1095e2b99004SJim Harris 		 */
1096e2b99004SJim Harris 		mtx_unlock(&qpair->lock);
1097e2b99004SJim Harris 		nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC,
10982ffd6fceSWarner Losh 		    NVME_SC_DATA_TRANSFER_ERROR, DO_NOT_RETRY, ERROR_PRINT_ALL);
1099e2b99004SJim Harris 		mtx_lock(&qpair->lock);
1100e2b99004SJim Harris 	}
1101d6f54866SJim Harris }
11025ae9ed68SJim Harris 
1103d6f54866SJim Harris void
1104d6f54866SJim Harris nvme_qpair_submit_request(struct nvme_qpair *qpair, struct nvme_request *req)
1105d6f54866SJim Harris {
1106d6f54866SJim Harris 
1107d6f54866SJim Harris 	mtx_lock(&qpair->lock);
1108d6f54866SJim Harris 	_nvme_qpair_submit_request(qpair, req);
11095ae9ed68SJim Harris 	mtx_unlock(&qpair->lock);
11105ae9ed68SJim Harris }
1111b846efd7SJim Harris 
1112b846efd7SJim Harris static void
1113b846efd7SJim Harris nvme_qpair_enable(struct nvme_qpair *qpair)
1114b846efd7SJim Harris {
1115b846efd7SJim Harris 
1116b846efd7SJim Harris 	qpair->is_enabled = TRUE;
1117cb5b7c13SJim Harris }
1118cb5b7c13SJim Harris 
1119cb5b7c13SJim Harris void
1120cb5b7c13SJim Harris nvme_qpair_reset(struct nvme_qpair *qpair)
1121cb5b7c13SJim Harris {
1122cb5b7c13SJim Harris 
1123b846efd7SJim Harris 	qpair->sq_head = qpair->sq_tail = qpair->cq_head = 0;
1124b846efd7SJim Harris 
1125b846efd7SJim Harris 	/*
1126b846efd7SJim Harris 	 * First time through the completion queue, HW will set phase
1127b846efd7SJim Harris 	 *  bit on completions to 1.  So set this to 1 here, indicating
1128b846efd7SJim Harris 	 *  we're looking for a 1 to know which entries have completed.
1129b846efd7SJim Harris 	 *  we'll toggle the bit each time when the completion queue
1130b846efd7SJim Harris 	 *  rolls over.
1131b846efd7SJim Harris 	 */
1132b846efd7SJim Harris 	qpair->phase = 1;
1133b846efd7SJim Harris 
1134b846efd7SJim Harris 	memset(qpair->cmd, 0,
1135b846efd7SJim Harris 	    qpair->num_entries * sizeof(struct nvme_command));
1136b846efd7SJim Harris 	memset(qpair->cpl, 0,
1137b846efd7SJim Harris 	    qpair->num_entries * sizeof(struct nvme_completion));
1138b846efd7SJim Harris }
1139b846efd7SJim Harris 
1140b846efd7SJim Harris void
1141b846efd7SJim Harris nvme_admin_qpair_enable(struct nvme_qpair *qpair)
1142b846efd7SJim Harris {
114343a37256SJim Harris 	struct nvme_tracker		*tr;
114443a37256SJim Harris 	struct nvme_tracker		*tr_temp;
114543a37256SJim Harris 
114643a37256SJim Harris 	/*
114743a37256SJim Harris 	 * Manually abort each outstanding admin command.  Do not retry
114843a37256SJim Harris 	 *  admin commands found here, since they will be left over from
114943a37256SJim Harris 	 *  a controller reset and its likely the context in which the
115043a37256SJim Harris 	 *  command was issued no longer applies.
115143a37256SJim Harris 	 */
115243a37256SJim Harris 	TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) {
1153547d523eSJim Harris 		nvme_printf(qpair->ctrlr,
115443a37256SJim Harris 		    "aborting outstanding admin command\n");
115543a37256SJim Harris 		nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC,
11562ffd6fceSWarner Losh 		    NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL);
115743a37256SJim Harris 	}
1158b846efd7SJim Harris 
1159b846efd7SJim Harris 	nvme_qpair_enable(qpair);
1160b846efd7SJim Harris }
1161b846efd7SJim Harris 
1162b846efd7SJim Harris void
1163b846efd7SJim Harris nvme_io_qpair_enable(struct nvme_qpair *qpair)
1164b846efd7SJim Harris {
1165b846efd7SJim Harris 	STAILQ_HEAD(, nvme_request)	temp;
1166b846efd7SJim Harris 	struct nvme_tracker		*tr;
1167cb5b7c13SJim Harris 	struct nvme_tracker		*tr_temp;
1168b846efd7SJim Harris 	struct nvme_request		*req;
1169b846efd7SJim Harris 
1170cb5b7c13SJim Harris 	/*
1171cb5b7c13SJim Harris 	 * Manually abort each outstanding I/O.  This normally results in a
1172cb5b7c13SJim Harris 	 *  retry, unless the retry count on the associated request has
1173cb5b7c13SJim Harris 	 *  reached its limit.
1174cb5b7c13SJim Harris 	 */
1175cb5b7c13SJim Harris 	TAILQ_FOREACH_SAFE(tr, &qpair->outstanding_tr, tailq, tr_temp) {
1176547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "aborting outstanding i/o\n");
1177cb5b7c13SJim Harris 		nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC,
11782ffd6fceSWarner Losh 		    NVME_SC_ABORTED_BY_REQUEST, 0, ERROR_PRINT_NO_RETRY);
1179cb5b7c13SJim Harris 	}
1180cb5b7c13SJim Harris 
1181b846efd7SJim Harris 	mtx_lock(&qpair->lock);
1182b846efd7SJim Harris 
1183b846efd7SJim Harris 	nvme_qpair_enable(qpair);
1184b846efd7SJim Harris 
1185b846efd7SJim Harris 	STAILQ_INIT(&temp);
1186b846efd7SJim Harris 	STAILQ_SWAP(&qpair->queued_req, &temp, nvme_request);
1187b846efd7SJim Harris 
1188b846efd7SJim Harris 	while (!STAILQ_EMPTY(&temp)) {
1189b846efd7SJim Harris 		req = STAILQ_FIRST(&temp);
1190b846efd7SJim Harris 		STAILQ_REMOVE_HEAD(&temp, stailq);
1191547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "resubmitting queued i/o\n");
1192547d523eSJim Harris 		nvme_qpair_print_command(qpair, &req->cmd);
1193b846efd7SJim Harris 		_nvme_qpair_submit_request(qpair, req);
1194b846efd7SJim Harris 	}
1195b846efd7SJim Harris 
1196b846efd7SJim Harris 	mtx_unlock(&qpair->lock);
1197b846efd7SJim Harris }
1198b846efd7SJim Harris 
1199b846efd7SJim Harris static void
1200b846efd7SJim Harris nvme_qpair_disable(struct nvme_qpair *qpair)
1201b846efd7SJim Harris {
1202b846efd7SJim Harris 	struct nvme_tracker *tr;
1203b846efd7SJim Harris 
1204b846efd7SJim Harris 	qpair->is_enabled = FALSE;
1205b846efd7SJim Harris 	mtx_lock(&qpair->lock);
1206b846efd7SJim Harris 	TAILQ_FOREACH(tr, &qpair->outstanding_tr, tailq)
1207b846efd7SJim Harris 		callout_stop(&tr->timer);
1208b846efd7SJim Harris 	mtx_unlock(&qpair->lock);
1209b846efd7SJim Harris }
1210b846efd7SJim Harris 
1211b846efd7SJim Harris void
1212b846efd7SJim Harris nvme_admin_qpair_disable(struct nvme_qpair *qpair)
1213b846efd7SJim Harris {
1214b846efd7SJim Harris 
1215b846efd7SJim Harris 	nvme_qpair_disable(qpair);
1216b846efd7SJim Harris 	nvme_admin_qpair_abort_aers(qpair);
1217b846efd7SJim Harris }
1218b846efd7SJim Harris 
1219b846efd7SJim Harris void
1220b846efd7SJim Harris nvme_io_qpair_disable(struct nvme_qpair *qpair)
1221b846efd7SJim Harris {
1222b846efd7SJim Harris 
1223b846efd7SJim Harris 	nvme_qpair_disable(qpair);
1224b846efd7SJim Harris }
1225232e2edbSJim Harris 
1226232e2edbSJim Harris void
1227232e2edbSJim Harris nvme_qpair_fail(struct nvme_qpair *qpair)
1228232e2edbSJim Harris {
1229232e2edbSJim Harris 	struct nvme_tracker		*tr;
1230232e2edbSJim Harris 	struct nvme_request		*req;
1231232e2edbSJim Harris 
1232824073fbSWarner Losh 	if (!mtx_initialized(&qpair->lock))
1233824073fbSWarner Losh 		return;
1234824073fbSWarner Losh 
1235232e2edbSJim Harris 	mtx_lock(&qpair->lock);
1236232e2edbSJim Harris 
1237232e2edbSJim Harris 	while (!STAILQ_EMPTY(&qpair->queued_req)) {
1238232e2edbSJim Harris 		req = STAILQ_FIRST(&qpair->queued_req);
1239232e2edbSJim Harris 		STAILQ_REMOVE_HEAD(&qpair->queued_req, stailq);
1240547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "failing queued i/o\n");
1241232e2edbSJim Harris 		mtx_unlock(&qpair->lock);
1242232e2edbSJim Harris 		nvme_qpair_manual_complete_request(qpair, req, NVME_SCT_GENERIC,
12432ffd6fceSWarner Losh 		    NVME_SC_ABORTED_BY_REQUEST);
1244232e2edbSJim Harris 		mtx_lock(&qpair->lock);
1245232e2edbSJim Harris 	}
1246232e2edbSJim Harris 
1247232e2edbSJim Harris 	/* Manually abort each outstanding I/O. */
1248232e2edbSJim Harris 	while (!TAILQ_EMPTY(&qpair->outstanding_tr)) {
1249232e2edbSJim Harris 		tr = TAILQ_FIRST(&qpair->outstanding_tr);
1250232e2edbSJim Harris 		/*
1251232e2edbSJim Harris 		 * Do not remove the tracker.  The abort_tracker path will
1252232e2edbSJim Harris 		 *  do that for us.
1253232e2edbSJim Harris 		 */
1254547d523eSJim Harris 		nvme_printf(qpair->ctrlr, "failing outstanding i/o\n");
1255232e2edbSJim Harris 		mtx_unlock(&qpair->lock);
1256232e2edbSJim Harris 		nvme_qpair_manual_complete_tracker(qpair, tr, NVME_SCT_GENERIC,
12572ffd6fceSWarner Losh 		    NVME_SC_ABORTED_BY_REQUEST, DO_NOT_RETRY, ERROR_PRINT_ALL);
1258232e2edbSJim Harris 		mtx_lock(&qpair->lock);
1259232e2edbSJim Harris 	}
1260232e2edbSJim Harris 
1261232e2edbSJim Harris 	mtx_unlock(&qpair->lock);
1262232e2edbSJim Harris }
1263232e2edbSJim Harris 
1264