xref: /freebsd/sys/dev/nvme/nvme_ctrlr_cmd.c (revision a259b98fa211ed87bfee58c575de4e2de94ee0fa)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (C) 2012-2013 Intel Corporation
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 #include "nvme_private.h"
31 
32 void
33 nvme_ctrlr_cmd_identify_controller(struct nvme_controller *ctrlr, void *payload,
34 	nvme_cb_fn_t cb_fn, void *cb_arg)
35 {
36 	struct nvme_request *req;
37 	struct nvme_command *cmd;
38 
39 	req = nvme_allocate_request_vaddr(payload,
40 	    sizeof(struct nvme_controller_data), M_WAITOK, cb_fn, cb_arg);
41 
42 	cmd = &req->cmd;
43 	cmd->opc = NVME_OPC_IDENTIFY;
44 
45 	/*
46 	 * TODO: create an identify command data structure, which
47 	 *  includes this CNS bit in cdw10.
48 	 */
49 	cmd->cdw10 = htole32(1);
50 
51 	nvme_ctrlr_submit_admin_request(ctrlr, req);
52 }
53 
54 void
55 nvme_ctrlr_cmd_identify_namespace(struct nvme_controller *ctrlr, uint32_t nsid,
56 	void *payload, nvme_cb_fn_t cb_fn, void *cb_arg)
57 {
58 	struct nvme_request *req;
59 	struct nvme_command *cmd;
60 
61 	req = nvme_allocate_request_vaddr(payload,
62 	    sizeof(struct nvme_namespace_data), M_WAITOK, cb_fn, cb_arg);
63 
64 	cmd = &req->cmd;
65 	cmd->opc = NVME_OPC_IDENTIFY;
66 
67 	/*
68 	 * TODO: create an identify command data structure
69 	 */
70 	cmd->nsid = htole32(nsid);
71 
72 	nvme_ctrlr_submit_admin_request(ctrlr, req);
73 }
74 
75 void
76 nvme_ctrlr_cmd_create_io_cq(struct nvme_controller *ctrlr,
77     struct nvme_qpair *io_que, nvme_cb_fn_t cb_fn, void *cb_arg)
78 {
79 	struct nvme_request *req;
80 	struct nvme_command *cmd;
81 
82 	req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
83 
84 	cmd = &req->cmd;
85 	cmd->opc = NVME_OPC_CREATE_IO_CQ;
86 
87 	/*
88 	 * TODO: create a create io completion queue command data
89 	 *  structure.
90 	 */
91 	cmd->cdw10 = htole32(((io_que->num_entries-1) << 16) | io_que->id);
92 	cmd->cdw11 = htole32((io_que->vector << 16) |
93 	    NVME_CREATE_IO_CQ_IEN | NVME_CREATE_IO_CQ_PC);
94 	cmd->prp1 = htole64(io_que->cpl_bus_addr);
95 
96 	nvme_ctrlr_submit_admin_request(ctrlr, req);
97 }
98 
99 void
100 nvme_ctrlr_cmd_create_io_sq(struct nvme_controller *ctrlr,
101     struct nvme_qpair *io_que, nvme_cb_fn_t cb_fn, void *cb_arg)
102 {
103 	struct nvme_request *req;
104 	struct nvme_command *cmd;
105 
106 	req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
107 
108 	cmd = &req->cmd;
109 	cmd->opc = NVME_OPC_CREATE_IO_SQ;
110 
111 	/*
112 	 * TODO: create a create io submission queue command data
113 	 *  structure.
114 	 */
115 	cmd->cdw10 = htole32(((io_que->num_entries-1) << 16) | io_que->id);
116 	cmd->cdw11 = htole32((io_que->id << 16) |
117 	    NVMEF(NVME_CREATE_IO_SQ_QPRIO, NVME_QPRIO_MEDIUM) |
118 	    NVME_CREATE_IO_SQ_PC);
119 	cmd->prp1 = htole64(io_que->cmd_bus_addr);
120 
121 	nvme_ctrlr_submit_admin_request(ctrlr, req);
122 }
123 
124 void
125 nvme_ctrlr_cmd_delete_io_cq(struct nvme_controller *ctrlr,
126     struct nvme_qpair *io_que, nvme_cb_fn_t cb_fn, void *cb_arg)
127 {
128 	struct nvme_request *req;
129 	struct nvme_command *cmd;
130 
131 	req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
132 
133 	cmd = &req->cmd;
134 	cmd->opc = NVME_OPC_DELETE_IO_CQ;
135 
136 	/*
137 	 * TODO: create a delete io completion queue command data
138 	 *  structure.
139 	 */
140 	cmd->cdw10 = htole32(io_que->id);
141 
142 	nvme_ctrlr_submit_admin_request(ctrlr, req);
143 }
144 
145 void
146 nvme_ctrlr_cmd_delete_io_sq(struct nvme_controller *ctrlr,
147     struct nvme_qpair *io_que, nvme_cb_fn_t cb_fn, void *cb_arg)
148 {
149 	struct nvme_request *req;
150 	struct nvme_command *cmd;
151 
152 	req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
153 
154 	cmd = &req->cmd;
155 	cmd->opc = NVME_OPC_DELETE_IO_SQ;
156 
157 	/*
158 	 * TODO: create a delete io submission queue command data
159 	 *  structure.
160 	 */
161 	cmd->cdw10 = htole32(io_que->id);
162 
163 	nvme_ctrlr_submit_admin_request(ctrlr, req);
164 }
165 
166 void
167 nvme_ctrlr_cmd_set_feature(struct nvme_controller *ctrlr, uint8_t feature,
168     uint32_t cdw11, uint32_t cdw12, uint32_t cdw13, uint32_t cdw14,
169     uint32_t cdw15, void *payload, uint32_t payload_size,
170     nvme_cb_fn_t cb_fn, void *cb_arg)
171 {
172 	struct nvme_request *req;
173 	struct nvme_command *cmd;
174 
175 	if (payload != NULL)
176 		req = nvme_allocate_request_vaddr(payload, payload_size,
177 		    M_WAITOK, cb_fn, cb_arg);
178 	else
179 		req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
180 
181 	cmd = &req->cmd;
182 	cmd->opc = NVME_OPC_SET_FEATURES;
183 	cmd->cdw10 = htole32(feature);
184 	cmd->cdw11 = htole32(cdw11);
185 	cmd->cdw12 = htole32(cdw12);
186 	cmd->cdw13 = htole32(cdw13);
187 	cmd->cdw14 = htole32(cdw14);
188 	cmd->cdw15 = htole32(cdw15);
189 
190 	nvme_ctrlr_submit_admin_request(ctrlr, req);
191 }
192 
193 void
194 nvme_ctrlr_cmd_get_feature(struct nvme_controller *ctrlr, uint8_t feature,
195     uint32_t cdw11, void *payload, uint32_t payload_size,
196     nvme_cb_fn_t cb_fn, void *cb_arg)
197 {
198 	struct nvme_request *req;
199 	struct nvme_command *cmd;
200 
201 	if (payload != NULL)
202 		req = nvme_allocate_request_vaddr(payload, payload_size,
203 		    M_WAITOK, cb_fn, cb_arg);
204 	else
205 		req = nvme_allocate_request_null(M_WAITOK, cb_fn, cb_arg);
206 
207 	cmd = &req->cmd;
208 	cmd->opc = NVME_OPC_GET_FEATURES;
209 	cmd->cdw10 = htole32(feature);
210 	cmd->cdw11 = htole32(cdw11);
211 
212 	nvme_ctrlr_submit_admin_request(ctrlr, req);
213 }
214 
215 void
216 nvme_ctrlr_cmd_set_num_queues(struct nvme_controller *ctrlr,
217     uint32_t num_queues, nvme_cb_fn_t cb_fn, void *cb_arg)
218 {
219 	uint32_t cdw11;
220 
221 	cdw11 = ((num_queues - 1) << 16) | (num_queues - 1);
222 	nvme_ctrlr_cmd_set_feature(ctrlr, NVME_FEAT_NUMBER_OF_QUEUES, cdw11,
223 	    0, 0, 0, 0, NULL, 0, cb_fn, cb_arg);
224 }
225 
226 void
227 nvme_ctrlr_cmd_set_async_event_config(struct nvme_controller *ctrlr,
228     uint32_t state, nvme_cb_fn_t cb_fn, void *cb_arg)
229 {
230 	uint32_t cdw11;
231 
232 	cdw11 = state;
233 	nvme_ctrlr_cmd_set_feature(ctrlr,
234 	    NVME_FEAT_ASYNC_EVENT_CONFIGURATION, cdw11, 0, 0, 0, 0, NULL, 0,
235 	    cb_fn, cb_arg);
236 }
237 
238 void
239 nvme_ctrlr_cmd_set_interrupt_coalescing(struct nvme_controller *ctrlr,
240     uint32_t microseconds, uint32_t threshold, nvme_cb_fn_t cb_fn, void *cb_arg)
241 {
242 	uint32_t cdw11;
243 
244 	if ((microseconds/100) >= 0x100) {
245 		nvme_printf(ctrlr, "invalid coal time %d, disabling\n",
246 		    microseconds);
247 		microseconds = 0;
248 		threshold = 0;
249 	}
250 
251 	if (threshold >= 0x100) {
252 		nvme_printf(ctrlr, "invalid threshold %d, disabling\n",
253 		    threshold);
254 		threshold = 0;
255 		microseconds = 0;
256 	}
257 
258 	cdw11 = ((microseconds/100) << 8) | threshold;
259 	nvme_ctrlr_cmd_set_feature(ctrlr, NVME_FEAT_INTERRUPT_COALESCING, cdw11,
260 	    0, 0, 0, 0, NULL, 0, cb_fn, cb_arg);
261 }
262 
263 void
264 nvme_ctrlr_cmd_get_log_page(struct nvme_controller *ctrlr, uint8_t log_page,
265     uint32_t nsid, void *payload, uint32_t payload_size, nvme_cb_fn_t cb_fn,
266     void *cb_arg)
267 {
268 	struct nvme_request *req;
269 	struct nvme_command *cmd;
270 
271 	/*
272 	 * XXX-MJ this should be M_WAITOK but we might be called from AER
273 	 * completion processing, which is a non-sleepable context.
274 	 */
275 	req = nvme_allocate_request_vaddr(payload, payload_size,
276 	    M_NOWAIT, cb_fn, cb_arg);
277 
278 	cmd = &req->cmd;
279 	cmd->opc = NVME_OPC_GET_LOG_PAGE;
280 	cmd->nsid = htole32(nsid);
281 	cmd->cdw10 = ((payload_size/sizeof(uint32_t)) - 1) << 16;
282 	cmd->cdw10 |= log_page;
283 	cmd->cdw10 = htole32(cmd->cdw10);
284 
285 	nvme_ctrlr_submit_admin_request(ctrlr, req);
286 }
287 
288 void
289 nvme_ctrlr_cmd_get_error_page(struct nvme_controller *ctrlr,
290     struct nvme_error_information_entry *payload, uint32_t num_entries,
291     nvme_cb_fn_t cb_fn, void *cb_arg)
292 {
293 	KASSERT(num_entries > 0, ("%s called with num_entries==0\n", __func__));
294 
295 	/* Controller's error log page entries is 0-based. */
296 	KASSERT(num_entries <= (ctrlr->cdata.elpe + 1),
297 	    ("%s called with num_entries=%d but (elpe+1)=%d\n", __func__,
298 	    num_entries, ctrlr->cdata.elpe + 1));
299 
300 	if (num_entries > (ctrlr->cdata.elpe + 1))
301 		num_entries = ctrlr->cdata.elpe + 1;
302 
303 	nvme_ctrlr_cmd_get_log_page(ctrlr, NVME_LOG_ERROR,
304 	    NVME_GLOBAL_NAMESPACE_TAG, payload, sizeof(*payload) * num_entries,
305 	    cb_fn, cb_arg);
306 }
307 
308 void
309 nvme_ctrlr_cmd_get_health_information_page(struct nvme_controller *ctrlr,
310     uint32_t nsid, struct nvme_health_information_page *payload,
311     nvme_cb_fn_t cb_fn, void *cb_arg)
312 {
313 	nvme_ctrlr_cmd_get_log_page(ctrlr, NVME_LOG_HEALTH_INFORMATION,
314 	    nsid, payload, sizeof(*payload), cb_fn, cb_arg);
315 }
316 
317 void
318 nvme_ctrlr_cmd_get_firmware_page(struct nvme_controller *ctrlr,
319     struct nvme_firmware_page *payload, nvme_cb_fn_t cb_fn, void *cb_arg)
320 {
321 	nvme_ctrlr_cmd_get_log_page(ctrlr, NVME_LOG_FIRMWARE_SLOT,
322 	    NVME_GLOBAL_NAMESPACE_TAG, payload, sizeof(*payload), cb_fn,
323 	    cb_arg);
324 }
325 
326 void
327 nvme_ctrlr_cmd_abort(struct nvme_controller *ctrlr, uint16_t cid,
328     uint16_t sqid, nvme_cb_fn_t cb_fn, void *cb_arg)
329 {
330 	struct nvme_request *req;
331 	struct nvme_command *cmd;
332 
333 	/*
334 	 * XXX-MJ this should be M_WAITOK, we do reset from non-sleepable
335 	 * context and abort commands as part of that.
336 	 */
337 	req = nvme_allocate_request_null(M_NOWAIT, cb_fn, cb_arg);
338 
339 	cmd = &req->cmd;
340 	cmd->opc = NVME_OPC_ABORT;
341 	cmd->cdw10 = htole32((cid << 16) | sqid);
342 
343 	nvme_ctrlr_submit_admin_request(ctrlr, req);
344 }
345