xref: /freebsd/sys/dev/nvme/nvme.c (revision d2ce15bd43b3a1dcce08eecbff8d5d359946d972)
1 /*-
2  * Copyright (C) 2012 Intel Corporation
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/conf.h>
33 #include <sys/module.h>
34 
35 #include <vm/uma.h>
36 
37 #include <dev/pci/pcireg.h>
38 #include <dev/pci/pcivar.h>
39 
40 #include "nvme_private.h"
41 
42 struct nvme_consumer {
43 	uint32_t		id;
44 	nvme_cons_ns_fn_t	ns_fn;
45 	nvme_cons_ctrlr_fn_t	ctrlr_fn;
46 	nvme_cons_async_fn_t	async_fn;
47 	nvme_cons_fail_fn_t	fail_fn;
48 };
49 
50 struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS];
51 #define	INVALID_CONSUMER_ID	0xFFFF
52 
53 uma_zone_t	nvme_request_zone;
54 int32_t		nvme_retry_count;
55 
56 MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations");
57 
58 static int    nvme_probe(device_t);
59 static int    nvme_attach(device_t);
60 static int    nvme_detach(device_t);
61 static int    nvme_modevent(module_t mod, int type, void *arg);
62 
63 static devclass_t nvme_devclass;
64 
65 static device_method_t nvme_pci_methods[] = {
66 	/* Device interface */
67 	DEVMETHOD(device_probe,     nvme_probe),
68 	DEVMETHOD(device_attach,    nvme_attach),
69 	DEVMETHOD(device_detach,    nvme_detach),
70 	{ 0, 0 }
71 };
72 
73 static driver_t nvme_pci_driver = {
74 	"nvme",
75 	nvme_pci_methods,
76 	sizeof(struct nvme_controller),
77 };
78 
79 DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0);
80 MODULE_VERSION(nvme, 1);
81 
82 static struct _pcsid
83 {
84 	u_int32_t   type;
85 	const char  *desc;
86 } pci_ids[] = {
87 	{ 0x01118086,		"NVMe Controller"  },
88 	{ CHATHAM_PCI_ID,	"Chatham Prototype NVMe Controller"  },
89 	{ IDT32_PCI_ID,		"IDT NVMe Controller (32 channel)"  },
90 	{ IDT8_PCI_ID,		"IDT NVMe Controller (8 channel)" },
91 	{ 0x00000000,		NULL  }
92 };
93 
94 static int
95 nvme_probe (device_t device)
96 {
97 	struct _pcsid	*ep;
98 	u_int32_t	type;
99 
100 	type = pci_get_devid(device);
101 	ep = pci_ids;
102 
103 	while (ep->type && ep->type != type)
104 		++ep;
105 
106 	if (ep->desc) {
107 		device_set_desc(device, ep->desc);
108 		return (BUS_PROBE_DEFAULT);
109 	}
110 
111 #if defined(PCIS_STORAGE_NVM)
112 	if (pci_get_class(device)    == PCIC_STORAGE &&
113 	    pci_get_subclass(device) == PCIS_STORAGE_NVM &&
114 	    pci_get_progif(device)   == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) {
115 		device_set_desc(device, "Generic NVMe Device");
116 		return (BUS_PROBE_GENERIC);
117 	}
118 #endif
119 
120 	return (ENXIO);
121 }
122 
123 static void
124 nvme_init(void)
125 {
126 	uint32_t	i;
127 
128 	nvme_request_zone = uma_zcreate("nvme_request",
129 	    sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0);
130 
131 	for (i = 0; i < NVME_MAX_CONSUMERS; i++)
132 		nvme_consumer[i].id = INVALID_CONSUMER_ID;
133 }
134 
135 SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL);
136 
137 static void
138 nvme_uninit(void)
139 {
140 	uma_zdestroy(nvme_request_zone);
141 }
142 
143 SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL);
144 
145 static void
146 nvme_load(void)
147 {
148 }
149 
150 static void
151 nvme_unload(void)
152 {
153 }
154 
155 static void
156 nvme_shutdown(void)
157 {
158 	device_t		*devlist;
159 	struct nvme_controller	*ctrlr;
160 	union cc_register	cc;
161 	union csts_register	csts;
162 	int			dev, devcount;
163 
164 	if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
165 		return;
166 
167 	for (dev = 0; dev < devcount; dev++) {
168 		/*
169 		 * Only notify controller of shutdown when a real shutdown is
170 		 *  in process, not when a module unload occurs.  It seems at
171 		 *  least some controllers (Chatham at least) don't let you
172 		 *  re-enable the controller after shutdown notification has
173 		 *  been received.
174 		 */
175 		ctrlr = DEVICE2SOFTC(devlist[dev]);
176 		cc.raw = nvme_mmio_read_4(ctrlr, cc);
177 		cc.bits.shn = NVME_SHN_NORMAL;
178 		nvme_mmio_write_4(ctrlr, cc, cc.raw);
179 		csts.raw = nvme_mmio_read_4(ctrlr, csts);
180 		while (csts.bits.shst != NVME_SHST_COMPLETE) {
181 			DELAY(5);
182 			csts.raw = nvme_mmio_read_4(ctrlr, csts);
183 		}
184 	}
185 
186 	free(devlist, M_TEMP);
187 }
188 
189 static int
190 nvme_modevent(module_t mod, int type, void *arg)
191 {
192 
193 	switch (type) {
194 	case MOD_LOAD:
195 		nvme_load();
196 		break;
197 	case MOD_UNLOAD:
198 		nvme_unload();
199 		break;
200 	case MOD_SHUTDOWN:
201 		nvme_shutdown();
202 		break;
203 	default:
204 		break;
205 	}
206 
207 	return (0);
208 }
209 
210 void
211 nvme_dump_command(struct nvme_command *cmd)
212 {
213 	printf(
214 "opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n",
215 	    cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid,
216 	    cmd->rsvd2, cmd->rsvd3,
217 	    (uintmax_t)cmd->mptr, (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2,
218 	    cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
219 	    cmd->cdw15);
220 }
221 
222 void
223 nvme_dump_completion(struct nvme_completion *cpl)
224 {
225 	printf("cdw0:%08x sqhd:%04x sqid:%04x "
226 	    "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n",
227 	    cpl->cdw0, cpl->sqhd, cpl->sqid,
228 	    cpl->cid, cpl->status.p, cpl->status.sc, cpl->status.sct,
229 	    cpl->status.m, cpl->status.dnr);
230 }
231 
232 void
233 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
234 {
235 	struct nvme_tracker 	*tr = arg;
236 	uint32_t		cur_nseg;
237 
238 	KASSERT(error == 0, ("nvme_payload_map error != 0\n"));
239 
240 	/*
241 	 * Note that we specified PAGE_SIZE for alignment and max
242 	 *  segment size when creating the bus dma tags.  So here
243 	 *  we can safely just transfer each segment to its
244 	 *  associated PRP entry.
245 	 */
246 	tr->req->cmd.prp1 = seg[0].ds_addr;
247 
248 	if (nseg == 2) {
249 		tr->req->cmd.prp2 = seg[1].ds_addr;
250 	} else if (nseg > 2) {
251 		cur_nseg = 1;
252 		tr->req->cmd.prp2 = (uint64_t)tr->prp_bus_addr;
253 		while (cur_nseg < nseg) {
254 			tr->prp[cur_nseg-1] =
255 			    (uint64_t)seg[cur_nseg].ds_addr;
256 			cur_nseg++;
257 		}
258 	}
259 
260 	nvme_qpair_submit_tracker(tr->qpair, tr);
261 }
262 
263 static int
264 nvme_attach(device_t dev)
265 {
266 	struct nvme_controller	*ctrlr = DEVICE2SOFTC(dev);
267 	int			status;
268 
269 	status = nvme_ctrlr_construct(ctrlr, dev);
270 
271 	if (status != 0)
272 		return (status);
273 
274 	/*
275 	 * Reset controller twice to ensure we do a transition from cc.en==1
276 	 *  to cc.en==0.  This is because we don't really know what status
277 	 *  the controller was left in when boot handed off to OS.
278 	 */
279 	status = nvme_ctrlr_hw_reset(ctrlr);
280 	if (status != 0)
281 		return (status);
282 
283 	status = nvme_ctrlr_hw_reset(ctrlr);
284 	if (status != 0)
285 		return (status);
286 
287 	nvme_sysctl_initialize_ctrlr(ctrlr);
288 
289 	ctrlr->config_hook.ich_func = nvme_ctrlr_start_config_hook;
290 	ctrlr->config_hook.ich_arg = ctrlr;
291 
292 	config_intrhook_establish(&ctrlr->config_hook);
293 
294 	return (0);
295 }
296 
297 static int
298 nvme_detach (device_t dev)
299 {
300 	struct nvme_controller	*ctrlr = DEVICE2SOFTC(dev);
301 
302 	nvme_ctrlr_destruct(ctrlr, dev);
303 	return (0);
304 }
305 
306 static void
307 nvme_notify_consumer(struct nvme_consumer *cons)
308 {
309 	device_t		*devlist;
310 	struct nvme_controller	*ctrlr;
311 	struct nvme_namespace	*ns;
312 	void			*ctrlr_cookie;
313 	int			dev_idx, ns_idx, devcount;
314 
315 	if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
316 		return;
317 
318 	for (dev_idx = 0; dev_idx < devcount; dev_idx++) {
319 		ctrlr = DEVICE2SOFTC(devlist[dev_idx]);
320 		if (cons->ctrlr_fn != NULL)
321 			ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr);
322 		else
323 			ctrlr_cookie = NULL;
324 		ctrlr->cons_cookie[cons->id] = ctrlr_cookie;
325 		for (ns_idx = 0; ns_idx < ctrlr->cdata.nn; ns_idx++) {
326 			ns = &ctrlr->ns[ns_idx];
327 			if (cons->ns_fn != NULL)
328 				ns->cons_cookie[cons->id] =
329 				    (*cons->ns_fn)(ns, ctrlr_cookie);
330 		}
331 	}
332 
333 	free(devlist, M_TEMP);
334 }
335 
336 void
337 nvme_notify_async_consumers(struct nvme_controller *ctrlr,
338 			    const struct nvme_completion *async_cpl,
339 			    uint32_t log_page_id, void *log_page_buffer,
340 			    uint32_t log_page_size)
341 {
342 	struct nvme_consumer	*cons;
343 	uint32_t		i;
344 
345 	for (i = 0; i < NVME_MAX_CONSUMERS; i++) {
346 		cons = &nvme_consumer[i];
347 		if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL)
348 			(*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl,
349 			    log_page_id, log_page_buffer, log_page_size);
350 	}
351 }
352 
353 void
354 nvme_notify_fail_consumers(struct nvme_controller *ctrlr)
355 {
356 	struct nvme_consumer	*cons;
357 	uint32_t		i;
358 
359 	for (i = 0; i < NVME_MAX_CONSUMERS; i++) {
360 		cons = &nvme_consumer[i];
361 		if (cons->id != INVALID_CONSUMER_ID && cons->fail_fn != NULL)
362 			cons->fail_fn(ctrlr->cons_cookie[i]);
363 	}
364 }
365 
366 struct nvme_consumer *
367 nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn,
368 		       nvme_cons_async_fn_t async_fn,
369 		       nvme_cons_fail_fn_t fail_fn)
370 {
371 	int i;
372 
373 	/*
374 	 * TODO: add locking around consumer registration.  Not an issue
375 	 *  right now since we only have one nvme consumer - nvd(4).
376 	 */
377 	for (i = 0; i < NVME_MAX_CONSUMERS; i++)
378 		if (nvme_consumer[i].id == INVALID_CONSUMER_ID) {
379 			nvme_consumer[i].id = i;
380 			nvme_consumer[i].ns_fn = ns_fn;
381 			nvme_consumer[i].ctrlr_fn = ctrlr_fn;
382 			nvme_consumer[i].async_fn = async_fn;
383 			nvme_consumer[i].fail_fn = fail_fn;
384 
385 			nvme_notify_consumer(&nvme_consumer[i]);
386 			return (&nvme_consumer[i]);
387 		}
388 
389 	printf("nvme(4): consumer not registered - no slots available\n");
390 	return (NULL);
391 }
392 
393 void
394 nvme_unregister_consumer(struct nvme_consumer *consumer)
395 {
396 
397 	consumer->id = INVALID_CONSUMER_ID;
398 }
399 
400 void
401 nvme_completion_poll_cb(void *arg, const struct nvme_completion *cpl)
402 {
403 	struct nvme_completion_poll_status	*status = arg;
404 
405 	/*
406 	 * Copy status into the argument passed by the caller, so that
407 	 *  the caller can check the status to determine if the
408 	 *  the request passed or failed.
409 	 */
410 	memcpy(&status->cpl, cpl, sizeof(*cpl));
411 	wmb();
412 	status->done = TRUE;
413 }
414 
415