1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012-2014 Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/module.h> 36 37 #include <vm/uma.h> 38 39 #include <dev/pci/pcireg.h> 40 #include <dev/pci/pcivar.h> 41 42 #include "nvme_private.h" 43 44 struct nvme_consumer { 45 uint32_t id; 46 nvme_cons_ns_fn_t ns_fn; 47 nvme_cons_ctrlr_fn_t ctrlr_fn; 48 nvme_cons_async_fn_t async_fn; 49 nvme_cons_fail_fn_t fail_fn; 50 }; 51 52 struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS]; 53 #define INVALID_CONSUMER_ID 0xFFFF 54 55 uma_zone_t nvme_request_zone; 56 int32_t nvme_retry_count; 57 58 MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations"); 59 60 static int nvme_probe(device_t); 61 static int nvme_attach(device_t); 62 static int nvme_detach(device_t); 63 static int nvme_shutdown(device_t); 64 static int nvme_modevent(module_t mod, int type, void *arg); 65 66 static devclass_t nvme_devclass; 67 68 static device_method_t nvme_pci_methods[] = { 69 /* Device interface */ 70 DEVMETHOD(device_probe, nvme_probe), 71 DEVMETHOD(device_attach, nvme_attach), 72 DEVMETHOD(device_detach, nvme_detach), 73 DEVMETHOD(device_shutdown, nvme_shutdown), 74 { 0, 0 } 75 }; 76 77 static driver_t nvme_pci_driver = { 78 "nvme", 79 nvme_pci_methods, 80 sizeof(struct nvme_controller), 81 }; 82 83 DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0); 84 MODULE_VERSION(nvme, 1); 85 MODULE_DEPEND(nvme, cam, 1, 1, 1); 86 87 static struct _pcsid 88 { 89 uint32_t devid; 90 int match_subdevice; 91 uint16_t subdevice; 92 const char *desc; 93 uint32_t quirks; 94 } pci_ids[] = { 95 { 0x01118086, 0, 0, "NVMe Controller" }, 96 { IDT32_PCI_ID, 0, 0, "IDT NVMe Controller (32 channel)" }, 97 { IDT8_PCI_ID, 0, 0, "IDT NVMe Controller (8 channel)" }, 98 { 0x09538086, 1, 0x3702, "DC P3700 SSD" }, 99 { 0x09538086, 1, 0x3703, "DC P3700 SSD [2.5\" SFF]" }, 100 { 0x09538086, 1, 0x3704, "DC P3500 SSD [Add-in Card]" }, 101 { 0x09538086, 1, 0x3705, "DC P3500 SSD [2.5\" SFF]" }, 102 { 0x09538086, 1, 0x3709, "DC P3600 SSD [Add-in Card]" }, 103 { 0x09538086, 1, 0x370a, "DC P3600 SSD [2.5\" SFF]" }, 104 { 0x00031c58, 0, 0, "HGST SN100", QUIRK_DELAY_B4_CHK_RDY }, 105 { 0x00231c58, 0, 0, "WDC SN200", QUIRK_DELAY_B4_CHK_RDY }, 106 { 0x05401c5f, 0, 0, "Memblaze Pblaze4", QUIRK_DELAY_B4_CHK_RDY }, 107 { 0xa821144d, 0, 0, "Samsung PM1725", QUIRK_DELAY_B4_CHK_RDY }, 108 { 0xa822144d, 0, 0, "Samsung PM1725a", QUIRK_DELAY_B4_CHK_RDY }, 109 { 0x00000000, 0, 0, NULL } 110 }; 111 112 static int 113 nvme_match(uint32_t devid, uint16_t subdevice, struct _pcsid *ep) 114 { 115 if (devid != ep->devid) 116 return 0; 117 118 if (!ep->match_subdevice) 119 return 1; 120 121 if (subdevice == ep->subdevice) 122 return 1; 123 else 124 return 0; 125 } 126 127 static int 128 nvme_probe (device_t device) 129 { 130 struct _pcsid *ep; 131 uint32_t devid; 132 uint16_t subdevice; 133 134 devid = pci_get_devid(device); 135 subdevice = pci_get_subdevice(device); 136 ep = pci_ids; 137 138 while (ep->devid) { 139 if (nvme_match(devid, subdevice, ep)) 140 break; 141 ++ep; 142 } 143 144 if (ep->desc) { 145 device_set_desc(device, ep->desc); 146 return (BUS_PROBE_DEFAULT); 147 } 148 149 #if defined(PCIS_STORAGE_NVM) 150 if (pci_get_class(device) == PCIC_STORAGE && 151 pci_get_subclass(device) == PCIS_STORAGE_NVM && 152 pci_get_progif(device) == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) { 153 device_set_desc(device, "Generic NVMe Device"); 154 return (BUS_PROBE_GENERIC); 155 } 156 #endif 157 158 return (ENXIO); 159 } 160 161 static void 162 nvme_init(void) 163 { 164 uint32_t i; 165 166 nvme_request_zone = uma_zcreate("nvme_request", 167 sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0); 168 169 for (i = 0; i < NVME_MAX_CONSUMERS; i++) 170 nvme_consumer[i].id = INVALID_CONSUMER_ID; 171 } 172 173 SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL); 174 175 static void 176 nvme_uninit(void) 177 { 178 uma_zdestroy(nvme_request_zone); 179 } 180 181 SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL); 182 183 static void 184 nvme_load(void) 185 { 186 } 187 188 static void 189 nvme_unload(void) 190 { 191 } 192 193 static int 194 nvme_shutdown(device_t dev) 195 { 196 struct nvme_controller *ctrlr; 197 198 ctrlr = DEVICE2SOFTC(dev); 199 nvme_ctrlr_shutdown(ctrlr); 200 201 return (0); 202 } 203 204 static int 205 nvme_modevent(module_t mod, int type, void *arg) 206 { 207 208 switch (type) { 209 case MOD_LOAD: 210 nvme_load(); 211 break; 212 case MOD_UNLOAD: 213 nvme_unload(); 214 break; 215 default: 216 break; 217 } 218 219 return (0); 220 } 221 222 void 223 nvme_dump_command(struct nvme_command *cmd) 224 { 225 uint8_t opc, fuse; 226 227 opc = (cmd->opc_fuse >> NVME_CMD_OPC_SHIFT) & NVME_CMD_OPC_MASK; 228 fuse = (cmd->opc_fuse >> NVME_CMD_FUSE_SHIFT) & NVME_CMD_FUSE_MASK; 229 230 printf( 231 "opc:%x f:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n", 232 opc, fuse, cmd->cid, le32toh(cmd->nsid), 233 cmd->rsvd2, cmd->rsvd3, 234 (uintmax_t)le64toh(cmd->mptr), (uintmax_t)le64toh(cmd->prp1), (uintmax_t)le64toh(cmd->prp2), 235 le32toh(cmd->cdw10), le32toh(cmd->cdw11), le32toh(cmd->cdw12), 236 le32toh(cmd->cdw13), le32toh(cmd->cdw14), le32toh(cmd->cdw15)); 237 } 238 239 void 240 nvme_dump_completion(struct nvme_completion *cpl) 241 { 242 uint8_t p, sc, sct, m, dnr; 243 uint16_t status; 244 245 status = le16toh(cpl->status); 246 247 p = NVME_STATUS_GET_P(status); 248 sc = NVME_STATUS_GET_SC(status); 249 sct = NVME_STATUS_GET_SCT(status); 250 m = NVME_STATUS_GET_M(status); 251 dnr = NVME_STATUS_GET_DNR(status); 252 253 printf("cdw0:%08x sqhd:%04x sqid:%04x " 254 "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n", 255 le32toh(cpl->cdw0), le16toh(cpl->sqhd), le16toh(cpl->sqid), 256 cpl->cid, p, sc, sct, m, dnr); 257 } 258 259 static int 260 nvme_attach(device_t dev) 261 { 262 struct nvme_controller *ctrlr = DEVICE2SOFTC(dev); 263 int status; 264 struct _pcsid *ep; 265 uint32_t devid; 266 uint16_t subdevice; 267 268 devid = pci_get_devid(dev); 269 subdevice = pci_get_subdevice(dev); 270 ep = pci_ids; 271 while (ep->devid) { 272 if (nvme_match(devid, subdevice, ep)) 273 break; 274 ++ep; 275 } 276 ctrlr->quirks = ep->quirks; 277 278 status = nvme_ctrlr_construct(ctrlr, dev); 279 280 if (status != 0) { 281 nvme_ctrlr_destruct(ctrlr, dev); 282 return (status); 283 } 284 285 /* 286 * Enable busmastering so the completion status messages can 287 * be busmastered back to the host. 288 */ 289 pci_enable_busmaster(dev); 290 291 /* 292 * Reset controller twice to ensure we do a transition from cc.en==1 293 * to cc.en==0. This is because we don't really know what status 294 * the controller was left in when boot handed off to OS. 295 */ 296 status = nvme_ctrlr_hw_reset(ctrlr); 297 if (status != 0) { 298 nvme_ctrlr_destruct(ctrlr, dev); 299 return (status); 300 } 301 302 status = nvme_ctrlr_hw_reset(ctrlr); 303 if (status != 0) { 304 nvme_ctrlr_destruct(ctrlr, dev); 305 return (status); 306 } 307 308 ctrlr->config_hook.ich_func = nvme_ctrlr_start_config_hook; 309 ctrlr->config_hook.ich_arg = ctrlr; 310 311 config_intrhook_establish(&ctrlr->config_hook); 312 313 return (0); 314 } 315 316 static int 317 nvme_detach (device_t dev) 318 { 319 struct nvme_controller *ctrlr = DEVICE2SOFTC(dev); 320 321 nvme_ctrlr_destruct(ctrlr, dev); 322 pci_disable_busmaster(dev); 323 return (0); 324 } 325 326 static void 327 nvme_notify(struct nvme_consumer *cons, 328 struct nvme_controller *ctrlr) 329 { 330 struct nvme_namespace *ns; 331 void *ctrlr_cookie; 332 int cmpset, ns_idx; 333 334 /* 335 * The consumer may register itself after the nvme devices 336 * have registered with the kernel, but before the 337 * driver has completed initialization. In that case, 338 * return here, and when initialization completes, the 339 * controller will make sure the consumer gets notified. 340 */ 341 if (!ctrlr->is_initialized) 342 return; 343 344 cmpset = atomic_cmpset_32(&ctrlr->notification_sent, 0, 1); 345 346 if (cmpset == 0) 347 return; 348 349 if (cons->ctrlr_fn != NULL) 350 ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr); 351 else 352 ctrlr_cookie = NULL; 353 ctrlr->cons_cookie[cons->id] = ctrlr_cookie; 354 if (ctrlr->is_failed) { 355 if (cons->fail_fn != NULL) 356 (*cons->fail_fn)(ctrlr_cookie); 357 /* 358 * Do not notify consumers about the namespaces of a 359 * failed controller. 360 */ 361 return; 362 } 363 for (ns_idx = 0; ns_idx < min(ctrlr->cdata.nn, NVME_MAX_NAMESPACES); ns_idx++) { 364 ns = &ctrlr->ns[ns_idx]; 365 if (ns->data.nsze == 0) 366 continue; 367 if (cons->ns_fn != NULL) 368 ns->cons_cookie[cons->id] = 369 (*cons->ns_fn)(ns, ctrlr_cookie); 370 } 371 } 372 373 void 374 nvme_notify_new_controller(struct nvme_controller *ctrlr) 375 { 376 int i; 377 378 for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 379 if (nvme_consumer[i].id != INVALID_CONSUMER_ID) { 380 nvme_notify(&nvme_consumer[i], ctrlr); 381 } 382 } 383 } 384 385 static void 386 nvme_notify_new_consumer(struct nvme_consumer *cons) 387 { 388 device_t *devlist; 389 struct nvme_controller *ctrlr; 390 int dev_idx, devcount; 391 392 if (devclass_get_devices(nvme_devclass, &devlist, &devcount)) 393 return; 394 395 for (dev_idx = 0; dev_idx < devcount; dev_idx++) { 396 ctrlr = DEVICE2SOFTC(devlist[dev_idx]); 397 nvme_notify(cons, ctrlr); 398 } 399 400 free(devlist, M_TEMP); 401 } 402 403 void 404 nvme_notify_async_consumers(struct nvme_controller *ctrlr, 405 const struct nvme_completion *async_cpl, 406 uint32_t log_page_id, void *log_page_buffer, 407 uint32_t log_page_size) 408 { 409 struct nvme_consumer *cons; 410 uint32_t i; 411 412 for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 413 cons = &nvme_consumer[i]; 414 if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL) 415 (*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl, 416 log_page_id, log_page_buffer, log_page_size); 417 } 418 } 419 420 void 421 nvme_notify_fail_consumers(struct nvme_controller *ctrlr) 422 { 423 struct nvme_consumer *cons; 424 uint32_t i; 425 426 /* 427 * This controller failed during initialization (i.e. IDENTIFY 428 * command failed or timed out). Do not notify any nvme 429 * consumers of the failure here, since the consumer does not 430 * even know about the controller yet. 431 */ 432 if (!ctrlr->is_initialized) 433 return; 434 435 for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 436 cons = &nvme_consumer[i]; 437 if (cons->id != INVALID_CONSUMER_ID && cons->fail_fn != NULL) 438 cons->fail_fn(ctrlr->cons_cookie[i]); 439 } 440 } 441 442 void 443 nvme_notify_ns(struct nvme_controller *ctrlr, int nsid) 444 { 445 struct nvme_consumer *cons; 446 struct nvme_namespace *ns = &ctrlr->ns[nsid - 1]; 447 uint32_t i; 448 449 if (!ctrlr->is_initialized) 450 return; 451 452 for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 453 cons = &nvme_consumer[i]; 454 if (cons->id != INVALID_CONSUMER_ID && cons->ns_fn != NULL) 455 ns->cons_cookie[cons->id] = 456 (*cons->ns_fn)(ns, ctrlr->cons_cookie[cons->id]); 457 } 458 } 459 460 struct nvme_consumer * 461 nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn, 462 nvme_cons_async_fn_t async_fn, 463 nvme_cons_fail_fn_t fail_fn) 464 { 465 int i; 466 467 /* 468 * TODO: add locking around consumer registration. Not an issue 469 * right now since we only have one nvme consumer - nvd(4). 470 */ 471 for (i = 0; i < NVME_MAX_CONSUMERS; i++) 472 if (nvme_consumer[i].id == INVALID_CONSUMER_ID) { 473 nvme_consumer[i].id = i; 474 nvme_consumer[i].ns_fn = ns_fn; 475 nvme_consumer[i].ctrlr_fn = ctrlr_fn; 476 nvme_consumer[i].async_fn = async_fn; 477 nvme_consumer[i].fail_fn = fail_fn; 478 479 nvme_notify_new_consumer(&nvme_consumer[i]); 480 return (&nvme_consumer[i]); 481 } 482 483 printf("nvme(4): consumer not registered - no slots available\n"); 484 return (NULL); 485 } 486 487 void 488 nvme_unregister_consumer(struct nvme_consumer *consumer) 489 { 490 491 consumer->id = INVALID_CONSUMER_ID; 492 } 493 494 void 495 nvme_completion_poll_cb(void *arg, const struct nvme_completion *cpl) 496 { 497 struct nvme_completion_poll_status *status = arg; 498 499 /* 500 * Copy status into the argument passed by the caller, so that 501 * the caller can check the status to determine if the 502 * the request passed or failed. 503 */ 504 memcpy(&status->cpl, cpl, sizeof(*cpl)); 505 atomic_store_rel_int(&status->done, 1); 506 } 507