1bb0ec6b3SJim Harris /*- 2bb0ec6b3SJim Harris * Copyright (C) 2012 Intel Corporation 3bb0ec6b3SJim Harris * All rights reserved. 4bb0ec6b3SJim Harris * 5bb0ec6b3SJim Harris * Redistribution and use in source and binary forms, with or without 6bb0ec6b3SJim Harris * modification, are permitted provided that the following conditions 7bb0ec6b3SJim Harris * are met: 8bb0ec6b3SJim Harris * 1. Redistributions of source code must retain the above copyright 9bb0ec6b3SJim Harris * notice, this list of conditions and the following disclaimer. 10bb0ec6b3SJim Harris * 2. Redistributions in binary form must reproduce the above copyright 11bb0ec6b3SJim Harris * notice, this list of conditions and the following disclaimer in the 12bb0ec6b3SJim Harris * documentation and/or other materials provided with the distribution. 13bb0ec6b3SJim Harris * 14bb0ec6b3SJim Harris * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15bb0ec6b3SJim Harris * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16bb0ec6b3SJim Harris * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17bb0ec6b3SJim Harris * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18bb0ec6b3SJim Harris * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19bb0ec6b3SJim Harris * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20bb0ec6b3SJim Harris * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21bb0ec6b3SJim Harris * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22bb0ec6b3SJim Harris * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23bb0ec6b3SJim Harris * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24bb0ec6b3SJim Harris * SUCH DAMAGE. 25bb0ec6b3SJim Harris */ 26bb0ec6b3SJim Harris 27bb0ec6b3SJim Harris #include <sys/cdefs.h> 28bb0ec6b3SJim Harris __FBSDID("$FreeBSD$"); 29bb0ec6b3SJim Harris 30bb0ec6b3SJim Harris #include <sys/param.h> 31bb0ec6b3SJim Harris #include <sys/bus.h> 32bb0ec6b3SJim Harris #include <sys/conf.h> 33bb0ec6b3SJim Harris #include <sys/module.h> 34bb0ec6b3SJim Harris 35ad697276SJim Harris #include <vm/uma.h> 36ad697276SJim Harris 37d891b199SJim Harris #include <dev/pci/pcireg.h> 38bb0ec6b3SJim Harris #include <dev/pci/pcivar.h> 39bb0ec6b3SJim Harris 40bb0ec6b3SJim Harris #include "nvme_private.h" 41bb0ec6b3SJim Harris 42bb0ec6b3SJim Harris struct nvme_consumer { 43038a5ee4SJim Harris uint32_t id; 44038a5ee4SJim Harris nvme_cons_ns_fn_t ns_fn; 45038a5ee4SJim Harris nvme_cons_ctrlr_fn_t ctrlr_fn; 46038a5ee4SJim Harris nvme_cons_async_fn_t async_fn; 47bb0ec6b3SJim Harris }; 48bb0ec6b3SJim Harris 49bb0ec6b3SJim Harris struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS]; 50038a5ee4SJim Harris #define INVALID_CONSUMER_ID 0xFFFF 51bb0ec6b3SJim Harris 52ad697276SJim Harris uma_zone_t nvme_request_zone; 53*cb5b7c13SJim Harris int32_t nvme_retry_count; 54ad697276SJim Harris 55bb0ec6b3SJim Harris MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations"); 56bb0ec6b3SJim Harris 57bb0ec6b3SJim Harris static int nvme_probe(device_t); 58bb0ec6b3SJim Harris static int nvme_attach(device_t); 59bb0ec6b3SJim Harris static int nvme_detach(device_t); 60e1e84e74SJim Harris static int nvme_modevent(module_t mod, int type, void *arg); 61bb0ec6b3SJim Harris 62bb0ec6b3SJim Harris static devclass_t nvme_devclass; 63bb0ec6b3SJim Harris 64bb0ec6b3SJim Harris static device_method_t nvme_pci_methods[] = { 65bb0ec6b3SJim Harris /* Device interface */ 66bb0ec6b3SJim Harris DEVMETHOD(device_probe, nvme_probe), 67bb0ec6b3SJim Harris DEVMETHOD(device_attach, nvme_attach), 68bb0ec6b3SJim Harris DEVMETHOD(device_detach, nvme_detach), 69bb0ec6b3SJim Harris { 0, 0 } 70bb0ec6b3SJim Harris }; 71bb0ec6b3SJim Harris 72bb0ec6b3SJim Harris static driver_t nvme_pci_driver = { 73bb0ec6b3SJim Harris "nvme", 74bb0ec6b3SJim Harris nvme_pci_methods, 75bb0ec6b3SJim Harris sizeof(struct nvme_controller), 76bb0ec6b3SJim Harris }; 77bb0ec6b3SJim Harris 78e1e84e74SJim Harris DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0); 79bb0ec6b3SJim Harris MODULE_VERSION(nvme, 1); 80bb0ec6b3SJim Harris 81bb0ec6b3SJim Harris static struct _pcsid 82bb0ec6b3SJim Harris { 83bb0ec6b3SJim Harris u_int32_t type; 84bb0ec6b3SJim Harris const char *desc; 85bb0ec6b3SJim Harris } pci_ids[] = { 86bb0ec6b3SJim Harris { 0x01118086, "NVMe Controller" }, 87bb0ec6b3SJim Harris { CHATHAM_PCI_ID, "Chatham Prototype NVMe Controller" }, 8838ce9496SJim Harris { IDT32_PCI_ID, "IDT NVMe Controller (32 channel)" }, 8938ce9496SJim Harris { IDT8_PCI_ID, "IDT NVMe Controller (8 channel)" }, 90bb0ec6b3SJim Harris { 0x00000000, NULL } 91bb0ec6b3SJim Harris }; 92bb0ec6b3SJim Harris 93bb0ec6b3SJim Harris static int 94bb0ec6b3SJim Harris nvme_probe (device_t device) 95bb0ec6b3SJim Harris { 96d891b199SJim Harris struct _pcsid *ep; 97d891b199SJim Harris u_int32_t type; 98d891b199SJim Harris 99d891b199SJim Harris type = pci_get_devid(device); 100d891b199SJim Harris ep = pci_ids; 101d891b199SJim Harris 102bb0ec6b3SJim Harris while (ep->type && ep->type != type) 103bb0ec6b3SJim Harris ++ep; 104bb0ec6b3SJim Harris 105bb0ec6b3SJim Harris if (ep->desc) { 106bb0ec6b3SJim Harris device_set_desc(device, ep->desc); 1077e2fd606SJim Harris return (BUS_PROBE_DEFAULT); 108d891b199SJim Harris } 109d891b199SJim Harris 1107e2fd606SJim Harris #if defined(PCIS_STORAGE_NVM) 1117e2fd606SJim Harris if (pci_get_class(device) == PCIC_STORAGE && 1127e2fd606SJim Harris pci_get_subclass(device) == PCIS_STORAGE_NVM && 1137e2fd606SJim Harris pci_get_progif(device) == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) { 1147e2fd606SJim Harris device_set_desc(device, "Generic NVMe Device"); 1157e2fd606SJim Harris return (BUS_PROBE_GENERIC); 1167e2fd606SJim Harris } 1177e2fd606SJim Harris #endif 1187e2fd606SJim Harris 1197e2fd606SJim Harris return (ENXIO); 120bb0ec6b3SJim Harris } 121bb0ec6b3SJim Harris 122bb0ec6b3SJim Harris static void 123ad697276SJim Harris nvme_init(void) 124ad697276SJim Harris { 125038a5ee4SJim Harris uint32_t i; 126038a5ee4SJim Harris 127ad697276SJim Harris nvme_request_zone = uma_zcreate("nvme_request", 128ad697276SJim Harris sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0); 129038a5ee4SJim Harris 130038a5ee4SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) 131038a5ee4SJim Harris nvme_consumer[i].id = INVALID_CONSUMER_ID; 132ad697276SJim Harris } 133ad697276SJim Harris 134ad697276SJim Harris SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL); 135ad697276SJim Harris 136ad697276SJim Harris static void 137ad697276SJim Harris nvme_uninit(void) 138ad697276SJim Harris { 139ad697276SJim Harris uma_zdestroy(nvme_request_zone); 140ad697276SJim Harris } 141ad697276SJim Harris 142ad697276SJim Harris SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL); 143ad697276SJim Harris 144ad697276SJim Harris static void 145bb0ec6b3SJim Harris nvme_load(void) 146bb0ec6b3SJim Harris { 147bb0ec6b3SJim Harris } 148bb0ec6b3SJim Harris 149bb0ec6b3SJim Harris static void 150bb0ec6b3SJim Harris nvme_unload(void) 151bb0ec6b3SJim Harris { 152bb0ec6b3SJim Harris } 153bb0ec6b3SJim Harris 154bb0ec6b3SJim Harris static void 155bb0ec6b3SJim Harris nvme_shutdown(void) 156bb0ec6b3SJim Harris { 157bb0ec6b3SJim Harris device_t *devlist; 158bb0ec6b3SJim Harris struct nvme_controller *ctrlr; 159bb0ec6b3SJim Harris union cc_register cc; 160bb0ec6b3SJim Harris union csts_register csts; 161bb0ec6b3SJim Harris int dev, devcount; 162bb0ec6b3SJim Harris 163bb0ec6b3SJim Harris if (devclass_get_devices(nvme_devclass, &devlist, &devcount)) 164bb0ec6b3SJim Harris return; 165bb0ec6b3SJim Harris 166bb0ec6b3SJim Harris for (dev = 0; dev < devcount; dev++) { 167bb0ec6b3SJim Harris /* 168bb0ec6b3SJim Harris * Only notify controller of shutdown when a real shutdown is 169bb0ec6b3SJim Harris * in process, not when a module unload occurs. It seems at 170bb0ec6b3SJim Harris * least some controllers (Chatham at least) don't let you 171bb0ec6b3SJim Harris * re-enable the controller after shutdown notification has 172bb0ec6b3SJim Harris * been received. 173bb0ec6b3SJim Harris */ 174bb0ec6b3SJim Harris ctrlr = DEVICE2SOFTC(devlist[dev]); 175bb0ec6b3SJim Harris cc.raw = nvme_mmio_read_4(ctrlr, cc); 176bb0ec6b3SJim Harris cc.bits.shn = NVME_SHN_NORMAL; 177bb0ec6b3SJim Harris nvme_mmio_write_4(ctrlr, cc, cc.raw); 178bb0ec6b3SJim Harris csts.raw = nvme_mmio_read_4(ctrlr, csts); 179bb0ec6b3SJim Harris while (csts.bits.shst != NVME_SHST_COMPLETE) { 180bb0ec6b3SJim Harris DELAY(5); 181bb0ec6b3SJim Harris csts.raw = nvme_mmio_read_4(ctrlr, csts); 182bb0ec6b3SJim Harris } 183bb0ec6b3SJim Harris } 184bb0ec6b3SJim Harris 185bb0ec6b3SJim Harris free(devlist, M_TEMP); 186bb0ec6b3SJim Harris } 187bb0ec6b3SJim Harris 188bb0ec6b3SJim Harris static int 189bb0ec6b3SJim Harris nvme_modevent(module_t mod, int type, void *arg) 190bb0ec6b3SJim Harris { 191bb0ec6b3SJim Harris 192bb0ec6b3SJim Harris switch (type) { 193bb0ec6b3SJim Harris case MOD_LOAD: 194bb0ec6b3SJim Harris nvme_load(); 195bb0ec6b3SJim Harris break; 196bb0ec6b3SJim Harris case MOD_UNLOAD: 197bb0ec6b3SJim Harris nvme_unload(); 198bb0ec6b3SJim Harris break; 199bb0ec6b3SJim Harris case MOD_SHUTDOWN: 200bb0ec6b3SJim Harris nvme_shutdown(); 201bb0ec6b3SJim Harris break; 202bb0ec6b3SJim Harris default: 203bb0ec6b3SJim Harris break; 204bb0ec6b3SJim Harris } 205bb0ec6b3SJim Harris 206bb0ec6b3SJim Harris return (0); 207bb0ec6b3SJim Harris } 208bb0ec6b3SJim Harris 209bb0ec6b3SJim Harris void 210bb0ec6b3SJim Harris nvme_dump_command(struct nvme_command *cmd) 211bb0ec6b3SJim Harris { 2124b52061eSDavid E. O'Brien printf( 2134b52061eSDavid E. O'Brien "opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n", 214bb0ec6b3SJim Harris cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid, 215bb0ec6b3SJim Harris cmd->rsvd2, cmd->rsvd3, 2164b52061eSDavid E. O'Brien (uintmax_t)cmd->mptr, (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2, 217bb0ec6b3SJim Harris cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14, 218bb0ec6b3SJim Harris cmd->cdw15); 219bb0ec6b3SJim Harris } 220bb0ec6b3SJim Harris 221bb0ec6b3SJim Harris void 222bb0ec6b3SJim Harris nvme_dump_completion(struct nvme_completion *cpl) 223bb0ec6b3SJim Harris { 224bb0ec6b3SJim Harris printf("cdw0:%08x sqhd:%04x sqid:%04x " 225bb0ec6b3SJim Harris "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n", 226bb0ec6b3SJim Harris cpl->cdw0, cpl->sqhd, cpl->sqid, 227cf81529cSJim Harris cpl->cid, cpl->status.p, cpl->status.sc, cpl->status.sct, 228cf81529cSJim Harris cpl->status.m, cpl->status.dnr); 229bb0ec6b3SJim Harris } 230bb0ec6b3SJim Harris 231bb0ec6b3SJim Harris void 232bb0ec6b3SJim Harris nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error) 233bb0ec6b3SJim Harris { 2345fa5cc5fSJim Harris struct nvme_tracker *tr = arg; 235bb0ec6b3SJim Harris uint32_t cur_nseg; 236bb0ec6b3SJim Harris 237bb0ec6b3SJim Harris KASSERT(error == 0, ("nvme_payload_map error != 0\n")); 238bb0ec6b3SJim Harris 239bb0ec6b3SJim Harris /* 240bb0ec6b3SJim Harris * Note that we specified PAGE_SIZE for alignment and max 241bb0ec6b3SJim Harris * segment size when creating the bus dma tags. So here 242bb0ec6b3SJim Harris * we can safely just transfer each segment to its 243bb0ec6b3SJim Harris * associated PRP entry. 244bb0ec6b3SJim Harris */ 245ad697276SJim Harris tr->req->cmd.prp1 = seg[0].ds_addr; 246bb0ec6b3SJim Harris 247bb0ec6b3SJim Harris if (nseg == 2) { 248ad697276SJim Harris tr->req->cmd.prp2 = seg[1].ds_addr; 249bb0ec6b3SJim Harris } else if (nseg > 2) { 250bb0ec6b3SJim Harris cur_nseg = 1; 251ad697276SJim Harris tr->req->cmd.prp2 = (uint64_t)tr->prp_bus_addr; 252bb0ec6b3SJim Harris while (cur_nseg < nseg) { 253f2b19f67SJim Harris tr->prp[cur_nseg-1] = 254bb0ec6b3SJim Harris (uint64_t)seg[cur_nseg].ds_addr; 255bb0ec6b3SJim Harris cur_nseg++; 256bb0ec6b3SJim Harris } 257bb0ec6b3SJim Harris } 258bb0ec6b3SJim Harris 259b846efd7SJim Harris nvme_qpair_submit_tracker(tr->qpair, tr); 260bb0ec6b3SJim Harris } 261bb0ec6b3SJim Harris 262bb0ec6b3SJim Harris static int 263bb0ec6b3SJim Harris nvme_attach(device_t dev) 264bb0ec6b3SJim Harris { 265bb0ec6b3SJim Harris struct nvme_controller *ctrlr = DEVICE2SOFTC(dev); 266bb0ec6b3SJim Harris int status; 267bb0ec6b3SJim Harris 268bb0ec6b3SJim Harris status = nvme_ctrlr_construct(ctrlr, dev); 269bb0ec6b3SJim Harris 270bb0ec6b3SJim Harris if (status != 0) 271bb0ec6b3SJim Harris return (status); 272bb0ec6b3SJim Harris 273bb0ec6b3SJim Harris /* 274bb0ec6b3SJim Harris * Reset controller twice to ensure we do a transition from cc.en==1 275bb0ec6b3SJim Harris * to cc.en==0. This is because we don't really know what status 276bb0ec6b3SJim Harris * the controller was left in when boot handed off to OS. 277bb0ec6b3SJim Harris */ 278b846efd7SJim Harris status = nvme_ctrlr_hw_reset(ctrlr); 279bb0ec6b3SJim Harris if (status != 0) 280bb0ec6b3SJim Harris return (status); 281bb0ec6b3SJim Harris 282b846efd7SJim Harris status = nvme_ctrlr_hw_reset(ctrlr); 283bb0ec6b3SJim Harris if (status != 0) 284bb0ec6b3SJim Harris return (status); 285bb0ec6b3SJim Harris 286bb0ec6b3SJim Harris ctrlr->config_hook.ich_func = nvme_ctrlr_start; 287bb0ec6b3SJim Harris ctrlr->config_hook.ich_arg = ctrlr; 288bb0ec6b3SJim Harris 289bb0ec6b3SJim Harris config_intrhook_establish(&ctrlr->config_hook); 290bb0ec6b3SJim Harris 291bb0ec6b3SJim Harris return (0); 292bb0ec6b3SJim Harris } 293bb0ec6b3SJim Harris 294bb0ec6b3SJim Harris static int 295bb0ec6b3SJim Harris nvme_detach (device_t dev) 296bb0ec6b3SJim Harris { 297bb0ec6b3SJim Harris struct nvme_controller *ctrlr = DEVICE2SOFTC(dev); 298bb0ec6b3SJim Harris 299990e741cSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 300bb0ec6b3SJim Harris return (0); 301bb0ec6b3SJim Harris } 302bb0ec6b3SJim Harris 303bb0ec6b3SJim Harris static void 304038a5ee4SJim Harris nvme_notify_consumer(struct nvme_consumer *cons) 305bb0ec6b3SJim Harris { 306bb0ec6b3SJim Harris device_t *devlist; 307bb0ec6b3SJim Harris struct nvme_controller *ctrlr; 308038a5ee4SJim Harris struct nvme_namespace *ns; 309038a5ee4SJim Harris void *ctrlr_cookie; 310038a5ee4SJim Harris int dev_idx, ns_idx, devcount; 311bb0ec6b3SJim Harris 312bb0ec6b3SJim Harris if (devclass_get_devices(nvme_devclass, &devlist, &devcount)) 313bb0ec6b3SJim Harris return; 314bb0ec6b3SJim Harris 315038a5ee4SJim Harris for (dev_idx = 0; dev_idx < devcount; dev_idx++) { 316038a5ee4SJim Harris ctrlr = DEVICE2SOFTC(devlist[dev_idx]); 317038a5ee4SJim Harris if (cons->ctrlr_fn != NULL) 318038a5ee4SJim Harris ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr); 319038a5ee4SJim Harris else 320038a5ee4SJim Harris ctrlr_cookie = NULL; 321038a5ee4SJim Harris ctrlr->cons_cookie[cons->id] = ctrlr_cookie; 322038a5ee4SJim Harris for (ns_idx = 0; ns_idx < ctrlr->cdata.nn; ns_idx++) { 323038a5ee4SJim Harris ns = &ctrlr->ns[ns_idx]; 324038a5ee4SJim Harris if (cons->ns_fn != NULL) 325038a5ee4SJim Harris ns->cons_cookie[cons->id] = 326038a5ee4SJim Harris (*cons->ns_fn)(ns, ctrlr_cookie); 327038a5ee4SJim Harris } 328bb0ec6b3SJim Harris } 329bb0ec6b3SJim Harris 330bb0ec6b3SJim Harris free(devlist, M_TEMP); 331bb0ec6b3SJim Harris } 332bb0ec6b3SJim Harris 333038a5ee4SJim Harris void 334038a5ee4SJim Harris nvme_notify_async_consumers(struct nvme_controller *ctrlr, 3350d7e13ecSJim Harris const struct nvme_completion *async_cpl, 3360d7e13ecSJim Harris uint32_t log_page_id, void *log_page_buffer, 3370d7e13ecSJim Harris uint32_t log_page_size) 338038a5ee4SJim Harris { 339038a5ee4SJim Harris struct nvme_consumer *cons; 340038a5ee4SJim Harris uint32_t i; 341038a5ee4SJim Harris 342038a5ee4SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 343038a5ee4SJim Harris cons = &nvme_consumer[i]; 344038a5ee4SJim Harris if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL) 3450d7e13ecSJim Harris (*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl, 3460d7e13ecSJim Harris log_page_id, log_page_buffer, log_page_size); 347038a5ee4SJim Harris } 348038a5ee4SJim Harris } 349038a5ee4SJim Harris 350bb0ec6b3SJim Harris struct nvme_consumer * 351038a5ee4SJim Harris nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn, 352038a5ee4SJim Harris nvme_cons_async_fn_t async_fn) 353bb0ec6b3SJim Harris { 354bb0ec6b3SJim Harris int i; 355bb0ec6b3SJim Harris 356bb0ec6b3SJim Harris /* 357bb0ec6b3SJim Harris * TODO: add locking around consumer registration. Not an issue 358bb0ec6b3SJim Harris * right now since we only have one nvme consumer - nvd(4). 359bb0ec6b3SJim Harris */ 360bb0ec6b3SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) 361038a5ee4SJim Harris if (nvme_consumer[i].id == INVALID_CONSUMER_ID) { 362038a5ee4SJim Harris nvme_consumer[i].id = i; 363038a5ee4SJim Harris nvme_consumer[i].ns_fn = ns_fn; 364038a5ee4SJim Harris nvme_consumer[i].ctrlr_fn = ctrlr_fn; 365038a5ee4SJim Harris nvme_consumer[i].async_fn = async_fn; 366bb0ec6b3SJim Harris 367bb0ec6b3SJim Harris nvme_notify_consumer(&nvme_consumer[i]); 368bb0ec6b3SJim Harris return (&nvme_consumer[i]); 369bb0ec6b3SJim Harris } 370bb0ec6b3SJim Harris 371bb0ec6b3SJim Harris printf("nvme(4): consumer not registered - no slots available\n"); 372bb0ec6b3SJim Harris return (NULL); 373bb0ec6b3SJim Harris } 374bb0ec6b3SJim Harris 375bb0ec6b3SJim Harris void 376bb0ec6b3SJim Harris nvme_unregister_consumer(struct nvme_consumer *consumer) 377bb0ec6b3SJim Harris { 378bb0ec6b3SJim Harris 379038a5ee4SJim Harris consumer->id = INVALID_CONSUMER_ID; 380bb0ec6b3SJim Harris } 381bb0ec6b3SJim Harris 382