1bb0ec6b3SJim Harris /*- 2496a2752SJim Harris * Copyright (C) 2012-2014 Intel Corporation 3bb0ec6b3SJim Harris * All rights reserved. 4bb0ec6b3SJim Harris * 5bb0ec6b3SJim Harris * Redistribution and use in source and binary forms, with or without 6bb0ec6b3SJim Harris * modification, are permitted provided that the following conditions 7bb0ec6b3SJim Harris * are met: 8bb0ec6b3SJim Harris * 1. Redistributions of source code must retain the above copyright 9bb0ec6b3SJim Harris * notice, this list of conditions and the following disclaimer. 10bb0ec6b3SJim Harris * 2. Redistributions in binary form must reproduce the above copyright 11bb0ec6b3SJim Harris * notice, this list of conditions and the following disclaimer in the 12bb0ec6b3SJim Harris * documentation and/or other materials provided with the distribution. 13bb0ec6b3SJim Harris * 14bb0ec6b3SJim Harris * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15bb0ec6b3SJim Harris * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16bb0ec6b3SJim Harris * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17bb0ec6b3SJim Harris * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18bb0ec6b3SJim Harris * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19bb0ec6b3SJim Harris * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20bb0ec6b3SJim Harris * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21bb0ec6b3SJim Harris * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22bb0ec6b3SJim Harris * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23bb0ec6b3SJim Harris * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24bb0ec6b3SJim Harris * SUCH DAMAGE. 25bb0ec6b3SJim Harris */ 26bb0ec6b3SJim Harris 27bb0ec6b3SJim Harris #include <sys/cdefs.h> 28bb0ec6b3SJim Harris __FBSDID("$FreeBSD$"); 29bb0ec6b3SJim Harris 30bb0ec6b3SJim Harris #include <sys/param.h> 31bb0ec6b3SJim Harris #include <sys/bus.h> 32bb0ec6b3SJim Harris #include <sys/conf.h> 33bb0ec6b3SJim Harris #include <sys/module.h> 34bb0ec6b3SJim Harris 35ad697276SJim Harris #include <vm/uma.h> 36ad697276SJim Harris 37d891b199SJim Harris #include <dev/pci/pcireg.h> 38bb0ec6b3SJim Harris #include <dev/pci/pcivar.h> 39bb0ec6b3SJim Harris 40bb0ec6b3SJim Harris #include "nvme_private.h" 41bb0ec6b3SJim Harris 42bb0ec6b3SJim Harris struct nvme_consumer { 43038a5ee4SJim Harris uint32_t id; 44038a5ee4SJim Harris nvme_cons_ns_fn_t ns_fn; 45038a5ee4SJim Harris nvme_cons_ctrlr_fn_t ctrlr_fn; 46038a5ee4SJim Harris nvme_cons_async_fn_t async_fn; 47232e2edbSJim Harris nvme_cons_fail_fn_t fail_fn; 48bb0ec6b3SJim Harris }; 49bb0ec6b3SJim Harris 50bb0ec6b3SJim Harris struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS]; 51038a5ee4SJim Harris #define INVALID_CONSUMER_ID 0xFFFF 52bb0ec6b3SJim Harris 53ad697276SJim Harris uma_zone_t nvme_request_zone; 54cb5b7c13SJim Harris int32_t nvme_retry_count; 55ad697276SJim Harris 56bb0ec6b3SJim Harris MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations"); 57bb0ec6b3SJim Harris 58bb0ec6b3SJim Harris static int nvme_probe(device_t); 59bb0ec6b3SJim Harris static int nvme_attach(device_t); 60bb0ec6b3SJim Harris static int nvme_detach(device_t); 61e1e84e74SJim Harris static int nvme_modevent(module_t mod, int type, void *arg); 62bb0ec6b3SJim Harris 63bb0ec6b3SJim Harris static devclass_t nvme_devclass; 64bb0ec6b3SJim Harris 65bb0ec6b3SJim Harris static device_method_t nvme_pci_methods[] = { 66bb0ec6b3SJim Harris /* Device interface */ 67bb0ec6b3SJim Harris DEVMETHOD(device_probe, nvme_probe), 68bb0ec6b3SJim Harris DEVMETHOD(device_attach, nvme_attach), 69bb0ec6b3SJim Harris DEVMETHOD(device_detach, nvme_detach), 70bb0ec6b3SJim Harris { 0, 0 } 71bb0ec6b3SJim Harris }; 72bb0ec6b3SJim Harris 73bb0ec6b3SJim Harris static driver_t nvme_pci_driver = { 74bb0ec6b3SJim Harris "nvme", 75bb0ec6b3SJim Harris nvme_pci_methods, 76bb0ec6b3SJim Harris sizeof(struct nvme_controller), 77bb0ec6b3SJim Harris }; 78bb0ec6b3SJim Harris 79e1e84e74SJim Harris DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0); 80bb0ec6b3SJim Harris MODULE_VERSION(nvme, 1); 81bb0ec6b3SJim Harris 82bb0ec6b3SJim Harris static struct _pcsid 83bb0ec6b3SJim Harris { 84eb4929fbSJim Harris uint32_t devid; 85eb4929fbSJim Harris int match_subdevice; 86eb4929fbSJim Harris uint16_t subdevice; 87bb0ec6b3SJim Harris const char *desc; 88bb0ec6b3SJim Harris } pci_ids[] = { 89eb4929fbSJim Harris { 0x01118086, 0, 0, "NVMe Controller" }, 90eb4929fbSJim Harris { IDT32_PCI_ID, 0, 0, "IDT NVMe Controller (32 channel)" }, 91eb4929fbSJim Harris { IDT8_PCI_ID, 0, 0, "IDT NVMe Controller (8 channel)" }, 92eb4929fbSJim Harris { 0x09538086, 1, 0x3702, "DC P3700 SSD" }, 93eb4929fbSJim Harris { 0x09538086, 1, 0x3703, "DC P3700 SSD [2.5\" SFF]" }, 94eb4929fbSJim Harris { 0x09538086, 1, 0x3704, "DC P3500 SSD [Add-in Card]" }, 95eb4929fbSJim Harris { 0x09538086, 1, 0x3705, "DC P3500 SSD [2.5\" SFF]" }, 96eb4929fbSJim Harris { 0x09538086, 1, 0x3709, "DC P3600 SSD [Add-in Card]" }, 97eb4929fbSJim Harris { 0x09538086, 1, 0x370a, "DC P3600 SSD [2.5\" SFF]" }, 98eb4929fbSJim Harris { 0x00000000, 0, 0, NULL } 99bb0ec6b3SJim Harris }; 100bb0ec6b3SJim Harris 101bb0ec6b3SJim Harris static int 102eb4929fbSJim Harris nvme_match(uint32_t devid, uint16_t subdevice, struct _pcsid *ep) 103eb4929fbSJim Harris { 104eb4929fbSJim Harris if (devid != ep->devid) 105eb4929fbSJim Harris return 0; 106eb4929fbSJim Harris 107eb4929fbSJim Harris if (!ep->match_subdevice) 108eb4929fbSJim Harris return 1; 109eb4929fbSJim Harris 110eb4929fbSJim Harris if (subdevice == ep->subdevice) 111eb4929fbSJim Harris return 1; 112eb4929fbSJim Harris else 113eb4929fbSJim Harris return 0; 114eb4929fbSJim Harris } 115eb4929fbSJim Harris 116eb4929fbSJim Harris static int 117bb0ec6b3SJim Harris nvme_probe (device_t device) 118bb0ec6b3SJim Harris { 119d891b199SJim Harris struct _pcsid *ep; 120eb4929fbSJim Harris uint32_t devid; 121eb4929fbSJim Harris uint16_t subdevice; 122d891b199SJim Harris 123eb4929fbSJim Harris devid = pci_get_devid(device); 124eb4929fbSJim Harris subdevice = pci_get_subdevice(device); 125d891b199SJim Harris ep = pci_ids; 126d891b199SJim Harris 127eb4929fbSJim Harris while (ep->devid) { 128eb4929fbSJim Harris if (nvme_match(devid, subdevice, ep)) 129eb4929fbSJim Harris break; 130bb0ec6b3SJim Harris ++ep; 131eb4929fbSJim Harris } 132bb0ec6b3SJim Harris 133bb0ec6b3SJim Harris if (ep->desc) { 134bb0ec6b3SJim Harris device_set_desc(device, ep->desc); 1357e2fd606SJim Harris return (BUS_PROBE_DEFAULT); 136d891b199SJim Harris } 137d891b199SJim Harris 1387e2fd606SJim Harris #if defined(PCIS_STORAGE_NVM) 1397e2fd606SJim Harris if (pci_get_class(device) == PCIC_STORAGE && 1407e2fd606SJim Harris pci_get_subclass(device) == PCIS_STORAGE_NVM && 1417e2fd606SJim Harris pci_get_progif(device) == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) { 1427e2fd606SJim Harris device_set_desc(device, "Generic NVMe Device"); 1437e2fd606SJim Harris return (BUS_PROBE_GENERIC); 1447e2fd606SJim Harris } 1457e2fd606SJim Harris #endif 1467e2fd606SJim Harris 1477e2fd606SJim Harris return (ENXIO); 148bb0ec6b3SJim Harris } 149bb0ec6b3SJim Harris 150bb0ec6b3SJim Harris static void 151ad697276SJim Harris nvme_init(void) 152ad697276SJim Harris { 153038a5ee4SJim Harris uint32_t i; 154038a5ee4SJim Harris 155ad697276SJim Harris nvme_request_zone = uma_zcreate("nvme_request", 156ad697276SJim Harris sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0); 157038a5ee4SJim Harris 158038a5ee4SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) 159038a5ee4SJim Harris nvme_consumer[i].id = INVALID_CONSUMER_ID; 160ad697276SJim Harris } 161ad697276SJim Harris 162ad697276SJim Harris SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL); 163ad697276SJim Harris 164ad697276SJim Harris static void 165ad697276SJim Harris nvme_uninit(void) 166ad697276SJim Harris { 167ad697276SJim Harris uma_zdestroy(nvme_request_zone); 168ad697276SJim Harris } 169ad697276SJim Harris 170ad697276SJim Harris SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL); 171ad697276SJim Harris 172ad697276SJim Harris static void 173bb0ec6b3SJim Harris nvme_load(void) 174bb0ec6b3SJim Harris { 175bb0ec6b3SJim Harris } 176bb0ec6b3SJim Harris 177bb0ec6b3SJim Harris static void 178bb0ec6b3SJim Harris nvme_unload(void) 179bb0ec6b3SJim Harris { 180bb0ec6b3SJim Harris } 181bb0ec6b3SJim Harris 182bb0ec6b3SJim Harris static void 183bb0ec6b3SJim Harris nvme_shutdown(void) 184bb0ec6b3SJim Harris { 185bb0ec6b3SJim Harris device_t *devlist; 186bb0ec6b3SJim Harris struct nvme_controller *ctrlr; 187bb0ec6b3SJim Harris int dev, devcount; 188bb0ec6b3SJim Harris 189bb0ec6b3SJim Harris if (devclass_get_devices(nvme_devclass, &devlist, &devcount)) 190bb0ec6b3SJim Harris return; 191bb0ec6b3SJim Harris 192bb0ec6b3SJim Harris for (dev = 0; dev < devcount; dev++) { 193bb0ec6b3SJim Harris ctrlr = DEVICE2SOFTC(devlist[dev]); 19456183abcSJim Harris nvme_ctrlr_shutdown(ctrlr); 195bb0ec6b3SJim Harris } 196bb0ec6b3SJim Harris 197bb0ec6b3SJim Harris free(devlist, M_TEMP); 198bb0ec6b3SJim Harris } 199bb0ec6b3SJim Harris 200bb0ec6b3SJim Harris static int 201bb0ec6b3SJim Harris nvme_modevent(module_t mod, int type, void *arg) 202bb0ec6b3SJim Harris { 203bb0ec6b3SJim Harris 204bb0ec6b3SJim Harris switch (type) { 205bb0ec6b3SJim Harris case MOD_LOAD: 206bb0ec6b3SJim Harris nvme_load(); 207bb0ec6b3SJim Harris break; 208bb0ec6b3SJim Harris case MOD_UNLOAD: 209bb0ec6b3SJim Harris nvme_unload(); 210bb0ec6b3SJim Harris break; 211bb0ec6b3SJim Harris case MOD_SHUTDOWN: 212bb0ec6b3SJim Harris nvme_shutdown(); 213bb0ec6b3SJim Harris break; 214bb0ec6b3SJim Harris default: 215bb0ec6b3SJim Harris break; 216bb0ec6b3SJim Harris } 217bb0ec6b3SJim Harris 218bb0ec6b3SJim Harris return (0); 219bb0ec6b3SJim Harris } 220bb0ec6b3SJim Harris 221bb0ec6b3SJim Harris void 222bb0ec6b3SJim Harris nvme_dump_command(struct nvme_command *cmd) 223bb0ec6b3SJim Harris { 2244b52061eSDavid E. O'Brien printf( 2254b52061eSDavid E. O'Brien "opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n", 226bb0ec6b3SJim Harris cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid, 227bb0ec6b3SJim Harris cmd->rsvd2, cmd->rsvd3, 2284b52061eSDavid E. O'Brien (uintmax_t)cmd->mptr, (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2, 229bb0ec6b3SJim Harris cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14, 230bb0ec6b3SJim Harris cmd->cdw15); 231bb0ec6b3SJim Harris } 232bb0ec6b3SJim Harris 233bb0ec6b3SJim Harris void 234bb0ec6b3SJim Harris nvme_dump_completion(struct nvme_completion *cpl) 235bb0ec6b3SJim Harris { 236bb0ec6b3SJim Harris printf("cdw0:%08x sqhd:%04x sqid:%04x " 237bb0ec6b3SJim Harris "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n", 238bb0ec6b3SJim Harris cpl->cdw0, cpl->sqhd, cpl->sqid, 239cf81529cSJim Harris cpl->cid, cpl->status.p, cpl->status.sc, cpl->status.sct, 240cf81529cSJim Harris cpl->status.m, cpl->status.dnr); 241bb0ec6b3SJim Harris } 242bb0ec6b3SJim Harris 243bb0ec6b3SJim Harris static int 244bb0ec6b3SJim Harris nvme_attach(device_t dev) 245bb0ec6b3SJim Harris { 246bb0ec6b3SJim Harris struct nvme_controller *ctrlr = DEVICE2SOFTC(dev); 247bb0ec6b3SJim Harris int status; 248bb0ec6b3SJim Harris 249bb0ec6b3SJim Harris status = nvme_ctrlr_construct(ctrlr, dev); 250bb0ec6b3SJim Harris 2517aa27dbaSJim Harris if (status != 0) { 2527aa27dbaSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 253bb0ec6b3SJim Harris return (status); 2547aa27dbaSJim Harris } 255bb0ec6b3SJim Harris 256bb0ec6b3SJim Harris /* 257bb0ec6b3SJim Harris * Reset controller twice to ensure we do a transition from cc.en==1 258bb0ec6b3SJim Harris * to cc.en==0. This is because we don't really know what status 259bb0ec6b3SJim Harris * the controller was left in when boot handed off to OS. 260bb0ec6b3SJim Harris */ 261b846efd7SJim Harris status = nvme_ctrlr_hw_reset(ctrlr); 2627aa27dbaSJim Harris if (status != 0) { 2637aa27dbaSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 264bb0ec6b3SJim Harris return (status); 2657aa27dbaSJim Harris } 266bb0ec6b3SJim Harris 267b846efd7SJim Harris status = nvme_ctrlr_hw_reset(ctrlr); 2687aa27dbaSJim Harris if (status != 0) { 2697aa27dbaSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 270bb0ec6b3SJim Harris return (status); 2717aa27dbaSJim Harris } 272bb0ec6b3SJim Harris 273eb32b874SJim Harris pci_enable_busmaster(dev); 274eb32b874SJim Harris 275be34f216SJim Harris ctrlr->config_hook.ich_func = nvme_ctrlr_start_config_hook; 276bb0ec6b3SJim Harris ctrlr->config_hook.ich_arg = ctrlr; 277bb0ec6b3SJim Harris 278bb0ec6b3SJim Harris config_intrhook_establish(&ctrlr->config_hook); 279bb0ec6b3SJim Harris 280bb0ec6b3SJim Harris return (0); 281bb0ec6b3SJim Harris } 282bb0ec6b3SJim Harris 283bb0ec6b3SJim Harris static int 284bb0ec6b3SJim Harris nvme_detach (device_t dev) 285bb0ec6b3SJim Harris { 286bb0ec6b3SJim Harris struct nvme_controller *ctrlr = DEVICE2SOFTC(dev); 287bb0ec6b3SJim Harris 288990e741cSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 289eb32b874SJim Harris pci_disable_busmaster(dev); 290bb0ec6b3SJim Harris return (0); 291bb0ec6b3SJim Harris } 292bb0ec6b3SJim Harris 293bb0ec6b3SJim Harris static void 294496a2752SJim Harris nvme_notify(struct nvme_consumer *cons, 295496a2752SJim Harris struct nvme_controller *ctrlr) 296bb0ec6b3SJim Harris { 297038a5ee4SJim Harris struct nvme_namespace *ns; 298038a5ee4SJim Harris void *ctrlr_cookie; 299496a2752SJim Harris int cmpset, ns_idx; 300bb0ec6b3SJim Harris 301496a2752SJim Harris /* 302496a2752SJim Harris * The consumer may register itself after the nvme devices 303496a2752SJim Harris * have registered with the kernel, but before the 304496a2752SJim Harris * driver has completed initialization. In that case, 305496a2752SJim Harris * return here, and when initialization completes, the 306496a2752SJim Harris * controller will make sure the consumer gets notified. 307496a2752SJim Harris */ 308496a2752SJim Harris if (!ctrlr->is_initialized) 309bb0ec6b3SJim Harris return; 310bb0ec6b3SJim Harris 311496a2752SJim Harris cmpset = atomic_cmpset_32(&ctrlr->notification_sent, 0, 1); 312496a2752SJim Harris 313496a2752SJim Harris if (cmpset == 0) 314496a2752SJim Harris return; 315496a2752SJim Harris 316038a5ee4SJim Harris if (cons->ctrlr_fn != NULL) 317038a5ee4SJim Harris ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr); 318038a5ee4SJim Harris else 319038a5ee4SJim Harris ctrlr_cookie = NULL; 320038a5ee4SJim Harris ctrlr->cons_cookie[cons->id] = ctrlr_cookie; 321086d23cfSJim Harris if (ctrlr->is_failed) { 322086d23cfSJim Harris if (cons->fail_fn != NULL) 323086d23cfSJim Harris (*cons->fail_fn)(ctrlr_cookie); 324086d23cfSJim Harris /* 325086d23cfSJim Harris * Do not notify consumers about the namespaces of a 326086d23cfSJim Harris * failed controller. 327086d23cfSJim Harris */ 328496a2752SJim Harris return; 329086d23cfSJim Harris } 330*a8a18dd5SWarner Losh for (ns_idx = 0; ns_idx < min(ctrlr->cdata.nn, NVME_MAX_NAMESPACES); ns_idx++) { 331038a5ee4SJim Harris ns = &ctrlr->ns[ns_idx]; 332*a8a18dd5SWarner Losh if (ns->data.nsze == 0) 333*a8a18dd5SWarner Losh continue; 334038a5ee4SJim Harris if (cons->ns_fn != NULL) 335038a5ee4SJim Harris ns->cons_cookie[cons->id] = 336038a5ee4SJim Harris (*cons->ns_fn)(ns, ctrlr_cookie); 337038a5ee4SJim Harris } 338bb0ec6b3SJim Harris } 339bb0ec6b3SJim Harris 340496a2752SJim Harris void 341496a2752SJim Harris nvme_notify_new_controller(struct nvme_controller *ctrlr) 342496a2752SJim Harris { 343496a2752SJim Harris int i; 344496a2752SJim Harris 345496a2752SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 346496a2752SJim Harris if (nvme_consumer[i].id != INVALID_CONSUMER_ID) { 347496a2752SJim Harris nvme_notify(&nvme_consumer[i], ctrlr); 348496a2752SJim Harris } 349496a2752SJim Harris } 350496a2752SJim Harris } 351496a2752SJim Harris 352496a2752SJim Harris static void 353496a2752SJim Harris nvme_notify_new_consumer(struct nvme_consumer *cons) 354496a2752SJim Harris { 355496a2752SJim Harris device_t *devlist; 356496a2752SJim Harris struct nvme_controller *ctrlr; 357496a2752SJim Harris int dev_idx, devcount; 358496a2752SJim Harris 359496a2752SJim Harris if (devclass_get_devices(nvme_devclass, &devlist, &devcount)) 360496a2752SJim Harris return; 361496a2752SJim Harris 362496a2752SJim Harris for (dev_idx = 0; dev_idx < devcount; dev_idx++) { 363496a2752SJim Harris ctrlr = DEVICE2SOFTC(devlist[dev_idx]); 364496a2752SJim Harris nvme_notify(cons, ctrlr); 365496a2752SJim Harris } 366496a2752SJim Harris 367bb0ec6b3SJim Harris free(devlist, M_TEMP); 368bb0ec6b3SJim Harris } 369bb0ec6b3SJim Harris 370038a5ee4SJim Harris void 371038a5ee4SJim Harris nvme_notify_async_consumers(struct nvme_controller *ctrlr, 3720d7e13ecSJim Harris const struct nvme_completion *async_cpl, 3730d7e13ecSJim Harris uint32_t log_page_id, void *log_page_buffer, 3740d7e13ecSJim Harris uint32_t log_page_size) 375038a5ee4SJim Harris { 376038a5ee4SJim Harris struct nvme_consumer *cons; 377038a5ee4SJim Harris uint32_t i; 378038a5ee4SJim Harris 379038a5ee4SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 380038a5ee4SJim Harris cons = &nvme_consumer[i]; 381038a5ee4SJim Harris if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL) 3820d7e13ecSJim Harris (*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl, 3830d7e13ecSJim Harris log_page_id, log_page_buffer, log_page_size); 384038a5ee4SJim Harris } 385038a5ee4SJim Harris } 386038a5ee4SJim Harris 387232e2edbSJim Harris void 388232e2edbSJim Harris nvme_notify_fail_consumers(struct nvme_controller *ctrlr) 389232e2edbSJim Harris { 390232e2edbSJim Harris struct nvme_consumer *cons; 391232e2edbSJim Harris uint32_t i; 392232e2edbSJim Harris 3930e1fd2ddSJim Harris /* 3940e1fd2ddSJim Harris * This controller failed during initialization (i.e. IDENTIFY 3950e1fd2ddSJim Harris * command failed or timed out). Do not notify any nvme 3960e1fd2ddSJim Harris * consumers of the failure here, since the consumer does not 3970e1fd2ddSJim Harris * even know about the controller yet. 3980e1fd2ddSJim Harris */ 3990e1fd2ddSJim Harris if (!ctrlr->is_initialized) 4000e1fd2ddSJim Harris return; 4010e1fd2ddSJim Harris 402232e2edbSJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 403232e2edbSJim Harris cons = &nvme_consumer[i]; 404232e2edbSJim Harris if (cons->id != INVALID_CONSUMER_ID && cons->fail_fn != NULL) 405232e2edbSJim Harris cons->fail_fn(ctrlr->cons_cookie[i]); 406232e2edbSJim Harris } 407232e2edbSJim Harris } 408232e2edbSJim Harris 409bb0ec6b3SJim Harris struct nvme_consumer * 410038a5ee4SJim Harris nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn, 411232e2edbSJim Harris nvme_cons_async_fn_t async_fn, 412232e2edbSJim Harris nvme_cons_fail_fn_t fail_fn) 413bb0ec6b3SJim Harris { 414bb0ec6b3SJim Harris int i; 415bb0ec6b3SJim Harris 416bb0ec6b3SJim Harris /* 417bb0ec6b3SJim Harris * TODO: add locking around consumer registration. Not an issue 418bb0ec6b3SJim Harris * right now since we only have one nvme consumer - nvd(4). 419bb0ec6b3SJim Harris */ 420bb0ec6b3SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) 421038a5ee4SJim Harris if (nvme_consumer[i].id == INVALID_CONSUMER_ID) { 422038a5ee4SJim Harris nvme_consumer[i].id = i; 423038a5ee4SJim Harris nvme_consumer[i].ns_fn = ns_fn; 424038a5ee4SJim Harris nvme_consumer[i].ctrlr_fn = ctrlr_fn; 425038a5ee4SJim Harris nvme_consumer[i].async_fn = async_fn; 426232e2edbSJim Harris nvme_consumer[i].fail_fn = fail_fn; 427bb0ec6b3SJim Harris 428496a2752SJim Harris nvme_notify_new_consumer(&nvme_consumer[i]); 429bb0ec6b3SJim Harris return (&nvme_consumer[i]); 430bb0ec6b3SJim Harris } 431bb0ec6b3SJim Harris 432bb0ec6b3SJim Harris printf("nvme(4): consumer not registered - no slots available\n"); 433bb0ec6b3SJim Harris return (NULL); 434bb0ec6b3SJim Harris } 435bb0ec6b3SJim Harris 436bb0ec6b3SJim Harris void 437bb0ec6b3SJim Harris nvme_unregister_consumer(struct nvme_consumer *consumer) 438bb0ec6b3SJim Harris { 439bb0ec6b3SJim Harris 440038a5ee4SJim Harris consumer->id = INVALID_CONSUMER_ID; 441bb0ec6b3SJim Harris } 442bb0ec6b3SJim Harris 443955910a9SJim Harris void 444955910a9SJim Harris nvme_completion_poll_cb(void *arg, const struct nvme_completion *cpl) 445955910a9SJim Harris { 446955910a9SJim Harris struct nvme_completion_poll_status *status = arg; 447955910a9SJim Harris 448955910a9SJim Harris /* 449955910a9SJim Harris * Copy status into the argument passed by the caller, so that 450955910a9SJim Harris * the caller can check the status to determine if the 451955910a9SJim Harris * the request passed or failed. 452955910a9SJim Harris */ 453955910a9SJim Harris memcpy(&status->cpl, cpl, sizeof(*cpl)); 454955910a9SJim Harris wmb(); 455955910a9SJim Harris status->done = TRUE; 456955910a9SJim Harris } 457