1bb0ec6b3SJim Harris /*- 2e9efbc13SJim Harris * Copyright (C) 2012-2013 Intel Corporation 3bb0ec6b3SJim Harris * All rights reserved. 4bb0ec6b3SJim Harris * 5bb0ec6b3SJim Harris * Redistribution and use in source and binary forms, with or without 6bb0ec6b3SJim Harris * modification, are permitted provided that the following conditions 7bb0ec6b3SJim Harris * are met: 8bb0ec6b3SJim Harris * 1. Redistributions of source code must retain the above copyright 9bb0ec6b3SJim Harris * notice, this list of conditions and the following disclaimer. 10bb0ec6b3SJim Harris * 2. Redistributions in binary form must reproduce the above copyright 11bb0ec6b3SJim Harris * notice, this list of conditions and the following disclaimer in the 12bb0ec6b3SJim Harris * documentation and/or other materials provided with the distribution. 13bb0ec6b3SJim Harris * 14bb0ec6b3SJim Harris * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15bb0ec6b3SJim Harris * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16bb0ec6b3SJim Harris * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17bb0ec6b3SJim Harris * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18bb0ec6b3SJim Harris * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19bb0ec6b3SJim Harris * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20bb0ec6b3SJim Harris * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21bb0ec6b3SJim Harris * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22bb0ec6b3SJim Harris * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23bb0ec6b3SJim Harris * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24bb0ec6b3SJim Harris * SUCH DAMAGE. 25bb0ec6b3SJim Harris */ 26bb0ec6b3SJim Harris 27bb0ec6b3SJim Harris #include <sys/cdefs.h> 28bb0ec6b3SJim Harris __FBSDID("$FreeBSD$"); 29bb0ec6b3SJim Harris 30bb0ec6b3SJim Harris #include <sys/param.h> 31bb0ec6b3SJim Harris #include <sys/bus.h> 32bb0ec6b3SJim Harris #include <sys/conf.h> 33bb0ec6b3SJim Harris #include <sys/module.h> 34bb0ec6b3SJim Harris 35ad697276SJim Harris #include <vm/uma.h> 36ad697276SJim Harris 37d891b199SJim Harris #include <dev/pci/pcireg.h> 38bb0ec6b3SJim Harris #include <dev/pci/pcivar.h> 39bb0ec6b3SJim Harris 40bb0ec6b3SJim Harris #include "nvme_private.h" 41bb0ec6b3SJim Harris 42bb0ec6b3SJim Harris struct nvme_consumer { 43038a5ee4SJim Harris uint32_t id; 44038a5ee4SJim Harris nvme_cons_ns_fn_t ns_fn; 45038a5ee4SJim Harris nvme_cons_ctrlr_fn_t ctrlr_fn; 46038a5ee4SJim Harris nvme_cons_async_fn_t async_fn; 47232e2edbSJim Harris nvme_cons_fail_fn_t fail_fn; 48bb0ec6b3SJim Harris }; 49bb0ec6b3SJim Harris 50bb0ec6b3SJim Harris struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS]; 51038a5ee4SJim Harris #define INVALID_CONSUMER_ID 0xFFFF 52bb0ec6b3SJim Harris 53ad697276SJim Harris uma_zone_t nvme_request_zone; 54cb5b7c13SJim Harris int32_t nvme_retry_count; 55ad697276SJim Harris 56bb0ec6b3SJim Harris MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations"); 57bb0ec6b3SJim Harris 58bb0ec6b3SJim Harris static int nvme_probe(device_t); 59bb0ec6b3SJim Harris static int nvme_attach(device_t); 60bb0ec6b3SJim Harris static int nvme_detach(device_t); 61e1e84e74SJim Harris static int nvme_modevent(module_t mod, int type, void *arg); 62bb0ec6b3SJim Harris 63bb0ec6b3SJim Harris static devclass_t nvme_devclass; 64bb0ec6b3SJim Harris 65bb0ec6b3SJim Harris static device_method_t nvme_pci_methods[] = { 66bb0ec6b3SJim Harris /* Device interface */ 67bb0ec6b3SJim Harris DEVMETHOD(device_probe, nvme_probe), 68bb0ec6b3SJim Harris DEVMETHOD(device_attach, nvme_attach), 69bb0ec6b3SJim Harris DEVMETHOD(device_detach, nvme_detach), 70bb0ec6b3SJim Harris { 0, 0 } 71bb0ec6b3SJim Harris }; 72bb0ec6b3SJim Harris 73bb0ec6b3SJim Harris static driver_t nvme_pci_driver = { 74bb0ec6b3SJim Harris "nvme", 75bb0ec6b3SJim Harris nvme_pci_methods, 76bb0ec6b3SJim Harris sizeof(struct nvme_controller), 77bb0ec6b3SJim Harris }; 78bb0ec6b3SJim Harris 79e1e84e74SJim Harris DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0); 80bb0ec6b3SJim Harris MODULE_VERSION(nvme, 1); 81bb0ec6b3SJim Harris 82bb0ec6b3SJim Harris static struct _pcsid 83bb0ec6b3SJim Harris { 84bb0ec6b3SJim Harris u_int32_t type; 85bb0ec6b3SJim Harris const char *desc; 86bb0ec6b3SJim Harris } pci_ids[] = { 87bb0ec6b3SJim Harris { 0x01118086, "NVMe Controller" }, 88bb0ec6b3SJim Harris { CHATHAM_PCI_ID, "Chatham Prototype NVMe Controller" }, 8938ce9496SJim Harris { IDT32_PCI_ID, "IDT NVMe Controller (32 channel)" }, 9038ce9496SJim Harris { IDT8_PCI_ID, "IDT NVMe Controller (8 channel)" }, 91bb0ec6b3SJim Harris { 0x00000000, NULL } 92bb0ec6b3SJim Harris }; 93bb0ec6b3SJim Harris 94bb0ec6b3SJim Harris static int 95bb0ec6b3SJim Harris nvme_probe (device_t device) 96bb0ec6b3SJim Harris { 97d891b199SJim Harris struct _pcsid *ep; 98d891b199SJim Harris u_int32_t type; 99d891b199SJim Harris 100d891b199SJim Harris type = pci_get_devid(device); 101d891b199SJim Harris ep = pci_ids; 102d891b199SJim Harris 103bb0ec6b3SJim Harris while (ep->type && ep->type != type) 104bb0ec6b3SJim Harris ++ep; 105bb0ec6b3SJim Harris 106bb0ec6b3SJim Harris if (ep->desc) { 107bb0ec6b3SJim Harris device_set_desc(device, ep->desc); 1087e2fd606SJim Harris return (BUS_PROBE_DEFAULT); 109d891b199SJim Harris } 110d891b199SJim Harris 1117e2fd606SJim Harris #if defined(PCIS_STORAGE_NVM) 1127e2fd606SJim Harris if (pci_get_class(device) == PCIC_STORAGE && 1137e2fd606SJim Harris pci_get_subclass(device) == PCIS_STORAGE_NVM && 1147e2fd606SJim Harris pci_get_progif(device) == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) { 1157e2fd606SJim Harris device_set_desc(device, "Generic NVMe Device"); 1167e2fd606SJim Harris return (BUS_PROBE_GENERIC); 1177e2fd606SJim Harris } 1187e2fd606SJim Harris #endif 1197e2fd606SJim Harris 1207e2fd606SJim Harris return (ENXIO); 121bb0ec6b3SJim Harris } 122bb0ec6b3SJim Harris 123bb0ec6b3SJim Harris static void 124ad697276SJim Harris nvme_init(void) 125ad697276SJim Harris { 126038a5ee4SJim Harris uint32_t i; 127038a5ee4SJim Harris 128ad697276SJim Harris nvme_request_zone = uma_zcreate("nvme_request", 129ad697276SJim Harris sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0); 130038a5ee4SJim Harris 131038a5ee4SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) 132038a5ee4SJim Harris nvme_consumer[i].id = INVALID_CONSUMER_ID; 133ad697276SJim Harris } 134ad697276SJim Harris 135ad697276SJim Harris SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL); 136ad697276SJim Harris 137ad697276SJim Harris static void 138ad697276SJim Harris nvme_uninit(void) 139ad697276SJim Harris { 140ad697276SJim Harris uma_zdestroy(nvme_request_zone); 141ad697276SJim Harris } 142ad697276SJim Harris 143ad697276SJim Harris SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL); 144ad697276SJim Harris 145ad697276SJim Harris static void 146bb0ec6b3SJim Harris nvme_load(void) 147bb0ec6b3SJim Harris { 148bb0ec6b3SJim Harris } 149bb0ec6b3SJim Harris 150bb0ec6b3SJim Harris static void 151bb0ec6b3SJim Harris nvme_unload(void) 152bb0ec6b3SJim Harris { 153bb0ec6b3SJim Harris } 154bb0ec6b3SJim Harris 155bb0ec6b3SJim Harris static void 156bb0ec6b3SJim Harris nvme_shutdown(void) 157bb0ec6b3SJim Harris { 158bb0ec6b3SJim Harris device_t *devlist; 159bb0ec6b3SJim Harris struct nvme_controller *ctrlr; 160bb0ec6b3SJim Harris int dev, devcount; 161bb0ec6b3SJim Harris 162bb0ec6b3SJim Harris if (devclass_get_devices(nvme_devclass, &devlist, &devcount)) 163bb0ec6b3SJim Harris return; 164bb0ec6b3SJim Harris 165bb0ec6b3SJim Harris for (dev = 0; dev < devcount; dev++) { 166bb0ec6b3SJim Harris ctrlr = DEVICE2SOFTC(devlist[dev]); 16756183abcSJim Harris nvme_ctrlr_shutdown(ctrlr); 168bb0ec6b3SJim Harris } 169bb0ec6b3SJim Harris 170bb0ec6b3SJim Harris free(devlist, M_TEMP); 171bb0ec6b3SJim Harris } 172bb0ec6b3SJim Harris 173bb0ec6b3SJim Harris static int 174bb0ec6b3SJim Harris nvme_modevent(module_t mod, int type, void *arg) 175bb0ec6b3SJim Harris { 176bb0ec6b3SJim Harris 177bb0ec6b3SJim Harris switch (type) { 178bb0ec6b3SJim Harris case MOD_LOAD: 179bb0ec6b3SJim Harris nvme_load(); 180bb0ec6b3SJim Harris break; 181bb0ec6b3SJim Harris case MOD_UNLOAD: 182bb0ec6b3SJim Harris nvme_unload(); 183bb0ec6b3SJim Harris break; 184bb0ec6b3SJim Harris case MOD_SHUTDOWN: 185bb0ec6b3SJim Harris nvme_shutdown(); 186bb0ec6b3SJim Harris break; 187bb0ec6b3SJim Harris default: 188bb0ec6b3SJim Harris break; 189bb0ec6b3SJim Harris } 190bb0ec6b3SJim Harris 191bb0ec6b3SJim Harris return (0); 192bb0ec6b3SJim Harris } 193bb0ec6b3SJim Harris 194bb0ec6b3SJim Harris void 195bb0ec6b3SJim Harris nvme_dump_command(struct nvme_command *cmd) 196bb0ec6b3SJim Harris { 1974b52061eSDavid E. O'Brien printf( 1984b52061eSDavid E. O'Brien "opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n", 199bb0ec6b3SJim Harris cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid, 200bb0ec6b3SJim Harris cmd->rsvd2, cmd->rsvd3, 2014b52061eSDavid E. O'Brien (uintmax_t)cmd->mptr, (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2, 202bb0ec6b3SJim Harris cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14, 203bb0ec6b3SJim Harris cmd->cdw15); 204bb0ec6b3SJim Harris } 205bb0ec6b3SJim Harris 206bb0ec6b3SJim Harris void 207bb0ec6b3SJim Harris nvme_dump_completion(struct nvme_completion *cpl) 208bb0ec6b3SJim Harris { 209bb0ec6b3SJim Harris printf("cdw0:%08x sqhd:%04x sqid:%04x " 210bb0ec6b3SJim Harris "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n", 211bb0ec6b3SJim Harris cpl->cdw0, cpl->sqhd, cpl->sqid, 212cf81529cSJim Harris cpl->cid, cpl->status.p, cpl->status.sc, cpl->status.sct, 213cf81529cSJim Harris cpl->status.m, cpl->status.dnr); 214bb0ec6b3SJim Harris } 215bb0ec6b3SJim Harris 216bb0ec6b3SJim Harris static int 217bb0ec6b3SJim Harris nvme_attach(device_t dev) 218bb0ec6b3SJim Harris { 219bb0ec6b3SJim Harris struct nvme_controller *ctrlr = DEVICE2SOFTC(dev); 220bb0ec6b3SJim Harris int status; 221bb0ec6b3SJim Harris 222bb0ec6b3SJim Harris status = nvme_ctrlr_construct(ctrlr, dev); 223bb0ec6b3SJim Harris 224*7aa27dbaSJim Harris if (status != 0) { 225*7aa27dbaSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 226bb0ec6b3SJim Harris return (status); 227*7aa27dbaSJim Harris } 228bb0ec6b3SJim Harris 229bb0ec6b3SJim Harris /* 230bb0ec6b3SJim Harris * Reset controller twice to ensure we do a transition from cc.en==1 231bb0ec6b3SJim Harris * to cc.en==0. This is because we don't really know what status 232bb0ec6b3SJim Harris * the controller was left in when boot handed off to OS. 233bb0ec6b3SJim Harris */ 234b846efd7SJim Harris status = nvme_ctrlr_hw_reset(ctrlr); 235*7aa27dbaSJim Harris if (status != 0) { 236*7aa27dbaSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 237bb0ec6b3SJim Harris return (status); 238*7aa27dbaSJim Harris } 239bb0ec6b3SJim Harris 240b846efd7SJim Harris status = nvme_ctrlr_hw_reset(ctrlr); 241*7aa27dbaSJim Harris if (status != 0) { 242*7aa27dbaSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 243bb0ec6b3SJim Harris return (status); 244*7aa27dbaSJim Harris } 245bb0ec6b3SJim Harris 246be34f216SJim Harris nvme_sysctl_initialize_ctrlr(ctrlr); 247be34f216SJim Harris 248eb32b874SJim Harris pci_enable_busmaster(dev); 249eb32b874SJim Harris 250be34f216SJim Harris ctrlr->config_hook.ich_func = nvme_ctrlr_start_config_hook; 251bb0ec6b3SJim Harris ctrlr->config_hook.ich_arg = ctrlr; 252bb0ec6b3SJim Harris 253bb0ec6b3SJim Harris config_intrhook_establish(&ctrlr->config_hook); 254bb0ec6b3SJim Harris 255bb0ec6b3SJim Harris return (0); 256bb0ec6b3SJim Harris } 257bb0ec6b3SJim Harris 258bb0ec6b3SJim Harris static int 259bb0ec6b3SJim Harris nvme_detach (device_t dev) 260bb0ec6b3SJim Harris { 261bb0ec6b3SJim Harris struct nvme_controller *ctrlr = DEVICE2SOFTC(dev); 262bb0ec6b3SJim Harris 263990e741cSJim Harris nvme_ctrlr_destruct(ctrlr, dev); 264eb32b874SJim Harris pci_disable_busmaster(dev); 265bb0ec6b3SJim Harris return (0); 266bb0ec6b3SJim Harris } 267bb0ec6b3SJim Harris 268bb0ec6b3SJim Harris static void 269038a5ee4SJim Harris nvme_notify_consumer(struct nvme_consumer *cons) 270bb0ec6b3SJim Harris { 271bb0ec6b3SJim Harris device_t *devlist; 272bb0ec6b3SJim Harris struct nvme_controller *ctrlr; 273038a5ee4SJim Harris struct nvme_namespace *ns; 274038a5ee4SJim Harris void *ctrlr_cookie; 275038a5ee4SJim Harris int dev_idx, ns_idx, devcount; 276bb0ec6b3SJim Harris 277bb0ec6b3SJim Harris if (devclass_get_devices(nvme_devclass, &devlist, &devcount)) 278bb0ec6b3SJim Harris return; 279bb0ec6b3SJim Harris 280038a5ee4SJim Harris for (dev_idx = 0; dev_idx < devcount; dev_idx++) { 281038a5ee4SJim Harris ctrlr = DEVICE2SOFTC(devlist[dev_idx]); 282038a5ee4SJim Harris if (cons->ctrlr_fn != NULL) 283038a5ee4SJim Harris ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr); 284038a5ee4SJim Harris else 285038a5ee4SJim Harris ctrlr_cookie = NULL; 286038a5ee4SJim Harris ctrlr->cons_cookie[cons->id] = ctrlr_cookie; 287086d23cfSJim Harris if (ctrlr->is_failed) { 288086d23cfSJim Harris if (cons->fail_fn != NULL) 289086d23cfSJim Harris (*cons->fail_fn)(ctrlr_cookie); 290086d23cfSJim Harris /* 291086d23cfSJim Harris * Do not notify consumers about the namespaces of a 292086d23cfSJim Harris * failed controller. 293086d23cfSJim Harris */ 294086d23cfSJim Harris continue; 295086d23cfSJim Harris } 296038a5ee4SJim Harris for (ns_idx = 0; ns_idx < ctrlr->cdata.nn; ns_idx++) { 297038a5ee4SJim Harris ns = &ctrlr->ns[ns_idx]; 298038a5ee4SJim Harris if (cons->ns_fn != NULL) 299038a5ee4SJim Harris ns->cons_cookie[cons->id] = 300038a5ee4SJim Harris (*cons->ns_fn)(ns, ctrlr_cookie); 301038a5ee4SJim Harris } 302bb0ec6b3SJim Harris } 303bb0ec6b3SJim Harris 304bb0ec6b3SJim Harris free(devlist, M_TEMP); 305bb0ec6b3SJim Harris } 306bb0ec6b3SJim Harris 307038a5ee4SJim Harris void 308038a5ee4SJim Harris nvme_notify_async_consumers(struct nvme_controller *ctrlr, 3090d7e13ecSJim Harris const struct nvme_completion *async_cpl, 3100d7e13ecSJim Harris uint32_t log_page_id, void *log_page_buffer, 3110d7e13ecSJim Harris uint32_t log_page_size) 312038a5ee4SJim Harris { 313038a5ee4SJim Harris struct nvme_consumer *cons; 314038a5ee4SJim Harris uint32_t i; 315038a5ee4SJim Harris 316038a5ee4SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 317038a5ee4SJim Harris cons = &nvme_consumer[i]; 318038a5ee4SJim Harris if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL) 3190d7e13ecSJim Harris (*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl, 3200d7e13ecSJim Harris log_page_id, log_page_buffer, log_page_size); 321038a5ee4SJim Harris } 322038a5ee4SJim Harris } 323038a5ee4SJim Harris 324232e2edbSJim Harris void 325232e2edbSJim Harris nvme_notify_fail_consumers(struct nvme_controller *ctrlr) 326232e2edbSJim Harris { 327232e2edbSJim Harris struct nvme_consumer *cons; 328232e2edbSJim Harris uint32_t i; 329232e2edbSJim Harris 330232e2edbSJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) { 331232e2edbSJim Harris cons = &nvme_consumer[i]; 332232e2edbSJim Harris if (cons->id != INVALID_CONSUMER_ID && cons->fail_fn != NULL) 333232e2edbSJim Harris cons->fail_fn(ctrlr->cons_cookie[i]); 334232e2edbSJim Harris } 335232e2edbSJim Harris } 336232e2edbSJim Harris 337bb0ec6b3SJim Harris struct nvme_consumer * 338038a5ee4SJim Harris nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn, 339232e2edbSJim Harris nvme_cons_async_fn_t async_fn, 340232e2edbSJim Harris nvme_cons_fail_fn_t fail_fn) 341bb0ec6b3SJim Harris { 342bb0ec6b3SJim Harris int i; 343bb0ec6b3SJim Harris 344bb0ec6b3SJim Harris /* 345bb0ec6b3SJim Harris * TODO: add locking around consumer registration. Not an issue 346bb0ec6b3SJim Harris * right now since we only have one nvme consumer - nvd(4). 347bb0ec6b3SJim Harris */ 348bb0ec6b3SJim Harris for (i = 0; i < NVME_MAX_CONSUMERS; i++) 349038a5ee4SJim Harris if (nvme_consumer[i].id == INVALID_CONSUMER_ID) { 350038a5ee4SJim Harris nvme_consumer[i].id = i; 351038a5ee4SJim Harris nvme_consumer[i].ns_fn = ns_fn; 352038a5ee4SJim Harris nvme_consumer[i].ctrlr_fn = ctrlr_fn; 353038a5ee4SJim Harris nvme_consumer[i].async_fn = async_fn; 354232e2edbSJim Harris nvme_consumer[i].fail_fn = fail_fn; 355bb0ec6b3SJim Harris 356bb0ec6b3SJim Harris nvme_notify_consumer(&nvme_consumer[i]); 357bb0ec6b3SJim Harris return (&nvme_consumer[i]); 358bb0ec6b3SJim Harris } 359bb0ec6b3SJim Harris 360bb0ec6b3SJim Harris printf("nvme(4): consumer not registered - no slots available\n"); 361bb0ec6b3SJim Harris return (NULL); 362bb0ec6b3SJim Harris } 363bb0ec6b3SJim Harris 364bb0ec6b3SJim Harris void 365bb0ec6b3SJim Harris nvme_unregister_consumer(struct nvme_consumer *consumer) 366bb0ec6b3SJim Harris { 367bb0ec6b3SJim Harris 368038a5ee4SJim Harris consumer->id = INVALID_CONSUMER_ID; 369bb0ec6b3SJim Harris } 370bb0ec6b3SJim Harris 371955910a9SJim Harris void 372955910a9SJim Harris nvme_completion_poll_cb(void *arg, const struct nvme_completion *cpl) 373955910a9SJim Harris { 374955910a9SJim Harris struct nvme_completion_poll_status *status = arg; 375955910a9SJim Harris 376955910a9SJim Harris /* 377955910a9SJim Harris * Copy status into the argument passed by the caller, so that 378955910a9SJim Harris * the caller can check the status to determine if the 379955910a9SJim Harris * the request passed or failed. 380955910a9SJim Harris */ 381955910a9SJim Harris memcpy(&status->cpl, cpl, sizeof(*cpl)); 382955910a9SJim Harris wmb(); 383955910a9SJim Harris status->done = TRUE; 384955910a9SJim Harris } 385