1 /*- 2 * Copyright (c) 2018 Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/bio.h> 29 #include <sys/bus.h> 30 #include <sys/malloc.h> 31 #include <sys/uuid.h> 32 33 #include <contrib/dev/acpica/include/acpi.h> 34 #include <dev/acpica/acpivar.h> 35 #include <dev/nvdimm/nvdimm_var.h> 36 37 int 38 nvdimm_create_namespaces(struct SPA_mapping *spa, ACPI_TABLE_NFIT *nfitbl) 39 { 40 ACPI_NFIT_MEMORY_MAP **regions; 41 struct nvdimm_dev *nv; 42 struct nvdimm_label_entry *e; 43 struct nvdimm_namespace *ns; 44 nfit_handle_t dimm_handle; 45 char *name; 46 int i, error, num_regions; 47 48 acpi_nfit_get_region_mappings_by_spa_range(nfitbl, spa->spa_nfit_idx, 49 ®ions, &num_regions); 50 if (num_regions == 0 || num_regions != regions[0]->InterleaveWays) { 51 free(regions, M_NVDIMM); 52 return (ENXIO); 53 } 54 dimm_handle = regions[0]->DeviceHandle; 55 nv = nvdimm_find_by_handle(dimm_handle); 56 if (nv == NULL) { 57 free(regions, M_NVDIMM); 58 return (ENXIO); 59 } 60 i = 0; 61 error = 0; 62 SLIST_FOREACH(e, &nv->labels, link) { 63 ns = malloc(sizeof(struct nvdimm_namespace), M_NVDIMM, 64 M_WAITOK | M_ZERO); 65 ns->dev.spa_domain = spa->dev.spa_domain; 66 ns->dev.spa_phys_base = spa->dev.spa_phys_base + 67 regions[0]->RegionOffset + 68 num_regions * 69 (e->label.dimm_phys_addr - regions[0]->Address); 70 ns->dev.spa_len = num_regions * e->label.raw_size; 71 ns->dev.spa_efi_mem_flags = spa->dev.spa_efi_mem_flags; 72 ns->dev.spa_memattr = spa->dev.spa_memattr; 73 asprintf(&name, M_NVDIMM, "spa%dns%d", spa->spa_nfit_idx, i); 74 error = nvdimm_spa_dev_init(&ns->dev, name, i); 75 free(name, M_NVDIMM); 76 if (error != 0) 77 break; 78 SLIST_INSERT_HEAD(&spa->namespaces, ns, link); 79 i++; 80 } 81 free(regions, M_NVDIMM); 82 return (error); 83 } 84 85 void 86 nvdimm_destroy_namespaces(struct SPA_mapping *spa) 87 { 88 struct nvdimm_namespace *ns, *next; 89 90 SLIST_FOREACH_SAFE(ns, &spa->namespaces, link, next) { 91 SLIST_REMOVE_HEAD(&spa->namespaces, link); 92 nvdimm_spa_dev_fini(&ns->dev); 93 free(ns, M_NVDIMM); 94 } 95 } 96