1 /* 2 * Copyright (c) 2017 Stormshield. 3 * Copyright (c) 2017 Semihalf. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 #ifndef _IF_MVNETAVAR_H_ 32 #define _IF_MVNETAVAR_H_ 33 #include <net/if.h> 34 35 #define MVNETA_HWHEADER_SIZE 2 /* Marvell Header */ 36 #define MVNETA_ETHER_SIZE 22 /* Maximum ether size */ 37 #define MVNETA_MAX_CSUM_MTU 1600 /* Port1,2 hw limit */ 38 39 /* 40 * Limit support for frame up to hw csum limit 41 * until jumbo frame support is added. 42 */ 43 #define MVNETA_MAX_FRAME (MVNETA_MAX_CSUM_MTU + MVNETA_ETHER_SIZE) 44 45 /* 46 * Default limit of queue length 47 * 48 * queue 0 is lowest priority and queue 7 is highest priority. 49 * IP packet is received on queue 7 by default. 50 */ 51 #define MVNETA_TX_RING_CNT 512 52 #define MVNETA_RX_RING_CNT 256 53 54 #define MVNETA_BUFRING_SIZE 1024 55 56 #define MVNETA_PACKET_OFFSET 64 57 #define MVNETA_PACKET_SIZE MCLBYTES 58 59 #define MVNETA_RXTH_COUNT 128 60 #define MVNETA_RX_REFILL_COUNT 8 61 #define MVNETA_TX_RECLAIM_COUNT 32 62 63 /* 64 * Device Register access 65 */ 66 #define MVNETA_READ(sc, reg) \ 67 bus_read_4((sc)->res[0], (reg)) 68 #define MVNETA_WRITE(sc, reg, val) \ 69 bus_write_4((sc)->res[0], (reg), (val)) 70 71 #define MVNETA_READ_REGION(sc, reg, val, c) \ 72 bus_read_region_4((sc)->res[0], (reg), (val), (c)) 73 #define MVNETA_WRITE_REGION(sc, reg, val, c) \ 74 bus_write_region_4((sc)->res[0], (reg), (val), (c)) 75 76 #define MVNETA_READ_MIB_4(sc, reg) \ 77 bus_read_4((sc)->res[0], MVNETA_PORTMIB_BASE + (reg)) 78 #define MVNETA_READ_MIB_8(sc, reg) \ 79 bus_read_8((sc)->res[0], MVNETA_PORTMIB_BASE + (reg)) 80 81 #define MVNETA_IS_LINKUP(sc) \ 82 (MVNETA_READ((sc), MVNETA_PSR) & MVNETA_PSR_LINKUP) 83 84 #define MVNETA_IS_QUEUE_SET(queues, q) \ 85 ((((queues) >> (q)) & 0x1)) 86 87 /* 88 * EEE: Lower Power Idle config 89 * Default timer is duration of MTU sized frame transmission. 90 * The timer can be negotiated by LLDP protocol, but we have no 91 * support. 92 */ 93 #define MVNETA_LPI_TS (ETHERMTU * 8 / 1000) /* [us] */ 94 #define MVNETA_LPI_TW (ETHERMTU * 8 / 1000) /* [us] */ 95 #define MVNETA_LPI_LI (ETHERMTU * 8 / 1000) /* [us] */ 96 97 /* 98 * DMA Descriptor 99 * 100 * the ethernet device has 8 rx/tx DMA queues. each of queue has its own 101 * decriptor list. descriptors are simply index by counter inside the device. 102 */ 103 #define MVNETA_TX_SEGLIMIT 32 104 105 #define MVNETA_QUEUE_IDLE 1 106 #define MVNETA_QUEUE_WORKING 2 107 #define MVNETA_QUEUE_DISABLED 3 108 109 struct mvneta_buf { 110 struct mbuf * m; /* pointer to related mbuf */ 111 bus_dmamap_t dmap; 112 }; 113 114 struct mvneta_rx_ring { 115 int queue_status; 116 /* Real descriptors array. shared by RxDMA */ 117 struct mvneta_rx_desc *desc; 118 bus_dmamap_t desc_map; 119 bus_addr_t desc_pa; 120 121 /* Managment entries for each of descritors */ 122 struct mvneta_buf rxbuf[MVNETA_RX_RING_CNT]; 123 124 /* locks */ 125 struct mtx ring_mtx; 126 127 /* Index */ 128 int dma; 129 int cpu; 130 131 /* Limit */ 132 int queue_th_received; 133 int queue_th_time; /* [Tclk] */ 134 135 /* LRO */ 136 struct lro_ctrl lro; 137 boolean_t lro_enabled; 138 /* Is this queue out of mbuf */ 139 boolean_t needs_refill; 140 } __aligned(CACHE_LINE_SIZE); 141 142 struct mvneta_tx_ring { 143 /* Index of this queue */ 144 int qidx; 145 /* IFNET pointer */ 146 struct ifnet *ifp; 147 /* Ring buffer for IFNET */ 148 struct buf_ring *br; 149 /* Real descriptors array. shared by TxDMA */ 150 struct mvneta_tx_desc *desc; 151 bus_dmamap_t desc_map; 152 bus_addr_t desc_pa; 153 154 /* Managment entries for each of descritors */ 155 struct mvneta_buf txbuf[MVNETA_TX_RING_CNT]; 156 157 /* locks */ 158 struct mtx ring_mtx; 159 160 /* Index */ 161 int used; 162 int dma; 163 int cpu; 164 165 /* watchdog */ 166 #define MVNETA_WATCHDOG_TXCOMP (hz / 10) /* 100ms */ 167 #define MVNETA_WATCHDOG (10 * hz) /* 10s */ 168 int watchdog_time; 169 int queue_status; 170 boolean_t queue_hung; 171 172 /* Task */ 173 struct task task; 174 struct taskqueue *taskq; 175 176 /* Stats */ 177 uint32_t drv_error; 178 } __aligned(CACHE_LINE_SIZE); 179 180 static __inline int 181 tx_counter_adv(int ctr, int n) 182 { 183 184 ctr += n; 185 while (__predict_false(ctr >= MVNETA_TX_RING_CNT)) 186 ctr -= MVNETA_TX_RING_CNT; 187 188 return (ctr); 189 } 190 191 static __inline int 192 rx_counter_adv(int ctr, int n) 193 { 194 195 ctr += n; 196 while (__predict_false(ctr >= MVNETA_RX_RING_CNT)) 197 ctr -= MVNETA_RX_RING_CNT; 198 199 return (ctr); 200 } 201 202 /* 203 * Timeout control 204 */ 205 #define MVNETA_PHY_TIMEOUT 10000 /* msec */ 206 #define RX_DISABLE_TIMEOUT 0x1000000 /* times */ 207 #define TX_DISABLE_TIMEOUT 0x1000000 /* times */ 208 #define TX_FIFO_EMPTY_TIMEOUT 0x1000000 /* times */ 209 210 /* 211 * Debug 212 */ 213 #define KASSERT_SC_MTX(sc) \ 214 KASSERT(mtx_owned(&(sc)->mtx), ("SC mutex not owned")) 215 #define KASSERT_BM_MTX(sc) \ 216 KASSERT(mtx_owned(&(sc)->bm.bm_mtx), ("BM mutex not owned")) 217 #define KASSERT_RX_MTX(sc, q) \ 218 KASSERT(mtx_owned(&(sc)->rx_ring[(q)].ring_mtx),\ 219 ("RX mutex not owned")) 220 #define KASSERT_TX_MTX(sc, q) \ 221 KASSERT(mtx_owned(&(sc)->tx_ring[(q)].ring_mtx),\ 222 ("TX mutex not owned")) 223 224 /* 225 * sysctl(9) parameters 226 */ 227 struct mvneta_sysctl_queue { 228 struct mvneta_softc *sc; 229 int rxtx; 230 int queue; 231 }; 232 #define MVNETA_SYSCTL_RX 0 233 #define MVNETA_SYSCTL_TX 1 234 235 struct mvneta_sysctl_mib { 236 struct mvneta_softc *sc; 237 int index; 238 uint64_t counter; 239 }; 240 241 enum mvneta_phy_mode { 242 MVNETA_PHY_QSGMII, 243 MVNETA_PHY_SGMII, 244 MVNETA_PHY_RGMII, 245 MVNETA_PHY_RGMII_ID 246 }; 247 248 /* 249 * Ethernet Device main context 250 */ 251 DECLARE_CLASS(mvneta_driver); 252 253 struct mvneta_softc { 254 device_t dev; 255 uint32_t version; 256 /* 257 * mtx must be held by interface functions to/from 258 * other frameworks. interrupt hander, sysctl hander, 259 * ioctl hander, and so on. 260 */ 261 struct mtx mtx; 262 struct resource *res[2]; 263 void *ih_cookie[1]; 264 265 struct ifnet *ifp; 266 uint32_t mvneta_if_flags; 267 uint32_t mvneta_media; 268 269 int phy_attached; 270 enum mvneta_phy_mode phy_mode; 271 int phy_addr; 272 int phy_speed; /* PHY speed */ 273 boolean_t phy_fdx; /* Full duplex mode */ 274 boolean_t autoneg; /* Autonegotiation status */ 275 boolean_t use_inband_status; /* In-band link status */ 276 277 /* 278 * Link State control 279 */ 280 boolean_t linkup; 281 device_t miibus; 282 struct mii_data *mii; 283 uint8_t enaddr[ETHER_ADDR_LEN]; 284 struct ifmedia mvneta_ifmedia; 285 286 bus_dma_tag_t rx_dtag; 287 bus_dma_tag_t rxbuf_dtag; 288 bus_dma_tag_t tx_dtag; 289 bus_dma_tag_t txmbuf_dtag; 290 struct mvneta_rx_ring rx_ring[MVNETA_RX_QNUM_MAX]; 291 struct mvneta_tx_ring tx_ring[MVNETA_TX_QNUM_MAX]; 292 293 /* 294 * Maintance clock 295 */ 296 struct callout tick_ch; 297 298 int cf_lpi; 299 int cf_fc; 300 int debug; 301 302 /* 303 * Sysctl interfaces 304 */ 305 struct mvneta_sysctl_queue sysctl_rx_queue[MVNETA_RX_QNUM_MAX]; 306 struct mvneta_sysctl_queue sysctl_tx_queue[MVNETA_TX_QNUM_MAX]; 307 308 /* 309 * MIB counter 310 */ 311 struct mvneta_sysctl_mib sysctl_mib[MVNETA_PORTMIB_NOCOUNTER]; 312 uint64_t counter_pdfc; 313 uint64_t counter_pofc; 314 uint32_t counter_watchdog; /* manual reset when clearing mib */ 315 uint32_t counter_watchdog_mib; /* reset after each mib update */ 316 }; 317 #define MVNETA_RX_RING(sc, q) \ 318 (&(sc)->rx_ring[(q)]) 319 #define MVNETA_TX_RING(sc, q) \ 320 (&(sc)->tx_ring[(q)]) 321 322 int mvneta_attach(device_t); 323 324 #ifdef FDT 325 int mvneta_fdt_mac_address(struct mvneta_softc *, uint8_t *); 326 #endif 327 328 #endif /* _IF_MVNETAVAR_H_ */ 329