1 /******************************************************************************* 2 3 Copyright (c) 2006, Myricom Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Myricom Inc, nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 $FreeBSD$ 33 ***************************************************************************/ 34 35 #ifndef _myri10ge_mcp_h 36 #define _myri10ge_mcp_h 37 38 #define MXGEFW_VERSION_MAJOR 1 39 #define MXGEFW_VERSION_MINOR 4 40 41 #ifdef MXGEFW 42 typedef signed char int8_t; 43 typedef signed short int16_t; 44 typedef signed int int32_t; 45 typedef signed long long int64_t; 46 typedef unsigned char uint8_t; 47 typedef unsigned short uint16_t; 48 typedef unsigned int uint32_t; 49 typedef unsigned long long uint64_t; 50 #endif 51 52 /* 8 Bytes */ 53 struct mcp_dma_addr { 54 uint32_t high; 55 uint32_t low; 56 }; 57 typedef struct mcp_dma_addr mcp_dma_addr_t; 58 59 /* 4 Bytes */ 60 struct mcp_slot { 61 uint16_t checksum; 62 uint16_t length; 63 }; 64 typedef struct mcp_slot mcp_slot_t; 65 66 /* 64 Bytes */ 67 struct mcp_cmd { 68 uint32_t cmd; 69 uint32_t data0; /* will be low portion if data > 32 bits */ 70 /* 8 */ 71 uint32_t data1; /* will be high portion if data > 32 bits */ 72 uint32_t data2; /* currently unused.. */ 73 /* 16 */ 74 struct mcp_dma_addr response_addr; 75 /* 24 */ 76 uint8_t pad[40]; 77 }; 78 typedef struct mcp_cmd mcp_cmd_t; 79 80 /* 8 Bytes */ 81 struct mcp_cmd_response { 82 uint32_t data; 83 uint32_t result; 84 }; 85 typedef struct mcp_cmd_response mcp_cmd_response_t; 86 87 88 89 /* 90 flags used in mcp_kreq_ether_send_t: 91 92 The SMALL flag is only needed in the first segment. It is raised 93 for packets that are total less or equal 512 bytes. 94 95 The CKSUM flag must be set in all segments. 96 97 The PADDED flags is set if the packet needs to be padded, and it 98 must be set for all segments. 99 100 The MXGEFW_FLAGS_ALIGN_ODD must be set if the cumulative 101 length of all previous segments was odd. 102 */ 103 104 105 #define MXGEFW_FLAGS_SMALL 0x1 106 #define MXGEFW_FLAGS_TSO_HDR 0x1 107 #define MXGEFW_FLAGS_FIRST 0x2 108 #define MXGEFW_FLAGS_ALIGN_ODD 0x4 109 #define MXGEFW_FLAGS_CKSUM 0x8 110 #define MXGEFW_FLAGS_TSO_LAST 0x8 111 #define MXGEFW_FLAGS_NO_TSO 0x10 112 #define MXGEFW_FLAGS_TSO_CHOP 0x10 113 #define MXGEFW_FLAGS_TSO_PLD 0x20 114 115 #define MXGEFW_SEND_SMALL_SIZE 1520 116 #define MXGEFW_MAX_MTU 9400 117 118 union mcp_pso_or_cumlen { 119 uint16_t pseudo_hdr_offset; 120 uint16_t cum_len; 121 }; 122 typedef union mcp_pso_or_cumlen mcp_pso_or_cumlen_t; 123 124 #define MXGEFW_MAX_SEND_DESC 12 125 #define MXGEFW_PAD 2 126 127 /* 16 Bytes */ 128 struct mcp_kreq_ether_send { 129 uint32_t addr_high; 130 uint32_t addr_low; 131 uint16_t pseudo_hdr_offset; 132 uint16_t length; 133 uint8_t pad; 134 uint8_t rdma_count; 135 uint8_t cksum_offset; /* where to start computing cksum */ 136 uint8_t flags; /* as defined above */ 137 }; 138 typedef struct mcp_kreq_ether_send mcp_kreq_ether_send_t; 139 140 /* 8 Bytes */ 141 struct mcp_kreq_ether_recv { 142 uint32_t addr_high; 143 uint32_t addr_low; 144 }; 145 typedef struct mcp_kreq_ether_recv mcp_kreq_ether_recv_t; 146 147 148 /* Commands */ 149 150 #define MXGEFW_BOOT_HANDOFF 0xfc0000 151 #define MXGEFW_BOOT_DUMMY_RDMA 0xfc01c0 152 153 #define MXGEFW_ETH_CMD 0xf80000 154 #define MXGEFW_ETH_SEND_4 0x200000 155 #define MXGEFW_ETH_SEND_1 0x240000 156 #define MXGEFW_ETH_SEND_2 0x280000 157 #define MXGEFW_ETH_SEND_3 0x2c0000 158 #define MXGEFW_ETH_RECV_SMALL 0x300000 159 #define MXGEFW_ETH_RECV_BIG 0x340000 160 161 #define MXGEFW_ETH_SEND(n) (0x200000 + (((n) & 0x03) * 0x40000)) 162 #define MXGEFW_ETH_SEND_OFFSET(n) (MXGEFW_ETH_SEND(n) - MXGEFW_ETH_SEND_4) 163 164 enum myri10ge_mcp_cmd_type { 165 MXGEFW_CMD_NONE = 0, 166 /* Reset the mcp, it is left in a safe state, waiting 167 for the driver to set all its parameters */ 168 MXGEFW_CMD_RESET, 169 170 /* get the version number of the current firmware.. 171 (may be available in the eeprom strings..? */ 172 MXGEFW_GET_MCP_VERSION, 173 174 175 /* Parameters which must be set by the driver before it can 176 issue MXGEFW_CMD_ETHERNET_UP. They persist until the next 177 MXGEFW_CMD_RESET is issued */ 178 179 MXGEFW_CMD_SET_INTRQ_DMA, 180 MXGEFW_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */ 181 MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */ 182 183 184 /* Parameters which refer to lanai SRAM addresses where the 185 driver must issue PIO writes for various things */ 186 187 MXGEFW_CMD_GET_SEND_OFFSET, 188 MXGEFW_CMD_GET_SMALL_RX_OFFSET, 189 MXGEFW_CMD_GET_BIG_RX_OFFSET, 190 MXGEFW_CMD_GET_IRQ_ACK_OFFSET, 191 MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET, 192 193 /* Parameters which refer to rings stored on the MCP, 194 and whose size is controlled by the mcp */ 195 196 MXGEFW_CMD_GET_SEND_RING_SIZE, /* in bytes */ 197 MXGEFW_CMD_GET_RX_RING_SIZE, /* in bytes */ 198 199 /* Parameters which refer to rings stored in the host, 200 and whose size is controlled by the host. Note that 201 all must be physically contiguous and must contain 202 a power of 2 number of entries. */ 203 204 MXGEFW_CMD_SET_INTRQ_SIZE, /* in bytes */ 205 206 /* command to bring ethernet interface up. Above parameters 207 (plus mtu & mac address) must have been exchanged prior 208 to issuing this command */ 209 MXGEFW_CMD_ETHERNET_UP, 210 211 /* command to bring ethernet interface down. No further sends 212 or receives may be processed until an MXGEFW_CMD_ETHERNET_UP 213 is issued, and all interrupt queues must be flushed prior 214 to ack'ing this command */ 215 216 MXGEFW_CMD_ETHERNET_DOWN, 217 218 /* commands the driver may issue live, without resetting 219 the nic. Note that increasing the mtu "live" should 220 only be done if the driver has already supplied buffers 221 sufficiently large to handle the new mtu. Decreasing 222 the mtu live is safe */ 223 224 MXGEFW_CMD_SET_MTU, 225 MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, /* in microseconds */ 226 MXGEFW_CMD_SET_STATS_INTERVAL, /* in microseconds */ 227 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE, /* replaced by SET_STATS_DMA_V2 */ 228 229 MXGEFW_ENABLE_PROMISC, 230 MXGEFW_DISABLE_PROMISC, 231 MXGEFW_SET_MAC_ADDRESS, 232 233 MXGEFW_ENABLE_FLOW_CONTROL, 234 MXGEFW_DISABLE_FLOW_CONTROL, 235 236 /* do a DMA test 237 data0,data1 = DMA address 238 data2 = RDMA length (MSH), WDMA length (LSH) 239 command return data = repetitions (MSH), 0.5-ms ticks (LSH) 240 */ 241 MXGEFW_DMA_TEST, 242 243 MXGEFW_ENABLE_ALLMULTI, 244 MXGEFW_DISABLE_ALLMULTI, 245 246 /* returns MXGEFW_CMD_ERROR_MULTICAST 247 if there is no room in the cache 248 data0,MSH(data1) = multicast group address */ 249 MXGEFW_JOIN_MULTICAST_GROUP, 250 /* returns MXGEFW_CMD_ERROR_MULTICAST 251 if the address is not in the cache, 252 or is equal to FF-FF-FF-FF-FF-FF 253 data0,MSH(data1) = multicast group address */ 254 MXGEFW_LEAVE_MULTICAST_GROUP, 255 MXGEFW_LEAVE_ALL_MULTICAST_GROUPS, 256 257 MXGEFW_CMD_SET_STATS_DMA_V2, 258 /* data0, data1 = bus addr, 259 data2 = sizeof(struct mcp_irq_data) from driver point of view, allows 260 adding new stuff to mcp_irq_data without changing the ABI */ 261 }; 262 typedef enum myri10ge_mcp_cmd_type myri10ge_mcp_cmd_type_t; 263 264 265 enum myri10ge_mcp_cmd_status { 266 MXGEFW_CMD_OK = 0, 267 MXGEFW_CMD_UNKNOWN, 268 MXGEFW_CMD_ERROR_RANGE, 269 MXGEFW_CMD_ERROR_BUSY, 270 MXGEFW_CMD_ERROR_EMPTY, 271 MXGEFW_CMD_ERROR_CLOSED, 272 MXGEFW_CMD_ERROR_HASH_ERROR, 273 MXGEFW_CMD_ERROR_BAD_PORT, 274 MXGEFW_CMD_ERROR_RESOURCES, 275 MXGEFW_CMD_ERROR_MULTICAST 276 }; 277 typedef enum myri10ge_mcp_cmd_status myri10ge_mcp_cmd_status_t; 278 279 280 #define MXGEFW_OLD_IRQ_DATA_LEN 40 281 282 struct mcp_irq_data { 283 /* add new counters at the beginning */ 284 uint32_t future_use[5]; 285 uint32_t dropped_multicast_filtered; 286 /* 40 Bytes */ 287 uint32_t send_done_count; 288 289 uint32_t link_up; 290 uint32_t dropped_link_overflow; 291 uint32_t dropped_link_error_or_filtered; 292 uint32_t dropped_runt; 293 uint32_t dropped_overrun; 294 uint32_t dropped_no_small_buffer; 295 uint32_t dropped_no_big_buffer; 296 uint32_t rdma_tags_available; 297 298 uint8_t tx_stopped; 299 uint8_t link_down; 300 uint8_t stats_updated; 301 uint8_t valid; 302 }; 303 typedef struct mcp_irq_data mcp_irq_data_t; 304 305 306 #endif /* _myri10ge_mcp_h */ 307